/* Copyright Statement: * * This software/firmware and related documentation ("MediaTek Software") are * protected under relevant copyright laws. The information contained herein * is confidential and proprietary to MediaTek Inc. and/or its licensors. * Without the prior written permission of MediaTek inc. and/or its licensors, * any reproduction, modification, use or disclosure of MediaTek Software, * and information contained herein, in whole or in part, shall be strictly prohibited. */ /* MediaTek Inc. (C) 2018. All rights reserved. * * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. */ #include #include #include #include #include #include #include #include #define PWRAP_REG(ofs) (PWRAP_BASE + ofs) #define DCXO_ENABLE PWRAP_REG(0x190) #define DCXO_NFC_ENABLE (0x1 << 0) #define ENBB_CTRL_MASK (0x3) #define ENBB_CTRL_SHIFT (13) void clk_buf_disp_ctrl(bool onoff, bool force_on_o0) { unsigned int dcxo_enable = DRV_Reg32(DCXO_ENABLE) & (~DCXO_NFC_ENABLE); DRV_WriteReg32(DCXO_ENABLE, dcxo_enable); if (onoff) { pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR, PMIC_XO_EXTBUF3_MODE_MASK, PMIC_XO_EXTBUF3_MODE_MASK, PMIC_XO_EXTBUF3_MODE_SHIFT); pmic_config_interface(PMIC_DCXO_CW00_SET_ADDR, PMIC_XO_EXTBUF3_EN_M_MASK, PMIC_XO_EXTBUF3_EN_M_MASK, PMIC_XO_EXTBUF3_EN_M_SHIFT); } else { pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR, PMIC_XO_EXTBUF3_MODE_MASK, PMIC_XO_EXTBUF3_MODE_MASK, PMIC_XO_EXTBUF3_MODE_SHIFT); pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR, PMIC_XO_EXTBUF3_EN_M_MASK, PMIC_XO_EXTBUF3_EN_M_MASK, PMIC_XO_EXTBUF3_EN_M_SHIFT); } if (force_on_o0) { pmic_config_interface(PMIC_DCXO_CW00_SET_ADDR, ENBB_CTRL_MASK, ENBB_CTRL_MASK, ENBB_CTRL_SHIFT); } else { pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR, ENBB_CTRL_MASK, ENBB_CTRL_MASK, ENBB_CTRL_SHIFT); } }