platform.c 35 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <debug.h>
  32. #include <stdlib.h>
  33. #include <string.h>
  34. #include <video.h>
  35. #include <dev/uart.h>
  36. #include <arch/arm.h>
  37. #include <arch/arm/mmu.h>
  38. #include <arch/ops.h>
  39. #include <target/board.h>
  40. #include <platform/mt_reg_base.h>
  41. #include <platform/mt_disp_drv.h>
  42. #include <platform/disp_drv.h>
  43. #include <platform/primary_display.h>
  44. #include <platform/boot_mode.h>
  45. #include <platform/mt_logo.h>
  46. #include <platform/partition.h>
  47. #include <env.h>
  48. #include <platform/mt_gpio.h>
  49. #include <platform/mt_pmic.h>
  50. #include <platform/mt_pmic_wrap_init.h>
  51. #include <platform/mt_i2c.h>
  52. #include <platform/mtk_key.h>
  53. #include <platform/mt_rtc.h>
  54. #include <platform/mt_leds.h>
  55. #include <platform/upmu_common.h>
  56. #include <platform/mtk_wdt.h>
  57. #include <platform/disp_drv_platform.h>
  58. #include <plinfo.h> // for plinfo_get_brom_header_block_size()
  59. #include <libfdt.h>
  60. // #include <mt_gic.h> // for platform_init_interrupts()
  61. #include <mt_boot.h> // for bldr_load_dtb()
  62. #include <platform.h> // for platform_uninit()
  63. #include <platform/verified_boot.h>
  64. #include <load_vfy_boot.h>
  65. #include <fdt_op.h>
  66. #include <pal_assert.h>
  67. #if defined(MTK_SECURITY_SW_SUPPORT)
  68. #include "oemkey.h"
  69. #endif
  70. #if defined(MTK_AB_OTA_UPDATER)
  71. #include <bootctrl.h>
  72. #endif
  73. #ifdef MTK_SECURITY_SW_SUPPORT
  74. extern u8 g_oemkey[OEM_PUBK_SZ];
  75. #endif
  76. #ifdef LK_DL_CHECK
  77. /*block if check dl fail*/
  78. #undef LK_DL_CHECK_BLOCK_LEVEL
  79. #endif
  80. extern void platform_early_init_timer();
  81. extern void jump_da(u32 addr, u32 arg1, u32 arg2);
  82. extern int i2c_hw_init(void);
  83. extern int mboot_common_load_logo(unsigned long logo_addr, char* filename);
  84. extern void mtk_wdt_disable(void);
  85. extern void platform_deinit_interrupts(void);
  86. extern int mmc_get_dl_info(void);
  87. extern int mmc_legacy_init(int);
  88. extern bool g_boot_menu;
  89. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  90. extern kal_bool is_low_battery(kal_int32 val);
  91. extern int hw_charging_get_charger_type(void);
  92. #endif
  93. #ifdef MTK_MT8193_SUPPORT
  94. extern int mt8193_init(void);
  95. #endif
  96. void config_shared_SRAM_size(void);
  97. extern int dev_info_nr_cpu(void);
  98. BOOT_ARGUMENT *g_boot_arg;
  99. BOOT_ARGUMENT boot_addr;
  100. int g_nr_bank;
  101. BI_DRAM bi_dram[MAX_NR_BANK];
  102. unsigned int g_fb_base;
  103. unsigned int g_fb_size;
  104. static int g_dram_init_ret;
  105. static unsigned int bootarg_addr;
  106. static unsigned int bootarg_size;
  107. extern unsigned int logo_lk_t;
  108. extern unsigned int boot_time;
  109. /******************************************************************************
  110. ******************************************************************************/
  111. int dram_init(void)
  112. {
  113. int i;
  114. struct boot_tag *tags;
  115. /* Get parameters from pre-loader. Get as early as possible
  116. * The address of BOOT_ARGUMENT_LOCATION will be used by Linux later
  117. * So copy the parameters from BOOT_ARGUMENT_LOCATION to LK's memory region
  118. */
  119. g_boot_arg = &boot_addr;
  120. bootarg_addr = BOOT_ARGUMENT_LOCATION;
  121. bootarg_size = 0;
  122. if (*(unsigned int *)BOOT_ARGUMENT_LOCATION == BOOT_ARGUMENT_MAGIC) {
  123. memcpy(g_boot_arg, (void*)BOOT_ARGUMENT_LOCATION, sizeof(BOOT_ARGUMENT));
  124. bootarg_size = sizeof(BOOT_ARGUMENT);
  125. } else {
  126. g_boot_arg->maggic_number = BOOT_ARGUMENT_MAGIC;
  127. for (tags = (void *)BOOT_ARGUMENT_LOCATION; tags->hdr.size; tags = boot_tag_next(tags)) {
  128. switch (tags->hdr.tag) {
  129. case BOOT_TAG_BOOT_REASON:
  130. g_boot_arg->boot_reason = tags->u.boot_reason.boot_reason;
  131. break;
  132. case BOOT_TAG_BOOT_MODE:
  133. g_boot_arg->boot_mode = tags->u.boot_mode.boot_mode;
  134. break;
  135. case BOOT_TAG_META_COM:
  136. g_boot_arg->meta_com_type = tags->u.meta_com.meta_com_type;
  137. g_boot_arg->meta_com_id = tags->u.meta_com.meta_com_id;
  138. g_boot_arg->meta_uart_port = tags->u.meta_com.meta_uart_port;
  139. break;
  140. case BOOT_TAG_LOG_COM:
  141. g_boot_arg->log_port = tags->u.log_com.log_port;
  142. g_boot_arg->log_baudrate = tags->u.log_com.log_baudrate;
  143. g_boot_arg->log_enable = tags->u.log_com.log_enable;
  144. break;
  145. case BOOT_TAG_MEM:
  146. g_boot_arg->dram_rank_num = tags->u.mem.dram_rank_num;
  147. for (i = 0; i < (int)(tags->u.mem.dram_rank_num); i++) {
  148. g_boot_arg->dram_rank_size[i] = tags->u.mem.dram_rank_size[i];
  149. }
  150. g_boot_arg->mblock_info = tags->u.mem.mblock_info;
  151. g_boot_arg->orig_dram_info = tags->u.mem.orig_dram_info;
  152. g_boot_arg->lca_reserved_mem = tags->u.mem.lca_reserved_mem;
  153. g_boot_arg->tee_reserved_mem = tags->u.mem.tee_reserved_mem;
  154. break;
  155. case BOOT_TAG_MD_INFO:
  156. for (i = 0; i < 4; i++) {
  157. g_boot_arg->md_type[i] = tags->u.md_info.md_type[i];
  158. }
  159. break;
  160. case BOOT_TAG_BOOT_TIME:
  161. g_boot_arg->boot_time = tags->u.boot_time.boot_time;
  162. break;
  163. case BOOT_TAG_DA_INFO:
  164. memcpy(&g_boot_arg->da_info, &tags->u.da_info.da_info, sizeof(da_info_t));
  165. break;
  166. case BOOT_TAG_SEC_INFO:
  167. memcpy(&g_boot_arg->sec_limit, &tags->u.sec_info.sec_limit, sizeof(SEC_LIMIT));
  168. break;
  169. case BOOT_TAG_PART_NUM:
  170. g_boot_arg->part_num = tags->u.part_num.part_num;
  171. break;
  172. case BOOT_TAG_PART_INFO:
  173. g_boot_arg->part_info = tags->u.part_info.part_info; /* only copy the pointer but the contains*/
  174. break;
  175. case BOOT_TAG_EFLAG:
  176. g_boot_arg->e_flag = tags->u.eflag.e_flag;
  177. break;
  178. case BOOT_TAG_DDR_RESERVE:
  179. g_boot_arg->ddr_reserve_enable = tags->u.ddr_reserve.ddr_reserve_enable;
  180. g_boot_arg->ddr_reserve_success = tags->u.ddr_reserve.ddr_reserve_success;
  181. g_boot_arg->ddr_reserve_ready = tags->u.ddr_reserve.ddr_reserve_ready;
  182. break;
  183. case BOOT_TAG_DRAM_BUF:
  184. g_boot_arg->dram_buf_size = tags->u.dram_buf.dram_buf_size;
  185. break;
  186. case BOOT_TAG_SRAM_INFO:
  187. g_boot_arg->non_secure_sram_addr = tags->u.sram_info.non_secure_sram_addr;
  188. g_boot_arg->non_secure_sram_size = tags->u.sram_info.non_secure_sram_size;
  189. break;
  190. case BOOT_TAG_PTP:
  191. memcpy(&g_boot_arg->ptp_volt_info, &tags->u.ptp_volt.ptp_volt_info, sizeof(ptp_info_t));
  192. break;
  193. case BOOT_TAG_PL_VERSION:
  194. memcpy(&g_boot_arg->pl_version, &tags->u.pl_version.pl_version, sizeof(tags->u.pl_version.pl_version));
  195. break;
  196. case BOOT_TAG_RAM_CONSOLE_INFO:
  197. g_boot_arg->ram_console_sram_addr = tags->u.ram_console_info.sram_addr;
  198. g_boot_arg->ram_console_sram_size = tags->u.ram_console_info.sram_size;
  199. g_boot_arg->ram_console_def_type = tags->u.ram_console_info.def_type;
  200. g_boot_arg->ram_console_memory_info_offset = tags->u.ram_console_info.memory_info_offset;
  201. break;
  202. default:
  203. break;
  204. }
  205. bootarg_size += tags->hdr.size;
  206. }
  207. }
  208. #ifdef MACH_FPGA
  209. g_nr_bank = 2;
  210. bi_dram[0].start = DRAM_PHY_ADDR + RIL_SIZE;
  211. bi_dram[0].size = (256 * 1024 * 1024) - RIL_SIZE;
  212. bi_dram[1].start = bi_dram[0].start + bi_dram[0].size;
  213. bi_dram[1].size = (256 * 1024 * 1024);
  214. #else
  215. g_nr_bank = g_boot_arg->dram_rank_num;
  216. if (g_nr_bank == 0 || g_nr_bank > MAX_NR_BANK) {
  217. g_dram_init_ret = -1;
  218. //dprintf(CRITICAL, "[LK ERROR] DRAM bank number is not correct!!!");
  219. //while (1) ;
  220. return -1;
  221. }
  222. /* return the actual DRAM info */
  223. for (i = 0; i < (int)(g_boot_arg->mblock_info.mblock_num); i++) {
  224. bi_dram[i].start = g_boot_arg->mblock_info.mblock[i].start;
  225. bi_dram[i].size = g_boot_arg->mblock_info.mblock[i].size;
  226. }
  227. #endif
  228. return 0;
  229. }
  230. unsigned int platform_get_bootarg_addr(void)
  231. {
  232. return bootarg_addr;
  233. }
  234. unsigned int platform_get_bootarg_size(void)
  235. {
  236. return bootarg_size;
  237. }
  238. /*******************************************************
  239. * Routine: memory_size
  240. * Description: return DRAM size to LCM driver
  241. ******************************************************/
  242. u64 physical_memory_size(void)
  243. {
  244. int i;
  245. unsigned long long size = 0;
  246. for (i = 0; i < (int)(g_boot_arg->orig_dram_info.rank_num); i++) {
  247. size += g_boot_arg->orig_dram_info.rank_info[i].size;
  248. }
  249. return size;
  250. }
  251. u32 memory_size(void)
  252. {
  253. unsigned long long size = physical_memory_size();
  254. while (((unsigned long long)DRAM_PHY_ADDR + size) > 0x100000000ULL) {
  255. size -= (unsigned long long)(1024*1024*1024);
  256. }
  257. return (unsigned int)size;
  258. }
  259. void sw_env()
  260. {
  261. #ifdef LK_DL_CHECK
  262. #ifdef MTK_EMMC_SUPPORT
  263. int dl_status = 0;
  264. dl_status = mmc_get_dl_info();
  265. dprintf(INFO, "mt65xx_sw_env--dl_status: %d\n", dl_status);
  266. if (dl_status != 0) {
  267. video_printf("=> TOOL DL image Fail!\n");
  268. dprintf(CRITICAL, "TOOL DL image Fail\n");
  269. #ifdef LK_DL_CHECK_BLOCK_LEVEL
  270. dprintf(CRITICAL, "uboot is blocking by dl info\n");
  271. while (1) ;
  272. #endif
  273. }
  274. #endif
  275. #endif
  276. #ifndef USER_BUILD
  277. switch (g_boot_mode) {
  278. case META_BOOT:
  279. video_printf(" => META MODE\n");
  280. break;
  281. case FACTORY_BOOT:
  282. video_printf(" => FACTORY MODE\n");
  283. break;
  284. case RECOVERY_BOOT:
  285. video_printf(" => RECOVERY MODE\n");
  286. break;
  287. case SW_REBOOT:
  288. //video_printf(" => SW RESET\n");
  289. break;
  290. case NORMAL_BOOT:
  291. //if(g_boot_arg->boot_reason != BR_RTC && get_env("hibboot") != NULL && atoi(get_env("hibboot")) == 1)
  292. if (!g_boot_menu && get_env("hibboot") != NULL && atoi(get_env("hibboot")) == 1)
  293. video_printf(" => HIBERNATION BOOT\n");
  294. else
  295. video_printf(" => NORMAL BOOT\n");
  296. break;
  297. case ADVMETA_BOOT:
  298. video_printf(" => ADVANCED META MODE\n");
  299. break;
  300. case ATE_FACTORY_BOOT:
  301. video_printf(" => ATE FACTORY MODE\n");
  302. break;
  303. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  304. case KERNEL_POWER_OFF_CHARGING_BOOT:
  305. video_printf(" => POWER OFF CHARGING MODE\n");
  306. break;
  307. case LOW_POWER_OFF_CHARGING_BOOT:
  308. video_printf(" => LOW POWER OFF CHARGING MODE\n");
  309. break;
  310. #endif
  311. case ALARM_BOOT:
  312. video_printf(" => ALARM BOOT\n");
  313. break;
  314. case FASTBOOT:
  315. video_printf(" => FASTBOOT mode...\n");
  316. break;
  317. default:
  318. video_printf(" => UNKNOWN BOOT\n");
  319. }
  320. return;
  321. #endif
  322. #ifdef USER_BUILD
  323. if (g_boot_mode == FASTBOOT)
  324. video_printf(" => FASTBOOT mode...\n");
  325. return;
  326. #endif
  327. }
  328. void platform_init_mmu_mappings(void)
  329. {
  330. unsigned int addr;
  331. unsigned int dram_size = 0;
  332. dram_init();
  333. arm_mmu_init();
  334. dram_size = physical_memory_size();
  335. /* map dram region */
  336. for (addr = 0; addr < dram_size; addr += (1024*1024)) {
  337. /*virtual to physical 1-1 mapping*/
  338. arm_mmu_map_section(bi_dram[0].start+addr,bi_dram[0].start+addr, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE);
  339. }
  340. /* ummap TEE memory regoin */
  341. if (g_boot_arg->tee_reserved_mem.size != 0) {
  342. u64 j, k;
  343. k = g_boot_arg->tee_reserved_mem.start;
  344. j = ROUNDUP(g_boot_arg->tee_reserved_mem.size, 1024*1024);
  345. for (; j > 0; j -= (1024*1024)) {
  346. arm_mmu_map_section((uintptr_t)k , (uintptr_t)k, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN);
  347. k += (1024*1024);
  348. }
  349. }
  350. arch_enable_mmu(); //enable mmu after setup page table to avoid cpu prefetch which may bring on emi violation
  351. }
  352. /******************************************************************************
  353. ******************************************************************************/
  354. static void lk_set_sw_segment_code(void)
  355. {
  356. #if defined (MTK_EFUSE_DOWNGRADE)
  357. set_sw_segment_code();
  358. #endif
  359. }
  360. /******************************************************************************
  361. ******************************************************************************/
  362. static void lk_dummy_ap_entry(void)
  363. {
  364. #ifdef DUMMY_AP
  365. dummy_ap_entry();
  366. #endif
  367. }
  368. /******************************************************************************
  369. ******************************************************************************/
  370. static void lk_init_storage(void)
  371. {
  372. #ifdef LK_PROFILING
  373. unsigned int time_nand_emmc = get_timer(0);
  374. #endif // LK_PROFILING
  375. #ifdef MTK_EMMC_SUPPORT
  376. mmc_legacy_init(1);
  377. #else
  378. #ifndef MACH_FPGA
  379. nand_init();
  380. nand_driver_test();
  381. #endif // MACH_FPGA
  382. #endif // MTK_EMMC_SUPPORT
  383. #ifdef LK_PROFILING
  384. dprintf(CRITICAL, "[PROFILE] NAND/EMMC init takes %d ms\n", (int)get_timer(time_nand_emmc));
  385. #endif // LK_PROFILING
  386. }
  387. /******************************************************************************
  388. ******************************************************************************/
  389. static void lk_get_AB_OTA_param(void)
  390. {
  391. #ifdef MTK_AB_OTA_UPDATER
  392. /* get A/B system parameter before load dtb from boot image */
  393. get_AB_OTA_param();
  394. #endif
  395. }
  396. /******************************************************************************
  397. * FIXME:
  398. * 1. Read RTC register, load "boot"/"recovery dtb according to register value.
  399. * 2. If no RTC bit set, load "boot" dtb.
  400. * 3. If no RTC bit set and no "boot" partition, load "recovery" dtb.
  401. * 4. Consider to make use of (or integrate with) meta_detection(). (Optional)
  402. ******************************************************************************/
  403. static void lk_load_device_tree(void)
  404. {
  405. char *part_name = "boot";
  406. #if !defined(NO_BOOT_MODE_SEL)
  407. if (Check_RTC_Recovery_Mode() || unshield_recovery_detection())
  408. part_name = "recovery";
  409. else
  410. part_name = "boot";
  411. #endif
  412. #if defined(CFG_DTB_EARLY_LOADER_SUPPORT)
  413. if (bldr_load_dtb(part_name) < 0)
  414. dprintf(CRITICAL, "Error: %s failed\n", __func__);
  415. #endif // CFG_DTB_EARLY_LOADER_SUPPORT
  416. }
  417. /******************************************************************************
  418. ******************************************************************************/
  419. static void lk_init_leds(void)
  420. {
  421. #ifdef LK_PROFILING
  422. unsigned int time_led_init = get_timer(0);
  423. #endif // LK_PROFILING
  424. #ifndef MACH_FPGA
  425. leds_init();
  426. #endif
  427. #ifdef LK_PROFILING
  428. dprintf(CRITICAL, "[PROFILE] led init takes %d ms\n", (int)get_timer(time_led_init));
  429. #endif // LK_PROFILING
  430. }
  431. /******************************************************************************
  432. ******************************************************************************/
  433. static void lk_init_env(void)
  434. {
  435. #ifdef LK_PROFILING
  436. unsigned int time_env = get_timer(0);
  437. #endif // LK_PROFILING
  438. env_init();
  439. print_env();
  440. #ifdef MTK_USB2JTAG_SUPPORT
  441. extern void usb2jtag_init(void);
  442. usb2jtag_init();
  443. #endif // MTK_USB2JTAG_SUPPORT
  444. #ifdef LK_PROFILING
  445. dprintf(CRITICAL, "[PROFILE] ENV init takes %d ms\n", (int)get_timer(time_env));
  446. #endif // LK_PROFILING
  447. }
  448. /******************************************************************************
  449. ******************************************************************************/
  450. static void lk_mt65xx_backlight_on(void)
  451. {
  452. #ifdef LK_PROFILING
  453. unsigned int time_backlight = get_timer(0);
  454. #endif // LK_PROFILING
  455. #ifndef MACH_FPGA
  456. mt65xx_backlight_on();
  457. #endif // MACH_FPGA
  458. #ifdef LK_PROFILING
  459. dprintf(CRITICAL, "[PROFILE] backlight takes %d ms\n", (int)get_timer(time_backlight));
  460. #endif // LK_PROFILING
  461. }
  462. /******************************************************************************
  463. * It can be regarded that users will see the logo on the display after the
  464. * function mt_disp_update() finishes its execution regardless video mode or
  465. * command mode in the display driver.
  466. ******************************************************************************/
  467. static void lk_mt_disp_update(void)
  468. {
  469. #ifdef LK_PROFILING
  470. unsigned int disp_update = get_timer(0);
  471. #endif // LK_PROFILING
  472. #ifndef MACH_FPGA_NO_DISPLAY
  473. //pwm need display sof
  474. mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
  475. #endif // MACH_FPGA_NO_DISPLAY
  476. #ifdef LK_PROFILING
  477. dprintf(CRITICAL, "[PROFILE] disp_update takes %d ms\n", (int)get_timer(disp_update));
  478. #endif // LK_PROFILING
  479. }
  480. /******************************************************************************
  481. ******************************************************************************/
  482. static void lk_init_display(void)
  483. {
  484. #ifdef LK_PROFILING
  485. unsigned int time_disp_init = get_timer(0);
  486. #endif // LK_PROFILING
  487. /* initialize the frame buffet information */
  488. #ifndef MACH_FPGA_NO_DISPLAY
  489. g_fb_size = mt_disp_get_vram_size();
  490. #else
  491. g_fb_size = 0x1000000;
  492. #endif // MACH_FPGA_NO_DISPLAY
  493. g_fb_base = mblock_reserve(&g_boot_arg->mblock_info, g_fb_size, 0x10000, 0x100000000, RANKMAX);
  494. if (!g_fb_base) {
  495. dprintf(CRITICAL, "Error: g_fb_base is NULL!\n");
  496. }
  497. dprintf(CRITICAL, "FB base = 0x%x, FB size = %d\n", g_fb_base, g_fb_size);
  498. #ifndef MACH_FPGA_NO_DISPLAY
  499. mt_disp_init((void *)g_fb_base);
  500. /* show black picture fisrtly in case of backlight is on before nothing is drawed*/
  501. mt_disp_fill_rect(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT, 0x0);
  502. lk_mt_disp_update();
  503. #ifdef LK_PROFILING
  504. dprintf(CRITICAL, "[PROFILE] disp init takes %d ms\n", (int)get_timer(time_disp_init));
  505. #endif // LK_PROFILING
  506. drv_video_init();
  507. #endif // MACH_FPGA_NO_DISPLAY
  508. }
  509. /******************************************************************************
  510. * VB: verified boot
  511. ******************************************************************************/
  512. static void lk_vb_init(void)
  513. {
  514. #ifdef MTK_SECURITY_SW_SUPPORT
  515. u64 pl_start_addr = 0;
  516. plinfo_get_brom_header_block_size(&pl_start_addr);
  517. #ifdef LK_PROFILING
  518. unsigned int time_vb_init = get_timer(0);
  519. #endif // LK_PROFILING
  520. /* initialize security library */
  521. sec_func_init(pl_start_addr);
  522. seclib_set_oemkey(g_oemkey, OEM_PUBK_SZ);
  523. #ifdef LK_PROFILING
  524. dprintf(CRITICAL,"[PROFILE] vb init takes %d ms\n", (int)get_timer(time_vb_init));
  525. #endif // LK_PROFILING
  526. #endif // MTK_SECURITY_SW_SUPPORT
  527. }
  528. /******************************************************************************
  529. * VB: verified boot
  530. ******************************************************************************/
  531. static void lk_vb_flow(void)
  532. {
  533. #ifdef MTK_SECURITY_SW_SUPPORT
  534. #ifdef LK_PROFILING
  535. unsigned int time_vb_flow = get_timer(0);
  536. #endif // LK_PROFILING
  537. if (0 != img_auth_stor(SBOOT_PART_LOGO_NAME, NULL)) {
  538. dprintf(CRITICAL, "<ASSERT> %s:line %d\n", __FILE__, __LINE__);
  539. PAL_ASSERT(0);
  540. }
  541. if (DTBO_FROM_STANDALONE == get_dtbo_src()) {
  542. if (0 != img_auth_stor(get_dtbo_part_name(), NULL)) {
  543. dprintf(CRITICAL, "<ASSERT> %s:line %d\n", __FILE__, __LINE__);
  544. PAL_ASSERT(0);
  545. }
  546. }
  547. #ifdef LK_PROFILING
  548. dprintf(CRITICAL,"[PROFILE] vb flow takes %d ms\n", (int)get_timer(time_vb_flow));
  549. #endif // LK_PROFILING
  550. #endif // MTK_SECURITY_SW_SUPPORT
  551. }
  552. /******************************************************************************
  553. * DA: Download Agent
  554. ******************************************************************************/
  555. static void lk_verify_da(void)
  556. {
  557. #ifdef MTK_SECURITY_SW_SUPPORT
  558. /* verify da before jumping to da*/
  559. if (sec_usbdl_enabled()) {
  560. u8 *da_addr = (u8*)g_boot_arg->da_info.addr;
  561. u32 da_len = g_boot_arg->da_info.len;
  562. u32 sig_len = g_boot_arg->da_info.sig_len;
  563. u8 *sig_addr = (unsigned char *)da_addr + (da_len - sig_len);
  564. if (da_len == 0 || sig_len == 0) {
  565. dprintf(INFO, "[LK] da argument is invalid\n");
  566. dprintf(INFO, "da_addr = 0x%x\n", (int)da_addr);
  567. dprintf(INFO, "da_len = 0x%x\n", da_len);
  568. dprintf(INFO, "sig_len = 0x%x\n", sig_len);
  569. }
  570. if (sec_usbdl_verify_da(da_addr, (da_len - sig_len), sig_addr, sig_len)) {
  571. /* da verify fail */
  572. video_printf(" => Not authenticated tool, download stop...\n");
  573. PAL_ASSERT(0);
  574. }
  575. } else
  576. #endif // MTK_SECURITY_SW_SUPPORT
  577. {
  578. dprintf(INFO, " DA verification disabled...\n");
  579. }
  580. }
  581. /******************************************************************************
  582. ******************************************************************************/
  583. static void lk_boot_mode_select(void)
  584. {
  585. #ifndef MACH_FPGA
  586. #ifdef LK_PROFILING
  587. unsigned int time_boot_mode = get_timer(0);
  588. #endif // LK_PROFILING
  589. boot_mode_select();
  590. #ifdef LK_PROFILING
  591. dprintf(CRITICAL, "[PROFILE] boot mode select takes %d ms\n", (int)get_timer(time_boot_mode));
  592. #endif // LK_PROFILING
  593. #endif // MACH_FPGA
  594. }
  595. /******************************************************************************
  596. ******************************************************************************/
  597. static void lk_load_logo(void)
  598. {
  599. #ifndef MACH_FPGA_NO_DISPLAY
  600. #ifdef LK_PROFILING
  601. unsigned int time_load_logo = get_timer(0);
  602. #endif // LK_PROFILING
  603. mboot_common_load_logo((unsigned long)mt_get_logo_db_addr_pa(), "logo");
  604. #ifdef LK_PROFILING
  605. dprintf(CRITICAL, "[PROFILE] load_logo takes %d ms\n", (int)get_timer(time_load_logo));
  606. #endif // LK_PROFILING
  607. #endif // MACH_FPGA_NO_DISPLAY
  608. }
  609. /******************************************************************************
  610. ******************************************************************************/
  611. static void lk_display_show_logo(void)
  612. {
  613. #ifdef LK_PROFILING
  614. unsigned int time_show_logo = get_timer(0);
  615. #endif // LK_PROFILING
  616. #ifndef MACH_FPGA_NO_DISPLAY
  617. mt_disp_show_boot_logo();
  618. #endif // MACH_FPGA_NO_DISPLAY
  619. logo_lk_t = ((unsigned int)get_timer(boot_time));
  620. #ifdef LK_PROFILING
  621. dprintf(CRITICAL, "[PROFILE] show logo takes %d ms\n", (int)get_timer(time_show_logo));
  622. #endif // LK_PROFILING
  623. }
  624. /******************************************************************************
  625. ******************************************************************************/
  626. static void lk_l2_disable(void)
  627. {
  628. #ifdef HAVE_CACHE_PL310
  629. l2_disable();
  630. #endif
  631. }
  632. /******************************************************************************
  633. ******************************************************************************/
  634. static void lk_config_shared_SRAM_size(void)
  635. {
  636. #ifdef ENABLE_L2_SHARING
  637. config_shared_SRAM_size();
  638. #endif
  639. }
  640. extern void mt65xx_bat_init(void); // FIXME: include the correct header file!
  641. /******************************************************************************
  642. ******************************************************************************/
  643. static void lk_init_battery(void)
  644. {
  645. #ifdef LK_PROFILING
  646. unsigned int time_bat_init = get_timer(0);
  647. #endif
  648. mt65xx_bat_init();
  649. #ifdef LK_PROFILING
  650. dprintf(CRITICAL, "[PROFILE] battery init takes %d ms\n", (int)get_timer(time_bat_init));
  651. #endif
  652. }
  653. /******************************************************************************
  654. ******************************************************************************/
  655. static void lk_rtc_boot_check(bool flag)
  656. {
  657. #ifndef CFG_POWER_CHARGING
  658. #ifdef LK_PROFILING
  659. unsigned int time_RTC_boot_Check = get_timer(0);
  660. #endif // LK_PROFILING
  661. /* NOTE: if define CFG_POWER_CHARGING, will rtc_boot_check() in mt65xx_bat_init() */
  662. rtc_boot_check(flag);
  663. #ifdef LK_PROFILING
  664. dprintf(CRITICAL, "[PROFILE] RTC boot check Init takes %d ms\n", (int)get_timer(time_RTC_boot_Check));
  665. #endif // LK_PROFILING
  666. #endif // CFG_POWER_CHARGING
  667. }
  668. /******************************************************************************
  669. ******************************************************************************/
  670. static void lk_sw_env(void)
  671. {
  672. #ifndef MACH_FPGA
  673. #ifdef LK_PROFILING
  674. unsigned int time_sw_env = get_timer(0);
  675. #endif // LK_PROFILING
  676. sw_env();
  677. #ifdef LK_PROFILING
  678. dprintf(CRITICAL, "[PROFILE] sw_env takes %d ms\n", (int)get_timer(time_sw_env));
  679. #endif // LK_PROFILING
  680. #endif // MACH_FPGA
  681. }
  682. /******************************************************************************
  683. ******************************************************************************/
  684. void platform_init_mmu(void)
  685. {
  686. unsigned long long addr;
  687. unsigned int vaddr;
  688. unsigned long long dram_size;
  689. /* configure available RAM banks */
  690. dram_init();
  691. dram_size = physical_memory_size();
  692. if (((unsigned long long)DRAM_PHY_ADDR + dram_size) <= 0x100000000ULL) {
  693. arm_mmu_init();
  694. /* map dram region */
  695. for (addr = 0; addr < dram_size; addr += (1024*1024)) {
  696. /*virtual to physical 1-1 mapping*/
  697. arm_mmu_map_section(bi_dram[0].start+addr, bi_dram[0].start+addr, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE);
  698. }
  699. /* ummap TEE memory regoin */
  700. if (g_boot_arg->tee_reserved_mem.size != 0) {
  701. u64 j, k;
  702. k = g_boot_arg->tee_reserved_mem.start;
  703. j = ROUNDUP(g_boot_arg->tee_reserved_mem.size, 1024*1024);
  704. for (; j > 0; j -= (1024*1024)) {
  705. arm_mmu_map_section((uintptr_t)k , (uintptr_t)k, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN);
  706. k += (1024*1024);
  707. }
  708. }
  709. } else {
  710. arm_mmu_lpae_init();
  711. /* map dram region */
  712. for (addr = 0; addr < dram_size; addr += (unsigned long long)(1024*1024*1024)) {
  713. vaddr = (bi_dram[0].start + addr < 0x100000000ULL) ? (unsigned int)(bi_dram[0].start + addr) : (0xC0000000);
  714. arm_mmu_map_block(bi_dram[0].start+addr, vaddr, LPAE_MMU_MEMORY_TYPE_NORMAL_WRITE_BACK);
  715. }
  716. /* ummap TEE memory regoin */
  717. if (g_boot_arg->tee_reserved_mem.size != 0) {
  718. u64 j, k;
  719. k = g_boot_arg->tee_reserved_mem.start;
  720. j = ROUNDUP(g_boot_arg->tee_reserved_mem.size, 0x40000000ULL);
  721. for (; j > 0; j -= 0x40000000ULL) {
  722. arm_mmu_map_block((uintptr_t)k , (uintptr_t)k, LPAE_MMU_MEMORY_TYPE_NORMAL_WRITE_BACK | LPAE_MMU_MEMORY_XN);
  723. k += 0x40000000ULL;
  724. }
  725. }
  726. }
  727. arch_enable_mmu(); //enable mmu after setup page table to avoid cpu prefetch which may bring on emi violation
  728. }
  729. void platform_early_init(void)
  730. {
  731. #ifdef LK_PROFILING
  732. unsigned int time_wdt_early_init;
  733. unsigned int time_pmic_init;
  734. unsigned int time_platform_early_init;
  735. #endif
  736. platform_init_interrupts();
  737. platform_early_init_timer();
  738. #if defined(MACH_FPGA) || defined(SB_LK_BRINGUP)
  739. mtk_timer_init(); // GPT4 will be initialized at PL after
  740. #endif
  741. #ifdef LK_PROFILING
  742. time_platform_early_init = get_timer(0);
  743. #endif
  744. #ifndef MACH_FPGA
  745. #ifndef DUMMY_AP
  746. mt_gpio_set_default();
  747. #endif
  748. #endif
  749. /* initialize the uart */
  750. uart_init_early();
  751. dprintf(SPEW, "bootarg_addr: 0x%x, bootarg_size: 0x%x\n", platform_get_bootarg_addr(), platform_get_bootarg_size());
  752. if (g_dram_init_ret < 0) {
  753. dprintf(CRITICAL, "[LK ERROR] DRAM bank number is not correct!!!\n");
  754. while (1) ;
  755. }
  756. //i2c_v1_init();
  757. #ifdef LK_PROFILING
  758. time_wdt_early_init = get_timer(0);
  759. #endif
  760. mtk_wdt_init();
  761. #ifdef LK_PROFILING
  762. dprintf(CRITICAL, "[PROFILE] WDT Init takes %d ms\n", (int)get_timer(time_wdt_early_init));
  763. #endif
  764. //i2c init
  765. i2c_hw_init();
  766. #if defined(MACH_FPGA) || defined(SB_LK_BRINGUP)
  767. //mtk_timer_init(); // GPT4 will be initialized at PL after
  768. mtk_wdt_disable(); // WDT will be triggered when uncompressing linux image on FPGA
  769. *(volatile unsigned int *)0x10212000 = 0x22000064;
  770. #endif
  771. #if MTK_MT8193_SUPPORT
  772. mt8193_init();
  773. #endif
  774. // Workaround by Peng
  775. //pwrap_init_lk();
  776. //pwrap_init_for_early_porting();
  777. #ifdef LK_PROFILING
  778. time_pmic_init = get_timer(0);
  779. #endif
  780. pmic_init();
  781. /*
  782. // Workaround by Weiqi
  783. mt6331_upmu_set_rg_vgp1_en(1);
  784. mt6331_upmu_set_rg_vcam_io_en(1);
  785. */
  786. #ifdef LK_PROFILING
  787. dprintf(CRITICAL, "[PROFILE] pmic_init takes %d ms\n", (int)get_timer(time_pmic_init));
  788. #endif
  789. #ifdef LK_PROFILING
  790. dprintf(CRITICAL, "[PROFILE] platform_early_init takes %d ms\n", (int)get_timer(time_platform_early_init));
  791. #endif
  792. }
  793. extern bool mtk_bat_allow_backlight_enable(void);
  794. #if defined (MTK_KERNEL_POWER_OFF_CHARGING)
  795. int kernel_charging_boot(void)
  796. {
  797. if ((g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT || g_boot_mode == LOW_POWER_OFF_CHARGING_BOOT) && upmu_is_chr_det() == KAL_TRUE) {
  798. dprintf(INFO,"[%s] Kernel Power Off Charging with Charger/Usb \n", __func__);
  799. return 1;
  800. } else if ((g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT || g_boot_mode == LOW_POWER_OFF_CHARGING_BOOT) && upmu_is_chr_det() == KAL_FALSE) {
  801. dprintf(INFO,"[%s] Kernel Power Off Charging without Charger/Usb \n", __func__);
  802. return -1;
  803. } else
  804. return 0;
  805. }
  806. #endif
  807. #if defined (MTK_EFUSE_DOWNGRADE)
  808. extern u32 get_devinfo_with_index(u32);
  809. extern void set_thermal_option(u32);
  810. int set_sw_segment_code(void)
  811. {
  812. u32 segment_code = get_devinfo_with_index(47) >> 25;
  813. dprintf(CRITICAL, "OLD get_devinfo_with_index=0x%x\n", segment_code);
  814. switch(segment_code){
  815. case 0x52:
  816. set_thermal_option(0x4A);
  817. break;
  818. case 0x53:
  819. set_thermal_option(0x4B);
  820. break;
  821. case 0x41:
  822. set_thermal_option(0x49);
  823. break;
  824. }
  825. dprintf(CRITICAL, "NEW get_devinfo_with_index=0x%x\n", (get_devinfo_with_index(47)>>25));
  826. return 0;
  827. }
  828. #endif
  829. void platform_init(void)
  830. {
  831. #ifdef LK_PROFILING
  832. unsigned int time_platform_init = get_timer(0);
  833. #endif
  834. bool bearly_backlight_on = false;
  835. dprintf(CRITICAL," ==LK info ==\n");
  836. dprintf(CRITICAL," chip_code[0x%x]\n", mt_get_chip_hw_code());
  837. dprintf(CRITICAL," chip_ver[0x%x]\n", mt_get_chip_sw_ver());
  838. dprintf(CRITICAL," ==LK info ==\n");
  839. dprintf(CRITICAL, "platform_init()\n");
  840. lk_set_sw_segment_code();
  841. lk_dummy_ap_entry();
  842. lk_init_storage();
  843. lk_get_AB_OTA_param();
  844. lk_load_device_tree();
  845. lk_init_leds();
  846. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  847. if ((g_boot_arg->boot_reason == BR_USB) && (upmu_is_chr_det() == KAL_FALSE)) {
  848. dprintf(INFO, "[%s] Unplugged Charger/Usb between Pre-loader and Uboot in Kernel Charging Mode, Power Off \n", __func__);
  849. mt6575_power_off();
  850. }
  851. #endif
  852. lk_init_env();
  853. lk_init_display();
  854. lk_vb_init();
  855. lk_vb_flow();
  856. /*for kpd pmic mode setting*/
  857. set_kpd_pmic_mode();
  858. lk_boot_mode_select();
  859. /* If RECOVERY_AS_BOOT is enabled, there is no recovery partition. */
  860. #if defined(CFG_DTB_EARLY_LOADER_SUPPORT) && !defined(RECOVERY_AS_BOOT)
  861. /* reload dtb when boot mode = recovery */
  862. if ((g_boot_mode == RECOVERY_BOOT) && (get_recovery_dtbo_loaded() != 1)){
  863. if (bldr_load_dtb("recovery") < 0)
  864. dprintf(CRITICAL, "bldr_load_dtb fail\n");
  865. }
  866. #endif // CFG_DTB_EARLY_LOADER_SUPPORT
  867. lk_load_logo();
  868. /*Show download logo & message on screen */
  869. if (g_boot_arg->boot_mode == DOWNLOAD_BOOT) {
  870. dprintf(CRITICAL, "[LK] boot mode is DOWNLOAD_BOOT\n");
  871. lk_verify_da();
  872. lk_display_show_logo();
  873. video_printf(" => Downloading...\n");
  874. dprintf(CRITICAL, "enable backlight after show bootlogo! \n");
  875. lk_mt65xx_backlight_on();
  876. mtk_wdt_disable(); //Disable wdt before jump to DA
  877. platform_uninit();
  878. lk_l2_disable();
  879. arch_disable_cache(UCACHE);
  880. arch_disable_mmu();
  881. lk_config_shared_SRAM_size();
  882. jump_da(g_boot_arg->da_info.addr, g_boot_arg->da_info.arg1, g_boot_arg->da_info.arg2);
  883. }
  884. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  885. else if (g_boot_mode != ALARM_BOOT && g_boot_mode != FASTBOOT && g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT && mtk_bat_allow_backlight_enable()) {
  886. lk_display_show_logo();
  887. lk_mt65xx_backlight_on();
  888. lk_mt_disp_update();
  889. bearly_backlight_on = true;
  890. dprintf(INFO, "backlight enabled before battery init\n");
  891. }
  892. #endif // MTK_KERNEL_POWER_OFF_CHARGING
  893. lk_init_battery();
  894. lk_rtc_boot_check(false);
  895. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  896. if (kernel_charging_boot() == 1) {
  897. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  898. CHARGER_TYPE CHR_Type_num = CHARGER_UNKNOWN;
  899. CHR_Type_num = hw_charging_get_charger_type();
  900. if ((g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) ||
  901. ((CHR_Type_num != STANDARD_HOST) && (CHR_Type_num != NONSTANDARD_CHARGER))) {
  902. #endif
  903. mt_disp_power(TRUE);
  904. mt_disp_show_low_battery();
  905. mt65xx_leds_brightness_set(6, 110);
  906. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  907. }
  908. #endif
  909. } else if (g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) {
  910. if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT) && !bearly_backlight_on) {
  911. lk_display_show_logo();
  912. }
  913. }
  914. #else
  915. if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT) && !bearly_backlight_on) {
  916. lk_display_show_logo();
  917. }
  918. #endif // MTK_KERNEL_POWER_OFF_CHARGING
  919. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  920. if (!is_low_battery(0)) {
  921. #endif
  922. lk_mt65xx_backlight_on();
  923. lk_mt_disp_update();
  924. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  925. }
  926. #endif
  927. lk_sw_env();
  928. #ifdef LK_PROFILING
  929. dprintf(CRITICAL, "[PROFILE] platform_init takes %d ms\n", (int)get_timer(time_platform_init));
  930. #endif
  931. }
  932. /******************************************************************************
  933. ******************************************************************************/
  934. void platform_uninit(void)
  935. {
  936. #ifndef MACH_FPGA
  937. leds_deinit();
  938. #endif
  939. platform_deinit_interrupts();
  940. return;
  941. }
  942. #ifdef ENABLE_L2_SHARING
  943. #define ADDR_CA7L_CACHE_CONFIG_MP(x) (CA7MCUCFG_BASE + 0x200 * x)
  944. #define L2C_SIZE_CFG_OFFSET 8
  945. #define L2C_SHARE_EN_OFFSET 12
  946. /* 4'b1111: 2048KB(not support)
  947. * 4'b0111: 1024KB(not support)
  948. * 4'b0011: 512KB
  949. * 4'b0001: 256KB
  950. * 4'b0000: 128KB (not support)
  951. */
  952. int is_l2_need_config(void)
  953. {
  954. volatile unsigned int cache_cfg, addr;
  955. addr = ADDR_CA7L_CACHE_CONFIG_MP(0);
  956. cache_cfg = DRV_Reg32(addr);
  957. cache_cfg = cache_cfg >> L2C_SIZE_CFG_OFFSET;
  958. /* only read 256KB need to be config.*/
  959. if ((cache_cfg &(0x7)) == 0x1) {
  960. return 1;
  961. }
  962. return 0;
  963. }
  964. void cluster_l2_share_enable(int cluster)
  965. {
  966. volatile unsigned int cache_cfg, addr;
  967. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  968. /* set L2C size to 256KB */
  969. cache_cfg = DRV_Reg32(addr);
  970. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  971. cache_cfg |= 0x1 << L2C_SIZE_CFG_OFFSET;
  972. /* enable L2C_share_en. Sram only for other to use*/
  973. cache_cfg |= (0x1 << L2C_SHARE_EN_OFFSET);
  974. DRV_WriteReg32(addr, cache_cfg);
  975. }
  976. void cluster_l2_share_disable(int cluster)
  977. {
  978. volatile unsigned int cache_cfg, addr;
  979. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  980. /* set L2C size to 512KB */
  981. cache_cfg = DRV_Reg32(addr);
  982. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  983. cache_cfg |= 0x3 << L2C_SIZE_CFG_OFFSET;
  984. DRV_WriteReg32(addr, cache_cfg);
  985. /* disable L2C_share_en. Sram only for cpu to use*/
  986. cache_cfg &= ~(0x1 << L2C_SHARE_EN_OFFSET);
  987. DRV_WriteReg32(addr, cache_cfg);
  988. }
  989. /* config L2 cache and sram to its size */
  990. void config_L2_size(void)
  991. {
  992. int cluster;
  993. if (is_l2_need_config()) {
  994. /*
  995. * Becuase mcu config is protected.
  996. * only can write in secutity mode
  997. */
  998. if (dev_info_nr_cpu() == 6) {
  999. cluster_l2_share_disable(0);
  1000. cluster_l2_share_enable(1);
  1001. }
  1002. else {
  1003. for (cluster = 0; cluster < 2; cluster++) {
  1004. cluster_l2_share_disable(cluster);
  1005. }
  1006. }
  1007. }
  1008. }
  1009. /* config SRAM back from L2 cache for DA relocation */
  1010. void config_shared_SRAM_size(void)
  1011. {
  1012. int cluster;
  1013. if (is_l2_need_config()) {
  1014. /*
  1015. * Becuase mcu config is protected.
  1016. * only can write in secutity mode
  1017. */
  1018. for (cluster = 0; cluster < 2; cluster++) {
  1019. cluster_l2_share_enable(cluster);
  1020. }
  1021. }
  1022. }
  1023. #endif
  1024. int platform_skip_hibernation(void)
  1025. {
  1026. if (g_boot_menu == true)
  1027. return 1;
  1028. switch (g_boot_arg->boot_reason) {
  1029. #if 0 // let schedule power on to go hiberantion bootup process
  1030. case BR_RTC:
  1031. #endif
  1032. case BR_WDT:
  1033. case BR_WDT_BY_PASS_PWK:
  1034. case BR_WDT_SW:
  1035. case BR_WDT_HW:
  1036. return 1;
  1037. }
  1038. return 0;
  1039. }