mtk-lk/platform/mt6761/interrupts.c

/* Copyright Statement:
 *
 * This software/firmware and related documentation ("MediaTek Software") are
 * protected under relevant copyright laws. The information contained herein
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 */
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 *
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 * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
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 */

#include <arch/arm.h>
#include <reg.h>
#include <kernel/thread.h>

#include <platform/mt_typedefs.h>
#include <platform/mt_reg_base.h>
#include <platform/mt_gpt.h>
#include <platform/mt_irq.h>
#include <mt_gic.h>
#include <platform/boot_mode.h>


#include <debug.h>

#define MPIDR_LEVEL_BITS 8
#define MPIDR_LEVEL_MASK    ((1 << MPIDR_LEVEL_BITS) - 1)
#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
        ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)


extern uint32_t mt_mpidr_read(void);
extern void lk_scheduler(void);
extern void lk_usb_scheduler(void);
extern void lk_nand_irq_handler(unsigned int irq);
extern void lk_msdc_irq_handler(unsigned int irq);
extern void dummy_ap_irq_handler(unsigned int irq)__attribute__((weak)); /* this function is empty for normal load */

extern BOOT_ARGUMENT    *g_boot_arg;

uint64_t mt_irq_get_affinity(void)
{
	uint64_t mpidr, aff;
	int mp0off;

#ifdef MACH_FPGA
	mp0off = 0;
#else
#ifdef MTK_FORCE_CLUSTER1
	mp0off = 1;
#else
	mp0off = 0;
#endif
#endif
	mpidr = (uint64_t) mt_mpidr_read();

	aff = (
//			MPIDR_AFFINITY_LEVEL(mpidr, 3) << 32 |
	          MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 |
	          MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8  |
	          MPIDR_AFFINITY_LEVEL(mpidr, 0)
	      );

	/*
	 * cluster id + 1 when mp0 off
	 */
	if (mp0off)
		aff += (1 << 8);

	return aff;
}

uint32_t mt_interrupt_needed_for_secure(void)
{
#if defined(MACH_FPGA) && defined(FPGA_BOOT_FROM_LK)
	return 1;
#endif

	if (g_boot_arg->boot_mode == DOWNLOAD_BOOT)
		return 1;

	return 0;
}

enum handler_return platform_irq(struct arm_iframe *frame)
{
	unsigned int irq = mt_irq_get();

	if (irq == MT_GPT_IRQ_ID)
		lk_scheduler();
	else if (irq == MT_USB0_IRQ_ID)
		lk_usb_scheduler();
#if !(defined(MTK_EMMC_SUPPORT) || defined(MTK_UFS_BOOTING))
	else if (irq == MT_NFI_IRQ_ID)
		lk_nand_irq_handler(irq);
#endif
	else if (irq == MT_MSDC0_IRQ_ID || irq == MT_MSDC1_IRQ_ID)
		lk_msdc_irq_handler(irq);

	if (dummy_ap_irq_handler)
		dummy_ap_irq_handler(irq);

	//return INT_NO_RESCHEDULE;
	return INT_RESCHEDULE;
}

void platform_fiq(struct arm_iframe *frame)
{

}