ssbi.c 8.2 KB

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  1. /*
  2. * Copyright (c) 2009, Google Inc.
  3. * All rights reserved.
  4. *
  5. * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * * Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * * Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in
  14. * the documentation and/or other materials provided with the
  15. * distribution.
  16. * * Neither the name of Google, Inc. nor the names of its contributors
  17. * may be used to endorse or promote products derived from this
  18. * software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  23. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  24. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  25. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  26. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  27. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  28. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  30. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31. * SUCH DAMAGE.
  32. */
  33. #include <debug.h>
  34. #include <reg.h>
  35. #include <sys/types.h>
  36. #include <dev/ssbi.h>
  37. #ifdef TARGET_USES_RSPIN_LOCK
  38. #include <platform/remote_spinlock.h>
  39. #endif
  40. int i2c_ssbi_poll_for_device_ready(void)
  41. {
  42. unsigned long timeout = SSBI_TIMEOUT_US;
  43. while (!(readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_READY)) {
  44. if (--timeout == 0) {
  45. dprintf(INFO, "In Device ready function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
  46. return 1;
  47. }
  48. }
  49. return 0;
  50. }
  51. int i2c_ssbi_poll_for_read_completed(void)
  52. {
  53. unsigned long timeout = SSBI_TIMEOUT_US;
  54. while (!(readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_RD_READY)) {
  55. if (--timeout == 0) {
  56. dprintf(INFO, "In read completed function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
  57. return 1;
  58. }
  59. }
  60. return 0;
  61. }
  62. int i2c_ssbi_read_bytes(unsigned char *buffer, unsigned short length,
  63. unsigned short slave_addr)
  64. {
  65. int ret = 0;
  66. unsigned char *buf = buffer;
  67. unsigned short len = length;
  68. unsigned short addr = slave_addr;
  69. unsigned long read_cmd = 0;
  70. unsigned long mode2 = 0;
  71. /*
  72. * Use remote spin locks since SSBI2 controller is shared with nonHLOS proc
  73. */
  74. #ifdef TARGET_USES_RSPIN_LOCK
  75. remote_spin_lock(rlock);
  76. #endif
  77. read_cmd = SSBI_CMD_READ(addr);
  78. mode2 = readl(MSM_SSBI_BASE + SSBI2_MODE2);
  79. //buf = alloc(len * sizeof(8));
  80. if (mode2 & SSBI_MODE2_SSBI2_MODE)
  81. writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
  82. MSM_SSBI_BASE + SSBI2_MODE2);
  83. while (len) {
  84. ret = i2c_ssbi_poll_for_device_ready();
  85. if (ret) {
  86. dprintf (CRITICAL, "Error: device not ready\n");
  87. goto end;
  88. }
  89. writel(read_cmd, MSM_SSBI_BASE + SSBI2_CMD);
  90. ret = i2c_ssbi_poll_for_read_completed();
  91. if (ret) {
  92. dprintf (CRITICAL, "Error: read not completed\n");
  93. goto end;
  94. }
  95. *buf++ = readl(MSM_SSBI_BASE + SSBI2_RD) & SSBI_RD_REG_DATA_MASK;
  96. len--;
  97. }
  98. end:
  99. #ifdef TARGET_USES_RSPIN_LOCK
  100. remote_spin_unlock(rlock);
  101. #endif
  102. return ret;
  103. }
  104. int i2c_ssbi_write_bytes(unsigned char *buffer, unsigned short length,
  105. unsigned short slave_addr)
  106. {
  107. int ret = 0;
  108. unsigned long timeout = SSBI_TIMEOUT_US;
  109. unsigned char *buf = buffer;
  110. unsigned short len = length;
  111. unsigned short addr = slave_addr;
  112. unsigned long mode2 = 0;
  113. /*
  114. * Use remote spin locks since SSBI2 controller is shared with nonHLOS proc
  115. */
  116. #ifdef TARGET_USES_RSPIN_LOCK
  117. remote_spin_lock(rlock);
  118. #endif
  119. mode2 = readl(MSM_SSBI_BASE + SSBI2_MODE2);
  120. if (mode2 & SSBI_MODE2_SSBI2_MODE)
  121. writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
  122. MSM_SSBI_BASE + SSBI2_MODE2);
  123. while (len) {
  124. ret = i2c_ssbi_poll_for_device_ready();
  125. if (ret) {
  126. dprintf (CRITICAL, "Error: device not ready\n");
  127. goto end;
  128. }
  129. writel(SSBI_CMD_WRITE(addr, *buf++), MSM_SSBI_BASE + SSBI2_CMD);
  130. while (readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_MCHN_BUSY) {
  131. if (--timeout == 0) {
  132. dprintf(INFO, "In Device ready function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
  133. ret = 1;
  134. goto end;
  135. }
  136. }
  137. len--;
  138. }
  139. end:
  140. #ifdef TARGET_USES_RSPIN_LOCK
  141. remote_spin_unlock(rlock);
  142. #endif
  143. return 0;
  144. }
  145. int pa1_ssbi2_read_bytes(unsigned char *buffer, unsigned short length,
  146. unsigned short slave_addr)
  147. {
  148. unsigned val = 0x0;
  149. unsigned temp = 0x0000;
  150. unsigned char *buf = buffer;
  151. unsigned short len = length;
  152. unsigned short addr = slave_addr;
  153. unsigned long timeout = SSBI_TIMEOUT_US;
  154. while(len)
  155. {
  156. val |= ((addr << PA1_SSBI2_REG_ADDR_SHIFT) |
  157. (PA1_SSBI2_CMD_READ << PA1_SSBI2_CMD_RDWRN_SHIFT));
  158. writel(val, PA1_SSBI2_CMD);
  159. while(!((temp = readl(PA1_SSBI2_RD_STATUS)) & (1 << PA1_SSBI2_TRANS_DONE_SHIFT))) {
  160. if (--timeout == 0) {
  161. dprintf(INFO, "In Device ready function:Timeout\n");
  162. return 1;
  163. }
  164. }
  165. len--;
  166. *buf++ = (temp & (PA1_SSBI2_REG_DATA_MASK << PA1_SSBI2_REG_DATA_SHIFT));
  167. }
  168. return 0;
  169. }
  170. int pa1_ssbi2_write_bytes(unsigned char *buffer, unsigned short length,
  171. unsigned short slave_addr)
  172. {
  173. unsigned val;
  174. unsigned char *buf = buffer;
  175. unsigned short len = length;
  176. unsigned short addr = slave_addr;
  177. unsigned temp = 0x00;
  178. unsigned char written_data1 = 0x00;
  179. unsigned long timeout = SSBI_TIMEOUT_US;
  180. //unsigned char written_data2 = 0x00;
  181. while(len)
  182. {
  183. temp = 0x00;
  184. written_data1 = 0x00;
  185. val = (addr << PA1_SSBI2_REG_ADDR_SHIFT) |
  186. (PA1_SSBI2_CMD_WRITE << PA1_SSBI2_CMD_RDWRN_SHIFT) |
  187. (*buf & 0xFF);
  188. writel(val, PA1_SSBI2_CMD);
  189. while(!((temp = readl(PA1_SSBI2_RD_STATUS)) & (1 << PA1_SSBI2_TRANS_DONE_SHIFT))) {
  190. if (--timeout == 0) {
  191. dprintf(INFO, "In Device write function:Timeout\n");
  192. return 1;
  193. }
  194. }
  195. len--;
  196. buf++;
  197. }
  198. return 0;
  199. }
  200. int pa2_ssbi2_read_bytes(unsigned char *buffer, unsigned short length,
  201. unsigned short slave_addr)
  202. {
  203. unsigned val = 0x0;
  204. unsigned temp = 0x0000;
  205. unsigned char *buf = buffer;
  206. unsigned short len = length;
  207. unsigned short addr = slave_addr;
  208. unsigned long timeout = SSBI_TIMEOUT_US;
  209. while(len)
  210. {
  211. val |= ((addr << PA2_SSBI2_REG_ADDR_SHIFT) |
  212. (PA2_SSBI2_CMD_READ << PA2_SSBI2_CMD_RDWRN_SHIFT));
  213. writel(val, PA2_SSBI2_CMD);
  214. while(!((temp = readl(PA2_SSBI2_RD_STATUS)) & (1 << PA2_SSBI2_TRANS_DONE_SHIFT))) {
  215. if (--timeout == 0) {
  216. dprintf(INFO, "In Device ready function:Timeout\n");
  217. return 1;
  218. }
  219. }
  220. len--;
  221. *buf++ = (temp & (PA2_SSBI2_REG_DATA_MASK << PA2_SSBI2_REG_DATA_SHIFT));
  222. }
  223. return 0;
  224. }
  225. int pa2_ssbi2_write_bytes(unsigned char *buffer, unsigned short length,
  226. unsigned short slave_addr)
  227. {
  228. unsigned val;
  229. unsigned char *buf = buffer;
  230. unsigned short len = length;
  231. unsigned short addr = slave_addr;
  232. unsigned temp = 0x00;
  233. unsigned char written_data1 = 0x00;
  234. unsigned long timeout = SSBI_TIMEOUT_US;
  235. while(len)
  236. {
  237. temp = 0x00;
  238. written_data1 = 0x00;
  239. val = (addr << PA2_SSBI2_REG_ADDR_SHIFT) |
  240. (PA2_SSBI2_CMD_WRITE << PA2_SSBI2_CMD_RDWRN_SHIFT) |
  241. (*buf & 0xFF);
  242. writel(val, PA2_SSBI2_CMD);
  243. while(!((temp = readl(PA2_SSBI2_RD_STATUS)) & (1 << PA2_SSBI2_TRANS_DONE_SHIFT))) {
  244. if (--timeout == 0) {
  245. dprintf(INFO, "In Device write function:Timeout\n");
  246. return 1;
  247. }
  248. }
  249. len--;
  250. buf++;
  251. }
  252. return 0;
  253. }