spmi.c 8.1 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein is
  5. * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
  6. * the prior written permission of MediaTek inc. and/or its licensors, any
  7. * reproduction, modification, use or disclosure of MediaTek Software, and
  8. * information contained herein, in whole or in part, shall be strictly
  9. * prohibited.
  10. *
  11. * MediaTek Inc. (C) 2019. All rights reserved.
  12. *
  13. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  14. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  15. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
  16. * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
  17. * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
  18. * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
  19. * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
  20. * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
  21. * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
  22. * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
  23. * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
  24. * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
  25. * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
  26. * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  27. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
  28. * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
  29. * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
  30. * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
  31. * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  32. *
  33. * The following software/firmware and/or related documentation ("MediaTek
  34. * Software") have been modified by MediaTek Inc. All revisions are subject to
  35. * any receiver's applicable license agreements with MediaTek Inc.
  36. */
  37. /*
  38. * MTK SPMI Driver
  39. *
  40. * Copyright 2018 MediaTek Co.,Ltd.
  41. *
  42. * DESCRIPTION:
  43. * This file provides API for other drivers to access PMIC registers
  44. *
  45. */
  46. #include <spmi.h>
  47. #include <pmif.h>
  48. #include <pmif_sw.h>
  49. #include <spmi_sw.h>
  50. #include <mt6315_upmu_hw.h>
  51. int mt6xxx_spmi_regs[] = {
  52. [SPMI_OP_ST_CTRL] = 0x0000,
  53. [SPMI_GRP_ID_EN] = 0x0004,
  54. [SPMI_OP_ST_STA] = 0x0008,
  55. [SPMI_MST_SAMPL] = 0x000c,
  56. [SPMI_MST_REQ_EN] = 0x0010,
  57. #if SPMI_RCS_SUPPORT
  58. [SPMI_MST_RCS_CTRL] = 0x0014,
  59. [SPMI_MST_IRQ] = 0x0018,
  60. [SPMI_SLV_3_0_EINT] = 0x0020,
  61. [SPMI_SLV_7_4_EINT] = 0x0024,
  62. [SPMI_SLV_B_8_EINT] = 0x0028,
  63. [SPMI_SLV_F_C_EINT] = 0x002c,
  64. [SPMI_TIA] = 0x0030,
  65. #endif /* #if SPMI_RCS_SUPPORT */
  66. [SPMI_REC_CTRL] = 0x0040,
  67. [SPMI_REC0] = 0x0044,
  68. [SPMI_REC1] = 0x0048,
  69. [SPMI_REC2] = 0x004c,
  70. [SPMI_REC3] = 0x0050,
  71. [SPMI_REC4] = 0x0054,
  72. #if SPMI_RCS_SUPPORT
  73. [SPMI_DEC_DBG] = 0x00f8,
  74. #endif
  75. [SPMI_MST_DBG] = 0x00fc,
  76. };
  77. static struct pmif *pmif_spmi_arb_ctrl[4];
  78. #if MT63xx_EVB
  79. struct spmi_device spmi_dev[] = {
  80. {
  81. .slvid = SPMI_SLAVE_6,
  82. .grpiden = 0x800,
  83. .type = BUCK_CPU,
  84. .type_id = BUCK_CPU_ID,
  85. .pmif_arb = NULL,
  86. }, {
  87. .slvid = SPMI_SLAVE_7,
  88. .grpiden = 0x800,
  89. .type = BUCK_GPU,
  90. .type_id = BUCK_GPU_ID,
  91. .pmif_arb = NULL,
  92. }, {
  93. .slvid = SPMI_SLAVE_3,
  94. .grpiden = 0x800,
  95. .type = BUCK_MD,
  96. .type_id = BUCK_MD_ID,
  97. .pmif_arb = NULL,
  98. },
  99. };
  100. #else
  101. struct spmi_device spmi_dev[] = {
  102. {
  103. .slvid = SPMI_SLAVE_10,
  104. .grpiden = 0x100,
  105. .type = BUCK_CPU,
  106. .type_id = BUCK_CPU_ID,
  107. .pmif_arb = NULL,
  108. }, {
  109. .slvid = SPMI_SLAVE_11,
  110. .grpiden = 0x100,
  111. .type = BUCK_GPU,
  112. .type_id = BUCK_GPU_ID,
  113. .pmif_arb = NULL,
  114. }, {
  115. .slvid = SPMI_SLAVE_12,
  116. .grpiden = 0x100,
  117. .type = BUCK_MD,
  118. .type_id = BUCK_MD_ID,
  119. .pmif_arb = NULL,
  120. },
  121. };
  122. #endif
  123. unsigned char spmi_device_cnt;
  124. /* spmi internal API declaration */
  125. static int spmi_ctrl_op_st(int mstid, unsigned int grpiden,
  126. unsigned int sid, unsigned int cmd);
  127. static int spmi_read_check(struct spmi_device *dev);
  128. #if SPMI_NO_PMIC
  129. int spmi_init(struct pmif *pmif_arb)
  130. {
  131. SPMI_INFO("do Nothing.\n");
  132. return 0;
  133. }
  134. #else /* #ifdef SPMI_NO_PMIC */
  135. /*
  136. * Function : mtk_spmi_readl()
  137. * Description : mtk spmi controller read api
  138. * Parameter :
  139. * Return :
  140. */
  141. u32 spmi_readl(int mstid, enum spmi_regs reg)
  142. {
  143. struct pmif *arb = get_pmif_controller(PMIF_SPMI, mstid);
  144. return DRV_Reg32(arb->spmimst_base + arb->spmimst_regs[reg]);
  145. }
  146. /*
  147. * Function : mtk_spmi_writel()
  148. * Description : mtk spmi controller write api
  149. * Parameter :
  150. * Return :
  151. */
  152. void spmi_writel(int mstid, enum spmi_regs reg, unsigned int val)
  153. {
  154. struct pmif *arb = get_pmif_controller(PMIF_SPMI, mstid);
  155. DRV_WriteReg32(arb->spmimst_base + arb->spmimst_regs[reg], val);
  156. }
  157. static int spmi_ctrl_op_st(int mstid, unsigned int grpiden, unsigned int sid,
  158. unsigned int cmd)
  159. {
  160. unsigned int rdata = 0x0;
  161. /* gid is 0x800 */
  162. spmi_writel(mstid, SPMI_GRP_ID_EN, grpiden);
  163. #if MT63xx_EVB
  164. if (grpiden == (1 << SPMI_GROUP_ID))
  165. spmi_writel(mstid, SPMI_OP_ST_CTRL,
  166. (cmd << 0x4) | SPMI_GROUP_ID);
  167. #else
  168. if (grpiden == 0x100)
  169. spmi_writel(mstid, SPMI_OP_ST_CTRL, (cmd << 0x4) | 0x8);
  170. #endif
  171. else
  172. spmi_writel(mstid, SPMI_OP_ST_CTRL, (cmd << 0x4) | sid);
  173. SPMI_WARN("spmi_ctrl_op_st 0x%x\n", spmi_readl(mstid, SPMI_OP_ST_CTRL));
  174. do
  175. {
  176. rdata = spmi_readl(mstid, SPMI_OP_ST_STA);
  177. SPMI_DBG("spmi_ctrl_op_st 0x%x\n", rdata);
  178. if (((rdata >> 0x1) & SPMI_OP_ST_NACK) == SPMI_OP_ST_NACK) {
  179. spmi_dump_mst_record_reg(mstid);
  180. break;
  181. }
  182. }while((rdata & SPMI_OP_ST_BUSY) == SPMI_OP_ST_BUSY);
  183. return 0;
  184. }
  185. int spmi_command_reset(int mstid, struct spmi_device *dev, unsigned int grpiden)
  186. {
  187. #if MT63xx_EVB
  188. if (grpiden != (1 << SPMI_GROUP_ID))
  189. dev->slvid = grpiden;
  190. #else
  191. if (grpiden != 0x100)
  192. dev->slvid = grpiden;
  193. #endif
  194. return spmi_ctrl_op_st(mstid, grpiden, dev->slvid, SPMI_RESET);
  195. }
  196. int spmi_command_sleep(int mstid, struct spmi_device *dev, unsigned int grpiden)
  197. {
  198. #if MT63xx_EVB
  199. if (grpiden != (1 << SPMI_GROUP_ID))
  200. dev->slvid = grpiden;
  201. #else
  202. if (grpiden != 0x100)
  203. dev->slvid = grpiden;
  204. #endif
  205. return spmi_ctrl_op_st(mstid, grpiden, dev->slvid, SPMI_SLEEP);
  206. }
  207. int spmi_command_wakeup(int mstid, struct spmi_device *dev, unsigned int grpiden)
  208. {
  209. #if MT63xx_EVB
  210. if (grpiden != (1 << SPMI_GROUP_ID))
  211. dev->slvid = grpiden;
  212. #else
  213. if (grpiden != 0x100)
  214. dev->slvid = grpiden;
  215. #endif
  216. return spmi_ctrl_op_st(mstid, grpiden, dev->slvid, SPMI_WAKEUP);
  217. }
  218. int spmi_command_shutdown(int mstid, struct spmi_device *dev, unsigned int grpiden)
  219. {
  220. #if MT63xx_EVB
  221. if (grpiden != (1 << SPMI_GROUP_ID))
  222. dev->slvid = grpiden;
  223. #else
  224. if (grpiden != 0x100)
  225. dev->slvid = grpiden;
  226. #endif
  227. return spmi_ctrl_op_st(mstid, grpiden, dev->slvid, SPMI_SHUTDOWN);
  228. }
  229. static int spmi_read_check(struct spmi_device *dev)
  230. {
  231. u8 rdata = 0;
  232. spmi_ext_register_readl(dev, MT6315_PMIC_HWCID_H_ADDR, &rdata, 1);
  233. if (rdata != 0x15) {
  234. SPMI_ERR("%s next, slvid:%d rdata = 0x%x.\n",
  235. __func__, dev->slvid, rdata);
  236. return -EIO;
  237. } else
  238. SPMI_CRI("%s done, slvid:%d\n", __func__, dev->slvid);
  239. spmi_ext_register_readl(dev, MT6315_PMIC_SWCID_H_ADDR, &rdata, 1);
  240. if (rdata != 0x15) {
  241. SPMI_ERR("%s next, slvid:%d rdata = 0x%x.\n",
  242. __func__, dev->slvid, rdata);
  243. return -EIO;
  244. } else
  245. SPMI_CRI("%s done, slvid:%d\n", __func__, dev->slvid);
  246. return 0;
  247. }
  248. struct spmi_device *get_spmi_device(int mstid, int slaveid)
  249. {
  250. unsigned int i;
  251. for (i = 0; i < spmi_device_cnt; i++) {
  252. if (slaveid == spmi_dev[i].slvid) {
  253. return &spmi_dev[i];
  254. }
  255. }
  256. return NULL;
  257. }
  258. int spmi_init(struct pmif *pmif_arb)
  259. {
  260. int i = 0;
  261. if (pmif_arb == NULL) /* null check */ {
  262. SPMI_ERR("arguments err\n");
  263. return -EINVAL;
  264. }
  265. pmif_arb->spmimst_base = (unsigned int *)SPMI_MST_BASE,
  266. pmif_arb->spmimst_regs = mt6xxx_spmi_regs;
  267. pmif_spmi_arb_ctrl[pmif_arb->mstid] = pmif_arb;
  268. spmi_device_cnt = sizeof(spmi_dev)/sizeof(spmi_dev[0]);
  269. for (i = 0; i < spmi_device_cnt; i++) {
  270. spmi_dev[i].pmif_arb = pmif_spmi_arb_ctrl[pmif_arb->mstid];
  271. spmi_read_check(&spmi_dev[i]);
  272. }
  273. SPMI_INFO("%s done\n", __func__);
  274. return 0;
  275. }
  276. #endif /* #ifdef SPMI_NO_PMIC */