mt_rtc.c 10 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <debug.h>
  32. #include <platform/mt_typedefs.h>
  33. #include <platform/mt_rtc.h>
  34. #include <platform/boot_mode.h>
  35. #include <platform/mt_pmic_wrap_init.h>
  36. #include <target/board.h>
  37. #include <platform/mtk_wdt.h>
  38. #include <platform/mt_rtc_hw.h>
  39. #define DBG_RTC_C(x...) dprintf(CRITICAL, x)
  40. #define DBG_RTC_I(x...) dprintf(INFO, x)
  41. #define DBG_RTC_S(x...) dprintf(SPEW, x)
  42. extern BOOT_ARGUMENT *g_boot_arg;
  43. static U16 RTC_Read(U16 addr)
  44. {
  45. U32 rdata=0;
  46. pwrap_read((U32)addr, &rdata);
  47. return (U16)rdata;
  48. }
  49. static void RTC_Write(U16 addr, U16 data)
  50. {
  51. pwrap_write((U32)addr, (U32)data);
  52. }
  53. #define rtc_busy_wait() \
  54. do { \
  55. while (RTC_Read(RTC_BBPU) & RTC_BBPU_CBUSY); \
  56. } while (0)
  57. static unsigned long rtc_mktime(int yea, int mth, int dom, int hou, int min, int sec)
  58. {
  59. unsigned long d1, d2, d3;
  60. mth -= 2;
  61. if (mth <= 0) {
  62. mth += 12;
  63. yea -= 1;
  64. }
  65. d1 = (yea - 1) * 365 + (yea / 4 - yea / 100 + yea / 400);
  66. d2 = (367 * mth / 12 - 30) + 59;
  67. d3 = d1 + d2 + (dom - 1) - 719162;
  68. return ((d3 * 24 + hou) * 60 + min) * 60 + sec;
  69. }
  70. static void rtc_write_trigger(void)
  71. {
  72. RTC_Write(RTC_WRTGR, 1);
  73. rtc_busy_wait();
  74. }
  75. void rtc_writeif_unlock(void)
  76. {
  77. RTC_Write(RTC_PROT, RTC_PROT_UNLOCK1);
  78. rtc_write_trigger();
  79. RTC_Write(RTC_PROT, RTC_PROT_UNLOCK2);
  80. rtc_write_trigger();
  81. }
  82. void rtc_writeif_lock(void)
  83. {
  84. RTC_Write(RTC_PROT, 0);
  85. rtc_write_trigger();
  86. }
  87. static void rtc_xosc_write(U16 val)
  88. {
  89. RTC_Write(RTC_OSC32CON, RTC_OSC32CON_UNLOCK1);
  90. mdelay(1);
  91. RTC_Write(RTC_OSC32CON, RTC_OSC32CON_UNLOCK2);
  92. mdelay(1);
  93. RTC_Write(RTC_OSC32CON, val);
  94. mdelay(1);
  95. }
  96. void rtc_enable_k_eosc(void)
  97. {
  98. pmic_config_interface(PMIC_RG_RTC_EOSC32_CK_PDN_ADDR, 0, PMIC_RG_RTC_EOSC32_CK_PDN_MASK, PMIC_RG_RTC_EOSC32_CK_PDN_SHIFT);
  99. RTC_Write(RTC_BBPU, RTC_Read(RTC_BBPU) | RTC_BBPU_KEY | RTC_BBPU_RELOAD);
  100. rtc_write_trigger();
  101. /* We use solution 2 of eosc cali to fix mt6359p 32k */
  102. RTC_Write(RTC_AL_YEA, RTC_Read(RTC_AL_YEA) | RTC_K_EOSC_RSV_2);
  103. rtc_write_trigger();
  104. RTC_Write(RTC_BBPU, RTC_Read(RTC_BBPU) | RTC_BBPU_KEY | RTC_BBPU_RELOAD);
  105. rtc_write_trigger();
  106. DBG_RTC_I("[RTC] k_eosc bbpu = 0x%x, con = 0x%x, osc32con = 0x%x, sec = 0x%x, yea = 0x%x\n", RTC_Read(RTC_BBPU), RTC_Read(RTC_CON), RTC_Read(RTC_OSC32CON), RTC_Read(RTC_AL_SEC), RTC_Read(RTC_AL_YEA));
  107. }
  108. void rtc_disable_2sec_reboot(void)
  109. {
  110. U16 reboot;
  111. reboot = (RTC_Read(RTC_AL_SEC) & ~RTC_BBPU_2SEC_EN) & ~RTC_BBPU_AUTO_PDN_SEL;
  112. RTC_Write(RTC_AL_SEC, reboot);
  113. rtc_write_trigger();
  114. }
  115. void rtc_bbpu_power_down(void)
  116. {
  117. U16 bbpu;
  118. rtc_disable_2sec_reboot();
  119. rtc_enable_k_eosc();
  120. bbpu = RTC_BBPU_KEY | RTC_BBPU_PWREN;
  121. rtc_writeif_unlock();
  122. RTC_Write(RTC_BBPU, bbpu);
  123. rtc_write_trigger();
  124. pmic_power_hold(0);
  125. }
  126. U16 rtc_rdwr_uart_bits(U16 *val)
  127. {
  128. U16 pdn2;
  129. if (val) {
  130. pdn2 = RTC_Read(RTC_PDN2) & ~RTC_PDN2_UART_MASK;
  131. pdn2 |= (*val & (RTC_PDN2_UART_MASK >> RTC_PDN2_UART_SHIFT)) << RTC_PDN2_UART_SHIFT;
  132. RTC_Write(RTC_PDN2, pdn2);
  133. rtc_write_trigger();
  134. }
  135. return (RTC_Read(RTC_PDN2) & RTC_PDN2_UART_MASK) >> RTC_PDN2_UART_SHIFT;
  136. }
  137. bool rtc_reset_bbpu_alarm_status(void)
  138. {
  139. u16 bbpu;
  140. ulong begin = get_timer(0);
  141. bbpu = RTC_BBPU_KEY | RTC_BBPU_PWREN | RTC_BBPU_RESET_ALARM;
  142. RTC_Write(RTC_BBPU, bbpu);
  143. rtc_write_trigger();
  144. while ((RTC_Read(RTC_BBPU) & RTC_BBPU_RESET_ALARM))
  145. {
  146. if (get_timer(begin) > 500)
  147. {
  148. DBG_RTC_I("%s time out\n", __func__);
  149. return false;
  150. }
  151. }
  152. return true;
  153. }
  154. bool rtc_boot_check(bool can_alarm_boot)
  155. {
  156. U16 irqsta, pdn1, pdn2, spar0, spar1;
  157. irqsta = RTC_Read(RTC_IRQ_STA); /* read clear */
  158. pdn1 = RTC_Read(RTC_PDN1);
  159. pdn2 = RTC_Read(RTC_PDN2);
  160. spar0 = RTC_Read(RTC_SPAR0);
  161. spar1 = RTC_Read(RTC_SPAR1);
  162. DBG_RTC_I("irqsta = 0x%x, pdn1 = 0x%x, pdn2 = 0x%x, spar0 = 0x%x, spar1 = 0x%x\n",
  163. irqsta, pdn1, pdn2, spar0, spar1);
  164. if (irqsta & RTC_IRQ_STA_AL) {
  165. rtc_reset_bbpu_alarm_status();
  166. if (pdn1 & RTC_PDN1_PWRON_TIME) { /* power-on time is available */
  167. U16 now_sec, now_min, now_hou, now_dom, now_mth, now_yea;
  168. U16 irqen, sec, min, hou, dom, mth, yea;
  169. unsigned long now_time, time;
  170. now_sec = RTC_Read(RTC_TC_SEC);
  171. now_min = RTC_Read(RTC_TC_MIN);
  172. now_hou = RTC_Read(RTC_TC_HOU);
  173. now_dom = RTC_Read(RTC_TC_DOM);
  174. now_mth = RTC_Read(RTC_TC_MTH) & RTC_TC_MTH_MASK;
  175. now_yea = RTC_Read(RTC_TC_YEA) + RTC_MIN_YEAR;
  176. if (RTC_Read(RTC_TC_SEC) < now_sec) { /* SEC has carried */
  177. now_sec = RTC_Read(RTC_TC_SEC);
  178. now_min = RTC_Read(RTC_TC_MIN);
  179. now_hou = RTC_Read(RTC_TC_HOU);
  180. now_dom = RTC_Read(RTC_TC_DOM);
  181. now_mth = RTC_Read(RTC_TC_MTH) & RTC_TC_MTH_MASK;
  182. now_yea = RTC_Read(RTC_TC_YEA) + RTC_MIN_YEAR;
  183. }
  184. sec = ((spar0 & RTC_SPAR0_PWRON_SEC_MASK) >> RTC_SPAR0_PWRON_SEC_SHIFT);
  185. min = ((spar1 & RTC_SPAR1_PWRON_MIN_MASK) >> RTC_SPAR1_PWRON_MIN_SHIFT);
  186. hou = ((spar1 & RTC_SPAR1_PWRON_HOU_MASK) >> RTC_SPAR1_PWRON_HOU_SHIFT);
  187. dom = ((spar1 & RTC_SPAR1_PWRON_DOM_MASK) >> RTC_SPAR1_PWRON_DOM_SHIFT);
  188. mth = ((pdn2 & RTC_PDN2_PWRON_MTH_MASK) >> RTC_PDN2_PWRON_MTH_SHIFT);
  189. yea = ((pdn2 & RTC_PDN2_PWRON_YEA_MASK) >> RTC_PDN2_PWRON_YEA_SHIFT) + RTC_MIN_YEAR;
  190. now_time = rtc_mktime(now_yea, now_mth, now_dom, now_hou, now_min, now_sec);
  191. time = rtc_mktime(yea, mth, dom, hou, min, sec);
  192. DBG_RTC_I("now = %d/%d/%d %d:%d:%d (%lu)\n",
  193. now_yea, now_mth, now_dom, now_hou, now_min, now_sec, now_time);
  194. DBG_RTC_I("power-on = %d/%d/%d %d:%d:%d (%lu)\n",
  195. yea, mth, dom, hou, min, sec, time);
  196. if (now_time >= time - 1 && now_time <= time + 4) { /* power on */
  197. pdn1 &= ~(RTC_PDN1_PWRON_TIME | RTC_PDN1_FAC_RESET | RTC_PDN1_BYPASS_PWR);
  198. RTC_Write(RTC_PDN1, pdn1);
  199. RTC_Write(RTC_PDN2, pdn2 | RTC_PDN2_PWRON_ALARM);
  200. rtc_write_trigger();
  201. if (can_alarm_boot &&
  202. !(pdn2 & RTC_PDN2_PWRON_LOGO)) { /* no logo means ALARM_BOOT */
  203. g_boot_mode = ALARM_BOOT;
  204. }
  205. return true;
  206. } else if (now_time < time) { /* set power-on alarm */
  207. RTC_Write(RTC_AL_YEA, (RTC_Read(RTC_AL_YEA) & ~(RTC_AL_YEA_MASK)) | ((yea - RTC_MIN_YEAR) & RTC_AL_YEA_MASK));
  208. RTC_Write(RTC_AL_MTH, (RTC_Read(RTC_AL_MTH)&RTC_NEW_SPARE3)|mth);
  209. RTC_Write(RTC_AL_DOM, (RTC_Read(RTC_AL_DOM)&RTC_NEW_SPARE1)|dom);
  210. RTC_Write(RTC_AL_HOU, (RTC_Read(RTC_AL_HOU)&RTC_AL_HOU_FG_MASK)|hou);
  211. RTC_Write(RTC_AL_MIN, min);
  212. RTC_Write(RTC_AL_SEC, (RTC_Read(RTC_AL_SEC) & (~RTC_AL_SEC_MASK)) | (sec & RTC_AL_SEC_MASK));
  213. RTC_Write(RTC_AL_MASK, RTC_AL_MASK_DOW); /* mask DOW */
  214. rtc_write_trigger();
  215. irqen = RTC_Read(RTC_IRQ_EN) | RTC_IRQ_EN_ONESHOT_AL;
  216. RTC_Write(RTC_IRQ_EN, irqen);
  217. rtc_write_trigger();
  218. }
  219. }
  220. }
  221. if ((pdn1 & RTC_PDN1_RECOVERY_MASK) == RTC_PDN1_FAC_RESET) { /* factory data reset */
  222. RTC_Write(RTC_PDN1, pdn1 & ~RTC_PDN1_FAC_RESET);
  223. rtc_write_trigger();
  224. DBG_RTC_I("%s:factory data reset\n", __func__);
  225. return true;
  226. }
  227. if (g_boot_arg->maggic_number == BOOT_ARGUMENT_MAGIC && g_boot_arg->boot_reason == BR_RTC) {
  228. DBG_RTC_I("%s:BR_RTC\n", __func__);
  229. return true;
  230. }
  231. return false;
  232. }
  233. void Set_Clr_RTC_PDN1_bit13(bool flag)
  234. {
  235. U16 pdn1;
  236. rtc_writeif_unlock();
  237. //use PDN1 bit13 for LK
  238. pdn1 = RTC_Read(RTC_PDN1);
  239. if (flag==true)
  240. pdn1 = pdn1 | RTC_PDN1_FAST_BOOT;
  241. else if (flag==false)
  242. pdn1 = pdn1 & ~RTC_PDN1_FAST_BOOT;
  243. RTC_Write(RTC_PDN1, pdn1);
  244. rtc_write_trigger();
  245. }
  246. bool Check_RTC_PDN1_bit13(void)
  247. {
  248. U16 pdn1;
  249. pdn1 = RTC_Read(RTC_PDN1);
  250. if (pdn1 & RTC_PDN1_FAST_BOOT)
  251. return true;
  252. else
  253. return false;
  254. }
  255. bool Check_RTC_Recovery_Mode(void)
  256. {
  257. U16 pdn1;
  258. pdn1 = RTC_Read(RTC_PDN1);
  259. if ( (pdn1 & RTC_PDN1_RECOVERY_MASK)==RTC_PDN1_FAC_RESET )
  260. return true;
  261. else
  262. return false;
  263. }
  264. #if 1
  265. bool rtc_2sec_boot_check(void)
  266. {
  267. int boot_reason;
  268. if (g_boot_arg->maggic_number == BOOT_ARGUMENT_MAGIC) {
  269. boot_reason = g_boot_arg->boot_reason;
  270. if (boot_reason == BR_2SEC_REBOOT)
  271. return true;
  272. }
  273. return false;
  274. }
  275. #endif
  276. void Set_RTC_Recovery_Mode(bool flag)
  277. {
  278. U16 pdn1;
  279. rtc_writeif_unlock();
  280. pdn1 = RTC_Read(RTC_PDN1);
  281. if (flag==true)
  282. pdn1 = pdn1 | RTC_PDN1_FAC_RESET;
  283. else if (flag==false)
  284. pdn1 = pdn1 & ~RTC_PDN1_FAC_RESET;
  285. RTC_Write(RTC_PDN1, pdn1);
  286. rtc_write_trigger();
  287. DBG_RTC_I("Set_RTC_Fastboot_Mode\n");
  288. }
  289. static void rtc_get_tick(struct rtc_time *tm)
  290. {
  291. tm->tm_sec = RTC_Read(RTC_TC_SEC);
  292. tm->tm_min = RTC_Read(RTC_TC_MIN);
  293. tm->tm_hour = RTC_Read(RTC_TC_HOU);
  294. tm->tm_mday = RTC_Read(RTC_TC_DOM);
  295. tm->tm_mon = RTC_Read(RTC_TC_MTH) & RTC_TC_MTH_MASK;
  296. tm->tm_year = RTC_Read(RTC_TC_YEA);
  297. }
  298. void rtc_get_time(struct rtc_time *tm) {
  299. rtc_get_tick(tm);
  300. if (RTC_Read(RTC_TC_SEC) < tm->tm_sec) { /* SEC has carried */
  301. rtc_get_tick(tm);
  302. }
  303. tm->tm_year += RTC_MIN_YEAR;
  304. }