exceptions.S 5.0 KB

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  1. /*
  2. * Copyright (c) 2008 Travis Geiselbrecht
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining
  5. * a copy of this software and associated documentation files
  6. * (the "Software"), to deal in the Software without restriction,
  7. * including without limitation the rights to use, copy, modify, merge,
  8. * publish, distribute, sublicense, and/or sell copies of the Software,
  9. * and to permit persons to whom the Software is furnished to do so,
  10. * subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be
  13. * included in all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  18. * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
  19. * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  20. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  21. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  22. */
  23. #include <asm.h>
  24. .arch_extension sec
  25. FUNCTION(arm_undefined)
  26. stmfd sp!, { r0-r12, r14 }
  27. sub sp, sp, #12
  28. mov r0, sp
  29. mrs r1, spsr
  30. stmia r0, { r1, r13-r14 }^
  31. b arm_undefined_handler
  32. b .
  33. FUNCTION(arm_syscall)
  34. stmfd sp!, { r0-r12, r14 }
  35. sub sp, sp, #12
  36. mov r0, sp
  37. mrs r1, spsr
  38. stmia r0, { r1, r13-r14 }^
  39. b arm_syscall_handler
  40. b .
  41. FUNCTION(arm_prefetch_abort)
  42. stmfd sp!, { r0-r12, r14 }
  43. sub sp, sp, #12
  44. mov r0, sp
  45. mrs r1, spsr
  46. stmia r0, { r1, r13-r14 }^
  47. b arm_prefetch_abort_handler
  48. b .
  49. FUNCTION(arm_data_abort)
  50. stmfd sp!, { r0-r12, r14 }
  51. sub sp, sp, #12
  52. mov r0, sp
  53. mrs r1, spsr
  54. stmia r0, { r1, r13-r14 }^
  55. b arm_data_abort_handler
  56. b .
  57. FUNCTION(arm_reserved)
  58. b .
  59. FUNCTION(arm_irq)
  60. /* XXX only deals with interrupting supervisor mode */
  61. /* save r4-r6 and use as a temporary place to save while we switch into supervisor mode */
  62. stmia r13, { r4-r6 }
  63. mov r4, r13
  64. sub r5, lr, #4
  65. mrs r6, spsr
  66. /* move into supervisor mode. irq/fiq disabled */
  67. msr cpsr_c, #(3<<6 | 0x13)
  68. /* save the return address */
  69. stmfd sp!, { r5 }
  70. /* save C trashed regs, supervisor lr */
  71. stmfd sp!, { r0-r3, r12, lr }
  72. /* save spsr */
  73. stmfd sp!, { r6 }
  74. /* restore r4-r6 */
  75. ldmia r4, { r4-r6 }
  76. /* increment the global critical section count */
  77. ldr r1, =critical_section_count
  78. ldr r0, [r1]
  79. add r0, r0, #1
  80. str r0, [r1]
  81. /* call into higher level code */
  82. mov r0, sp /* iframe */
  83. bl platform_irq
  84. /* reschedule if the handler returns nonzero */
  85. cmp r0, #0
  86. blne thread_preempt
  87. /* decrement the global critical section count */
  88. ldr r1, =critical_section_count
  89. ldr r0, [r1]
  90. sub r0, r0, #1
  91. str r0, [r1]
  92. /* restore spsr */
  93. ldmfd sp!, { r0 }
  94. msr spsr_cxsf, r0
  95. /* restore back to where we came from */
  96. ldmfd sp!, { r0-r3, r12, lr, pc }^
  97. .bss
  98. .align 2
  99. .global irq_save_spot
  100. irq_save_spot:
  101. .word 0 /* r4 */
  102. .word 0 /* r5 */
  103. .word 0 /* r6 */
  104. .text
  105. FUNCTION(arm_fiq)
  106. sub lr, lr, #4
  107. stmfd sp!, { r0-r3, r12, lr }
  108. bl platform_fiq
  109. ldmfd sp!, { r0-r3, r12, pc }^
  110. .ltorg
  111. .text
  112. #ifndef MTK_SMC_ID_MGMT
  113. .text
  114. FUNCTION(jumparch64_smc)
  115. push {r4}
  116. mov r4, r3
  117. mov r3, r2
  118. mov r2, r1
  119. mov r1, r0
  120. ldr r0, =0x82000115 /*r0: ATF Function ID, please check MTK_SIP_KERNEL_BOOT_AARCH32 in vendor/arm/atf/include/bl31/services/sip_svc.h*/
  121. smc #0
  122. pop {r4}
  123. b .
  124. .text
  125. FUNCTION(dapc_smc)
  126. mov r3, r2
  127. mov r2, r1
  128. mov r1, r0
  129. ldr r0, =0x82000101 /*please check MTK_SIP_LK_DAPC_INIT_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  130. smc #0
  131. bx lr
  132. .text
  133. FUNCTION(md_reg_write_smc)
  134. push {r4}
  135. mov r4, r3
  136. mov r3, r2
  137. mov r2, r1
  138. mov r1, r0
  139. ldr r0, =0x82000102 /*please check MTK_SIP_LK_LTE_REG_WRITE_TH_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  140. smc #0
  141. pop {r4}
  142. bx lr
  143. .text
  144. FUNCTION(rpmb_init)
  145. ldr r0, =0x82000103 /*please check MTK_SIP_LK_RPMB_INIT_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  146. smc #0
  147. bx lr
  148. .text
  149. FUNCTION(rpmb_uninit)
  150. ldr r0, =0x82000104 /*please check MTK_SIP_LK_RPMB_UNINIT_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  151. smc #0
  152. bx lr
  153. .text
  154. FUNCTION(rpmb_hmac)
  155. mov r2, r1
  156. mov r1, r0
  157. ldr r0, =0x82000105 /*please check MTK_SIP_LK_RPMB_HMAC_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  158. smc #0
  159. bx lr
  160. .text
  161. FUNCTION(crypto_hw_init)
  162. mov r2, r1
  163. mov r1, r0
  164. ldr r0, =0x8200010B
  165. smc #0
  166. bx lr
  167. .text
  168. FUNCTION(crypto_hw_disable)
  169. ldr r0, =0x8200010C
  170. smc #0
  171. bx lr
  172. .text
  173. FUNCTION(sha256atf_init)
  174. ldr r0, =0x8200010D
  175. smc #0
  176. bx lr
  177. .text
  178. FUNCTION(sha256atf_process)
  179. mov r2, r1
  180. mov r1, r0
  181. ldr r0, =0x8200010E
  182. smc #0
  183. bx lr
  184. .text
  185. FUNCTION(sha256atf_done)
  186. ldr r0, =0x8200010F
  187. smc #0
  188. bx lr
  189. .text
  190. FUNCTION(get_rnd)
  191. push {r4}
  192. mov r4, r0
  193. ldr r0, =0x82000110
  194. smc #0
  195. str r1, [r4]
  196. pop {r4}
  197. bx lr
  198. .text
  199. FUNCTION(mt_secure_call)
  200. smc #0
  201. bx lr
  202. #endif