auo_wuxga_dsi_vdo.c 7.6 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. #define LOG_TAG "LCM"
  36. #ifndef BUILD_LK
  37. #include <linux/string.h>
  38. #include <linux/kernel.h>
  39. #endif
  40. #include "lcm_drv.h"
  41. #ifdef BUILD_LK
  42. #include <platform/upmu_common.h>
  43. #include <platform/mt_gpio.h>
  44. #include <platform/mt_i2c.h>
  45. #include <platform/mt_pmic.h>
  46. #include <string.h>
  47. #elif defined(BUILD_UBOOT)
  48. #include <asm/arch/mt_gpio.h>
  49. #else
  50. #include <mach/mt_pm_ldo.h>
  51. #include <mach/mt_gpio.h>
  52. #endif
  53. #include <cust_gpio_usage.h>
  54. #ifndef MACH_FPGA
  55. #include <cust_i2c.h>
  56. #endif
  57. #ifdef BUILD_LK
  58. #define LCM_LOGI(string, args...) dprintf(0, "[LK/"LOG_TAG"]"string, ##args)
  59. #define LCM_LOGD(string, args...) dprintf(1, "[LK/"LOG_TAG"]"string, ##args)
  60. #else
  61. #define LCM_LOGI(fmt, args...) pr_notice("[KERNEL/"LOG_TAG"]"fmt, ##args)
  62. #define LCM_LOGD(fmt, args...) pr_debug("[KERNEL/"LOG_TAG"]"fmt, ##args)
  63. #endif
  64. static LCM_UTIL_FUNCS lcm_util;
  65. #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
  66. #define MDELAY(n) (lcm_util.mdelay(n))
  67. #define UDELAY(n) (lcm_util.udelay(n))
  68. /* --------------------------------------------------------------------------- */
  69. /* Local Functions */
  70. /* --------------------------------------------------------------------------- */
  71. #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) \
  72. lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  73. #define dsi_set_cmdq(pdata, queue_size, force_update) \
  74. lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  75. #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
  76. #define write_regs(addr, pdata, byte_nums) \
  77. lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  78. #define read_reg(cmd) \
  79. lcm_util.dsi_dcs_read_lcm_reg(cmd)
  80. #define read_reg_v2(cmd, buffer, buffer_size) \
  81. lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
  82. /* --------------------------------------------------------------------------- */
  83. /* Local Constants */
  84. /* --------------------------------------------------------------------------- */
  85. #define LCM_DSI_CMD_MODE 0
  86. #define FRAME_WIDTH (1200)
  87. #define FRAME_HEIGHT (1920)
  88. #ifndef MACH_FPGA
  89. #define GPIO_PWR_EN GPIO_LCD_BIAS_ENP_PIN
  90. #endif
  91. #define REGFLAG_DELAY 0xFFFC
  92. #define REGFLAG_UDELAY 0xFFFB
  93. #define REGFLAG_END_OF_TABLE 0xFFFD
  94. #define REGFLAG_RESET_LOW 0xFFFE
  95. #define REGFLAG_RESET_HIGH 0xFFFF
  96. #ifndef TRUE
  97. #define TRUE 1
  98. #endif
  99. #ifndef FALSE
  100. #define FALSE 0
  101. #endif
  102. struct LCM_setting_table {
  103. unsigned int cmd;
  104. unsigned char count;
  105. unsigned char para_list[64];
  106. };
  107. static struct LCM_setting_table init_setting[] = {
  108. { 0x8f, 1, { 0xa5 } },
  109. { REGFLAG_DELAY, 5, {} },
  110. { 0x01, 1, { 0x00 } },
  111. { REGFLAG_DELAY, 20, {} },
  112. { 0x8f, 1, { 0xa5 } },
  113. { REGFLAG_DELAY, 5, {} },
  114. { 0x83, 1, { 0xaa } },
  115. { 0x84, 1, { 0x11 } },
  116. { 0xa9, 1, { 0x4b } },
  117. { 0x83, 1, { 0x00 } },
  118. { 0x84, 1, { 0x00 } },
  119. { 0x8f, 1, { 0x00 } },
  120. /* Setting ending by predefined flag */
  121. { REGFLAG_END_OF_TABLE, 0x00, {} }
  122. };
  123. static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
  124. {
  125. unsigned int i;
  126. for (i = 0; i < count; i++) {
  127. unsigned cmd;
  128. cmd = table[i].cmd;
  129. switch (cmd) {
  130. case REGFLAG_DELAY:
  131. if (table[i].count <= 10)
  132. MDELAY(table[i].count);
  133. else
  134. MDELAY(table[i].count);
  135. break;
  136. case REGFLAG_UDELAY:
  137. UDELAY(table[i].count);
  138. break;
  139. case REGFLAG_END_OF_TABLE:
  140. break;
  141. default:
  142. dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
  143. }
  144. }
  145. }
  146. /* --------------------------------------------------------------------------- */
  147. /* LCM Driver Implementations */
  148. /* --------------------------------------------------------------------------- */
  149. static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
  150. {
  151. memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
  152. }
  153. static void lcm_get_params(LCM_PARAMS *params)
  154. {
  155. memset(params, 0, sizeof(LCM_PARAMS));
  156. params->type = LCM_TYPE_DSI;
  157. params->width = FRAME_WIDTH;
  158. params->height = FRAME_HEIGHT;
  159. params->dsi.mode = SYNC_EVENT_VDO_MODE;
  160. // DSI
  161. /* Command mode setting */
  162. params->dsi.LANE_NUM = LCM_FOUR_LANE;
  163. //The following defined the fomat for data coming from LCD engine.
  164. params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
  165. // Video mode setting
  166. params->dsi.PS = LCM_PACKED_PS_24BIT_RGB888;
  167. params->dsi.vertical_sync_active = 1;
  168. params->dsi.vertical_backporch = 25; /* 3;//4 */
  169. params->dsi.vertical_frontporch = 35;
  170. params->dsi.vertical_active_line = FRAME_HEIGHT;
  171. params->dsi.horizontal_sync_active = 1; /* 12;//20; */
  172. params->dsi.horizontal_backporch = 60; /* 32;//48; //10 OK */
  173. params->dsi.horizontal_frontporch = 80;
  174. params->dsi.horizontal_active_pixel = FRAME_WIDTH;
  175. params->dsi.PLL_CLOCK = 480;
  176. params->dsi.cont_clock = 1;
  177. }
  178. static void lcm_init(void)
  179. {
  180. #ifndef MACH_FPGA
  181. mt_set_gpio_mode(GPIO_PWR_EN, GPIO_MODE_00);
  182. mt_set_gpio_dir(GPIO_PWR_EN, GPIO_DIR_OUT);
  183. mt_set_gpio_out(GPIO_PWR_EN, GPIO_OUT_ONE);
  184. MDELAY(5);
  185. #endif
  186. MDELAY(10);
  187. push_table(init_setting, sizeof(init_setting) / sizeof(struct LCM_setting_table), 1);
  188. }
  189. static void lcm_suspend(void)
  190. {
  191. #ifndef MACH_FPGA
  192. mt_set_gpio_mode(GPIO_PWR_EN, GPIO_MODE_00);
  193. mt_set_gpio_dir(GPIO_PWR_EN, GPIO_DIR_OUT);
  194. mt_set_gpio_out(GPIO_PWR_EN, GPIO_OUT_ZERO);
  195. #endif
  196. MDELAY(10);
  197. }
  198. static void lcm_resume(void)
  199. {
  200. lcm_init();
  201. }
  202. LCM_DRIVER auo_wuxga_dsi_vdo_lcm_drv = {
  203. .name = "auo_wuxga_dsi_vdo_lcm_drv",
  204. .set_util_funcs = lcm_set_util_funcs,
  205. .get_params = lcm_get_params,
  206. .init = lcm_init,
  207. .suspend = lcm_suspend,
  208. .resume = lcm_resume,
  209. };