hx8392a_dsi_vdo.c 12 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. #include "lcm_drv.h"
  36. // ---------------------------------------------------------------------------
  37. // Local Constants
  38. // ---------------------------------------------------------------------------
  39. #define FRAME_WIDTH (720)
  40. #define FRAME_HEIGHT (1280)
  41. #define REGFLAG_DELAY 0xFE
  42. #define REGFLAG_END_OF_TABLE 0xFF // END OF REGISTERS MARKER
  43. // ---------------------------------------------------------------------------
  44. // Local Variables
  45. // ---------------------------------------------------------------------------
  46. static LCM_UTIL_FUNCS lcm_util = {0};
  47. #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
  48. #define UDELAY(n) (lcm_util.udelay(n))
  49. #define MDELAY(n) (lcm_util.mdelay(n))
  50. // ---------------------------------------------------------------------------
  51. // Local Functions
  52. // ---------------------------------------------------------------------------
  53. #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  54. #define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  55. #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
  56. #define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  57. #define read_reg lcm_util.dsi_read_reg()
  58. struct LCM_setting_table {
  59. unsigned cmd;
  60. unsigned char count;
  61. unsigned char para_list[64];
  62. };
  63. static struct LCM_setting_table lcm_initialization_setting[] = {
  64. /*
  65. Note :
  66. Data ID will depends on the following rule.
  67. count of parameters > 1 => Data ID = 0x39
  68. count of parameters = 1 => Data ID = 0x15
  69. count of parameters = 0 => Data ID = 0x05
  70. Structure Format :
  71. {DCS command, count of parameters, {parameter list}}
  72. {REGFLAG_DELAY, milliseconds of time, {}},
  73. ...
  74. Setting ending by predefined flag
  75. {REGFLAG_END_OF_TABLE, 0x00, {}}
  76. */
  77. //sleep out
  78. {0x11, 0, {}},
  79. {REGFLAG_DELAY, 120, {}},
  80. //SET PASSWORD
  81. {0xB9, 3, {0xFF,0x83,0x92}},
  82. {REGFLAG_DELAY, 10, {}},
  83. //set mipi 4 lane
  84. {
  85. 0xBA, 17, {
  86. 0x13, 0x83, 0x00, 0xD6,
  87. 0xC5, 0x10, 0x09, 0xFF,
  88. 0x0F, 0x27, 0x03, 0x21,
  89. 0x27, 0x25, 0x20, 0x00,
  90. 0x10
  91. }
  92. },
  93. //SET POWER
  94. {
  95. 0xB1, 13, {
  96. 0x7C, 0x00, 0x43, 0xBB,
  97. 0x00, 0x1A, 0x1A, 0x2F,
  98. 0x36, 0x3F, 0x3F, 0x42,
  99. 0x7A
  100. }
  101. },
  102. //SET DISPLAY RELATED REGISTER
  103. {
  104. 0xB2, 12, {
  105. 0x08,0xC8,0x06,0x06,
  106. 0x04,0x84,0x00,0xFF,
  107. 0x06,0x06,0x04,0x20
  108. }
  109. },
  110. //SET CYC
  111. {
  112. 0xB4, 23, {
  113. 0x00, 0x00, 0x05, 0x0A,
  114. 0x8F, 0x06, 0x0A, 0x95,
  115. 0x01, 0x07, 0x06, 0x0C,
  116. 0x02, 0x08, 0x08, 0x21,
  117. 0x04, 0x02, 0x08, 0x01,
  118. 0x04, 0x1A, 0x95
  119. }
  120. },
  121. // set TE on
  122. {0x35, 1, {0x00}},
  123. {0xBF, 4, {0x05, 0x60, 0x02, 0x00}},
  124. // VCOM//64
  125. {0xB6, 1, {0x6A}},
  126. //SET RGB OR BGR
  127. {0x36, 1, {0x08}},
  128. //SET RGB OR BGR
  129. {0xC0, 2, {0x03, 0x94}},
  130. //SET DSI VIDEO MODE
  131. {0xC2, 1, {0x03}},
  132. {0xC6, 4, {0x35, 0x08, 0x20, 0x04}},
  133. //SET PANEL
  134. {0xCC, 1, {0x09}},
  135. {0xD4, 1, {0x00}},
  136. {
  137. 0xD5, 23, {
  138. 0x00, 0x01, 0x04, 0x00,
  139. 0x01, 0x67, 0x89, 0xAB,
  140. 0x45, 0xCC, 0xCC, 0xCC,
  141. 0x00, 0x10, 0x54, 0xBA,
  142. 0x98, 0x76, 0xCC, 0xCC,
  143. 0xCC, 0x00, 0x00
  144. }
  145. },
  146. {
  147. 0xD8, 23, {
  148. 0x00, 0x00, 0x05, 0x00,
  149. 0x9A, 0x00, 0x02, 0x95,
  150. 0x01, 0x07, 0x06, 0x00,
  151. 0x08, 0x08, 0x00, 0x1D,
  152. 0x08, 0x08, 0x08, 0x00,
  153. 0x00, 0x00, 0x77
  154. }
  155. },
  156. {
  157. 0xE0, 34, {
  158. 0x00, 0x12, 0x19, 0x33,
  159. 0x36, 0x3F, 0x28, 0x47,
  160. 0x06, 0x0C, 0x0E, 0x12,
  161. 0x14, 0x12, 0x14, 0x12,
  162. 0x1A, 0x00, 0x12, 0x19,
  163. 0x33, 0x36, 0x3F, 0x28,
  164. 0x47, 0x06, 0x0C, 0x0E,
  165. 0x12, 0x14, 0x12, 0x14,
  166. 0x12, 0x1A
  167. }
  168. },
  169. {
  170. 0xE1, 34, {
  171. 0x00, 0x12, 0x19, 0x33,
  172. 0x36, 0x3F, 0x28, 0x47,
  173. 0x06, 0x0C, 0x0E, 0x12,
  174. 0x14, 0x12, 0x14, 0x12,
  175. 0x1A, 0x00, 0x12, 0x19,
  176. 0x33, 0x36, 0x3F, 0x28,
  177. 0x47, 0x06, 0x0C, 0x0E,
  178. 0x12, 0x14, 0x12, 0x14,
  179. 0x12, 0x1A
  180. }
  181. },
  182. {
  183. 0xE2, 34, {
  184. 0x00, 0x12, 0x19, 0x33,
  185. 0x36, 0x3F, 0x28, 0x47,
  186. 0x06, 0x0C, 0x0E, 0x12,
  187. 0x14, 0x12, 0x14, 0x12,
  188. 0x1A, 0x00, 0x12, 0x19,
  189. 0x33, 0x36, 0x3F, 0x28,
  190. 0x47, 0x06, 0x0C, 0x0E,
  191. 0x12, 0x14, 0x12, 0x14,
  192. 0x12, 0x1A
  193. }
  194. },
  195. //SET PIXEL FORMAT
  196. {0x3A, 1, {0x77}},
  197. //sleep out
  198. {0x29, 0, {}},
  199. };
  200. static struct LCM_setting_table lcm_deep_sleep_mode_in_setting[] = {
  201. // Sleep Mode On
  202. {0x10, 0, {}},
  203. {REGFLAG_DELAY, 120, {}},
  204. {REGFLAG_END_OF_TABLE, 0x00, {}}
  205. };
  206. static struct LCM_setting_table lcm_backlight_level_setting[] = {
  207. {0x51, 1, {0xFF}},
  208. {REGFLAG_END_OF_TABLE, 0x00, {}}
  209. };
  210. static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
  211. {
  212. unsigned int i;
  213. for (i = 0; i < count; i++) {
  214. unsigned cmd;
  215. cmd = table[i].cmd;
  216. switch (cmd) {
  217. case REGFLAG_DELAY :
  218. MDELAY(table[i].count);
  219. break;
  220. case REGFLAG_END_OF_TABLE :
  221. break;
  222. default:
  223. dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
  224. }
  225. }
  226. }
  227. // ---------------------------------------------------------------------------
  228. // LCM Driver Implementations
  229. // ---------------------------------------------------------------------------
  230. static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
  231. {
  232. memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
  233. }
  234. static void lcm_get_params(LCM_PARAMS *params)
  235. {
  236. memset(params, 0, sizeof(LCM_PARAMS));
  237. params->type = LCM_TYPE_DSI;
  238. params->width = FRAME_WIDTH;
  239. params->height = FRAME_HEIGHT;
  240. // enable tearing-free
  241. params->dbi.te_mode = LCM_DBI_TE_MODE_VSYNC_ONLY;
  242. params->dbi.te_edge_polarity = LCM_POLARITY_RISING;
  243. params->dsi.mode = SYNC_PULSE_VDO_MODE;
  244. // DSI
  245. /* Command mode setting */
  246. params->dsi.LANE_NUM = LCM_FOUR_LANE;
  247. //The following defined the fomat for data coming from LCD engine.
  248. params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
  249. params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
  250. params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
  251. params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
  252. // Highly depends on LCD driver capability.
  253. // Not support in MT6573
  254. params->dsi.packet_size=256;
  255. params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888;
  256. params->dsi.vertical_sync_active = 2;
  257. params->dsi.vertical_backporch = 8;
  258. params->dsi.vertical_frontporch = 15;
  259. params->dsi.vertical_active_line = FRAME_HEIGHT;
  260. params->dsi.horizontal_sync_active = 50;
  261. params->dsi.horizontal_backporch = 50;
  262. params->dsi.horizontal_frontporch = 50;
  263. params->dsi.horizontal_active_pixel = FRAME_WIDTH;
  264. #ifndef CONFIG_FPGA_EARLY_PORTING
  265. #if (LCM_DSI_CMD_MODE)
  266. params->dsi.PLL_CLOCK = 350; //this value must be in MTK suggested table
  267. #else
  268. params->dsi.PLL_CLOCK = 218; //this value must be in MTK suggested table
  269. #endif
  270. #else
  271. params->dsi.pll_div1 = 0;
  272. params->dsi.pll_div2 = 0;
  273. params->dsi.fbk_div = 0x1;
  274. #endif
  275. params->dsi.cont_clock=1;
  276. params->dsi.clk_lp_per_line_enable = 0;
  277. params->dsi.esd_check_enable = 0;
  278. params->dsi.customization_esd_check_enable = 0;
  279. params->dsi.lcm_esd_check_table[0].cmd = 0x53;
  280. params->dsi.lcm_esd_check_table[0].count = 1;
  281. params->dsi.lcm_esd_check_table[0].para_list[0] = 0x24;
  282. }
  283. static void lcm_init(void)
  284. {
  285. SET_RESET_PIN(1);
  286. SET_RESET_PIN(0);
  287. MDELAY(10);
  288. SET_RESET_PIN(1);
  289. MDELAY(20);
  290. push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
  291. }
  292. static void lcm_suspend(void)
  293. {
  294. push_table(lcm_deep_sleep_mode_in_setting, sizeof(lcm_deep_sleep_mode_in_setting) / sizeof(struct LCM_setting_table), 1);
  295. }
  296. static void lcm_resume(void)
  297. {
  298. lcm_init();
  299. }
  300. static void lcm_update(unsigned int x, unsigned int y,
  301. unsigned int width, unsigned int height)
  302. {
  303. unsigned int x0 = x;
  304. unsigned int y0 = y;
  305. unsigned int x1 = x0 + width - 1;
  306. unsigned int y1 = y0 + height - 1;
  307. unsigned char x0_MSB = ((x0>>8)&0xFF);
  308. unsigned char x0_LSB = (x0&0xFF);
  309. unsigned char x1_MSB = ((x1>>8)&0xFF);
  310. unsigned char x1_LSB = (x1&0xFF);
  311. unsigned char y0_MSB = ((y0>>8)&0xFF);
  312. unsigned char y0_LSB = (y0&0xFF);
  313. unsigned char y1_MSB = ((y1>>8)&0xFF);
  314. unsigned char y1_LSB = (y1&0xFF);
  315. unsigned int data_array[16];
  316. data_array[0]= 0x00053902;
  317. data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
  318. data_array[2]= (x1_LSB);
  319. data_array[3]= 0x00053902;
  320. data_array[4]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
  321. data_array[5]= (y1_LSB);
  322. data_array[6]= 0x002c3909;
  323. dsi_set_cmdq(data_array, 7, 0);
  324. }
  325. static void lcm_setbacklight(unsigned int level)
  326. {
  327. unsigned int default_level = 145;
  328. unsigned int mapped_level = 0;
  329. //for LGE backlight IC mapping table
  330. if (level > 255)
  331. level = 255;
  332. if (level >0)
  333. mapped_level = default_level+(level)*(255-default_level)/(255);
  334. else
  335. mapped_level=0;
  336. // Refresh value of backlight level.
  337. lcm_backlight_level_setting[0].para_list[0] = mapped_level;
  338. push_table(lcm_backlight_level_setting, sizeof(lcm_backlight_level_setting) / sizeof(struct LCM_setting_table), 1);
  339. }
  340. static void lcm_setpwm(unsigned int divider)
  341. {
  342. // TBD
  343. }
  344. static unsigned int lcm_getpwm(unsigned int divider)
  345. {
  346. // ref freq = 15MHz, B0h setting 0x80, so 80.6% * freq is pwm_clk;
  347. // pwm_clk / 255 / 2(lcm_setpwm() 6th params) = pwm_duration = 23706
  348. unsigned int pwm_clk = 23706 / (1<<divider);
  349. return pwm_clk;
  350. }
  351. LCM_DRIVER hx8392a_dsi_vdo_lcm_drv = {
  352. .name = "hx8392a_vdo_cmd",
  353. .set_util_funcs = lcm_set_util_funcs,
  354. .get_params = lcm_get_params,
  355. .init = lcm_init,
  356. .suspend = lcm_suspend,
  357. .resume = lcm_resume,
  358. };