ili9806e_dsi_vdo_fwvga.c 23 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2013. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver's
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. /*****************************************************************************
  36. * Copyright Statement:
  37. * --------------------
  38. * This software is protected by Copyright and the information contained
  39. * herein is confidential. The software may not be copied and the information
  40. * contained herein may not be used or disclosed except with the written
  41. * permission of MediaTek Inc. (C) 2008
  42. *
  43. * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  44. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  45. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
  46. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  47. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  48. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  49. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  50. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  51. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
  52. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
  53. * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
  54. * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
  55. *
  56. * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
  57. * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  58. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  59. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
  60. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  61. *
  62. * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
  63. * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
  64. * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
  65. * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
  66. * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
  67. *
  68. *****************************************************************************/
  69. #ifdef BUILD_LK
  70. #include <string.h>
  71. #include <mt_gpio.h>
  72. #include <platform/mt_pmic.h>
  73. #elif defined(BUILD_UBOOT)
  74. #include <asm/arch/mt_gpio.h>
  75. #else
  76. #include <linux/string.h>
  77. #include <mach/mt_gpio.h>
  78. #include <mach/mt_pm_ldo.h>
  79. #endif
  80. #include "lcm_drv.h"
  81. #include <cust_gpio_usage.h>
  82. #if defined(BUILD_LK)
  83. #define LCM_PRINT printf
  84. #elif defined(BUILD_UBOOT)
  85. #define LCM_PRINT printf
  86. #else
  87. #define LCM_PRINT printk
  88. #endif
  89. extern void upmu_set_rg_vgp2_ndis_en(kal_uint32 val);
  90. // ---------------------------------------------------------------------------
  91. // Local Constants
  92. // ---------------------------------------------------------------------------
  93. // pixel
  94. #define FRAME_WIDTH (480)
  95. #define FRAME_HEIGHT (854)
  96. // physical dimension
  97. #define PHYSICAL_WIDTH (68)
  98. #define PHYSICAL_HIGHT (121)
  99. #define LCM_ID (0x40)
  100. #define LCM_DSI_CMD_MODE 0
  101. #define REGFLAG_DELAY 0xAB
  102. #define REGFLAG_END_OF_TABLE 0xAA // END OF REGISTERS MARKER
  103. /*
  104. DSV power +5V,-5v
  105. */
  106. #ifndef GPIO_DSV_AVDD_EN
  107. #define GPIO_DSV_AVDD_EN (GPIO41 | 0x80000000)
  108. #define GPIO_DSV_AVDD_EN_M_GPIO GPIO_MODE_00
  109. #define GPIO_DSV_AVDD_EN_M_KROW GPIO_MODE_06
  110. #define GPIO_DSV_AVDD_EN_M_PWM GPIO_MODE_05
  111. #endif
  112. #ifndef GPIO_DSV_AVEE_EN
  113. #define GPIO_DSV_AVEE_EN (GPIO42 | 0x80000000)
  114. #define GPIO_DSV_AVEE_EN_M_GPIO GPIO_MODE_00
  115. #define GPIO_DSV_AVEE_EN_M_KROW GPIO_MODE_06
  116. #define GPIO_DSV_AVEE_EN_M_PWM GPIO_MODE_05
  117. #endif
  118. // ---------------------------------------------------------------------------
  119. // Local Variables
  120. // ---------------------------------------------------------------------------
  121. static LCM_UTIL_FUNCS lcm_util = {0};
  122. #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
  123. #define UDELAY(n) (lcm_util.udelay(n))
  124. #define MDELAY(n) (lcm_util.mdelay(n))
  125. // ---------------------------------------------------------------------------
  126. // Local Functions
  127. // ---------------------------------------------------------------------------
  128. #define dsi_set_cmdq_V3(para_tbl, size, force_update) lcm_util.dsi_set_cmdq_V3(para_tbl, size, force_update)
  129. #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  130. #define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  131. #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
  132. #define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  133. #define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd)
  134. #define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
  135. static unsigned int need_set_lcm_addr = 1;
  136. struct LCM_setting_table {
  137. unsigned char cmd;
  138. unsigned char count;
  139. unsigned char para_list[64];
  140. };
  141. #if defined(BUILD_LK)
  142. static LCM_setting_table_V3 lcm_EXTC_set_enable_V3[] = {
  143. {0X39, 0XFF, 5, {0XFF, 0X98, 0X06, 0X04, 0X00}}, //Change to page 0
  144. };
  145. #endif
  146. static LCM_setting_table_V3 lcm_initialization_setting_V3[] = {
  147. {0X39, 0XFF, 5, {0XFF, 0X98, 0X06, 0X04, 0X01}}, //EXTC Command Set enable register (Page 1)
  148. {0X15, 0X08, 1, {0X10}}, //Interface Mode Control 1
  149. {0X15, 0X21, 1, {0X01}}, //Display Function Control 2
  150. {0X15, 0X30, 1, {0X01}}, //Resolution Control (480*854)
  151. {0X15, 0X31, 1, {0X00}}, //Display Inversion Control
  152. {0X15, 0X60, 1, {0X07}}, //Source Timing Adjust1 (SDTI)
  153. {0X15, 0X61, 1, {0X00}}, //Source Timing Adjust2 (CRTI)
  154. {0X15, 0X62, 1, {0X08}}, //Source Timing Adjust3 (EQTI)
  155. {0X15, 0X63, 1, {0X00}}, //Source Timing Adjust4 (EQTI)
  156. {0X15, 0X40, 1, {0X00}}, //Power Control 1
  157. {0X15, 0X41, 1, {0X00}}, //Power Control 2
  158. {0X15, 0X42, 1, {0X01}}, //Power Control 3
  159. {0X15, 0X43, 1, {0X85}}, //Power Control 4
  160. {0X15, 0X44, 1, {0X02}}, //Power Control 5
  161. {0X15, 0X47, 1, {0X35}}, //Power Control 8
  162. {0X15, 0X50, 1, {0X4E}}, //Power Control 9
  163. {0X15, 0X51, 1, {0X4E}}, //Power Control 10
  164. {0X15, 0X52, 1, {0X00}}, //VCOM Control 1~2
  165. {0X15, 0X53, 1, {0X2D}}, //VCOM Control 1~2
  166. {0X15, 0X57, 1, {0X50}}, //LVD Detect
  167. {0X15, 0XA0, 1, {0X00}}, //Positive Gamma Control (01h~16h)
  168. {0X15, 0XA1, 1, {0X09}},
  169. {0X15, 0XA2, 1, {0X0E}},
  170. {0X15, 0XA3, 1, {0X0E}},
  171. {0X15, 0XA4, 1, {0X07}},
  172. {0X15, 0XA5, 1, {0X0D}},
  173. {0X15, 0XA6, 1, {0X04}},
  174. {0X15, 0XA7, 1, {0X04}},
  175. {0X15, 0XA8, 1, {0X08}},
  176. {0X15, 0XA9, 1, {0X0C}},
  177. {0X15, 0XAA, 1, {0X0C}},
  178. {0X15, 0XAB, 1, {0X05}},
  179. {0X15, 0XAC, 1, {0X0D}},
  180. {0X15, 0XAD, 1, {0X20}},
  181. {0X15, 0XAE, 1, {0X19}},
  182. {0X15, 0XAF, 1, {0X00}},
  183. {0X15, 0XC0, 1, {0X00}}, //Negative Gamma Control (01h~16h)
  184. {0X15, 0XC1, 1, {0X09}},
  185. {0X15, 0XC2, 1, {0X0E}},
  186. {0X15, 0XC3, 1, {0X0E}},
  187. {0X15, 0XC4, 1, {0X07}},
  188. {0X15, 0XC5, 1, {0X0D}},
  189. {0X15, 0XC6, 1, {0X07}},
  190. {0X15, 0XC7, 1, {0X05}},
  191. {0X15, 0XC8, 1, {0X07}},
  192. {0X15, 0XC9, 1, {0X0A}},
  193. {0X15, 0XCA, 1, {0X0C}},
  194. {0X15, 0XCB, 1, {0X05}},
  195. {0X15, 0XCC, 1, {0X0D}},
  196. {0X15, 0XCD, 1, {0X20}},
  197. {0X15, 0XCE, 1, {0X19}},
  198. {0X15, 0XCF, 1, {0X00}},
  199. {0X39, 0XFF, 5, {0XFF, 0X98, 0X06, 0X04, 0X07}}, //Change to page 7
  200. {0X15, 0X00, 1, {0X77}}, //External Power Setting
  201. {0X15, 0X17, 1, {0X22}}, //VREG1/2OUT Enable
  202. {0X15, 0X02, 1, {0X77}}, //Power Bias Control
  203. {0X15, 0XE1, 1, {0X79}},
  204. {0X39, 0XFF, 5, {0XFF, 0X98, 0X06, 0X04, 0X06}}, //Change to page 6
  205. {0X15, 0X00, 1, {0X21}}, //GIP Setting (00h~40h)
  206. {0X15, 0X01, 1, {0X05}},
  207. {0X15, 0X02, 1, {0X00}},
  208. {0X15, 0X03, 1, {0X00}},
  209. {0X15, 0X04, 1, {0X00}},
  210. {0X15, 0X05, 1, {0X00}},
  211. {0X15, 0X06, 1, {0X80}},
  212. {0X15, 0X07, 1, {0X04}},
  213. {0X15, 0X08, 1, {0X00}},
  214. {0X15, 0X09, 1, {0X90}},
  215. {0X15, 0X0A, 1, {0X03}},
  216. {0X15, 0X0B, 1, {0X00}},
  217. {0X15, 0X0C, 1, {0X00}},
  218. {0X15, 0X0D, 1, {0X00}},
  219. {0X15, 0X0E, 1, {0X00}},
  220. {0X15, 0X0F, 1, {0X00}},
  221. {0X15, 0X10, 1, {0X50}},
  222. {0X15, 0X11, 1, {0X50}},
  223. {0X15, 0X12, 1, {0X00}},
  224. {0X15, 0X13, 1, {0X85}},
  225. {0X15, 0X14, 1, {0X85}},
  226. {0X15, 0X15, 1, {0XC0}},
  227. {0X15, 0X16, 1, {0X08}},
  228. {0X15, 0X17, 1, {0X00}},
  229. {0X15, 0X18, 1, {0X00}},
  230. {0X15, 0X19, 1, {0X00}},
  231. {0X15, 0X1A, 1, {0X00}},
  232. {0X15, 0X1B, 1, {0X00}},
  233. {0X15, 0X1C, 1, {0X00}},
  234. {0X15, 0X1D, 1, {0X00}},
  235. {0X15, 0X20, 1, {0X01}},
  236. {0X15, 0X21, 1, {0X23}},
  237. {0X15, 0X22, 1, {0X45}},
  238. {0X15, 0X23, 1, {0X67}},
  239. {0X15, 0X24, 1, {0X01}},
  240. {0X15, 0X25, 1, {0X23}},
  241. {0X15, 0X26, 1, {0X45}},
  242. {0X15, 0X27, 1, {0X67}},
  243. {0X15, 0X30, 1, {0X10}},
  244. {0X15, 0X31, 1, {0X22}},
  245. {0X15, 0X32, 1, {0X11}},
  246. {0X15, 0X33, 1, {0XAA}},
  247. {0X15, 0X34, 1, {0XBB}},
  248. {0X15, 0X35, 1, {0X66}},
  249. {0X15, 0X36, 1, {0X00}},
  250. {0X15, 0X37, 1, {0X22}},
  251. {0X15, 0X38, 1, {0X22}},
  252. {0X15, 0X39, 1, {0X22}},
  253. {0X15, 0X3A, 1, {0X22}},
  254. {0X15, 0X3B, 1, {0X22}},
  255. {0X15, 0X3C, 1, {0X22}},
  256. {0X15, 0X3D, 1, {0X22}},
  257. {0X15, 0X3E, 1, {0X22}},
  258. {0X15, 0X3F, 1, {0X22}},
  259. {0X15, 0X40, 1, {0X22}},
  260. {0X15, 0X52, 1, {0X10}},
  261. {0X15, 0X53, 1, {0X10}},
  262. {0X39, 0XFF, 5, {0XFF, 0X98, 0X06, 0X04, 0X00}}, //Change to page 0
  263. {0X15, 0X3A, 1, {0X70}}, //Display Access Control
  264. {0X15, 0X51, 1, {0XFF}}, //Write Display Brightness Value
  265. {0X15, 0X53, 1, {0X00}}, //Write CTRL Display Value
  266. {0X15, 0X55, 1, {0XB0}}, //Write Content Adaptive Brightness Control Value
  267. };
  268. static struct LCM_setting_table __attribute__ ((unused)) lcm_backlight_level_setting[] = {
  269. {0x51, 1, {0xFF}},
  270. {REGFLAG_END_OF_TABLE, 0x00, {}}
  271. };
  272. static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
  273. {
  274. unsigned int i;
  275. for(i = 0; i < count; i++) {
  276. unsigned cmd;
  277. cmd = table[i].cmd;
  278. switch (cmd) {
  279. case REGFLAG_DELAY:
  280. MDELAY(table[i].count);
  281. break;
  282. case REGFLAG_END_OF_TABLE:
  283. break;
  284. default:
  285. dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
  286. }
  287. }
  288. LCM_PRINT("[LCD] push_table \n");
  289. }
  290. // ---------------------------------------------------------------------------
  291. // LCM Driver Implementations
  292. // ---------------------------------------------------------------------------
  293. static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
  294. {
  295. memcpy((void*)&lcm_util, (void*)util, sizeof(LCM_UTIL_FUNCS));
  296. }
  297. static void lcm_get_params(LCM_PARAMS * params)
  298. {
  299. memset(params, 0, sizeof(LCM_PARAMS));
  300. params->type = LCM_TYPE_DSI;
  301. params->width = FRAME_WIDTH;
  302. params->height = FRAME_HEIGHT;
  303. params->physical_width=PHYSICAL_WIDTH;
  304. params->physical_height=PHYSICAL_HIGHT;
  305. // enable tearing-free
  306. params->dbi.te_mode = LCM_DBI_TE_MODE_DISABLED;
  307. params->dbi.te_edge_polarity = LCM_POLARITY_RISING;
  308. #if (LCM_DSI_CMD_MODE)
  309. params->dsi.mode = CMD_MODE;
  310. #else
  311. params->dsi.mode = SYNC_PULSE_VDO_MODE;//SYNC_EVENT_VDO_MODE;
  312. #endif
  313. // DSI
  314. /* Command mode setting */
  315. params->dsi.LANE_NUM = LCM_TWO_LANE;
  316. //The following defined the fomat for data coming from LCD engine.
  317. params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
  318. params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
  319. params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
  320. params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
  321. // Highly depends on LCD driver capability.
  322. params->dsi.packet_size = 256;
  323. // Video mode setting
  324. params->dsi.intermediat_buffer_num = 2;
  325. params->dsi.PS = LCM_PACKED_PS_24BIT_RGB888;
  326. params->dsi.vertical_sync_active = 2;
  327. params->dsi.vertical_backporch = 20;
  328. params->dsi.vertical_frontporch = 20;
  329. params->dsi.vertical_active_line = FRAME_HEIGHT;
  330. params->dsi.horizontal_sync_active = 10;
  331. params->dsi.horizontal_backporch = 60;
  332. params->dsi.horizontal_frontporch = 200;
  333. params->dsi.horizontal_active_pixel = FRAME_WIDTH;
  334. // Bit rate calculation
  335. //params->dsi.pll_div1=35; // fref=26MHz, fvco=fref*(div1+1) (div1=0~63, fvco=500MHZ~1GHz)
  336. //params->dsi.pll_div2=1; // div2=0~15: fout=fvo/(2*div2)
  337. /* ESD or noise interference recovery For video mode LCM only. */
  338. // Send TE packet to LCM in a period of n frames and check the response.
  339. //params->dsi.lcm_int_te_monitor = FALSE;
  340. //params->dsi.lcm_int_te_period = 1; // Unit : frames
  341. // Need longer FP for more opportunity to do int. TE monitor applicably.
  342. //if(params->dsi.lcm_int_te_monitor)
  343. // params->dsi.vertical_frontporch *= 2;
  344. // Monitor external TE (or named VSYNC) from LCM once per 2 sec. (LCM VSYNC must be wired to baseband TE pin.)
  345. //params->dsi.lcm_ext_te_monitor = FALSE;
  346. // Non-continuous clock
  347. //params->dsi.noncont_clock = TRUE;
  348. //params->dsi.noncont_clock_period = 2; // Unit : frames
  349. // DSI MIPI Spec parameters setting
  350. /*params->dsi.HS_TRAIL = 6;
  351. params->dsi.HS_ZERO = 9;
  352. params->dsi.HS_PRPR = 5;
  353. params->dsi.LPX = 4;
  354. params->dsi.TA_SACK = 1;
  355. params->dsi.TA_GET = 20;
  356. params->dsi.TA_SURE = 6;
  357. params->dsi.TA_GO = 16;
  358. params->dsi.CLK_TRAIL = 5;
  359. params->dsi.CLK_ZERO = 18;
  360. params->dsi.LPX_WAIT = 1;
  361. params->dsi.CONT_DET = 0;
  362. params->dsi.CLK_HS_PRPR = 4;*/
  363. // Bit rate calculation
  364. params->dsi.PLL_CLOCK = 241;
  365. LCM_PRINT("[LCD] lcm_get_params \n");
  366. }
  367. static void init_lcm_registers(void)
  368. {
  369. unsigned int data_array[32];
  370. dsi_set_cmdq_V3(lcm_initialization_setting_V3, sizeof(lcm_initialization_setting_V3) / sizeof(LCM_setting_table_V3), 1);
  371. #if defined(BUILD_LK)
  372. dsi_set_cmdq_V3(lcm_EXTC_set_enable_V3, sizeof(lcm_EXTC_set_enable_V3) / sizeof(LCM_setting_table_V3), 1);
  373. MDELAY(1);
  374. #endif
  375. data_array[0] = 0x00110500; //Sleep Out
  376. dsi_set_cmdq(data_array, 1, 1);
  377. MDELAY(100);
  378. LCM_PRINT("[LCD] init_lcm_registers \n");
  379. }
  380. static void init_lcm_registers_added(void)
  381. {
  382. unsigned int data_array[1];
  383. #if defined(BUILD_LK)
  384. dsi_set_cmdq_V3(lcm_EXTC_set_enable_V3, sizeof(lcm_EXTC_set_enable_V3) / sizeof(LCM_setting_table_V3), 1);
  385. MDELAY(1);
  386. #endif
  387. data_array[0] = 0x00290500; //Display On
  388. dsi_set_cmdq(data_array, 1, 1);
  389. MDELAY(10);
  390. LCM_PRINT("[LCD] init_lcm_registers_added \n");
  391. }
  392. static void init_lcm_registers_sleep(void)
  393. {
  394. unsigned int data_array[1];
  395. MDELAY(1);
  396. data_array[0] = 0x00280500; //Display Off
  397. dsi_set_cmdq(data_array, 1, 1);
  398. MDELAY(100);
  399. LCM_PRINT("[LCD] init_lcm_registers_Display_off \n");
  400. }
  401. static void init_lcm_registers_sleep_cmd(void)
  402. {
  403. unsigned int data_array[1];
  404. MDELAY(1);
  405. data_array[0] = 0x00100500; //Sleep in
  406. dsi_set_cmdq(data_array, 1, 1);
  407. MDELAY(120);
  408. LCM_PRINT("[LCD] init_lcm_registers_sleep_cmd \n");
  409. }
  410. /* vgp2 1.8v LDO enable */
  411. static void ldo_1v8io_on(void)
  412. {
  413. #ifdef BUILD_UBOOT
  414. #error "not implemeted"
  415. #elif defined(BUILD_LK)
  416. // IOVCC 1.8v LDO on
  417. upmu_set_rg_vcamd_vosel(3);
  418. upmu_set_rg_vcamd_en(1);
  419. #else
  420. LCM_PRINT("[LCD] ldo_1v8io_on ================================================ \n");
  421. hwPowerOn(MT6323_POWER_LDO_VCAMD, VOL_1800, "1V8_LCD_VIO_MTK_S");
  422. hwPowerOn(MT6323_POWER_LDO_VGP2, VOL_2800, "2V8_LCD_VCC_MTK_S"); // JOAN_TEST
  423. #endif
  424. }
  425. /* vgp2 1.8v LDO disable */
  426. static void ldo_1v8io_off(void)
  427. {
  428. #ifdef BUILD_UBOOT
  429. #error "not implemeted"
  430. #elif defined(BUILD_LK)
  431. upmu_set_rg_vcamd_en(0);
  432. #else
  433. hwPowerDown(MT6323_POWER_LDO_VCAMD, "1V8_LCD_VIO_MTK_S");
  434. hwPowerDown(MT6323_POWER_LDO_VGP2, "2V8_LCD_VCC_MTK_S"); // JOAN_TEST
  435. #endif
  436. }
  437. static void ldo_ext_3v0_on(void)
  438. {
  439. #if 1 // L80P_FIX
  440. #ifdef BUILD_UBOOT
  441. #error "not implemeted"
  442. #elif defined(BUILD_LK)
  443. upmu_set_rg_vgp2_ndis_en(1);
  444. upmu_set_rg_vgp2_vosel(5);
  445. upmu_set_rg_vgp2_en(1);
  446. #else
  447. upmu_set_rg_vgp2_ndis_en(1);
  448. hwPowerOn(MT6323_POWER_LDO_VGP2, VOL_2800, "2V8_LCD_VCC_MTK_S");
  449. #endif
  450. #else
  451. mt_set_gpio_mode(GPIO_LCM_PWR, GPIO_LCM_PWR_M_GPIO);
  452. mt_set_gpio_pull_enable(GPIO_LCM_PWR, GPIO_PULL_ENABLE);
  453. mt_set_gpio_dir(GPIO_LCM_PWR, GPIO_DIR_OUT);
  454. mt_set_gpio_out(GPIO_LCM_PWR, GPIO_OUT_ONE);
  455. #endif
  456. }
  457. static void ldo_ext_3v0_off(void)
  458. {
  459. #if 1 // L80P_FIX
  460. #ifdef BUILD_UBOOT
  461. #error "not implemeted"
  462. #elif defined(BUILD_LK)
  463. //upmu_set_rg_vgp2_ndis_en(0);
  464. upmu_set_rg_vgp2_en(0);
  465. #else
  466. upmu_set_rg_vgp2_ndis_en(1);
  467. hwPowerDown(MT6323_POWER_LDO_VGP2, "2V8_LCD_VCC_MTK_S");
  468. #endif
  469. #else
  470. mt_set_gpio_mode(GPIO_LCM_PWR, GPIO_LCM_PWR_M_GPIO);
  471. mt_set_gpio_pull_enable(GPIO_LCM_PWR, GPIO_PULL_ENABLE);
  472. mt_set_gpio_dir(GPIO_LCM_PWR, GPIO_DIR_OUT);
  473. mt_set_gpio_out(GPIO_LCM_PWR, GPIO_OUT_ZERO);
  474. #endif
  475. }
  476. /*
  477. DSV power +5V,-5v
  478. */
  479. static void ldo_p5m5_dsv_3v0_on(void)
  480. {
  481. #if 1
  482. mt_set_gpio_mode(GPIO_DSV_EN, GPIO_DSV_EN_M_GPIO);
  483. mt_set_gpio_pull_enable(GPIO_DSV_EN, GPIO_PULL_ENABLE);
  484. mt_set_gpio_dir(GPIO_DSV_EN, GPIO_DIR_OUT);
  485. mt_set_gpio_out(GPIO_DSV_EN, GPIO_OUT_ONE);
  486. #else
  487. mt_set_gpio_mode(GPIO_DSV_AVDD_EN, GPIO_DSV_AVDD_EN_M_GPIO);
  488. mt_set_gpio_pull_enable(GPIO_DSV_AVDD_EN, GPIO_PULL_ENABLE);
  489. mt_set_gpio_dir(GPIO_DSV_AVDD_EN, GPIO_DIR_OUT);
  490. mt_set_gpio_mode(GPIO_DSV_AVEE_EN, GPIO_DSV_AVEE_EN_M_GPIO);
  491. mt_set_gpio_pull_enable(GPIO_DSV_AVEE_EN, GPIO_PULL_ENABLE);
  492. mt_set_gpio_dir(GPIO_DSV_AVEE_EN, GPIO_DIR_OUT);
  493. mt_set_gpio_out(GPIO_DSV_AVDD_EN, GPIO_OUT_ONE);
  494. MDELAY(1);
  495. mt_set_gpio_out(GPIO_DSV_AVEE_EN, GPIO_OUT_ONE);
  496. #endif
  497. }
  498. static void ldo_p5m5_dsv_3v0_off(void)
  499. {
  500. #if 1
  501. mt_set_gpio_mode(GPIO_DSV_EN, GPIO_DSV_EN_M_GPIO);
  502. mt_set_gpio_pull_enable(GPIO_DSV_EN, GPIO_PULL_ENABLE);
  503. mt_set_gpio_dir(GPIO_DSV_EN, GPIO_DIR_OUT);
  504. mt_set_gpio_out(GPIO_DSV_EN, GPIO_OUT_ZERO);
  505. #else
  506. mt_set_gpio_mode(GPIO_DSV_AVDD_EN, GPIO_DSV_AVDD_EN_M_GPIO);
  507. mt_set_gpio_pull_enable(GPIO_DSV_AVDD_EN, GPIO_PULL_ENABLE);
  508. mt_set_gpio_dir(GPIO_DSV_AVDD_EN, GPIO_DIR_OUT);
  509. mt_set_gpio_mode(GPIO_DSV_AVEE_EN, GPIO_DSV_AVEE_EN_M_GPIO);
  510. mt_set_gpio_pull_enable(GPIO_DSV_AVEE_EN, GPIO_PULL_ENABLE);
  511. mt_set_gpio_dir(GPIO_DSV_AVEE_EN, GPIO_DIR_OUT);
  512. mt_set_gpio_out(GPIO_DSV_AVDD_EN, GPIO_OUT_ZERO);
  513. MDELAY(1);
  514. mt_set_gpio_out(GPIO_DSV_AVEE_EN, GPIO_OUT_ZERO);
  515. #endif
  516. }
  517. static void reset_lcd_module(unsigned char reset)
  518. {
  519. mt_set_gpio_mode(GPIO_LCM_RST, GPIO_LCM_RST_M_GPIO);
  520. mt_set_gpio_pull_enable(GPIO_LCM_RST, GPIO_PULL_ENABLE);
  521. mt_set_gpio_dir(GPIO_LCM_RST, GPIO_DIR_OUT);
  522. if(reset){
  523. mt_set_gpio_out(GPIO_LCM_RST, GPIO_OUT_ONE);
  524. }else{
  525. mt_set_gpio_out(GPIO_LCM_RST, GPIO_OUT_ZERO);
  526. }
  527. }
  528. static void lcm_init(void)
  529. {
  530. #if defined(BUILD_LK)
  531. ldo_p5m5_dsv_3v0_off();
  532. #endif
  533. /*
  534. / Power IOVCC > VCI On
  535. / vgp2 1.8v LDO enable
  536. / gpio pin for external LDO enable
  537. / delay 1ms
  538. */
  539. ldo_1v8io_on();
  540. //External LDO 3.0v on
  541. ldo_ext_3v0_on();
  542. MDELAY(5);
  543. ldo_ext_3v0_off();
  544. MDELAY(5);
  545. ldo_ext_3v0_on();
  546. /*
  547. / reset pin High > delay 1ms > Low > delay 10ms > High > delay 120ms
  548. / LCD RESET PIN
  549. */
  550. MDELAY(1);
  551. reset_lcd_module(1);
  552. MDELAY(1);
  553. reset_lcd_module(0);
  554. MDELAY(10);
  555. reset_lcd_module(1);
  556. MDELAY(120);
  557. init_lcm_registers(); //SET EXTC ~ sleep out register
  558. ldo_p5m5_dsv_3v0_on();
  559. MDELAY(20);
  560. init_lcm_registers_added(); //Display On
  561. need_set_lcm_addr = 1;
  562. LCM_PRINT("[LCD] lcm_init \n");
  563. }
  564. static void lcm_suspend(void)
  565. {
  566. init_lcm_registers_sleep(); // Display off
  567. ldo_p5m5_dsv_3v0_off(); // DSV +-5V power off
  568. MDELAY(20);
  569. reset_lcd_module(0); //reset pin low
  570. MDELAY(20);
  571. init_lcm_registers_sleep_cmd(); // Sleep in command
  572. //VCI/IOVCC off
  573. ldo_1v8io_off();
  574. ldo_ext_3v0_off();
  575. LCM_PRINT("[LCD] lcm_suspend \n");
  576. }
  577. static void lcm_resume(void)
  578. {
  579. lcm_init();
  580. need_set_lcm_addr = 1;
  581. LCM_PRINT("[LCD] lcm_resume \n");
  582. }
  583. static void lcm_esd_recover(void)
  584. {
  585. lcm_suspend();
  586. lcm_resume();
  587. LCM_PRINT("[LCD] lcm_esd_recover \n");
  588. }
  589. static void lcm_update(unsigned int x, unsigned int y,
  590. unsigned int width, unsigned int height)
  591. {
  592. unsigned int x0 = x;
  593. unsigned int y0 = y;
  594. unsigned int x1 = x0 + width - 1;
  595. unsigned int y1 = y0 + height - 1;
  596. unsigned char x0_MSB = ((x0>>8)&0xFF);
  597. unsigned char x0_LSB = (x0&0xFF);
  598. unsigned char x1_MSB = ((x1>>8)&0xFF);
  599. unsigned char x1_LSB = (x1&0xFF);
  600. unsigned char y0_MSB = ((y0>>8)&0xFF);
  601. unsigned char y0_LSB = (y0&0xFF);
  602. unsigned char y1_MSB = ((y1>>8)&0xFF);
  603. unsigned char y1_LSB = (y1&0xFF);
  604. unsigned int data_array[16];
  605. // need update at the first time
  606. if(need_set_lcm_addr)
  607. {
  608. data_array[0]= 0x00053902;
  609. data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
  610. data_array[2]= (x1_LSB);
  611. dsi_set_cmdq(data_array, 3, 1);
  612. data_array[0]= 0x00053902;
  613. data_array[1]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
  614. data_array[2]= (y1_LSB);
  615. dsi_set_cmdq(data_array, 3, 1);
  616. need_set_lcm_addr = 0;
  617. }
  618. data_array[0]= 0x002c3909;
  619. dsi_set_cmdq(data_array, 1, 0);
  620. LCM_PRINT("[LCD] lcm_update \n");
  621. }
  622. static unsigned int lcm_compare_id(void)
  623. {
  624. LCM_PRINT("[ili9806e_dsi_vdo_fwvga]\n");
  625. return 1;
  626. }
  627. // ---------------------------------------------------------------------------
  628. // Get LCM Driver Hooks
  629. // ---------------------------------------------------------------------------
  630. LCM_DRIVER ili9806e_dsi_vdo_fwvga_drv = {
  631. .name = "ili9806e_dsi_vdo_fwvga",
  632. .set_util_funcs = lcm_set_util_funcs,
  633. .get_params = lcm_get_params,
  634. .init = lcm_init,
  635. .suspend = lcm_suspend,
  636. .resume = lcm_resume,
  637. .compare_id = lcm_compare_id,
  638. .update = lcm_update,
  639. #if (!defined(BUILD_UBOOT) && !defined(BUILD_LK))
  640. .esd_recover = lcm_esd_recover,
  641. #endif
  642. };