bq25601.c 25 KB

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  1. #include <platform/mt_typedefs.h>
  2. #include <platform/mt_reg_base.h>
  3. #include <platform/mt_i2c.h>
  4. #include <platform/mt_pmic.h>
  5. #include <bq25601.h>
  6. #include <printf.h>
  7. #include <platform/mt_gpio.h>
  8. #include "mtk_charger_intf.h"
  9. /**********************************************************
  10. *
  11. * [I2C Slave Setting]
  12. *
  13. *********************************************************/
  14. #define BQ25601_SLAVE_ADDR_WRITE 0xD6
  15. #define BQ25601_SLAVE_ADDR_READ 0xD7
  16. #define bq25601_SLAVE_ADDR 0x6B
  17. #define PRECC_BATVOL 2800 //PRECC 2.8V
  18. #define BQ25601_I2C_ID I2C5
  19. #define GPIO_CHR_CE_PIN (GPIO2 | 0x80000000)
  20. struct bq25601_info {
  21. struct mtk_charger_info mchr_info;
  22. struct mt_i2c_t i2c;
  23. int i2c_log_level;
  24. };
  25. int bq25601_dump_register(struct mtk_charger_info *mchr_info);
  26. int bq25601_charging_enable(struct mtk_charger_info *mchr_info, bool enable);
  27. //BSP:add XLEWHLES-25 by ronghe.cheng 20181108 start
  28. int bq25601_reset_watch_dog_timer(struct mtk_charger_info *mchr_info, bool enable);
  29. static struct mtk_charger_ops bq25601_mchr_ops = {
  30. .dump_register = bq25601_dump_register,
  31. .enable_charging = bq25601_charging_enable,
  32. };
  33. //BSP:add XLEWHLES-25 by ronghe.cheng 20181108 end
  34. static struct bq25601_info g_bq25601_info = {
  35. .mchr_info = {
  36. .name = "primary_charger",
  37. .alias_name = "bq25601",
  38. .device_id = -1,
  39. .mchr_ops = &bq25601_mchr_ops,
  40. },
  41. .i2c = {
  42. .id = I2C1,
  43. .addr = bq25601_SLAVE_ADDR,
  44. .mode = ST_MODE,
  45. .speed = 100,
  46. },
  47. .i2c_log_level = INFO,
  48. };
  49. /**********************************************************
  50. *
  51. * [Global Variable]
  52. *
  53. *********************************************************/
  54. kal_uint8 bq25601_reg[bq25601_REG_NUM] = {0};
  55. /**********************************************************
  56. *
  57. * [I2C Function For Read/Write bq25601]
  58. *
  59. *********************************************************/
  60. static struct mt_i2c_t bq25601_i2c;
  61. kal_uint32 bq25601_write_byte(kal_uint8 cmd, kal_uint8 writeData)
  62. {
  63. kal_uint32 ret_code = I2C_OK;
  64. kal_uint8 write_data[2];
  65. kal_uint16 len;
  66. write_data[0]= cmd;
  67. write_data[1] = writeData;
  68. bq25601_i2c.id = BQ25601_I2C_ID;
  69. /* Since i2c will left shift 1 bit, we need to set I2C address to >>1 */
  70. bq25601_i2c.addr = (BQ25601_SLAVE_ADDR_WRITE >> 1);
  71. bq25601_i2c.mode = ST_MODE;
  72. bq25601_i2c.speed = 100;
  73. len = 2;
  74. ret_code = i2c_write(&bq25601_i2c, write_data, len);
  75. if (I2C_OK != ret_code)
  76. dprintf(INFO, "%s: i2c_write: ret_code: %d\n", __func__, ret_code);
  77. return ret_code;
  78. }
  79. kal_uint32 bq25601_read_byte(kal_uint8 cmd, kal_uint8 *returnData)
  80. {
  81. kal_uint32 ret_code = I2C_OK;
  82. kal_uint16 len;
  83. *returnData = cmd;
  84. bq25601_i2c.id = BQ25601_I2C_ID;
  85. /* Since i2c will left shift 1 bit, we need to set I2C address to >>1 */
  86. bq25601_i2c.addr = (BQ25601_SLAVE_ADDR_READ >> 1);
  87. bq25601_i2c.mode = ST_MODE;
  88. bq25601_i2c.speed = 100;
  89. len = 1;
  90. ret_code = i2c_write_read(&bq25601_i2c, returnData, len, len);
  91. if (I2C_OK != ret_code)
  92. dprintf(INFO, "%s: i2c_read: ret_code: %d\n", __func__, ret_code);
  93. return ret_code;
  94. }
  95. /**********************************************************
  96. *
  97. * [Read / Write Function]
  98. *
  99. *********************************************************/
  100. kal_uint32 bq25601_read_interface (kal_uint8 RegNum, kal_uint8 *val, kal_uint8 MASK, kal_uint8 SHIFT)
  101. {
  102. kal_uint8 bq25601_reg = 0;
  103. kal_uint32 ret = 0;
  104. dprintf(INFO, "--------------------------------------------------LK\n");
  105. ret = bq25601_read_byte(RegNum, &bq25601_reg);
  106. dprintf(INFO, "[bq25601_read_interface] Reg[%x]=0x%x\n", RegNum, bq25601_reg);
  107. bq25601_reg &= (MASK << SHIFT);
  108. *val = (bq25601_reg >> SHIFT);
  109. dprintf(INFO, "[bq25601_read_interface] val=0x%x\n", *val);
  110. return ret;
  111. }
  112. kal_uint32 bq25601_config_interface (kal_uint8 RegNum, kal_uint8 val, kal_uint8 MASK, kal_uint8 SHIFT)
  113. {
  114. kal_uint8 bq25601_reg = 0;
  115. kal_uint32 ret = 0;
  116. dprintf(INFO, "--------------------------------------------------LK\n");
  117. ret = bq25601_read_byte(RegNum, &bq25601_reg);
  118. dprintf(INFO, "[bq25601_config_interface] Reg[%x]=0x%x\n", RegNum, bq25601_reg);
  119. bq25601_reg &= ~(MASK << SHIFT);
  120. bq25601_reg |= (val << SHIFT);
  121. ret = bq25601_write_byte(RegNum, bq25601_reg);
  122. dprintf(INFO, "[bq25601_config_interface] write Reg[%x]=0x%x\n", RegNum, bq25601_reg);
  123. // Check
  124. //bq25601_read_byte(RegNum, &bq25601_reg);
  125. //dprintf(INFO, "[bq25601_config_interface] Check Reg[%x]=0x%x\n", RegNum, bq25601_reg);
  126. return ret;
  127. }
  128. /**********************************************************
  129. *
  130. * [Internal Function]
  131. *
  132. *********************************************************/
  133. /* CON0---------------------------------------------------- */
  134. void bq25601_set_en_hiz(unsigned int val)
  135. {
  136. unsigned int ret = 0;
  137. ret = bq25601_config_interface((unsigned char) (bq25601_CON0),
  138. (unsigned char) (val),
  139. (unsigned char) (CON0_EN_HIZ_MASK),
  140. (unsigned char) (CON0_EN_HIZ_SHIFT)
  141. );
  142. }
  143. void bq25601_set_iinlim(unsigned int val)
  144. {
  145. unsigned int ret = 0;
  146. ret = bq25601_config_interface((unsigned char) (bq25601_CON0),
  147. (unsigned char) (val),
  148. (unsigned char) (CON0_IINLIM_MASK),
  149. (unsigned char) (CON0_IINLIM_SHIFT)
  150. );
  151. }
  152. void bq25601_set_stat_ctrl(unsigned int val)
  153. {
  154. unsigned int ret = 0;
  155. ret = bq25601_config_interface((unsigned char) (bq25601_CON0),
  156. (unsigned char) (val),
  157. (unsigned char) (CON0_STAT_IMON_CTRL_MASK),
  158. (unsigned char) (CON0_STAT_IMON_CTRL_SHIFT)
  159. );
  160. }
  161. /* CON1---------------------------------------------------- */
  162. void bq25601_set_reg_rst(unsigned int val)
  163. {
  164. unsigned int ret = 0;
  165. ret = bq25601_config_interface((unsigned char) (bq25601_CON11),
  166. (unsigned char) (val),
  167. (unsigned char) (CON11_REG_RST_MASK),
  168. (unsigned char) (CON11_REG_RST_SHIFT)
  169. );
  170. }
  171. void bq25601_set_pfm(unsigned int val)
  172. {
  173. unsigned int ret = 0;
  174. ret = bq25601_config_interface((unsigned char) (bq25601_CON1),
  175. (unsigned char) (val),
  176. (unsigned char) (CON1_PFM_MASK),
  177. (unsigned char) (CON1_PFM_SHIFT)
  178. );
  179. }
  180. void bq25601_set_wdt_rst(unsigned int val)
  181. {
  182. unsigned int ret = 0;
  183. ret = bq25601_config_interface((unsigned char) (bq25601_CON1),
  184. (unsigned char) (val),
  185. (unsigned char) (CON1_WDT_RST_MASK),
  186. (unsigned char) (CON1_WDT_RST_SHIFT)
  187. );
  188. }
  189. void bq25601_set_otg_config(unsigned int val)
  190. {
  191. unsigned int ret = 0;
  192. ret = bq25601_config_interface((unsigned char) (bq25601_CON1),
  193. (unsigned char) (val),
  194. (unsigned char) (CON1_OTG_CONFIG_MASK),
  195. (unsigned char) (CON1_OTG_CONFIG_SHIFT)
  196. );
  197. }
  198. void bq25601_set_chg_config(unsigned int val)
  199. {
  200. unsigned int ret = 0;
  201. ret = bq25601_config_interface((unsigned char) (bq25601_CON1),
  202. (unsigned char) (val),
  203. (unsigned char) (CON1_CHG_CONFIG_MASK),
  204. (unsigned char) (CON1_CHG_CONFIG_SHIFT)
  205. );
  206. }
  207. void bq25601_set_sys_min(unsigned int val)
  208. {
  209. unsigned int ret = 0;
  210. ret = bq25601_config_interface((unsigned char) (bq25601_CON1),
  211. (unsigned char) (val),
  212. (unsigned char) (CON1_SYS_MIN_MASK),
  213. (unsigned char) (CON1_SYS_MIN_SHIFT)
  214. );
  215. }
  216. void bq25601_set_batlowv(unsigned int val)
  217. {
  218. unsigned int ret = 0;
  219. ret = bq25601_config_interface((unsigned char) (bq25601_CON1),
  220. (unsigned char) (val),
  221. (unsigned char) (CON1_MIN_VBAT_SEL_MASK),
  222. (unsigned char) (CON1_MIN_VBAT_SEL_SHIFT)
  223. );
  224. }
  225. /* CON2---------------------------------------------------- */
  226. void bq25601_set_rdson(unsigned int val)
  227. {
  228. unsigned int ret = 0;
  229. ret = bq25601_config_interface((unsigned char) (bq25601_CON2),
  230. (unsigned char) (val),
  231. (unsigned char) (CON2_Q1_FULLON_MASK),
  232. (unsigned char) (CON2_Q1_FULLON_SHIFT)
  233. );
  234. }
  235. void bq25601_set_boost_lim(unsigned int val)
  236. {
  237. unsigned int ret = 0;
  238. ret = bq25601_config_interface((unsigned char) (bq25601_CON2),
  239. (unsigned char) (val),
  240. (unsigned char) (CON2_BOOST_LIM_MASK),
  241. (unsigned char) (CON2_BOOST_LIM_SHIFT)
  242. );
  243. }
  244. void bq25601_set_ichg(unsigned int val)
  245. {
  246. unsigned int ret = 0;
  247. ret = bq25601_config_interface((unsigned char) (bq25601_CON2),
  248. (unsigned char) (val),
  249. (unsigned char) (CON2_ICHG_MASK), (unsigned char) (CON2_ICHG_SHIFT)
  250. );
  251. }
  252. #if 0 //this function does not exist on bq25601
  253. void bq25601_set_force_20pct(unsigned int val)
  254. {
  255. unsigned int ret = 0;
  256. ret = bq25601_config_interface((unsigned char) (bq25601_CON2),
  257. (unsigned char) (val),
  258. (unsigned char) (CON2_FORCE_20PCT_MASK),
  259. (unsigned char) (CON2_FORCE_20PCT_SHIFT)
  260. );
  261. }
  262. #endif
  263. /* CON3---------------------------------------------------- */
  264. void bq25601_set_iprechg(unsigned int val)
  265. {
  266. unsigned int ret = 0;
  267. ret = bq25601_config_interface((unsigned char) (bq25601_CON3),
  268. (unsigned char) (val),
  269. (unsigned char) (CON3_IPRECHG_MASK),
  270. (unsigned char) (CON3_IPRECHG_SHIFT)
  271. );
  272. }
  273. void bq25601_set_iterm(unsigned int val)
  274. {
  275. unsigned int ret = 0;
  276. ret = bq25601_config_interface((unsigned char) (bq25601_CON3),
  277. (unsigned char) (val),
  278. (unsigned char) (CON3_ITERM_MASK), (unsigned char) (CON3_ITERM_SHIFT)
  279. );
  280. }
  281. /* CON4---------------------------------------------------- */
  282. void bq25601_set_vreg(unsigned int val)
  283. {
  284. unsigned int ret = 0;
  285. ret = bq25601_config_interface((unsigned char) (bq25601_CON4),
  286. (unsigned char) (val),
  287. (unsigned char) (CON4_VREG_MASK), (unsigned char) (CON4_VREG_SHIFT)
  288. );
  289. }
  290. void bq25601_set_topoff_timer(unsigned int val)
  291. {
  292. unsigned int ret = 0;
  293. ret = bq25601_config_interface((unsigned char) (bq25601_CON4),
  294. (unsigned char) (val),
  295. (unsigned char) (CON4_TOPOFF_TIMER_MASK), (unsigned char) (CON4_TOPOFF_TIMER_SHIFT)
  296. );
  297. }
  298. void bq25601_set_vrechg(unsigned int val)
  299. {
  300. unsigned int ret = 0;
  301. ret = bq25601_config_interface((unsigned char) (bq25601_CON4),
  302. (unsigned char) (val),
  303. (unsigned char) (CON4_VRECHG_MASK),
  304. (unsigned char) (CON4_VRECHG_SHIFT)
  305. );
  306. }
  307. /* CON5---------------------------------------------------- */
  308. void bq25601_set_en_term(unsigned int val)
  309. {
  310. unsigned int ret = 0;
  311. ret = bq25601_config_interface((unsigned char) (bq25601_CON5),
  312. (unsigned char) (val),
  313. (unsigned char) (CON5_EN_TERM_MASK),
  314. (unsigned char) (CON5_EN_TERM_SHIFT)
  315. );
  316. }
  317. void bq25601_set_watchdog(unsigned int val)
  318. {
  319. unsigned int ret = 0;
  320. ret = bq25601_config_interface((unsigned char) (bq25601_CON5),
  321. (unsigned char) (val),
  322. (unsigned char) (CON5_WATCHDOG_MASK),
  323. (unsigned char) (CON5_WATCHDOG_SHIFT)
  324. );
  325. }
  326. void bq25601_set_en_timer(unsigned int val)
  327. {
  328. unsigned int ret = 0;
  329. ret = bq25601_config_interface((unsigned char) (bq25601_CON5),
  330. (unsigned char) (val),
  331. (unsigned char) (CON5_EN_TIMER_MASK),
  332. (unsigned char) (CON5_EN_TIMER_SHIFT)
  333. );
  334. }
  335. void bq25601_set_chg_timer(unsigned int val)
  336. {
  337. unsigned int ret = 0;
  338. ret = bq25601_config_interface((unsigned char) (bq25601_CON5),
  339. (unsigned char) (val),
  340. (unsigned char) (CON5_CHG_TIMER_MASK),
  341. (unsigned char) (CON5_CHG_TIMER_SHIFT)
  342. );
  343. }
  344. /* CON6---------------------------------------------------- */
  345. void bq25601_set_treg(unsigned int val)
  346. {
  347. #if 0
  348. unsigned int ret = 0;
  349. ret = bq25601_config_interface((unsigned char) (bq25601_CON6),
  350. (unsigned char) (val),
  351. (unsigned char) (CON6_BOOSTV_MASK), (unsigned char) (CON6_BOOSTV_SHIFT)
  352. );
  353. #endif
  354. }
  355. void bq25601_set_vindpm(unsigned int val)
  356. {
  357. unsigned int ret = 0;
  358. ret = bq25601_config_interface((unsigned char) (bq25601_CON6),
  359. (unsigned char) (val),
  360. (unsigned char) (CON6_VINDPM_MASK),
  361. (unsigned char) (CON6_VINDPM_SHIFT)
  362. );
  363. }
  364. void bq25601_set_ovp(unsigned int val)
  365. {
  366. unsigned int ret = 0;
  367. ret = bq25601_config_interface((unsigned char) (bq25601_CON6),
  368. (unsigned char) (val),
  369. (unsigned char) (CON6_OVP_MASK),
  370. (unsigned char) (CON6_OVP_SHIFT)
  371. );
  372. }
  373. void bq25601_set_boostv(unsigned int val)
  374. {
  375. unsigned int ret = 0;
  376. ret = bq25601_config_interface((unsigned char) (bq25601_CON6),
  377. (unsigned char) (val),
  378. (unsigned char) (CON6_BOOSTV_MASK),
  379. (unsigned char) (CON6_BOOSTV_SHIFT)
  380. );
  381. }
  382. /* CON7---------------------------------------------------- */
  383. void bq25601_set_tmr2x_en(unsigned int val)
  384. {
  385. unsigned int ret = 0;
  386. ret = bq25601_config_interface((unsigned char) (bq25601_CON7),
  387. (unsigned char) (val),
  388. (unsigned char) (CON7_TMR2X_EN_MASK),
  389. (unsigned char) (CON7_TMR2X_EN_SHIFT)
  390. );
  391. }
  392. void bq25601_set_batfet_disable(unsigned int val)
  393. {
  394. unsigned int ret = 0;
  395. ret = bq25601_config_interface((unsigned char) (bq25601_CON7),
  396. (unsigned char) (val),
  397. (unsigned char) (CON7_BATFET_Disable_MASK),
  398. (unsigned char) (CON7_BATFET_Disable_SHIFT)
  399. );
  400. }
  401. void bq25601_set_batfet_delay(unsigned int val)
  402. {
  403. unsigned int ret = 0;
  404. ret = bq25601_config_interface((unsigned char) (bq25601_CON7),
  405. (unsigned char) (val),
  406. (unsigned char) (CON7_BATFET_DLY_MASK),
  407. (unsigned char) (CON7_BATFET_DLY_SHIFT)
  408. );
  409. }
  410. void bq25601_set_batfet_reset_enable(unsigned int val)
  411. {
  412. unsigned int ret = 0;
  413. ret = bq25601_config_interface((unsigned char) (bq25601_CON7),
  414. (unsigned char) (val),
  415. (unsigned char) (CON7_BATFET_RST_EN_MASK),
  416. (unsigned char) (CON7_BATFET_RST_EN_SHIFT)
  417. );
  418. }
  419. /* CON8---------------------------------------------------- */
  420. unsigned int bq25601_get_system_status(void)
  421. {
  422. unsigned int ret = 0;
  423. unsigned char val = 0;
  424. ret = bq25601_read_interface((unsigned char) (bq25601_CON8),
  425. (&val), (unsigned char) (0xFF), (unsigned char) (0x0)
  426. );
  427. return val;
  428. }
  429. unsigned int bq25601_get_vbus_stat(void)
  430. {
  431. unsigned int ret = 0;
  432. unsigned char val = 0;
  433. ret = bq25601_read_interface((unsigned char) (bq25601_CON8),
  434. (&val),
  435. (unsigned char) (CON8_VBUS_STAT_MASK),
  436. (unsigned char) (CON8_VBUS_STAT_SHIFT)
  437. );
  438. return val;
  439. }
  440. unsigned int bq25601_get_chrg_stat(void)
  441. {
  442. unsigned int ret = 0;
  443. unsigned char val = 0;
  444. ret = bq25601_read_interface((unsigned char) (bq25601_CON8),
  445. (&val),
  446. (unsigned char) (CON8_CHRG_STAT_MASK),
  447. (unsigned char) (CON8_CHRG_STAT_SHIFT)
  448. );
  449. return val;
  450. }
  451. unsigned int bq25601_get_vsys_stat(void)
  452. {
  453. unsigned int ret = 0;
  454. unsigned char val = 0;
  455. ret = bq25601_read_interface((unsigned char) (bq25601_CON8),
  456. (&val),
  457. (unsigned char) (CON8_VSYS_STAT_MASK),
  458. (unsigned char) (CON8_VSYS_STAT_SHIFT)
  459. );
  460. return val;
  461. }
  462. unsigned int bq25601_get_pg_stat(void)
  463. {
  464. unsigned int ret = 0;
  465. unsigned char val = 0;
  466. ret = bq25601_read_interface((unsigned char) (bq25601_CON8),
  467. (&val),
  468. (unsigned char) (CON8_PG_STAT_MASK),
  469. (unsigned char) (CON8_PG_STAT_SHIFT)
  470. );
  471. return val;
  472. }
  473. /*CON10----------------------------------------------------------*/
  474. void bq25601_set_int_mask(unsigned int val)
  475. {
  476. unsigned int ret = 0;
  477. ret = bq25601_config_interface((unsigned char) (bq25601_CON10),
  478. (unsigned char) (val),
  479. (unsigned char) (CON10_INT_MASK_MASK),
  480. (unsigned char) (CON10_INT_MASK_SHIFT)
  481. );
  482. }
  483. /**********************************************************
  484. *
  485. * [Internal Function]
  486. *
  487. *********************************************************/
  488. int bq25601_dump_register(struct mtk_charger_info *mchr_info)
  489. {
  490. unsigned char i = 0;
  491. dprintf(CRITICAL,"[bq25601] ");
  492. for (i = 0; i < bq25601_REG_NUM; i++) {
  493. bq25601_read_byte(i, &bq25601_reg[i]);
  494. dprintf(CRITICAL,"[0x%x]=0x%x ", i, bq25601_reg[i]);
  495. }
  496. dprintf(CRITICAL,"\n");
  497. return 0;
  498. }
  499. /**********************************************************
  500. *
  501. * [Internal Function]
  502. *
  503. *********************************************************/
  504. void bq25601_hw_init(void)
  505. {
  506. bq25601_set_en_hiz(0x0);
  507. bq25601_set_vindpm(0x6); //VIN DPM check 4.5V
  508. bq25601_set_reg_rst(0x0);
  509. bq25601_set_wdt_rst(0x1); //Kick watchdog
  510. bq25601_set_sys_min(0x5); //Minimum system voltage 3.5V
  511. bq25601_set_iprechg(0x7); //Precharge current 480mA
  512. bq25601_set_iterm(0x2); //Termination current 180mA
  513. bq25601_set_vreg(0x11); //CV=4.4V
  514. bq25601_set_batlowv(0x0); //BATLOWV 3.0V
  515. bq25601_set_vrechg(0x0); //VRECHG 0.1V (4.108V)
  516. bq25601_set_en_term(0x1); //Enable termination
  517. bq25601_set_watchdog(0x1); //WDT 40s
  518. bq25601_set_en_timer(0x0); //Disable charge timer
  519. bq25601_set_int_mask(0x0); //Disable fault interrupt
  520. }
  521. static CHARGER_TYPE g_chr_type_num = CHARGER_UNKNOWN;
  522. int hw_charging_get_charger_type(void);
  523. extern int g_std_ac_large_current_en;
  524. int bq25601_charging_enable(struct mtk_charger_info *mchr_info, bool enable)
  525. {
  526. int ichg=0x8;
  527. int aicr=0x5;
  528. if(enable){
  529. hw_charging_get_charger_type();
  530. if(STANDARD_CHARGER == g_chr_type_num){
  531. ichg=0x10;//ichg 960mA
  532. aicr=0xa;//1A
  533. }else {
  534. ichg=0x8;//ichg 480mA
  535. aicr=0x5;//500mA
  536. }
  537. }
  538. if (KAL_TRUE == enable){
  539. bq25601_set_iinlim(aicr);
  540. bq25601_set_ichg(ichg);
  541. bq25601_set_chg_config(0x1); // charger enable
  542. }else
  543. bq25601_set_chg_config(0x0); // charger disable
  544. dprintf(CRITICAL, "[BATTERY:bq25601] charger enable/disable %d ,ichg=0x%x ,aicr = 0x%x , g_chr_type_num = %d !\r\n", enable,ichg,aicr,g_chr_type_num);
  545. }
  546. //BSP:add XLEWHLES-25 by ronghe.cheng 20181108 start
  547. int bq25601_reset_watch_dog_timer(struct mtk_charger_info *mchr_info, bool enable)
  548. {
  549. dprintf(CRITICAL, "charging_reset_watch_dog_timer\n");
  550. bq25601_set_wdt_rst(0x1); /* Kick watchdog */
  551. bq25601_set_watchdog(0x3); /* WDT 160s */
  552. return 0;
  553. }
  554. //BSP:add XLEWHLES-25 by ronghe.cheng 20181108 end
  555. /***************BC1.2*****************/
  556. extern void Charger_Detect_Init(void);
  557. extern void Charger_Detect_Release(void);
  558. extern void mdelay (unsigned long msec);
  559. extern void pmic_set_register_value(PMU_FLAGS_LIST_ENUM flagname,kal_uint32 val);
  560. extern kal_uint16 pmic_get_register_value(PMU_FLAGS_LIST_ENUM flagname);
  561. static void hw_bc11_init(void)
  562. {
  563. mdelay(300);
  564. Charger_Detect_Init();
  565. //RG_bc11_BIAS_EN=1
  566. pmic_set_register_value(PMIC_RG_BC11_BIAS_EN, 0x1);//mt6351_upmu_set_rg_bc11_bias_en(0x1);
  567. //RG_bc11_VSRC_EN[1:0]=00
  568. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x0);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  569. //RG_bc11_VREF_VTH = [1:0]=00
  570. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  571. //RG_bc11_CMP_EN[1.0] = 00
  572. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  573. //RG_bc11_IPU_EN[1.0] = 00
  574. pmic_set_register_value(PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  575. //RG_bc11_IPD_EN[1.0] = 00
  576. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  577. //bc11_RST=1
  578. pmic_set_register_value(PMIC_RG_BC11_RST, 0x1);//mt6351_upmu_set_rg_bc11_rst(0x1);
  579. //bc11_BB_CTRL=1
  580. pmic_set_register_value(PMIC_RG_BC11_BB_CTRL, 0x1);//mt6351_upmu_set_rg_bc11_bb_ctrl(0x1);
  581. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x1);
  582. mdelay(50);
  583. }
  584. static U32 hw_bc11_DCD(void)
  585. {
  586. U32 wChargerAvail = 0;
  587. //RG_bc11_IPU_EN[1.0] = 10
  588. pmic_set_register_value(PMIC_RG_BC11_IPU_EN, 0x2);
  589. //RG_bc11_IPD_EN[1.0] = 01
  590. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  591. //RG_bc11_VREF_VTH = [1:0]=01
  592. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x1);//mt6351_upmu_set_rg_bc11_vref_vth(0x1);
  593. //RG_bc11_CMP_EN[1.0] = 10
  594. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x2);//mt6351_upmu_set_rg_bc11_cmp_en(0x2);
  595. mdelay(80);
  596. wChargerAvail = pmic_get_register_value(PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  597. //RG_bc11_IPU_EN[1.0] = 00
  598. pmic_set_register_value(PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  599. //RG_bc11_IPD_EN[1.0] = 00
  600. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  601. //RG_bc11_CMP_EN[1.0] = 00
  602. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  603. //RG_bc11_VREF_VTH = [1:0]=00
  604. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  605. return wChargerAvail;
  606. }
  607. static U32 hw_bc11_stepA1(void)
  608. {
  609. U32 wChargerAvail = 0;
  610. //RG_bc11_IPD_EN[1.0] = 01
  611. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  612. //RG_bc11_VREF_VTH = [1:0]=00
  613. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  614. //RG_bc11_CMP_EN[1.0] = 01
  615. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  616. mdelay(80);
  617. wChargerAvail = pmic_get_register_value(PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  618. //RG_bc11_IPD_EN[1.0] = 00
  619. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  620. //RG_bc11_CMP_EN[1.0] = 00
  621. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  622. return wChargerAvail;
  623. }
  624. static U32 hw_bc11_stepA2(void)
  625. {
  626. U32 wChargerAvail = 0;
  627. //RG_bc11_VSRC_EN[1.0] = 10
  628. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x2);//mt6351_upmu_set_rg_bc11_vsrc_en(0x2);
  629. //RG_bc11_IPD_EN[1:0] = 01
  630. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  631. //RG_bc11_VREF_VTH = [1:0]=00
  632. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  633. //RG_bc11_CMP_EN[1.0] = 01
  634. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  635. mdelay(80);
  636. wChargerAvail = pmic_get_register_value(PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  637. //RG_bc11_VSRC_EN[1:0]=00
  638. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x2);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  639. //RG_bc11_IPD_EN[1.0] = 00
  640. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  641. //RG_bc11_CMP_EN[1.0] = 00
  642. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  643. return wChargerAvail;
  644. }
  645. static U32 hw_bc11_stepB2(void)
  646. {
  647. U32 wChargerAvail = 0;
  648. //RG_bc11_IPU_EN[1:0]=10
  649. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x2);//mt6351_upmu_set_rg_bc11_ipu_en(0x2);
  650. //RG_bc11_VREF_VTH = [1:0]=01
  651. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x1);
  652. //RG_bc11_CMP_EN[1.0] = 01
  653. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x1);
  654. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x2);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  655. mdelay(80);
  656. wChargerAvail = pmic_get_register_value(PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  657. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x0);
  658. //RG_bc11_IPU_EN[1.0] = 00
  659. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  660. //RG_bc11_CMP_EN[1.0] = 00
  661. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  662. //RG_bc11_VREF_VTH = [1:0]=00
  663. //pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0); //mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  664. if (wChargerAvail == 1) {
  665. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x2);
  666. dprintf(INFO,"charger type: DCP, keep DM voltage source in stepB2\n");
  667. }
  668. return wChargerAvail;
  669. }
  670. static void hw_bc11_done(void)
  671. {
  672. //RG_bc11_VSRC_EN[1:0]=00
  673. pmic_set_register_value(PMIC_RG_BC11_VSRC_EN, 0x0);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  674. //RG_bc11_VREF_VTH = [1:0]=0
  675. pmic_set_register_value(PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  676. //RG_bc11_CMP_EN[1.0] = 00
  677. pmic_set_register_value(PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  678. //RG_bc11_IPU_EN[1.0] = 00
  679. pmic_set_register_value(PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  680. //RG_bc11_IPD_EN[1.0] = 00
  681. pmic_set_register_value(PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  682. //RG_bc11_BIAS_EN=0
  683. pmic_set_register_value(PMIC_RG_BC11_BIAS_EN, 0x0);//mt6351_upmu_set_rg_bc11_bias_en(0x0);
  684. Charger_Detect_Release();
  685. }
  686. int hw_charging_get_charger_type(void)
  687. {
  688. if (CHARGER_UNKNOWN != g_chr_type_num)
  689. return g_chr_type_num;
  690. /********* Step initial ***************/
  691. hw_bc11_init();
  692. /********* Step DCD ***************/
  693. if (1 == hw_bc11_DCD()) {
  694. /********* Step A1 ***************/
  695. if (1 == hw_bc11_stepA1()) {
  696. g_chr_type_num = APPLE_2_1A_CHARGER;
  697. dprintf(INFO, "step A1 : Apple 2.1A CHARGER!\r\n");
  698. } else {
  699. g_chr_type_num = NONSTANDARD_CHARGER;
  700. dprintf(INFO, "step A1 : Non STANDARD CHARGER!\r\n");
  701. }
  702. } else {
  703. /********* Step A2 ***************/
  704. if (1 == hw_bc11_stepA2()) {
  705. /********* Step B2 ***************/
  706. if (1 == hw_bc11_stepB2()) {
  707. g_chr_type_num = STANDARD_CHARGER;
  708. dprintf(INFO, "step B2 : STANDARD CHARGER!\r\n");
  709. } else {
  710. g_chr_type_num = CHARGING_HOST;
  711. dprintf(INFO, "step B2 : Charging Host!\r\n");
  712. }
  713. } else {
  714. g_chr_type_num = STANDARD_HOST;
  715. dprintf(INFO, "step A2 : Standard USB Host!\r\n");
  716. }
  717. }
  718. /********* Finally setting *******************************/
  719. hw_bc11_done();
  720. return g_chr_type_num;
  721. }
  722. /***************BC1.2*****************/
  723. int bq25601_chg_probe(void)
  724. {
  725. int ret = 0;
  726. /* Check primary charger */
  727. bq25601_hw_init();
  728. mtk_charger_set_info(&(g_bq25601_info.mchr_info));
  729. return ret;
  730. }