l2c.c 2.2 KB

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  1. #include <debug.h>
  2. #include <stdlib.h>
  3. #include <string.h>
  4. #include <video.h>
  5. #include <dev/uart.h>
  6. #include <arch/arm.h>
  7. #include <arch/arm/mmu.h>
  8. #include <arch/ops.h>
  9. #include <target/board.h>
  10. #include <platform/mt_reg_base.h>
  11. #include <platform/mt_disp_drv.h>
  12. #include <platform/disp_drv.h>
  13. #include <platform/boot_mode.h>
  14. #include <platform/mt_logo.h>
  15. #include <platform/partition.h>
  16. #include <env.h>
  17. #include <platform/mt_gpio.h>
  18. #include <platform/mt_pmic.h>
  19. #include <platform/mt_pmic_wrap_init.h>
  20. #include <platform/mt_i2c.h>
  21. #include <platform/mtk_key.h>
  22. #include <platform/mt_rtc.h>
  23. #include <platform/mt_leds.h>
  24. #include <platform/upmu_common.h>
  25. #include <platform/mtk_wdt.h>
  26. #include <platform/boot_mode.h>
  27. #include <platform/disp_drv_platform.h>
  28. #ifdef ENABLE_L2_SHARING
  29. #define ADDR_CA7L_CACHE_CONFIG_MP(x) (CA7MCUCFG_BASE)
  30. #define L2C_SIZE_CFG_OFFSET 5
  31. /* 4'b1111: 2048KB(not support)
  32. * 4'b0111: 1024KB(not support)
  33. * 4'b0011: 512KB
  34. * 4'b0001: 256KB
  35. * 4'b0000: 128KB (not support)
  36. */
  37. int is_l2_need_config(void)
  38. {
  39. volatile unsigned int cache_cfg, addr;
  40. addr = ADDR_CA7L_CACHE_CONFIG_MP(0);
  41. cache_cfg = DRV_Reg32(addr);
  42. cache_cfg = cache_cfg >> L2C_SIZE_CFG_OFFSET;
  43. /* only read 256KB need to be config.*/
  44. if((cache_cfg &(0x7)) == 0x1)
  45. {
  46. return 1;
  47. }
  48. return 0;
  49. }
  50. void cluster_l2_share_enable(int cluster)
  51. {
  52. volatile unsigned int cache_cfg, addr;
  53. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  54. /* set L2C size to 256KB */
  55. cache_cfg = DRV_Reg32(addr);
  56. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  57. cache_cfg |= 0x1 << L2C_SIZE_CFG_OFFSET;
  58. DRV_WriteReg32(addr, cache_cfg);
  59. }
  60. void cluster_l2_share_disable(int cluster)
  61. {
  62. volatile unsigned int cache_cfg, addr;
  63. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  64. /* set L2C size to 512KB */
  65. cache_cfg = DRV_Reg32(addr);
  66. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  67. cache_cfg |= 0x3 << L2C_SIZE_CFG_OFFSET;
  68. DRV_WriteReg32(addr, cache_cfg);
  69. }
  70. /* config L2 cache and sram to its size */
  71. void config_L2_size(void)
  72. {
  73. int cluster;
  74. cluster_l2_share_disable(0);
  75. }
  76. /* config SRAM back from L2 cache for DA relocation */
  77. void config_shared_SRAM_size(void)
  78. {
  79. int cluster;
  80. cluster_l2_share_enable(0);
  81. }
  82. #endif