mt_pmic.c 15 KB

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  1. #include <platform/mt_typedefs.h>
  2. #include <platform/mt_reg_base.h>
  3. #include <platform/mt_pmic.h>
  4. #include <platform/mt_gpt.h>
  5. #include <platform/mt_pmic_wrap_init.h>
  6. #include <printf.h>
  7. #include <platform/upmu_hw.h>
  8. #include <platform/upmu_common.h>
  9. #include <platform/mt6311.h>
  10. //==============================================================================
  11. // Global variable
  12. //==============================================================================
  13. int Enable_PMIC_LOG = 1;
  14. CHARGER_TYPE g_ret = CHARGER_UNKNOWN;
  15. int g_charger_in_flag = 0;
  16. int g_first_check=0;
  17. extern int g_R_BAT_SENSE;
  18. extern int g_R_I_SENSE;
  19. extern int g_R_CHARGER_1;
  20. extern int g_R_CHARGER_2;
  21. //==============================================================================
  22. // PMIC-AUXADC related define
  23. //==============================================================================
  24. #define VOLTAGE_FULL_RANGE 1800
  25. #define ADC_PRECISE 32768 // 15 bits
  26. //==============================================================================
  27. // PMIC-AUXADC global variable
  28. //==============================================================================
  29. kal_int32 count_time_out=10000;
  30. //==============================================================================
  31. // PMIC access API
  32. //==============================================================================
  33. U32 pmic_read_interface (U32 RegNum, U32 *val, U32 MASK, U32 SHIFT)
  34. {
  35. U32 return_value = 0;
  36. U32 pmic_reg = 0;
  37. U32 rdata;
  38. //mt_read_byte(RegNum, &pmic_reg);
  39. return_value= pwrap_wacs2(0, (RegNum), 0, &rdata);
  40. pmic_reg=rdata;
  41. if(return_value!=0)
  42. {
  43. dprintf(INFO, "[pmic_read_interface] Reg[%x]= pmic_wrap read data fail\n", RegNum);
  44. return return_value;
  45. }
  46. //dprintf(INFO, "[pmic_read_interface] Reg[%x]=0x%x\n", RegNum, pmic_reg);
  47. pmic_reg &= (MASK << SHIFT);
  48. *val = (pmic_reg >> SHIFT);
  49. //dprintf(INFO, "[pmic_read_interface] val=0x%x\n", *val);
  50. return return_value;
  51. }
  52. U32 pmic_config_interface (U32 RegNum, U32 val, U32 MASK, U32 SHIFT)
  53. {
  54. U32 return_value = 0;
  55. U32 pmic_reg = 0;
  56. U32 rdata;
  57. //1. mt_read_byte(RegNum, &pmic_reg);
  58. return_value= pwrap_wacs2(0, (RegNum), 0, &rdata);
  59. pmic_reg=rdata;
  60. if(return_value!=0)
  61. {
  62. dprintf(INFO, "[pmic_config_interface] Reg[%x]= pmic_wrap read data fail\n", RegNum);
  63. return return_value;
  64. }
  65. //dprintf(INFO, "[pmic_config_interface] Reg[%x]=0x%x\n", RegNum, pmic_reg);
  66. pmic_reg &= ~(MASK << SHIFT);
  67. pmic_reg |= (val << SHIFT);
  68. //2. mt_write_byte(RegNum, pmic_reg);
  69. return_value= pwrap_wacs2(1, (RegNum), pmic_reg, &rdata);
  70. if(return_value!=0)
  71. {
  72. dprintf(INFO, "[pmic_config_interface] Reg[%x]= pmic_wrap read data fail\n", RegNum);
  73. return return_value;
  74. }
  75. //dprintf(INFO, "[pmic_config_interface] write Reg[%x]=0x%x\n", RegNum, pmic_reg);
  76. #if 0
  77. //3. Double Check
  78. //mt_read_byte(RegNum, &pmic_reg);
  79. return_value= pwrap_wacs2(0, (RegNum), 0, &rdata);
  80. pmic_reg=rdata;
  81. if(return_value!=0)
  82. {
  83. dprintf(INFO, "[pmic_config_interface] Reg[%x]= pmic_wrap write data fail\n", RegNum);
  84. return return_value;
  85. }
  86. dprintf(INFO, "[pmic_config_interface] Reg[%x]=0x%x\n", RegNum, pmic_reg);
  87. #endif
  88. return return_value;
  89. }
  90. void upmu_set_reg_value(kal_uint32 reg, kal_uint32 reg_val)
  91. {
  92. U32 ret=0;
  93. ret=pmic_config_interface(reg, reg_val, 0xFFFF, 0x0);
  94. if(ret !=0)
  95. {
  96. }
  97. }
  98. //==============================================================================
  99. // PMIC Usage APIs
  100. //==============================================================================
  101. U32 get_mt6350_pmic_chip_version (void)
  102. {
  103. U32 ret=0;
  104. U32 val=0;
  105. ret=pmic_read_interface( (U32)(MT6350_CID),
  106. (&val),
  107. (U32)(MT6350_PMIC_CID_MASK),
  108. (U32)(MT6350_PMIC_CID_SHIFT)
  109. );
  110. if(ret!=0) dprintf(INFO, "%d", ret);
  111. return val;
  112. }
  113. kal_uint32 mt6350_upmu_get_rgs_chrdet(void)
  114. {
  115. kal_uint32 ret=0;
  116. kal_uint32 val=0;
  117. ret=pmic_read_interface((kal_uint32)(MT6350_CHR_CON0),
  118. (&val),
  119. (kal_uint32)(MT6350_PMIC_RGS_CHRDET_MASK),
  120. (kal_uint32)(MT6350_PMIC_RGS_CHRDET_SHIFT)
  121. );
  122. if(ret !=0)
  123. {
  124. }
  125. return val;
  126. }
  127. kal_bool upmu_is_chr_det(void)
  128. {
  129. U32 tmp32 = 0;
  130. tmp32 = mt6350_upmu_get_rgs_chrdet();
  131. if(tmp32 == 0)
  132. {
  133. return KAL_FALSE;
  134. }
  135. else
  136. {
  137. return KAL_TRUE;
  138. }
  139. }
  140. kal_bool pmic_chrdet_status(void)
  141. {
  142. if( upmu_is_chr_det() == KAL_TRUE )
  143. {
  144. #ifndef USER_BUILD
  145. dprintf(INFO, "[pmic_chrdet_status] Charger exist\r\n");
  146. #endif
  147. return KAL_TRUE;
  148. }
  149. else
  150. {
  151. #ifndef USER_BUILD
  152. dprintf(INFO, "[pmic_chrdet_status] No charger\r\n");
  153. #endif
  154. return KAL_FALSE;
  155. }
  156. }
  157. int pmic_detect_powerkey(void)
  158. {
  159. U32 ret=0;
  160. U32 val=0;
  161. ret=pmic_read_interface( (U32)(MT6350_CHRSTATUS),
  162. (&val),
  163. (U32)(MT6350_PMIC_PWRKEY_DEB_MASK),
  164. (U32)(MT6350_PMIC_PWRKEY_DEB_SHIFT)
  165. );
  166. if(Enable_PMIC_LOG>1)
  167. dprintf(INFO, "%d", ret);
  168. if (val==1){
  169. #ifndef USER_BUILD
  170. dprintf(INFO, "LK pmic powerkey Release\n");
  171. #endif
  172. return 0;
  173. }else{
  174. #ifndef USER_BUILD
  175. dprintf(INFO, "LK pmic powerkey Press\n");
  176. #endif
  177. return 1;
  178. }
  179. }
  180. int pmic_detect_homekey(void)
  181. {
  182. U32 ret=0;
  183. U32 val=0;
  184. ret=pmic_read_interface( (U32)(MT6350_CHRSTATUS),
  185. (&val),
  186. (U32)(MT6350_PMIC_FCHRKEY_DEB_MASK),
  187. (U32)(MT6350_PMIC_FCHRKEY_DEB_SHIFT)
  188. );
  189. if(Enable_PMIC_LOG>1)
  190. dprintf(INFO, "%d", ret);
  191. if (val==1){
  192. #ifndef USER_BUILD
  193. dprintf(INFO, "LK pmic HOMEKEY Release\n");
  194. #endif
  195. return 0;
  196. }else{
  197. #ifndef USER_BUILD
  198. dprintf(INFO, "LK pmic HOMEKEY Press\n");
  199. #endif
  200. return 1;
  201. }
  202. return val;
  203. }
  204. kal_uint32 upmu_get_reg_value(kal_uint32 reg)
  205. {
  206. U32 ret=0;
  207. U32 temp_val=0;
  208. ret=pmic_read_interface(reg, &temp_val, 0xFFFF, 0x0);
  209. if(Enable_PMIC_LOG>1)
  210. dprintf(INFO, "%d", ret);
  211. return temp_val;
  212. }
  213. void PMIC_DUMP_ALL_Register(void)
  214. {
  215. U32 i=0;
  216. U32 ret=0;
  217. U32 reg_val=0;
  218. for (i=0;i<0x800;i++)
  219. {
  220. ret=pmic_read_interface(i,&reg_val,0xFFFF,0);
  221. printf("Reg[0x%x]=0x%x, %d\n", i, reg_val, ret);
  222. }
  223. }
  224. //==============================================================================
  225. // PMIC Init Code
  226. //==============================================================================
  227. void PMIC_INIT_SETTING_V1(void)
  228. {
  229. //dprintf(INFO, "[LK_PMIC_INIT_SETTING_V1] Done\n");
  230. }
  231. void PMIC_CUSTOM_SETTING_V1(void)
  232. {
  233. //dprintf(INFO, "[LK_PMIC_CUSTOM_SETTING_V1] Done\n");
  234. }
  235. U32 pmic_init (void)
  236. {
  237. U32 ret_code = PMIC_TEST_PASS;
  238. dprintf(CRITICAL, "[pmic_init] LK Start..................\n");
  239. dprintf(CRITICAL, "[pmic_init] MT6350 CHIP Code = 0x%x\n", get_mt6350_pmic_chip_version());
  240. pmic_set_register_value(PMIC_RG_CHRIND_ON, 0);
  241. PMIC_INIT_SETTING_V1();
  242. PMIC_CUSTOM_SETTING_V1();
  243. #if 1
  244. // mt6311_driver_probe();
  245. #endif
  246. pmic_detect_powerkey();
  247. dprintf(CRITICAL, "[pmic_init] Done\n");
  248. return ret_code;
  249. }
  250. //==============================================================================
  251. // PMIC API for LK : AUXADC
  252. //==============================================================================
  253. void pmic_auxadc_init(void)
  254. {
  255. }
  256. #if 0
  257. kal_uint32 pmic_is_auxadc_ready(kal_int32 channel_num, upmu_adc_chip_list_enum chip_num, upmu_adc_user_list_enum user_num)
  258. {
  259. }
  260. kal_uint32 pmic_get_adc_output(kal_int32 channel_num, upmu_adc_chip_list_enum chip_num, upmu_adc_user_list_enum user_num)
  261. {
  262. }
  263. kal_uint32 PMIC_IMM_RequestAuxadcChannel(upmu_adc_chl_list_enum dwChannel)
  264. {
  265. }
  266. int PMIC_IMM_GetChannelNumber(upmu_adc_chl_list_enum dwChannel)
  267. {
  268. kal_int32 channel_num;
  269. channel_num = (dwChannel & (AUXADC_CHANNEL_MASK << AUXADC_CHANNEL_SHIFT)) >> AUXADC_CHANNEL_SHIFT ;
  270. return channel_num;
  271. }
  272. upmu_adc_chip_list_enum PMIC_IMM_GetChipNumber(upmu_adc_chl_list_enum dwChannel)
  273. {
  274. upmu_adc_chip_list_enum chip_num;
  275. chip_num = (upmu_adc_chip_list_enum)(dwChannel & (AUXADC_CHIP_MASK << AUXADC_CHIP_SHIFT)) >> AUXADC_CHIP_SHIFT ;
  276. return chip_num;
  277. }
  278. upmu_adc_user_list_enum PMIC_IMM_GetUserNumber(upmu_adc_chl_list_enum dwChannel)
  279. {
  280. upmu_adc_user_list_enum user_num;
  281. user_num = (upmu_adc_user_list_enum)(dwChannel & (AUXADC_USER_MASK << AUXADC_USER_SHIFT)) >> AUXADC_USER_SHIFT ;
  282. return user_num;
  283. }
  284. #endif
  285. //==============================================================================
  286. // PMIC-AUXADC
  287. //==============================================================================
  288. int PMIC_IMM_GetOneChannelValue(int dwChannel, int deCount, int trimd)
  289. {
  290. kal_int32 ret_data;
  291. // kal_int32 count=0;
  292. kal_int32 u4Sample_times = 0;
  293. kal_int32 u4channel=0;
  294. kal_int32 adc_result_temp=0;
  295. kal_int32 r_val_temp=0;
  296. kal_int32 adc_result=0;
  297. U32 adc_reg_val=0;
  298. /*
  299. 0 : BATON2
  300. 1 : CH6
  301. 2 : THR SENSE2
  302. 3 : THR SENSE1
  303. 4 : VCDT
  304. 5 : BATON1
  305. 6 : ISENSE
  306. 7 : BATSNS
  307. 8 : ACCDET
  308. */
  309. pmic_set_register_value(PMIC_RG_VBUF_EN, 1);
  310. //set 0
  311. pmic_read_interface(MT6350_AUXADC_CON22,&adc_reg_val, MT6350_PMIC_RG_AP_RQST_LIST_MASK, MT6350_PMIC_RG_AP_RQST_LIST_SHIFT);
  312. adc_reg_val = adc_reg_val & (~(1<<dwChannel));
  313. pmic_config_interface(MT6350_AUXADC_CON22,adc_reg_val, MT6350_PMIC_RG_AP_RQST_LIST_MASK, MT6350_PMIC_RG_AP_RQST_LIST_SHIFT);
  314. //set 1
  315. pmic_read_interface(MT6350_AUXADC_CON22,&adc_reg_val, MT6350_PMIC_RG_AP_RQST_LIST_MASK, MT6350_PMIC_RG_AP_RQST_LIST_SHIFT);
  316. adc_reg_val = adc_reg_val | (1<<dwChannel);
  317. pmic_config_interface(MT6350_AUXADC_CON22,adc_reg_val, MT6350_PMIC_RG_AP_RQST_LIST_MASK, MT6350_PMIC_RG_AP_RQST_LIST_SHIFT);
  318. do
  319. {
  320. //count=0;
  321. ret_data=0;
  322. switch(dwChannel){
  323. case 0:
  324. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_BATON2)!= 1 );
  325. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_BATON2);
  326. break;
  327. case 1:
  328. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_CH6)!= 1 );
  329. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_CH6);
  330. break;
  331. case 2:
  332. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_THR_SENSE2)!= 1 );
  333. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_THR_SENSE2);
  334. break;
  335. case 3:
  336. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_THR_SENSE1)!= 1 );
  337. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_THR_SENSE1);
  338. break;
  339. case 4:
  340. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_VCDT)!= 1 );
  341. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_VCDT);
  342. break;
  343. case 5:
  344. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_BATON1)!= 1 );
  345. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_BATON1);
  346. break;
  347. case 6:
  348. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_ISENSE)!= 1 );
  349. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_ISENSE);
  350. break;
  351. case 7:
  352. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_BATSNS)!= 1 );
  353. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_BATSNS);
  354. break;
  355. case 8:
  356. while(mt6350_get_register_value(PMIC_RG_ADC_RDY_CH5)!= 1 );
  357. ret_data = mt6350_get_register_value(PMIC_RG_ADC_OUT_CH5);
  358. break;
  359. default:
  360. dprintf(CRITICAL, "[AUXADC] Invalid channel value(%d,%d)\n", dwChannel, trimd);
  361. return -1;
  362. break;
  363. }
  364. u4channel += ret_data;
  365. u4Sample_times++;
  366. // if (Enable_BATDRV_LOG == 1)
  367. {
  368. //debug
  369. dprintf(CRITICAL, "[AUXADC] u4channel[%d]=%d.\n",
  370. dwChannel, ret_data);
  371. }
  372. }while (u4Sample_times < deCount);
  373. /* Value averaging */
  374. adc_result_temp = u4channel / deCount;
  375. switch(dwChannel){
  376. case 0:
  377. r_val_temp = 1;
  378. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  379. break;
  380. case 1:
  381. r_val_temp = 1;
  382. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  383. break;
  384. case 2:
  385. r_val_temp = 1;
  386. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  387. break;
  388. case 3:
  389. r_val_temp = 1;
  390. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  391. break;
  392. case 4:
  393. r_val_temp = 1;
  394. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  395. break;
  396. case 5:
  397. r_val_temp = 1;
  398. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  399. break;
  400. case 6:
  401. r_val_temp = 4;
  402. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  403. break;
  404. case 7:
  405. r_val_temp = 4;
  406. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  407. break;
  408. case 8:
  409. r_val_temp = 1;
  410. adc_result = (adc_result_temp*r_val_temp*VOLTAGE_FULL_RANGE)/ADC_PRECISE;
  411. break;
  412. default:
  413. dprintf(CRITICAL, "[AUXADC] Invalid channel value(%d,%d)\n", dwChannel, trimd);
  414. return -1;
  415. break;
  416. }
  417. dprintf(CRITICAL, "[AUXADC] adc_result_temp=%d, adc_result=%d, r_val_temp=%d.\n",
  418. adc_result_temp, adc_result, r_val_temp);
  419. return adc_result;
  420. }
  421. int get_bat_sense_volt(int times)
  422. {
  423. return PMIC_IMM_GetOneChannelValue(VBAT_CHANNEL_NUMBER,times,1);
  424. }
  425. int get_i_sense_volt(int times)
  426. {
  427. return PMIC_IMM_GetOneChannelValue(ISENSE_CHANNEL_NUMBER,times,1);
  428. }
  429. int get_charger_volt(int times)
  430. {
  431. return PMIC_IMM_GetOneChannelValue(VCHARGER_CHANNEL_NUMBER,times,1);
  432. }
  433. int get_tbat_volt(int times)
  434. {
  435. return PMIC_IMM_GetOneChannelValue(VBATTEMP_CHANNEL_NUMBER,times,1);
  436. }