mt8193_i2c.c 12 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2010. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver's
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. #include <platform/mt_typedefs.h>
  36. #include <platform/mt_i2c.h>
  37. #include <platform/mt8193.h>
  38. #define MT8193_CHIP_ADDR 0x3A
  39. #if 0
  40. static U32 _mt8193_i2c_read (U8 chip, U8 *cmdBuffer, int cmdBufferLen, U8 *dataBuffer, int dataBufferLen)
  41. {
  42. U32 ret_code = I2C_OK;
  43. ret_code = mt_i2c_write(I2C0, chip, cmdBuffer, cmdBufferLen, 0); // set register command
  44. if (ret_code != I2C_OK)
  45. return ret_code;
  46. ret_code = mt_i2c_read(I2C0, chip, dataBuffer, dataBufferLen, 0);
  47. dbg_print("[_mt8193_i2c_read] Done\n");
  48. return ret_code;
  49. }
  50. static U32 _mt8193_i2c_write (U8 chip, U8 *cmdBuffer, int cmdBufferLen, U8 *dataBuffer, int dataBufferLen)
  51. {
  52. U32 ret_code = I2C_OK;
  53. U8 write_data[I2C_FIFO_SIZE];
  54. int transfer_len = cmdBufferLen + dataBufferLen;
  55. int i=0, cmdIndex=0, dataIndex=0;
  56. if(I2C_FIFO_SIZE < (cmdBufferLen + dataBufferLen))
  57. { return -1;
  58. }
  59. //write_data[0] = cmd;
  60. //write_data[1] = writeData;
  61. while(cmdIndex < cmdBufferLen)
  62. {
  63. write_data[i] = cmdBuffer[cmdIndex];
  64. cmdIndex++;
  65. i++;
  66. }
  67. while(dataIndex < dataBufferLen)
  68. {
  69. write_data[i] = dataBuffer[dataIndex];
  70. dataIndex++;
  71. i++;
  72. }
  73. /* dump write_data for check */
  74. for( i=0 ; i < transfer_len ; i++ )
  75. {
  76. dbg_print("[mt8193_i2c_write] write_data[%d]=%x\n", i, write_data[i]);
  77. }
  78. ret_code = mt_i2c_write(I2C0, chip, write_data, transfer_len, 0);
  79. dbg_print("[mt8193_i2c_write] Done\n");
  80. return ret_code;
  81. }
  82. u8 mt8193_i2c_read8(u16 addr)
  83. {
  84. U8 chip_slave_address = MT8193_CHIP_ADDR;
  85. U8 cmd = addr;
  86. U32 result_tmp;
  87. int cmd_len = 1;
  88. U8 data = 0xFF;
  89. int data_len = 1;
  90. cmd = addr;
  91. result_tmp = _mt8193_i2c_read(MT8193_CHIP_ADDR, cmd, cmd_len, &data, data_len);
  92. return result_tmp;
  93. }
  94. int mt8193_i2c_write8(u16 addr, u8 value)
  95. {
  96. U8 chip_slave_address = MT8193_CHIP_ADDR;
  97. U8 cmd = addr;
  98. int cmd_len = 1;
  99. U8 data = value;
  100. int data_len = 1;
  101. U32 result_tmp;
  102. cmd = addr;
  103. result_tmp = _mt8193_i2c_write(chip_slave_address, &cmd, cmd_len, &data, data_len);
  104. //check
  105. result_tmp = _mt8193_i2c_read(chip_slave_address, &cmd, cmd_len, &data, data_len);
  106. printf("[mt8193_i2c_write] Reg[0x%x]=0x%x\n", addr, data);
  107. return 0;
  108. }
  109. u16 mt8193_i2c_read16(u16 addr)
  110. {
  111. U8 chip_slave_address = MT8193_CHIP_ADDR;
  112. U16 cmd = addr;
  113. U32 result_tmp;
  114. int cmd_len = 2;
  115. U16 data = 0xFFFF;
  116. int data_len = 2;
  117. cmd = addr;
  118. result_tmp = _mt8193_i2c_read(MT8193_CHIP_ADDR, cmd, cmd_len, &data, data_len);
  119. return result_tmp;
  120. }
  121. int mt8193_i2c_write16(u16 addr, u16 value)
  122. {
  123. U8 chip_slave_address = MT8193_CHIP_ADDR;
  124. U16 cmd = addr;
  125. int cmd_len = 2;
  126. U16 data = value;
  127. int data_len = 2;
  128. U32 result_tmp;
  129. cmd = addr;
  130. result_tmp = _mt8193_i2c_write(chip_slave_address, &cmd, cmd_len, &data, data_len);
  131. //check
  132. result_tmp = _mt8193_i2c_read(chip_slave_address, &cmd, cmd_len, &data, data_len);
  133. printf("[mt8193_i2c_write] Reg[0x%x]=0x%x\n", addr, data);
  134. return 0;
  135. }
  136. u32 mt8193_i2c_read32(u16 addr)
  137. {
  138. U8 chip_slave_address = MT8193_CHIP_ADDR;
  139. U16 cmd = addr;
  140. U32 result_tmp;
  141. int cmd_len = 2;
  142. U32 data = 0xFFFFFFFF;
  143. int data_len = 4;
  144. cmd = addr;
  145. result_tmp = _mt8193_i2c_read(MT8193_CHIP_ADDR, cmd, cmd_len, &data, data_len);
  146. return result_tmp;
  147. }
  148. int mt8193_i2c_write32(u16 addr, u32 value)
  149. {
  150. U8 chip_slave_address = MT8193_CHIP_ADDR;
  151. U16 cmd = addr;
  152. int cmd_len = 2;
  153. U32 data = value;
  154. int data_len = 4;
  155. U32 result_tmp;
  156. cmd = addr;
  157. result_tmp = _mt8193_i2c_write(chip_slave_address, &cmd, cmd_len, &data, data_len);
  158. //check
  159. result_tmp = _mt8193_i2c_read(chip_slave_address, &cmd, cmd_len, &data, data_len);
  160. printf("[mt8193_i2c_write] Reg[0x%x]=0x%x\n", addr, data);
  161. return 0;
  162. }
  163. #endif
  164. #define MT8193_I2C_ID I2C1
  165. u8 mt8193_i2c_read8(u16 addr)
  166. {
  167. u8 rxBuf[8] = {0};
  168. u8 lens;
  169. U32 ret_code = 0;
  170. u8 data;
  171. mt_i2c i2c = {0};
  172. i2c.id = MT8193_I2C_ID;
  173. i2c.addr = MT8193_CHIP_ADDR;
  174. i2c.mode = ST_MODE;
  175. i2c.speed = 100;
  176. i2c.dma_en = 0;
  177. if(((addr >> 8) & 0xFF) >= 0x80) // 8 bit : fast mode
  178. {
  179. rxBuf[0] = (addr >> 8) & 0xFF;
  180. lens = 1;
  181. }
  182. else // 16 bit : noraml mode
  183. {
  184. rxBuf[0] = ( addr >> 8 ) & 0xFF;
  185. rxBuf[1] = addr & 0xFF;
  186. lens = 2;
  187. }
  188. // ret_code = mt_i2c_write(MT8193_I2C_ID, MT8193_CHIP_ADDR, rxBuf, lens, 0); // set register command
  189. ret_code = i2c_write(&i2c, rxBuf, lens);
  190. if (ret_code != I2C_OK)
  191. return ret_code;
  192. lens = 1;
  193. // ret_code = mt_i2c_read(I2C2, MT8193_CHIP_ADDR, rxBuf, lens, 0);
  194. ret_code = i2c_read(&i2c, rxBuf, lens);
  195. if (ret_code != I2C_OK)
  196. {
  197. return ret_code;
  198. }
  199. data = rxBuf[0]; //LSB fisrt
  200. return data;
  201. }
  202. int mt8193_i2c_write8(u16 addr, u8 data)
  203. {
  204. u8 buffer[8];
  205. u8 lens;
  206. u32 ret_code = 0;
  207. u32 result_tmp = 0;
  208. mt_i2c i2c = {0};
  209. i2c.id = MT8193_I2C_ID;
  210. i2c.addr = MT8193_CHIP_ADDR;
  211. i2c.mode = ST_MODE;
  212. i2c.speed = 100;
  213. i2c.dma_en = 0;
  214. if(((addr >> 8) & 0xFF) >= 0x80) // 8 bit : fast mode
  215. {
  216. buffer[0] = (addr >> 8) & 0xFF;
  217. buffer[1] = data & 0xFF;
  218. lens = 2;
  219. }
  220. else // 16 bit : noraml mode
  221. {
  222. buffer[0] = (addr >> 8) & 0xFF;
  223. buffer[1] = addr & 0xFF;
  224. buffer[2] = data & 0xFF;
  225. lens = 3;
  226. }
  227. // ret_code = mt_i2c_write(I2C2, MT8193_CHIP_ADDR, buffer, lens, 0); // 0:I2C_PATH_NORMAL
  228. ret_code = i2c_write(&i2c, buffer, lens);
  229. if (ret_code != 0)
  230. {
  231. return ret_code;
  232. }
  233. //check
  234. result_tmp = mt8193_i2c_read8(addr);
  235. printf("[mt8193_i2c_write] Reg[0x%x]=0x%x, result_tmp=0x%x \n", addr, data, result_tmp);
  236. return 0;
  237. }
  238. u16 mt8193_i2c_read16(u16 addr)
  239. {
  240. u8 rxBuf[8] = {0};
  241. u8 lens;
  242. U32 ret_code = 0;
  243. u16 data;
  244. mt_i2c i2c = {0};
  245. i2c.id = MT8193_I2C_ID;
  246. i2c.addr = MT8193_CHIP_ADDR;
  247. i2c.mode = ST_MODE;
  248. i2c.speed = 100;
  249. i2c.dma_en = 0;
  250. if(((addr >> 8) & 0xFF) >= 0x80) // 8 bit : fast mode
  251. {
  252. rxBuf[0] = (addr >> 8) & 0xFF;
  253. lens = 1;
  254. }
  255. else // 16 bit : noraml mode
  256. {
  257. rxBuf[0] = ( addr >> 8 ) & 0xFF;
  258. rxBuf[1] = addr & 0xFF;
  259. lens = 2;
  260. }
  261. // ret_code = mt_i2c_write(I2C2, MT8193_CHIP_ADDR, rxBuf, lens, 0); // set register command
  262. ret_code = i2c_write(&i2c, rxBuf, lens);
  263. if (ret_code != I2C_OK)
  264. return ret_code;
  265. lens = 2;
  266. // ret_code = mt_i2c_read(I2C2, MT8193_CHIP_ADDR, rxBuf, lens, 0);
  267. ret_code = i2c_read(&i2c, rxBuf, lens);
  268. if (ret_code != I2C_OK)
  269. {
  270. return ret_code;
  271. }
  272. data = (rxBuf[1] << 8) | (rxBuf[0]); //LSB fisrt
  273. return data;
  274. }
  275. int mt8193_i2c_write16(u16 addr, u16 data)
  276. {
  277. u8 buffer[8];
  278. u8 lens;
  279. u32 ret_code = 0;
  280. u32 result_tmp = 0;
  281. mt_i2c i2c = {0};
  282. i2c.id = MT8193_I2C_ID;
  283. i2c.addr = MT8193_CHIP_ADDR;
  284. i2c.mode = ST_MODE;
  285. i2c.speed = 100;
  286. i2c.dma_en = 0;
  287. if(((addr >> 8) & 0xFF) >= 0x80) // 8 bit : fast mode
  288. {
  289. buffer[0] = (addr >> 8) & 0xFF;
  290. buffer[1] = (data >> 8) & 0xFF;
  291. buffer[2] = data & 0xFF;
  292. lens = 3;
  293. }
  294. else // 16 bit : noraml mode
  295. {
  296. buffer[0] = (addr >> 8) & 0xFF;
  297. buffer[1] = addr & 0xFF;
  298. buffer[2] = (data >> 8) & 0xFF;
  299. buffer[3] = data & 0xFF;
  300. lens = 4;
  301. }
  302. // ret_code = mt_i2c_write(I2C2, MT8193_CHIP_ADDR, buffer, lens, 0); // 0:I2C_PATH_NORMAL
  303. ret_code = i2c_write(&i2c, buffer, lens);
  304. if (ret_code != 0)
  305. {
  306. return ret_code;
  307. }
  308. //check
  309. result_tmp = mt8193_i2c_read16(addr);
  310. printf("[LK mt8193_i2c_write] Reg[0x%x]=0x%x, result_tmp=0x%x \n", addr, data, result_tmp);
  311. return 0;
  312. }
  313. u32 mt8193_i2c_read32(u16 addr)
  314. {
  315. u8 rxBuf[8] = {0};
  316. u8 lens;
  317. U32 ret_code = 0;
  318. u32 data;
  319. mt_i2c i2c = {0};
  320. i2c.id = MT8193_I2C_ID;
  321. i2c.addr = MT8193_CHIP_ADDR;
  322. i2c.mode = ST_MODE;
  323. i2c.speed = 100;
  324. i2c.dma_en = 0;
  325. if(((addr >> 8) & 0xFF) >= 0x80) // 8 bit : fast mode
  326. {
  327. rxBuf[0] = (addr >> 8) & 0xFF;
  328. lens = 1;
  329. }
  330. else // 16 bit : noraml mode
  331. {
  332. rxBuf[0] = ( addr >> 8 ) & 0xFF;
  333. rxBuf[1] = addr & 0xFF;
  334. lens = 2;
  335. }
  336. // ret_code = mt_i2c_write(I2C2, MT8193_CHIP_ADDR, rxBuf, lens, 0); // set register command
  337. ret_code = i2c_write(&i2c, rxBuf, lens);
  338. if (ret_code != I2C_OK)
  339. return ret_code;
  340. lens = 4;
  341. // ret_code = mt_i2c_read(I2C2, MT8193_CHIP_ADDR, rxBuf, lens, 0);
  342. ret_code = i2c_read(&i2c, rxBuf, lens);
  343. if (ret_code != I2C_OK)
  344. {
  345. return ret_code;
  346. }
  347. data = (rxBuf[3] << 24) | (rxBuf[2] << 16) | (rxBuf[1] << 8) | (rxBuf[0]); //LSB fisrt
  348. return data;
  349. }
  350. int mt8193_i2c_write32(u16 addr, u32 data)
  351. {
  352. u8 buffer[8];
  353. u8 lens;
  354. u32 ret_code = 0;
  355. u32 result_tmp = 0;
  356. mt_i2c i2c = {0};
  357. i2c.id = MT8193_I2C_ID;
  358. i2c.addr = MT8193_CHIP_ADDR;
  359. i2c.mode = ST_MODE;
  360. i2c.speed = 100;
  361. i2c.dma_en = 0;
  362. if(((addr >> 8) & 0xFF) >= 0x80) // 8 bit : fast mode
  363. {
  364. buffer[0] = (addr >> 8) & 0xFF;
  365. buffer[1] = (data >> 24) & 0xFF;
  366. buffer[2] = (data >> 16) & 0xFF;
  367. buffer[3] = (data >> 8) & 0xFF;
  368. buffer[4] = data & 0xFF;
  369. lens = 5;
  370. }
  371. else // 16 bit : noraml mode
  372. {
  373. buffer[0] = (addr >> 8) & 0xFF;
  374. buffer[1] = addr & 0xFF;
  375. buffer[2] = (data >> 24) & 0xFF;
  376. buffer[3] = (data >> 16) & 0xFF;
  377. buffer[4] = (data >> 8) & 0xFF;
  378. buffer[5] = data & 0xFF;
  379. lens = 6;
  380. }
  381. // ret_code = mt_i2c_write(I2C2, MT8193_CHIP_ADDR, buffer, lens, 0); // 0:I2C_PATH_NORMAL
  382. ret_code = i2c_write(&i2c, buffer, lens);
  383. if (ret_code != 0)
  384. {
  385. return ret_code;
  386. }
  387. //check
  388. result_tmp = mt8193_i2c_read32(addr);
  389. printf("[LK mt8193_i2c_write] Reg[0x%x]=0x%x, result_tmp=0x%x \n", addr, data, result_tmp);
  390. return 0;
  391. }