mt_battery.c 28 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. #include <target/board.h>
  36. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  37. #define CFG_POWER_CHARGING
  38. #endif
  39. #ifdef CFG_POWER_CHARGING
  40. #include <platform/mt_typedefs.h>
  41. #include <platform/mt_reg_base.h>
  42. #include <platform/mt_pmic.h>
  43. #include <platform/upmu_hw.h>
  44. #include <platform/upmu_common.h>
  45. #include <platform/boot_mode.h>
  46. #include <platform/mt_gpt.h>
  47. #include <platform/mt_rtc.h>
  48. //#include <platform/mt_disp_drv.h>
  49. //#include <platform/mtk_wdt.h>
  50. //#include <platform/mtk_key.h>
  51. //#include <platform/mt_logo.h>
  52. //#include <platform/mt_leds.h>
  53. #include <printf.h>
  54. #include <sys/types.h>
  55. #include <target/cust_battery.h>
  56. #if defined(MTK_BQ24261_SUPPORT)
  57. #include <platform/bq24261.h>
  58. #endif
  59. #if defined(MTK_BQ24296_SUPPORT)
  60. #include <platform/bq24296.h>
  61. #endif
  62. #if defined(MTK_NCP1854_SUPPORT)
  63. #include <platform/ncp1854.h>
  64. #endif
  65. #if defined(MTK_DLPT_SUPPORT)
  66. #define DLPT_FEATURE_SUPPORT
  67. void fgauge_initialization(void);
  68. void get_dlpt_imix_r(void);
  69. #endif
  70. extern int get_charging_current(int times);
  71. extern void upmu_set_reg_value(kal_uint32 reg, kal_uint32 reg_val);
  72. #undef printf
  73. /*****************************************************************************
  74. * Type define
  75. ****************************************************************************/
  76. #if defined(CUST_BATTERY_LOWVOL_THRESOLD)
  77. #define BATTERY_LOWVOL_THRESOLD CUST_BATTERY_LOWVOL_THRESOLD
  78. #else
  79. #define BATTERY_LOWVOL_THRESOLD 3450
  80. #endif
  81. #define V_CHARGER_MAX 6500 // 6.5 V
  82. /*****************************************************************************
  83. * Global Variable
  84. ****************************************************************************/
  85. bool g_boot_reason_change = false;
  86. #if defined(STD_AC_LARGE_CURRENT)
  87. int g_std_ac_large_current_en=1;
  88. #else
  89. int g_std_ac_large_current_en=0;
  90. #endif
  91. /*****************************************************************************
  92. * Externl Variable
  93. ****************************************************************************/
  94. extern bool g_boot_menu;
  95. extern void mtk_wdt_restart(void);
  96. int get_bat_volt(int times)
  97. {
  98. int bat_vol;
  99. #if defined(SWCHR_POWER_PATH)
  100. bat_vol = get_i_sense_volt(times);
  101. #else
  102. bat_vol = get_bat_sense_volt(times);
  103. #endif
  104. return bat_vol;
  105. }
  106. void kick_charger_wdt(void)
  107. {
  108. /*
  109. //mt6325_upmu_set_rg_chrwdt_td(0x0); // CHRWDT_TD, 4s
  110. mt6325_upmu_set_rg_chrwdt_td(0x3); // CHRWDT_TD, 32s for keep charging for lk to kernel
  111. mt6325_upmu_set_rg_chrwdt_wr(1); // CHRWDT_WR
  112. mt6325_upmu_set_rg_chrwdt_int_en(1); // CHRWDT_INT_EN
  113. mt6325_upmu_set_rg_chrwdt_en(1); // CHRWDT_EN
  114. mt6325_upmu_set_rg_chrwdt_flag_wr(1); // CHRWDT_WR
  115. */
  116. pmic_set_register_value(PMIC_RG_CHRWDT_TD,3); // CHRWDT_TD, 32s for keep charging for lk to kernel
  117. pmic_set_register_value(PMIC_RG_CHRWDT_WR,1); // CHRWDT_WR
  118. pmic_set_register_value(PMIC_RG_CHRWDT_INT_EN,1); // CHRWDT_INT_EN
  119. pmic_set_register_value(PMIC_RG_CHRWDT_EN,1); // CHRWDT_EN
  120. pmic_set_register_value(PMIC_RG_CHRWDT_FLAG_WR,1);// CHRWDT_WR
  121. }
  122. #if defined(MTK_BATLOWV_NO_PANEL_ON_EARLY)
  123. kal_bool is_low_battery(kal_int32 val)
  124. {
  125. static UINT8 g_bat_low = 0xFF;
  126. //low battery only justice once in lk
  127. if (0xFF != g_bat_low)
  128. return g_bat_low;
  129. else
  130. g_bat_low = FALSE;
  131. #if defined(SWCHR_POWER_PATH)
  132. if (0 == val) {
  133. pchr_turn_on_charging(KAL_FALSE);
  134. val = get_i_sense_volt(1);
  135. }
  136. #else
  137. if (0 == val)
  138. val = get_bat_sense_volt(1);
  139. #endif
  140. if (val < BATTERY_LOWVOL_THRESOLD) {
  141. printf("%s, TRUE\n", __FUNCTION__);
  142. g_bat_low = 0x1;
  143. }
  144. if (FALSE == g_bat_low)
  145. printf("%s, FALSE\n", __FUNCTION__);
  146. return g_bat_low;
  147. }
  148. #endif
  149. void pchr_turn_on_charging(kal_bool bEnable)
  150. {
  151. pmic_set_register_value(PMIC_RG_USBDL_RST,1);//force leave USBDL mode
  152. //mt6325_upmu_set_rg_usbdl_rst(1); //force leave USBDL mode
  153. pmic_set_register_value(PMIC_RG_BC11_RST,1);//BC11_RST
  154. kick_charger_wdt();
  155. pmic_set_register_value(PMIC_RG_CS_VTH,0xC); // CS_VTH, 450mA
  156. //mt6325_upmu_set_rg_cs_vth(0xC); // CS_VTH, 450mA
  157. pmic_set_register_value(PMIC_RG_CSDAC_EN,bEnable);
  158. //mt6325_upmu_set_rg_csdac_en(1); // CSDAC_EN
  159. pmic_set_register_value(PMIC_RG_CHR_EN,bEnable);
  160. //mt6325_upmu_set_rg_chr_en(1); // CHR_EN
  161. pmic_set_register_value(PMIC_RG_CSDAC_MODE,1);//CSDAC_MODE
  162. pmic_set_register_value(PMIC_RG_CSDAC_EN,1);
  163. #if defined(MTK_BQ24261_SUPPORT)
  164. bq24261_hw_init();
  165. bq24261_charging_enable(bEnable);
  166. bq24261_dump_register();
  167. #endif
  168. #if defined(MTK_BQ24296_SUPPORT)
  169. bq24296_hw_init();
  170. bq24296_charging_enable(bEnable);
  171. bq24296_dump_register();
  172. #endif
  173. #if defined(MTK_NCP1854_SUPPORT)
  174. ncp1854_hw_init();
  175. ncp1854_charging_enable(bEnable);
  176. ncp1854_dump_register();
  177. #endif
  178. }
  179. void pchr_turn_off_charging(void)
  180. {
  181. pmic_set_register_value(PMIC_RG_CHRWDT_INT_EN,0);// CHRWDT_INT_EN
  182. pmic_set_register_value(PMIC_RG_CHRWDT_EN,0);// CHRWDT_EN
  183. pmic_set_register_value(PMIC_RG_CHRWDT_FLAG_WR,0);// CHRWDT_FLAG
  184. pmic_set_register_value(PMIC_RG_CSDAC_EN,0);// CSDAC_EN
  185. pmic_set_register_value(PMIC_RG_CHR_EN,0);// CHR_EN
  186. pmic_set_register_value(PMIC_RG_HWCV_EN,0);// RG_HWCV_EN
  187. }
  188. int fix_coverity = 0;
  189. //enter this function when low battery with charger
  190. void check_bat_protect_status()
  191. {
  192. kal_int32 bat_val = 0;
  193. int current,chr_volt,cnt=0,i;
  194. #if defined(SWCHR_POWER_PATH)
  195. bat_val = get_i_sense_volt(5);
  196. #else
  197. bat_val = get_bat_sense_volt(5);
  198. #endif
  199. dprintf(CRITICAL, "[%s]: check VBAT=%d mV with %d mV, start charging... \n", __FUNCTION__, bat_val, BATTERY_LOWVOL_THRESOLD);
  200. if (bat_val == 56789)
  201. fix_coverity = 1;
  202. while (bat_val < BATTERY_LOWVOL_THRESOLD) {
  203. mtk_wdt_restart();
  204. if (upmu_is_chr_det() == KAL_FALSE) {
  205. dprintf(CRITICAL, "[BATTERY] No Charger, Power OFF !\n");
  206. mt6575_power_off();
  207. while (1) {
  208. if (fix_coverity == 1)
  209. return;
  210. }
  211. }
  212. chr_volt= get_charger_volt(1);
  213. if (chr_volt>V_CHARGER_MAX) {
  214. dprintf(CRITICAL, "[BATTERY] charger voltage is too high :%d , threshold is %d !\n",chr_volt,V_CHARGER_MAX);
  215. break;
  216. }
  217. pchr_turn_on_charging(KAL_TRUE);
  218. #if defined(SWCHR_POWER_PATH)
  219. mdelay(5000);
  220. #else
  221. cnt=0;
  222. for (i=0; i<10; i++) {
  223. current = get_charging_current(1);
  224. chr_volt=get_charger_volt(1);
  225. if (current<100 && chr_volt<4400) {
  226. cnt++;
  227. dprintf(CRITICAL, "[BATTERY] charging current=%d charger volt=%d\n\r",current,chr_volt);
  228. } else {
  229. dprintf(CRITICAL, "[BATTERY] charging current=%d charger volt=%d\n\r",current,chr_volt);
  230. cnt=0;
  231. }
  232. }
  233. if (cnt>=8) {
  234. dprintf(CRITICAL, "[BATTERY] charging current and charger volt too low !! \n\r");
  235. pchr_turn_off_charging();
  236. #ifndef NO_POWER_OFF
  237. mt6575_power_off();
  238. #endif
  239. while (1) {
  240. dprintf(CRITICAL, "If you see the log, please check with RTC power off API\n\r");
  241. if (fix_coverity == 1)
  242. return;
  243. }
  244. }
  245. mdelay(50);
  246. #endif
  247. #if defined(SWCHR_POWER_PATH)
  248. #ifndef MTK_NCP1854_SUPPORT /* NCP1854 needs enable charging to have power path */
  249. pchr_turn_on_charging(KAL_FALSE);
  250. mdelay(100);
  251. #endif
  252. bat_val = get_i_sense_volt(5);
  253. #else
  254. bat_val = get_bat_sense_volt(5);
  255. #endif
  256. dprintf(CRITICAL, "[%s]: check VBAT=%d mV \n", __FUNCTION__, bat_val);
  257. }
  258. dprintf(CRITICAL, "[%s]: check VBAT=%d mV with %d mV, stop charging... \n", __FUNCTION__, bat_val, BATTERY_LOWVOL_THRESOLD);
  259. }
  260. bool mtk_bat_allow_backlight_enable(void)
  261. {
  262. int bat_vol = 0;
  263. #if defined(SWCHR_POWER_PATH)
  264. bat_vol = get_i_sense_volt(1);
  265. #else
  266. bat_vol = get_bat_sense_volt(1);
  267. #endif
  268. if (bat_vol > (BATTERY_LOWVOL_THRESOLD + 150))
  269. return true;
  270. return false;
  271. }
  272. void mt65xx_bat_init(void)
  273. {
  274. kal_int32 bat_vol;
  275. // Low Battery Safety Booting
  276. #if defined(SWCHR_POWER_PATH)
  277. bat_vol = get_i_sense_volt(1);
  278. #else
  279. bat_vol = get_bat_sense_volt(1);
  280. #endif
  281. //pchr_turn_on_charging(KAL_TRUE);
  282. dprintf(CRITICAL, "[mt65xx_bat_init] check VBAT=%d mV with %d mV\n", bat_vol, BATTERY_LOWVOL_THRESOLD);
  283. if (g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT && (pmic_get_register_value(PMIC_PWRKEY_DEB)==0) ) {
  284. dprintf(CRITICAL, "[mt65xx_bat_init] KPOC+PWRKEY => change boot mode\n");
  285. g_boot_reason_change = true;
  286. }
  287. rtc_boot_check(false);
  288. #ifndef MTK_DISABLE_POWER_ON_OFF_VOLTAGE_LIMITATION
  289. #ifndef MTK_BATLOWV_NO_PANEL_ON_EARLY
  290. if (bat_vol < BATTERY_LOWVOL_THRESOLD)
  291. #else
  292. if (is_low_battery(bat_vol))
  293. #endif
  294. {
  295. if (g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT && upmu_is_chr_det() == KAL_TRUE) {
  296. dprintf(CRITICAL, "[%s] Kernel Low Battery Power Off Charging Mode\n", __func__);
  297. g_boot_mode = LOW_POWER_OFF_CHARGING_BOOT;
  298. check_bat_protect_status();
  299. } else {
  300. dprintf(CRITICAL, "[BATTERY] battery voltage(%dmV) <= CLV ! Can not Boot Linux Kernel !! \n\r",bat_vol);
  301. #ifndef NO_POWER_OFF
  302. mt6575_power_off();
  303. #endif
  304. while (1) {
  305. dprintf(CRITICAL, "If you see the log, please check with RTC power off API\n\r");
  306. if (fix_coverity == 1)
  307. return;
  308. }
  309. }
  310. }
  311. #endif
  312. #if defined(DLPT_FEATURE_SUPPORT)
  313. fgauge_initialization();
  314. pchr_turn_on_charging(KAL_FALSE);
  315. mdelay(50);
  316. get_dlpt_imix_r();
  317. check_bat_protect_status();
  318. #endif //#if defined(DLPT_FEATURE_SUPPORT)
  319. return;
  320. }
  321. #if defined(DLPT_FEATURE_SUPPORT)
  322. kal_uint8 imix_r=170;
  323. kal_int32 chip_diff_trim_value_4_0 = 0;
  324. kal_int32 chip_diff_trim_value = 0; // unit = 0.1
  325. #define UNIT_FGCURRENT (158122) // 158.122 uA
  326. /* battery meter parameter */
  327. #define CHANGE_TRACKING_POINT
  328. #define CUST_TRACKING_POINT 1
  329. #define CUST_R_SENSE 68
  330. #define CUST_HW_CC 0
  331. #define AGING_TUNING_VALUE 103
  332. #define CUST_R_FG_OFFSET 0
  333. #define OCV_BOARD_COMPESATE 0 //mV
  334. #define R_FG_BOARD_BASE 1000
  335. #define R_FG_BOARD_SLOPE 1000 //slope
  336. #define CAR_TUNE_VALUE 86 //1.00
  337. /* HW Fuel gague */
  338. #define CURRENT_DETECT_R_FG 10 //1mA
  339. #define MinErrorOffset 1000
  340. #define FG_VBAT_AVERAGE_SIZE 18
  341. #define R_FG_VALUE 10 // mOhm, base is 20
  342. kal_bool g_fg_is_charging = 0;
  343. kal_uint32 ptim_bat_vol=0;
  344. kal_int32 ptim_R_curr=0;
  345. extern kal_uint32 upmu_get_reg_value(kal_uint32 reg);
  346. void get_hw_chip_diff_trim_value(void)
  347. {
  348. #if 1
  349. kal_int32 reg_val = 0;
  350. reg_val = upmu_get_reg_value(0xCB8);
  351. chip_diff_trim_value_4_0 = (reg_val>>7)&0x001F;//chip_diff_trim_value_4_0 = (reg_val>>10)&0x001F;
  352. dprintf(CRITICAL,"[Chip_Trim] Reg[0xCB8]=0x%x, chip_diff_trim_value_4_0=%d\n", reg_val, chip_diff_trim_value_4_0);
  353. #else
  354. dprintf(CRITICAL,"[Chip_Trim] need check reg number\n");
  355. #endif
  356. switch (chip_diff_trim_value_4_0) {
  357. case 0:
  358. chip_diff_trim_value = 1000;
  359. break;
  360. case 1:
  361. chip_diff_trim_value = 1005;
  362. break;
  363. case 2:
  364. chip_diff_trim_value = 1010;
  365. break;
  366. case 3:
  367. chip_diff_trim_value = 1015;
  368. break;
  369. case 4:
  370. chip_diff_trim_value = 1020;
  371. break;
  372. case 5:
  373. chip_diff_trim_value = 1025;
  374. break;
  375. case 6:
  376. chip_diff_trim_value = 1030;
  377. break;
  378. case 7:
  379. chip_diff_trim_value = 1036;
  380. break;
  381. case 8:
  382. chip_diff_trim_value = 1041;
  383. break;
  384. case 9:
  385. chip_diff_trim_value = 1047;
  386. break;
  387. case 10:
  388. chip_diff_trim_value = 1052;
  389. break;
  390. case 11:
  391. chip_diff_trim_value = 1058;
  392. break;
  393. case 12:
  394. chip_diff_trim_value = 1063;
  395. break;
  396. case 13:
  397. chip_diff_trim_value = 1069;
  398. break;
  399. case 14:
  400. chip_diff_trim_value = 1075;
  401. break;
  402. case 15:
  403. chip_diff_trim_value = 1081;
  404. break;
  405. case 31:
  406. chip_diff_trim_value = 995;
  407. break;
  408. case 30:
  409. chip_diff_trim_value = 990;
  410. break;
  411. case 29:
  412. chip_diff_trim_value = 985;
  413. break;
  414. case 28:
  415. chip_diff_trim_value = 980;
  416. break;
  417. case 27:
  418. chip_diff_trim_value = 975;
  419. break;
  420. case 26:
  421. chip_diff_trim_value = 970;
  422. break;
  423. case 25:
  424. chip_diff_trim_value = 966;
  425. break;
  426. case 24:
  427. chip_diff_trim_value = 961;
  428. break;
  429. case 23:
  430. chip_diff_trim_value = 956;
  431. break;
  432. case 22:
  433. chip_diff_trim_value = 952;
  434. break;
  435. case 21:
  436. chip_diff_trim_value = 947;
  437. break;
  438. case 20:
  439. chip_diff_trim_value = 943;
  440. break;
  441. case 19:
  442. chip_diff_trim_value = 938;
  443. break;
  444. case 18:
  445. chip_diff_trim_value = 934;
  446. break;
  447. case 17:
  448. chip_diff_trim_value = 930;
  449. break;
  450. default:
  451. dprintf(CRITICAL, "[Chip_Trim] Invalid value(%d)\n", chip_diff_trim_value_4_0);
  452. break;
  453. }
  454. dprintf(CRITICAL, "[Chip_Trim] chip_diff_trim_value=%d\n", chip_diff_trim_value);
  455. }
  456. static kal_uint32 fg_get_data_ready_status(void)
  457. {
  458. kal_uint32 temp_val=0;
  459. pmic_read_interface(MT6328_FGADC_CON0, &temp_val, 0xFFFF, 0x0);
  460. dprintf(CRITICAL, "[fg_get_data_ready_status] Reg[0x%x]=0x%x\r\n", MT6328_FGADC_CON0, temp_val);
  461. temp_val = (temp_val & (MT6328_PMIC_FG_LATCHDATA_ST_MASK << MT6328_PMIC_FG_LATCHDATA_ST_SHIFT)) >> MT6328_PMIC_FG_LATCHDATA_ST_SHIFT;
  462. return temp_val;
  463. }
  464. kal_int32 use_chip_trim_value(kal_int32 not_trim_val)
  465. {
  466. kal_int32 ret_val=0;
  467. ret_val=((not_trim_val*chip_diff_trim_value)/1000);
  468. dprintf(CRITICAL, "[use_chip_trim_value] %d -> %d\n", not_trim_val, ret_val);
  469. return ret_val;
  470. }
  471. void fgauge_read_current(void *data)
  472. {
  473. kal_uint16 uvalue16 = 0;
  474. kal_int32 dvalue = 0;
  475. int m = 0;
  476. uint64_t Temp_Value = 0;
  477. kal_int32 Current_Compensate_Value=0;
  478. // HW Init
  479. //(1) i2c_write (0x60, 0xC8, 0x01); // Enable VA2
  480. //(2) i2c_write (0x61, 0x15, 0x00); // Enable FGADC clock for digital
  481. //(3) i2c_write (0x61, 0x69, 0x28); // Set current mode, auto-calibration mode and 32KHz clock source
  482. //(4) i2c_write (0x61, 0x69, 0x29); // Enable FGADC
  483. //Read HW Raw Data
  484. //(1) Set READ command
  485. pmic_config_interface(MT6328_FGADC_CON0, 0x0200, 0xFF00, 0x0);
  486. //(2) Keep i2c read when status = 1 (0x06)
  487. m=0;
  488. while ( fg_get_data_ready_status() == 0 ) {
  489. m++;
  490. if (m>1000) {
  491. dprintf(CRITICAL, "[fgauge_read_current] fg_get_data_ready_status timeout 1 !\r\n");
  492. break;
  493. }
  494. }
  495. //(3) Read FG_CURRENT_OUT[15:08]
  496. //(4) Read FG_CURRENT_OUT[07:00]
  497. uvalue16 = pmic_get_register_value(PMIC_FG_CURRENT_OUT); //mt6325_upmu_get_fg_current_out();
  498. dprintf(CRITICAL, "[fgauge_read_current] : FG_CURRENT = %x\r\n", uvalue16);
  499. //(5) (Read other data)
  500. //(6) Clear status to 0
  501. pmic_config_interface(MT6328_FGADC_CON0, 0x0800, 0xFF00, 0x0);
  502. //(7) Keep i2c read when status = 0 (0x08)
  503. //while ( fg_get_sw_clear_status() != 0 )
  504. m=0;
  505. while ( fg_get_data_ready_status() != 0 ) {
  506. m++;
  507. if (m>1000) {
  508. dprintf(CRITICAL, "[fgauge_read_current] fg_get_data_ready_status timeout 2 !\r\n");
  509. break;
  510. }
  511. }
  512. //(8) Recover original settings
  513. pmic_config_interface(MT6328_FGADC_CON0, 0x0000, 0xFF00, 0x0);
  514. //calculate the real world data
  515. dvalue = (kal_uint32) uvalue16;
  516. if ( dvalue == 0 ) {
  517. Temp_Value = (uint64_t) dvalue;
  518. g_fg_is_charging = KAL_FALSE;
  519. } else if ( dvalue > 32767 ) { // > 0x8000
  520. Temp_Value = (uint64_t)(dvalue - 65535);
  521. Temp_Value = Temp_Value - (Temp_Value*2);
  522. g_fg_is_charging = KAL_FALSE;
  523. } else {
  524. Temp_Value = (uint64_t) dvalue;
  525. g_fg_is_charging = KAL_TRUE;
  526. }
  527. Temp_Value = Temp_Value * UNIT_FGCURRENT;
  528. //do_div(Temp_Value, 100000);
  529. Temp_Value=Temp_Value/100000;
  530. dvalue = (kal_uint32)Temp_Value;
  531. if ( g_fg_is_charging == KAL_TRUE ) {
  532. dprintf(CRITICAL, "[fgauge_read_current] current(charging) = %d mA\r\n", dvalue);
  533. } else {
  534. dprintf(CRITICAL, "[fgauge_read_current] current(discharging) = %d mA\r\n", dvalue);
  535. }
  536. // Auto adjust value
  537. if (R_FG_VALUE != 20) {
  538. dprintf(CRITICAL, "[fgauge_read_current] Auto adjust value due to the Rfg is %d\n Ori current=%d, ", R_FG_VALUE, dvalue);
  539. dvalue = (dvalue*20)/R_FG_VALUE;
  540. dprintf(CRITICAL, "[fgauge_read_current] new current=%d\n", dvalue);
  541. }
  542. // K current
  543. if (R_FG_BOARD_SLOPE != R_FG_BOARD_BASE) {
  544. dvalue = ( (dvalue*R_FG_BOARD_BASE) + (R_FG_BOARD_SLOPE/2) ) / R_FG_BOARD_SLOPE;
  545. }
  546. // current compensate
  547. if (g_fg_is_charging == KAL_TRUE) {
  548. dvalue = dvalue + Current_Compensate_Value;
  549. } else {
  550. dvalue = dvalue - Current_Compensate_Value;
  551. }
  552. dprintf(CRITICAL, "[fgauge_read_current] ori current=%d\n", dvalue);
  553. dvalue = ((dvalue*CAR_TUNE_VALUE)/100);
  554. dvalue = use_chip_trim_value(dvalue);
  555. dprintf(CRITICAL, "[fgauge_read_current] final current=%d (ratio=%d)\n", dvalue, CAR_TUNE_VALUE);
  556. *(kal_int32*)(data) = dvalue;
  557. return;
  558. }
  559. void fgauge_read_IM_current(void *data)
  560. {
  561. kal_uint16 uvalue16 = 0;
  562. kal_int32 dvalue = 0;
  563. uint64_t Temp_Value = 0;
  564. kal_int32 Current_Compensate_Value=0;
  565. uvalue16 = pmic_get_register_value(PMIC_FG_R_CURR);
  566. dprintf(CRITICAL, "[fgauge_read_IM_current] : FG_CURRENT = %x\r\n", uvalue16);
  567. //calculate the real world data
  568. dvalue = (kal_uint32) uvalue16;
  569. if ( dvalue == 0 ) {
  570. Temp_Value = (uint64_t) dvalue;
  571. g_fg_is_charging = KAL_FALSE;
  572. } else if ( dvalue > 32767 ) { // > 0x8000
  573. Temp_Value = (uint64_t)(dvalue - 65535);
  574. Temp_Value = Temp_Value - (Temp_Value*2);
  575. g_fg_is_charging = KAL_FALSE;
  576. } else {
  577. Temp_Value = (uint64_t) dvalue;
  578. g_fg_is_charging = KAL_TRUE;
  579. }
  580. Temp_Value = Temp_Value * UNIT_FGCURRENT;
  581. //do_div(Temp_Value, 100000);
  582. Temp_Value=Temp_Value/100000;
  583. dvalue = (kal_uint32)Temp_Value;
  584. if ( g_fg_is_charging == KAL_TRUE ) {
  585. dprintf(CRITICAL, "[fgauge_read_IM_current] current(charging) = %d mA\r\n", dvalue);
  586. } else {
  587. dprintf(CRITICAL, "[fgauge_read_IM_current] current(discharging) = %d mA\r\n", dvalue);
  588. }
  589. // Auto adjust value
  590. if (R_FG_VALUE != 20) {
  591. dprintf(CRITICAL, "[fgauge_read_IM_current] Auto adjust value due to the Rfg is %d\n Ori current=%d, ", R_FG_VALUE, dvalue);
  592. dvalue = (dvalue*20)/R_FG_VALUE;
  593. dprintf(CRITICAL, "[fgauge_read_IM_current] new current=%d\n", dvalue);
  594. }
  595. // K current
  596. if (R_FG_BOARD_SLOPE != R_FG_BOARD_BASE) {
  597. dvalue = ( (dvalue*R_FG_BOARD_BASE) + (R_FG_BOARD_SLOPE/2) ) / R_FG_BOARD_SLOPE;
  598. }
  599. // current compensate
  600. if (g_fg_is_charging == KAL_TRUE) {
  601. dvalue = dvalue + Current_Compensate_Value;
  602. } else {
  603. dvalue = dvalue - Current_Compensate_Value;
  604. }
  605. dprintf(CRITICAL, "[fgauge_read_IM_current] ori current=%d\n", dvalue);
  606. dvalue = ((dvalue*CAR_TUNE_VALUE)/100);
  607. dvalue = use_chip_trim_value(dvalue);
  608. dprintf(CRITICAL,"[fgauge_read_IM_current] final current=%d (ratio=%d)\n", dvalue, CAR_TUNE_VALUE);
  609. *(kal_int32*)(data) = dvalue;
  610. return;
  611. }
  612. void fgauge_initialization(void)
  613. {
  614. kal_int32 current_temp = 0;
  615. int m = 0;
  616. get_hw_chip_diff_trim_value();
  617. // 1. HW initialization
  618. //FGADC clock is 32768Hz from RTC
  619. //Enable FGADC in current mode at 32768Hz with auto-calibration
  620. //(1) Enable VA2
  621. //(2) Enable FGADC clock for digital
  622. pmic_set_register_value(PMIC_RG_FGADC_ANA_CK_PDN,0);// mt6325_upmu_set_rg_fgadc_ana_ck_pdn(0);
  623. pmic_set_register_value(PMIC_RG_FGADC_DIG_CK_PDN,0);// mt6325_upmu_set_rg_fgadc_dig_ck_pdn(0);
  624. //(3) Set current mode, auto-calibration mode and 32KHz clock source
  625. pmic_config_interface(MT6328_FGADC_CON0, 0x0028, 0x00FF, 0x0);
  626. //(4) Enable FGADC
  627. pmic_config_interface(MT6328_FGADC_CON0, 0x0029, 0x00FF, 0x0);
  628. //reset HW FG
  629. pmic_config_interface(MT6328_FGADC_CON0, 0x7100, 0xFF00, 0x0);
  630. dprintf(CRITICAL,"******** [fgauge_initialization] reset HW FG!\n" );
  631. //set FG_OSR
  632. pmic_config_interface(MT6328_FGADC_CON11, 0x8, 0xF, 0x0);
  633. dprintf(CRITICAL, "[fgauge_initialization] Reg[0x%x]=0x%x\n",MT6328_FGADC_CON11, upmu_get_reg_value(MT6328_FGADC_CON11));
  634. //make sure init finish
  635. m = 0;
  636. while (current_temp == 0) {
  637. fgauge_read_current(&current_temp);
  638. m++;
  639. if (m>1000) {
  640. dprintf(CRITICAL, "[fgauge_initialization] timeout!\r\n");
  641. break;
  642. }
  643. }
  644. dprintf(CRITICAL, "******** [fgauge_initialization] Done!\n" );
  645. return ;
  646. }
  647. void do_ptim(void)
  648. {
  649. kal_uint32 vbat_reg;
  650. //PMICLOG("[do_ptim] start \n");
  651. //pmic_auxadc_lock();
  652. //pmic_set_register_value(PMIC_RG_AUXADC_RST,1);
  653. //pmic_set_register_value(PMIC_RG_AUXADC_RST,0);
  654. upmu_set_reg_value(0x0eac,0x0006);
  655. pmic_set_register_value(PMIC_AUXADC_IMP_AUTORPT_PRD,6);
  656. pmic_set_register_value(PMIC_RG_AUXADC_SMPS_CK_PDN,0);
  657. pmic_set_register_value(PMIC_RG_AUXADC_SMPS_CK_PDN_HWEN,0);
  658. pmic_set_register_value(PMIC_RG_AUXADC_CK_PDN_HWEN,0);
  659. pmic_set_register_value(PMIC_RG_AUXADC_CK_PDN,0);
  660. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,1);
  661. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,1);
  662. //restore to initial state
  663. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,0);
  664. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,0);
  665. //set issue interrupt
  666. //pmic_set_register_value(PMIC_RG_INT_EN_AUXADC_IMP,1);
  667. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_CHSEL,0);
  668. pmic_set_register_value(PMIC_AUXADC_IMP_AUTORPT_EN,1);
  669. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_CNT,3);
  670. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_MODE,1);
  671. // PMICLOG("[do_ptim] end %d %d \n",pmic_get_register_value(PMIC_RG_AUXADC_SMPS_CK_PDN),pmic_get_register_value(PMIC_RG_AUXADC_SMPS_CK_PDN_HWEN));
  672. while (pmic_get_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS)==0) {
  673. //PMICLOG("[do_ptim] PMIC_AUXADC_IMPEDANCE_IRQ_STATUS= %d \n",pmic_get_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS));
  674. mdelay(1);
  675. }
  676. //disable
  677. pmic_set_register_value(PMIC_AUXADC_IMP_AUTORPT_EN,0);//typo
  678. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_MODE,0);
  679. //clear irq
  680. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,1);
  681. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,1);
  682. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,0);
  683. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,0);
  684. //PMICLOG("[do_ptim2] 0xee8=0x%x 0x2c6=0x%x\n", upmu_get_reg_value(0xee8),upmu_get_reg_value(0x2c6));
  685. //pmic_set_register_value(PMIC_RG_INT_STATUS_AUXADC_IMP,1);//write 1 to clear !
  686. //pmic_set_register_value(PMIC_RG_INT_EN_AUXADC_IMP,0);
  687. vbat_reg=pmic_get_register_value(PMIC_AUXADC_ADC_OUT_IMP_AVG);
  688. ptim_bat_vol=(vbat_reg*3*18000)/32768;
  689. fgauge_read_IM_current((void *)&ptim_R_curr);
  690. }
  691. void enable_dummy_load(kal_uint32 en)
  692. {
  693. if (en==1) {
  694. //Enable dummy load--------------------------------------------------
  695. //mt6325_upmu_set_rg_g_drv_2m_ck_pdn(0);
  696. //mt6325_upmu_set_rg_drv_32k_ck_pdn(0);
  697. //upmu_set_reg_value(0x23c,0xfeb0);
  698. pmic_set_register_value(PMIC_RG_DRV_ISINK2_CK_PDN,0);
  699. pmic_set_register_value(PMIC_RG_DRV_ISINK3_CK_PDN,0);
  700. //upmu_set_reg_value(0x25a,0x8a00);
  701. pmic_set_register_value(PMIC_RG_DRV_ISINK2_CK_CKSEL,0);
  702. pmic_set_register_value(PMIC_RG_DRV_ISINK3_CK_CKSEL,0);
  703. //upmu_set_reg_value(0x82a,0x0c00);
  704. //upmu_set_reg_value(0x81c,0x7000);
  705. pmic_set_register_value(PMIC_ISINK_CH2_STEP,0xc);
  706. //upmu_set_reg_value(0x81e,0x7000);
  707. pmic_set_register_value(PMIC_ISINK_CH3_STEP,0xc);
  708. //upmu_set_reg_value(0x820,0x0300);
  709. pmic_set_register_value(PMIC_RG_ISINK2_DOUBLE_EN,1);
  710. pmic_set_register_value(PMIC_RG_ISINK3_DOUBLE_EN,1);
  711. //upmu_set_reg_value(0x828,0x0ccc);
  712. pmic_set_register_value(PMIC_ISINK_CH2_EN,1);
  713. pmic_set_register_value(PMIC_ISINK_CH3_EN,1);
  714. pmic_set_register_value(PMIC_ISINK_CHOP2_EN,1);
  715. pmic_set_register_value(PMIC_ISINK_CHOP3_EN,1);
  716. pmic_set_register_value(PMIC_ISINK_CH2_BIAS_EN,1);
  717. pmic_set_register_value(PMIC_ISINK_CH3_BIAS_EN,1);
  718. //pmic_set_register_value(PMIC_RG_VIBR_EN,1);
  719. //PMICLOG("[enable dummy load]\n");
  720. } else {
  721. //upmu_set_reg_value(0x828,0x0cc0);
  722. pmic_set_register_value(PMIC_ISINK_CH2_EN,0);
  723. pmic_set_register_value(PMIC_ISINK_CH3_EN,0);
  724. //pmic_set_register_value(PMIC_RG_VIBR_EN,0);
  725. //PMICLOG("[disable dummy load]\n");
  726. }
  727. }
  728. int get_rac_val(void)
  729. {
  730. int volt_1=0;
  731. int volt_2=0;
  732. int curr_1=0;
  733. int curr_2=0;
  734. int rac_cal=0;
  735. int ret=0;
  736. kal_bool retry_state = KAL_FALSE;
  737. int retry_count=0;
  738. do {
  739. //adc and fg--------------------------------------------------------
  740. do_ptim();
  741. dprintf(CRITICAL, "[1,Trigger ADC PTIM mode] volt1=%d, curr_1=%d\n", ptim_bat_vol, ptim_R_curr);
  742. volt_1=ptim_bat_vol;
  743. curr_1=ptim_R_curr;
  744. dprintf(CRITICAL, "[2,enable dummy load]");
  745. enable_dummy_load(1);
  746. mdelay(50);
  747. //Wait --------------------------------------------------------------
  748. //adc and fg--------------------------------------------------------
  749. do_ptim();
  750. dprintf(CRITICAL, "[3,Trigger ADC PTIM mode again] volt2=%d, curr_2=%d\n", ptim_bat_vol, ptim_R_curr);
  751. volt_2=ptim_bat_vol;
  752. curr_2=ptim_R_curr;
  753. //Disable dummy load-------------------------------------------------
  754. enable_dummy_load(0);
  755. //Calculate Rac------------------------------------------------------
  756. if ( (curr_2-curr_1) >= 700 && (curr_2-curr_1) <= 1200 && (volt_1-volt_2)>=80 ) { //40.0mA
  757. rac_cal=((volt_1-volt_2)*1000)/(curr_2-curr_1); //m-ohm
  758. if (rac_cal<0) {
  759. ret = (rac_cal-(rac_cal*2))*1;
  760. } else {
  761. ret = rac_cal*1;
  762. }
  763. } else if ( (curr_1-curr_2) >= 700 && (curr_2-curr_1) <= 1200 && (volt_2-volt_1)>=80 ) { //40.0mA
  764. rac_cal=((volt_2-volt_1)*1000)/(curr_1-curr_2); //m-ohm
  765. if (rac_cal<0) {
  766. ret = (rac_cal-(rac_cal*2))*1;
  767. } else {
  768. ret = rac_cal*1;
  769. }
  770. } else {
  771. ret=-1;
  772. dprintf(CRITICAL, "[4,Calculate Rac] bypass due to (curr_x-curr_y) < 40mA\n");
  773. }
  774. dprintf(CRITICAL, "[5,Calculate Rac] volt_1=%d,volt_2=%d,curr_1=%d,curr_2=%d,rac_cal=%d,ret=%d,retry_count=%d\n",
  775. volt_1,volt_2,curr_1,curr_2,rac_cal,ret,retry_count);
  776. dprintf(CRITICAL, "[6,Calculate Rac] %d,%d,%d,%d,%d,%d,%d\n",
  777. volt_1,volt_2,curr_1,curr_2,rac_cal,ret,retry_count);
  778. //------------------------
  779. retry_count++;
  780. if ((retry_count < 3) && (ret == -1)) retry_state = KAL_TRUE;
  781. else retry_state = KAL_FALSE;
  782. } while (retry_state == KAL_TRUE);
  783. return ret;
  784. }
  785. void get_dlpt_imix_r(void)
  786. {
  787. int rac_val[5],rac_val_sum=0;
  788. int i;
  789. int validcnt=0;
  790. int min=1000,max=0;
  791. for (i=0; i<5; i++) {
  792. rac_val[i]=get_rac_val();
  793. if (rac_val[i]<=min && rac_val[i]!=-1)
  794. min=rac_val[i];
  795. if (rac_val[i]>=max)
  796. max=rac_val[i];
  797. if (rac_val[i]!=-1) {
  798. rac_val_sum+=rac_val[i];
  799. validcnt++;
  800. }
  801. }
  802. if (validcnt>=4) {
  803. rac_val_sum=rac_val_sum-min-max;
  804. imix_r=rac_val_sum/(validcnt-2);
  805. } else if (validcnt!=0) {
  806. imix_r=rac_val_sum/validcnt;
  807. }
  808. dprintf(CRITICAL, "[dlpt_R] %d,%d,%d,%d,%d [%d:%d:%d]%d\n",rac_val[0],rac_val[1],rac_val[2],rac_val[3],rac_val[4],min,max,validcnt,imix_r);
  809. return;
  810. }
  811. #endif //#if defined(DLPT_FEATURE_SUPPORT)
  812. #else
  813. #include <platform/mt_typedefs.h>
  814. #include <platform/mt_reg_base.h>
  815. #include <printf.h>
  816. kal_uint8 imix_r=170;
  817. void mt65xx_bat_init(void)
  818. {
  819. dprintf(CRITICAL, "[BATTERY] Skip mt65xx_bat_init !!\n\r");
  820. dprintf(CRITICAL, "[BATTERY] If you want to enable power off charging, \n\r");
  821. dprintf(CRITICAL, "[BATTERY] Please #define CFG_POWER_CHARGING!!\n\r");
  822. }
  823. int get_bat_volt(int times)
  824. {
  825. int bat_vol;
  826. #if defined(SWCHR_POWER_PATH)
  827. bat_vol = get_i_sense_volt(times);
  828. #else
  829. bat_vol = get_bat_sense_volt(times);
  830. #endif
  831. return bat_vol;
  832. }
  833. #endif