mt_battery_6353.c 31 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <target/board.h>
  32. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  33. #define CFG_POWER_CHARGING
  34. #endif
  35. #ifdef CFG_POWER_CHARGING
  36. #include <platform/mt_typedefs.h>
  37. #include <platform/mt_reg_base.h>
  38. #include <platform/mt_pmic.h>
  39. #include <platform/upmu_hw.h>
  40. #include <platform/upmu_common.h>
  41. #include <platform/boot_mode.h>
  42. #include <platform/mt_gpt.h>
  43. #include <platform/mt_rtc.h>
  44. #include <platform/mt_pumpexpress.h>
  45. //#include <platform/mt_disp_drv.h>
  46. //#include <platform/mtk_wdt.h>
  47. //#include <platform/mtk_key.h>
  48. //#include <platform/mt_logo.h>
  49. #include <platform/mt_leds.h>
  50. #include <printf.h>
  51. #include <sys/types.h>
  52. #include <target/cust_battery.h>
  53. #if defined(MTK_BQ24261_SUPPORT)
  54. #include <platform/bq24261.h>
  55. #endif
  56. #if defined(MTK_BQ24296_SUPPORT)
  57. #include <platform/bq24296.h>
  58. #endif
  59. #if defined(MTK_NCP1854_SUPPORT)
  60. #include <platform/ncp1854.h>
  61. #endif
  62. #if defined(MTK_BQ25896_SUPPORT)
  63. #include <platform/bq25890.h>
  64. #endif
  65. #define DLPT_FEATURE_SUPPORT
  66. #define V_CHARGER_MAX 6500 // 6.5 V
  67. #undef printf
  68. /*****************************************************************************
  69. * Type define
  70. ****************************************************************************/
  71. #if defined(CUST_BATTERY_LOWVOL_THRESOLD)
  72. #define BATTERY_LOWVOL_THRESOLD CUST_BATTERY_LOWVOL_THRESOLD
  73. #else
  74. #define BATTERY_LOWVOL_THRESOLD 3450
  75. #endif
  76. /*****************************************************************************
  77. * Global Variable
  78. ****************************************************************************/
  79. bool g_boot_reason_change = false;
  80. #if defined(STD_AC_LARGE_CURRENT)
  81. int g_std_ac_large_current_en=1;
  82. #else
  83. int g_std_ac_large_current_en=0;
  84. #endif
  85. /*****************************************************************************
  86. * Externl Variable
  87. ****************************************************************************/
  88. extern bool g_boot_menu;
  89. extern void mtk_wdt_restart(void);
  90. int get_bat_volt(int times)
  91. {
  92. int bat_vol;
  93. #if defined(SWCHR_POWER_PATH)
  94. bat_vol = get_i_sense_volt(times);
  95. #else
  96. bat_vol = get_bat_sense_volt(times);
  97. #endif
  98. return bat_vol;
  99. }
  100. void kick_charger_wdt(void)
  101. {
  102. /*
  103. //mt6325_upmu_set_rg_chrwdt_td(0x0); // CHRWDT_TD, 4s
  104. mt6325_upmu_set_rg_chrwdt_td(0x3); // CHRWDT_TD, 32s for keep charging for lk to kernel
  105. mt6325_upmu_set_rg_chrwdt_wr(1); // CHRWDT_WR
  106. mt6325_upmu_set_rg_chrwdt_int_en(1); // CHRWDT_INT_EN
  107. mt6325_upmu_set_rg_chrwdt_en(1); // CHRWDT_EN
  108. mt6325_upmu_set_rg_chrwdt_flag_wr(1); // CHRWDT_WR
  109. */
  110. pmic_set_register_value(PMIC_RG_CHRWDT_TD,3); // CHRWDT_TD, 32s for keep charging for lk to kernel
  111. pmic_set_register_value(PMIC_RG_CHRWDT_WR,1); // CHRWDT_WR
  112. pmic_set_register_value(PMIC_RG_CHRWDT_INT_EN,1); // CHRWDT_INT_EN
  113. pmic_set_register_value(PMIC_RG_CHRWDT_EN,1); // CHRWDT_EN
  114. pmic_set_register_value(PMIC_RG_CHRWDT_FLAG_WR,1);// CHRWDT_WR
  115. }
  116. #if defined(MTK_BATLOWV_NO_PANEL_ON_EARLY)
  117. kal_bool is_low_battery(kal_int32 val)
  118. {
  119. static UINT8 g_bat_low = 0xFF;
  120. //low battery only justice once in lk
  121. if (0xFF != g_bat_low)
  122. return g_bat_low;
  123. else
  124. g_bat_low = FALSE;
  125. #if defined(SWCHR_POWER_PATH)
  126. if (0 == val)
  127. val = get_i_sense_volt(1);
  128. #else
  129. if (0 == val)
  130. val = get_bat_sense_volt(1);
  131. #endif
  132. if (val < BATTERY_LOWVOL_THRESOLD) {
  133. dprintf(INFO, "%s, TRUE\n", __FUNCTION__);
  134. g_bat_low = 0x1;
  135. }
  136. if (FALSE == g_bat_low)
  137. dprintf(INFO, "%s, FALSE\n", __FUNCTION__);
  138. return g_bat_low;
  139. }
  140. #endif
  141. void pchr_turn_on_charging(kal_bool bEnable)
  142. {
  143. #if !defined(SWCHR_POWER_PATH)
  144. pmic_set_register_value(PMIC_RG_USBDL_RST,1);//force leave USBDL mode
  145. //mt6325_upmu_set_rg_usbdl_rst(1); //force leave USBDL mode
  146. pmic_set_register_value(PMIC_RG_BC11_RST,1);//BC11_RST
  147. kick_charger_wdt();
  148. pmic_set_register_value(PMIC_RG_CS_VTH,0xC); // CS_VTH, 450mA
  149. //mt6325_upmu_set_rg_cs_vth(0xC); // CS_VTH, 450mA
  150. pmic_set_register_value(PMIC_RG_CSDAC_EN,bEnable);
  151. //mt6325_upmu_set_rg_csdac_en(1); // CSDAC_EN
  152. pmic_set_register_value(PMIC_RG_CHR_EN,bEnable);
  153. //mt6325_upmu_set_rg_chr_en(1); // CHR_EN
  154. pmic_set_register_value(PMIC_RG_CSDAC_MODE,1);//CSDAC_MODE
  155. pmic_set_register_value(PMIC_RG_CSDAC_EN,1);
  156. #else
  157. #if defined(MTK_BQ24261_SUPPORT)
  158. bq24261_hw_init();
  159. bq24261_charging_enable(bEnable);
  160. bq24261_dump_register();
  161. #endif
  162. #if defined(MTK_BQ24296_SUPPORT)
  163. bq24296_hw_init();
  164. bq24296_charging_enable(bEnable);
  165. bq24296_dump_register();
  166. #endif
  167. #if defined(MTK_NCP1854_SUPPORT)
  168. ncp1854_hw_init();
  169. ncp1854_charging_enable(bEnable);
  170. ncp1854_dump_register();
  171. #endif
  172. #if defined(MTK_BQ25896_SUPPORT)
  173. bq25890_hw_init();
  174. bq25890_charging_enable(bEnable);
  175. bq25890_dump_register();
  176. #endif
  177. #endif
  178. }
  179. void pchr_turn_off_charging(void)
  180. {
  181. pmic_set_register_value(PMIC_RG_CHRWDT_INT_EN,0);// CHRWDT_INT_EN
  182. pmic_set_register_value(PMIC_RG_CHRWDT_EN,0);// CHRWDT_EN
  183. pmic_set_register_value(PMIC_RG_CHRWDT_FLAG_WR,0);// CHRWDT_FLAG
  184. pmic_set_register_value(PMIC_RG_CSDAC_EN,0);// CSDAC_EN
  185. pmic_set_register_value(PMIC_RG_CHR_EN,0);// CHR_EN
  186. pmic_set_register_value(PMIC_RG_HWCV_EN,0);// RG_HWCV_EN
  187. }
  188. /*
  189. * Switch Charger Power Path switch
  190. */
  191. void switch_charger_power_path_enable(kal_bool enable)
  192. {
  193. #if defined(MTK_BQ25896_SUPPORT)
  194. if (enable == KAL_TRUE) {
  195. bq25890_set_FORCE_VINDPM(1);
  196. bq25890_set_VINDPM(0x14);
  197. } else {
  198. bq25890_set_FORCE_VINDPM(1);
  199. bq25890_set_VINDPM(0x7F);
  200. }
  201. #endif
  202. }
  203. int is_charging = 0;
  204. int fix_coverity = 0;
  205. /*
  206. * enter this function when low battery with charger
  207. * For BQ25896, power path support can provide current and voltage for cell phone to boot directly to kernel.
  208. */
  209. void check_bat_protect_status()
  210. {
  211. kal_int32 bat_val = 0;
  212. int current,chr_volt,cnt=0,i;
  213. #if defined(SWCHR_POWER_PATH)
  214. bat_val = get_i_sense_volt(5);
  215. #else
  216. bat_val = get_bat_sense_volt(5);
  217. #endif
  218. dprintf(CRITICAL, "[%s]: check VBAT=%d mV with %d mV, start charging... \n", __FUNCTION__, bat_val, BATTERY_LOWVOL_THRESOLD);
  219. if (bat_val == 56789)
  220. fix_coverity = 1;
  221. while (bat_val < BATTERY_LOWVOL_THRESOLD) {
  222. mtk_wdt_restart();
  223. if (upmu_is_chr_det() == KAL_FALSE) {
  224. dprintf(CRITICAL, "[BATTERY] No Charger, Power OFF !\n");
  225. mt6575_power_off();
  226. while (1) {
  227. if (fix_coverity == 1)
  228. return;
  229. }
  230. }
  231. chr_volt= get_charger_volt(1);
  232. if (chr_volt>V_CHARGER_MAX) {
  233. dprintf(CRITICAL, "[BATTERY] charger voltage is too high :%d , threshold is %d !\n",chr_volt,V_CHARGER_MAX);
  234. #if defined(SWCHR_POWER_PATH)
  235. mt6575_power_off();
  236. #endif
  237. break;
  238. }
  239. pmic_set_register_value(PMIC_BATON_TDET_EN, 1);
  240. pmic_set_register_value(PMIC_RG_BATON_EN, 1);
  241. if(pmic_get_register_value(PMIC_RGS_BATON_UNDET) == 1) {
  242. dprintf(CRITICAL, "[BATTERY] No battry plug-in. Power Off.");
  243. mt6575_power_off();
  244. break;
  245. }
  246. dprintf(CRITICAL, "[%s]: check VBAT=%d mV with %d mV, start charging... \n", __FUNCTION__, bat_val, BATTERY_LOWVOL_THRESOLD);
  247. is_charging = 1;
  248. pchr_turn_on_charging(KAL_TRUE);
  249. #if defined(SWCHR_POWER_PATH)
  250. mdelay(5000);
  251. #else
  252. mdelay(5000);
  253. cnt=0;
  254. for (i=0; i<10; i++) {
  255. current=get_charging_current(1);
  256. chr_volt=get_charger_volt(1);
  257. if (current<100 && chr_volt<4400) {
  258. cnt++;
  259. dprintf(CRITICAL, "[BATTERY] charging current=%d charger volt=%d\n\r",current,chr_volt);
  260. } else {
  261. dprintf(CRITICAL, "[BATTERY] charging current=%d charger volt=%d\n\r",current,chr_volt);
  262. cnt=0;
  263. }
  264. }
  265. if (cnt>=8) {
  266. dprintf(CRITICAL, "[BATTERY] charging current and charger volt too low !! \n\r",cnt);
  267. pchr_turn_off_charging();
  268. #ifndef NO_POWER_OFF
  269. mt6575_power_off();
  270. #endif
  271. while (1) {
  272. dprintf(CRITICAL, "If you see the log, please check with RTC power off API\n\r");
  273. }
  274. }
  275. mdelay(50);
  276. #endif
  277. #if defined(SWCHR_POWER_PATH)
  278. #ifndef MTK_NCP1854_SUPPORT /* NCP1854 needs enable charging to have power path */
  279. pchr_turn_on_charging(KAL_FALSE);
  280. mdelay(100);
  281. #endif
  282. bat_val = get_i_sense_volt(5);
  283. #else
  284. bat_val = get_bat_sense_volt(5);
  285. #endif
  286. dprintf(CRITICAL, "[%s]: check VBAT=%d mV \n", __FUNCTION__, bat_val);
  287. }
  288. mtk_wdt_restart();
  289. dprintf(CRITICAL, "[%s]: check VBAT=%d mV with %d mV, stop charging... \n", __FUNCTION__, bat_val, BATTERY_LOWVOL_THRESOLD);
  290. }
  291. void mt65xx_bat_init(void)
  292. {
  293. kal_int32 bat_vol;
  294. #if defined(SWCHR_POWER_PATH) || defined(MTK_PUMP_EXPRESS_PLUS_SUPPORT)
  295. kal_int32 chr_volt;
  296. kal_int32 rc = 0;
  297. #endif
  298. // Low Battery Safety Booting
  299. #if defined(SWCHR_POWER_PATH)
  300. bat_vol = get_i_sense_volt(1);
  301. #else
  302. bat_vol = get_bat_sense_volt(1);
  303. #endif
  304. //pchr_turn_on_charging(KAL_TRUE);
  305. dprintf(INFO, "[mt65xx_bat_init] check VBAT=%d mV with %d mV\n", bat_vol, BATTERY_LOWVOL_THRESOLD);
  306. #if defined(MTK_PUMP_EXPRESS_PLUS_SUPPORT) || defined(MTK_PUMP_EXPRESS_PLUS_20_SUPPORT)
  307. /*Try to reset PE+ adapter once abnormal voltage is found*/
  308. chr_volt = get_charger_volt(1);
  309. while (chr_volt > V_CHARGER_MAX) {
  310. dprintf(CRITICAL, "[mt65xx_bat_init] PE+ adpater should be reset to 5V now\n");
  311. pumpex_reset_adapter_enble(1);
  312. mdelay(250);
  313. pumpex_reset_adapter_enble(0);
  314. chr_volt = get_charger_volt(1);
  315. rc++;
  316. if (rc == 3)
  317. break;
  318. }
  319. #endif
  320. if (g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT && (pmic_get_register_value(PMIC_PWRKEY_DEB)==0) ) {
  321. dprintf(CRITICAL, "[mt65xx_bat_init] KPOC+PWRKEY => change boot mode\n");
  322. g_boot_reason_change = true;
  323. }
  324. rtc_boot_check(false);
  325. #ifndef MTK_DISABLE_POWER_ON_OFF_VOLTAGE_LIMITATION
  326. #ifndef MTK_BATLOWV_NO_PANEL_ON_EARLY
  327. if (bat_vol < BATTERY_LOWVOL_THRESOLD)
  328. #else
  329. if (is_low_battery(bat_vol))
  330. #endif
  331. {
  332. if (g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT && upmu_is_chr_det() == KAL_TRUE) {
  333. dprintf(CRITICAL, "[%s] Kernel Low Battery Power Off Charging Mode\n", __func__);
  334. g_boot_mode = LOW_POWER_OFF_CHARGING_BOOT;
  335. check_bat_protect_status();
  336. } else {
  337. dprintf(CRITICAL, "[BATTERY] battery voltage(%dmV) <= CLV ! Can not Boot Linux Kernel !! \n\r",bat_vol);
  338. #ifndef NO_POWER_OFF
  339. mt6575_power_off();
  340. #endif
  341. while (1) {
  342. dprintf(CRITICAL, "If you see the log, please check with RTC power off API\n\r");
  343. if (fix_coverity == 1)
  344. return;
  345. }
  346. }
  347. }
  348. #endif
  349. #if defined(SWCHR_POWER_PATH)
  350. chr_volt = get_charger_volt(1);
  351. if(chr_volt > V_CHARGER_MAX) {
  352. dprintf(CRITICAL, "Charger Over Voltage:%d\n, power off...", chr_volt);
  353. mt6575_power_off();
  354. }
  355. #endif
  356. #if defined(DLPT_FEATURE_SUPPORT)
  357. fgauge_initialization(NULL);
  358. if (g_boot_mode != META_BOOT && g_boot_mode != FACTORY_BOOT && g_boot_mode != ATE_FACTORY_BOOT) {
  359. pmic_set_register_value(PMIC_BATON_TDET_EN, 1);
  360. pmic_set_register_value(PMIC_RG_BATON_EN, 1);
  361. if(pmic_get_register_value(PMIC_RGS_BATON_UNDET) == 1) {
  362. dprintf(CRITICAL, "[BATTERY] No battry plug-in. Power Off.");
  363. mt6575_power_off();
  364. }
  365. }
  366. pchr_turn_on_charging(KAL_FALSE);
  367. #if defined(SWCHR_POWER_PATH)
  368. /* disable SW charger power path */
  369. switch_charger_power_path_enable(KAL_FALSE);
  370. #endif
  371. mdelay(50);
  372. get_dlpt_imix_r();
  373. #if defined(SWCHR_POWER_PATH)
  374. /* after get imix, re-enable SW charger power path */
  375. switch_charger_power_path_enable(KAL_TRUE);
  376. mdelay(50);
  377. #endif
  378. check_bat_protect_status();
  379. if (is_charging == 1) {
  380. pchr_turn_on_charging(KAL_TRUE);
  381. dprintf(CRITICAL, "turn on charging \n\r");
  382. }
  383. #endif //#if defined(DLPT_FEATURE_SUPPORT)
  384. return;
  385. }
  386. #if defined(DLPT_FEATURE_SUPPORT)
  387. int imix_r=170;
  388. kal_int32 chip_diff_trim_value_4_0 = 0;
  389. kal_int32 chip_diff_trim_value = 0; // unit = 0.1
  390. #define UNIT_FGCURRENT (158122) // 158.122 uA
  391. /* battery meter parameter */
  392. #define CHANGE_TRACKING_POINT
  393. #define CUST_TRACKING_POINT 1
  394. #define CUST_R_SENSE 56
  395. #define CUST_HW_CC 0
  396. #define AGING_TUNING_VALUE 103
  397. #define CUST_R_FG_OFFSET 0
  398. #define OCV_BOARD_COMPESATE 0 //mV
  399. #define R_FG_BOARD_BASE 1000
  400. #define R_FG_BOARD_SLOPE 1000 //slope
  401. #define CAR_TUNE_VALUE 118 //1.00
  402. /* HW Fuel gague */
  403. #define CURRENT_DETECT_R_FG 10 //1mA
  404. #define MinErrorOffset 1000
  405. #define FG_VBAT_AVERAGE_SIZE 18
  406. #define R_FG_VALUE 10 // mOhm, base is 20
  407. kal_bool g_fg_is_charging = 0;
  408. kal_uint32 ptim_bat_vol=0;
  409. kal_int32 ptim_R_curr=0;
  410. extern kal_uint32 upmu_get_reg_value(kal_uint32 reg);
  411. void get_hw_chip_diff_trim_value(void)
  412. {
  413. #if 1
  414. kal_int32 reg_val = 0;
  415. reg_val = upmu_get_reg_value(0xCB8);
  416. chip_diff_trim_value_4_0 = (reg_val>>7)&0x001F;//chip_diff_trim_value_4_0 = (reg_val>>10)&0x001F;
  417. dprintf(CRITICAL,"[Chip_Trim] Reg[0xCB8]=0x%x, chip_diff_trim_value_4_0=%d\n", reg_val, chip_diff_trim_value_4_0);
  418. #else
  419. dprintf(CRITICAL,"[Chip_Trim] need check reg number\n");
  420. #endif
  421. switch (chip_diff_trim_value_4_0) {
  422. case 0:
  423. chip_diff_trim_value = 1000;
  424. break;
  425. case 1:
  426. chip_diff_trim_value = 1005;
  427. break;
  428. case 2:
  429. chip_diff_trim_value = 1010;
  430. break;
  431. case 3:
  432. chip_diff_trim_value = 1015;
  433. break;
  434. case 4:
  435. chip_diff_trim_value = 1020;
  436. break;
  437. case 5:
  438. chip_diff_trim_value = 1025;
  439. break;
  440. case 6:
  441. chip_diff_trim_value = 1030;
  442. break;
  443. case 7:
  444. chip_diff_trim_value = 1036;
  445. break;
  446. case 8:
  447. chip_diff_trim_value = 1041;
  448. break;
  449. case 9:
  450. chip_diff_trim_value = 1047;
  451. break;
  452. case 10:
  453. chip_diff_trim_value = 1052;
  454. break;
  455. case 11:
  456. chip_diff_trim_value = 1058;
  457. break;
  458. case 12:
  459. chip_diff_trim_value = 1063;
  460. break;
  461. case 13:
  462. chip_diff_trim_value = 1069;
  463. break;
  464. case 14:
  465. chip_diff_trim_value = 1075;
  466. break;
  467. case 15:
  468. chip_diff_trim_value = 1081;
  469. break;
  470. case 31:
  471. chip_diff_trim_value = 995;
  472. break;
  473. case 30:
  474. chip_diff_trim_value = 990;
  475. break;
  476. case 29:
  477. chip_diff_trim_value = 985;
  478. break;
  479. case 28:
  480. chip_diff_trim_value = 980;
  481. break;
  482. case 27:
  483. chip_diff_trim_value = 975;
  484. break;
  485. case 26:
  486. chip_diff_trim_value = 970;
  487. break;
  488. case 25:
  489. chip_diff_trim_value = 966;
  490. break;
  491. case 24:
  492. chip_diff_trim_value = 961;
  493. break;
  494. case 23:
  495. chip_diff_trim_value = 956;
  496. break;
  497. case 22:
  498. chip_diff_trim_value = 952;
  499. break;
  500. case 21:
  501. chip_diff_trim_value = 947;
  502. break;
  503. case 20:
  504. chip_diff_trim_value = 943;
  505. break;
  506. case 19:
  507. chip_diff_trim_value = 938;
  508. break;
  509. case 18:
  510. chip_diff_trim_value = 934;
  511. break;
  512. case 17:
  513. chip_diff_trim_value = 930;
  514. break;
  515. default:
  516. dprintf(CRITICAL, "[Chip_Trim] Invalid value(%d)\n", chip_diff_trim_value_4_0);
  517. break;
  518. }
  519. dprintf(CRITICAL, "[Chip_Trim] chip_diff_trim_value=%d\n", chip_diff_trim_value);
  520. }
  521. static kal_uint32 fg_get_data_ready_status(void)
  522. {
  523. kal_uint32 ret=0;
  524. kal_uint32 temp_val=0;
  525. ret=pmic_read_interface(MT6353_FGADC_CON0, &temp_val, 0xFFFF, 0x0);
  526. dprintf(CRITICAL, "[fg_get_data_ready_status] Reg[0x%x]=0x%x\r\n", MT6353_FGADC_CON0, temp_val);
  527. temp_val = (temp_val & (PMIC_FG_LATCHDATA_ST_MASK << PMIC_FG_LATCHDATA_ST_SHIFT)) >> PMIC_FG_LATCHDATA_ST_SHIFT;
  528. return temp_val;
  529. }
  530. kal_int32 use_chip_trim_value(kal_int32 not_trim_val)
  531. {
  532. kal_int32 ret_val=0;
  533. ret_val=((not_trim_val*chip_diff_trim_value)/1000);
  534. dprintf(CRITICAL, "[use_chip_trim_value] %d -> %d\n", not_trim_val, ret_val);
  535. return ret_val;
  536. }
  537. void fgauge_read_current(void *data)
  538. {
  539. kal_uint16 uvalue16 = 0;
  540. kal_int32 dvalue = 0;
  541. int m = 0;
  542. uint64_t Temp_Value = 0;
  543. kal_int32 Current_Compensate_Value=0;
  544. kal_uint32 ret = 0;
  545. // HW Init
  546. //(1) i2c_write (0x60, 0xC8, 0x01); // Enable VA2
  547. //(2) i2c_write (0x61, 0x15, 0x00); // Enable FGADC clock for digital
  548. //(3) i2c_write (0x61, 0x69, 0x28); // Set current mode, auto-calibration mode and 32KHz clock source
  549. //(4) i2c_write (0x61, 0x69, 0x29); // Enable FGADC
  550. //Read HW Raw Data
  551. //(1) Set READ command
  552. ret=pmic_config_interface(MT6353_FGADC_CON0, 0x0200, 0xFF00, 0x0);
  553. //(2) Keep i2c read when status = 1 (0x06)
  554. m=0;
  555. while ( fg_get_data_ready_status() == 0 ) {
  556. m++;
  557. if (m>1000) {
  558. dprintf(CRITICAL, "[fgauge_read_current] fg_get_data_ready_status timeout 1 !\r\n");
  559. break;
  560. }
  561. }
  562. //(3) Read FG_CURRENT_OUT[15:08]
  563. //(4) Read FG_CURRENT_OUT[07:00]
  564. uvalue16 = pmic_get_register_value(PMIC_FG_CURRENT_OUT); //mt6325_upmu_get_fg_current_out();
  565. dprintf(CRITICAL, "[fgauge_read_current] : FG_CURRENT = %x\r\n", uvalue16);
  566. //(5) (Read other data)
  567. //(6) Clear status to 0
  568. ret=pmic_config_interface(MT6353_FGADC_CON0, 0x0800, 0xFF00, 0x0);
  569. //(7) Keep i2c read when status = 0 (0x08)
  570. //while ( fg_get_sw_clear_status() != 0 )
  571. m=0;
  572. while ( fg_get_data_ready_status() != 0 ) {
  573. m++;
  574. if (m>1000) {
  575. dprintf(CRITICAL, "[fgauge_read_current] fg_get_data_ready_status timeout 2 !\r\n");
  576. break;
  577. }
  578. }
  579. //(8) Recover original settings
  580. ret=pmic_config_interface(MT6353_FGADC_CON0, 0x0000, 0xFF00, 0x0);
  581. //calculate the real world data
  582. dvalue = (kal_uint32) uvalue16;
  583. if ( dvalue == 0 ) {
  584. Temp_Value = (uint64_t) dvalue;
  585. g_fg_is_charging = KAL_FALSE;
  586. } else if ( dvalue > 32767 ) { // > 0x8000
  587. Temp_Value = (uint64_t)(dvalue - 65535);
  588. Temp_Value = Temp_Value - (Temp_Value*2);
  589. g_fg_is_charging = KAL_FALSE;
  590. } else {
  591. Temp_Value = (uint64_t) dvalue;
  592. g_fg_is_charging = KAL_TRUE;
  593. }
  594. Temp_Value = Temp_Value * UNIT_FGCURRENT;
  595. //do_div(Temp_Value, 100000);
  596. Temp_Value=Temp_Value/100000;
  597. dvalue = (kal_uint32)Temp_Value;
  598. if ( g_fg_is_charging == KAL_TRUE ) {
  599. dprintf(CRITICAL, "[fgauge_read_current] current(charging) = %d mA\r\n", dvalue);
  600. } else {
  601. dprintf(CRITICAL, "[fgauge_read_current] current(discharging) = %d mA\r\n", dvalue);
  602. }
  603. // Auto adjust value
  604. if (R_FG_VALUE != 20) {
  605. dprintf(CRITICAL, "[fgauge_read_current] Auto adjust value due to the Rfg is %d\n Ori current=%d, ", R_FG_VALUE, dvalue);
  606. dvalue = (dvalue*20)/R_FG_VALUE;
  607. dprintf(CRITICAL, "[fgauge_read_current] new current=%d\n", dvalue);
  608. }
  609. // K current
  610. if (R_FG_BOARD_SLOPE != R_FG_BOARD_BASE) {
  611. dvalue = ( (dvalue*R_FG_BOARD_BASE) + (R_FG_BOARD_SLOPE/2) ) / R_FG_BOARD_SLOPE;
  612. }
  613. // current compensate
  614. if (g_fg_is_charging == KAL_TRUE) {
  615. dvalue = dvalue + Current_Compensate_Value;
  616. } else {
  617. dvalue = dvalue - Current_Compensate_Value;
  618. }
  619. dprintf(CRITICAL, "[fgauge_read_current] ori current=%d\n", dvalue);
  620. dvalue = ((dvalue*CAR_TUNE_VALUE)/100);
  621. dvalue = use_chip_trim_value(dvalue);
  622. dprintf(CRITICAL, "[fgauge_read_current] final current=%d (ratio=%d)\n", dvalue, CAR_TUNE_VALUE);
  623. *(kal_int32*)(data) = dvalue;
  624. return;
  625. }
  626. void fgauge_read_IM_current(void *data)
  627. {
  628. kal_uint16 uvalue16 = 0;
  629. kal_int32 dvalue = 0;
  630. int m = 0;
  631. uint64_t Temp_Value = 0;
  632. kal_int32 Current_Compensate_Value=0;
  633. kal_uint32 ret = 0;
  634. uvalue16 = pmic_get_register_value(PMIC_FG_R_CURR);
  635. dprintf(CRITICAL, "[fgauge_read_IM_current] : FG_CURRENT = %x\r\n", uvalue16);
  636. //calculate the real world data
  637. dvalue = (kal_uint32) uvalue16;
  638. if ( dvalue == 0 ) {
  639. Temp_Value = (uint64_t) dvalue;
  640. g_fg_is_charging = KAL_FALSE;
  641. } else if ( dvalue > 32767 ) { // > 0x8000
  642. Temp_Value = (uint64_t)(dvalue - 65535);
  643. Temp_Value = Temp_Value - (Temp_Value*2);
  644. g_fg_is_charging = KAL_FALSE;
  645. } else {
  646. Temp_Value = (uint64_t) dvalue;
  647. g_fg_is_charging = KAL_TRUE;
  648. }
  649. Temp_Value = Temp_Value * UNIT_FGCURRENT;
  650. //do_div(Temp_Value, 100000);
  651. Temp_Value=Temp_Value/100000;
  652. dvalue = (kal_uint32)Temp_Value;
  653. if ( g_fg_is_charging == KAL_TRUE ) {
  654. dprintf(CRITICAL, "[fgauge_read_IM_current] current(charging) = %d mA\r\n", dvalue);
  655. } else {
  656. dprintf(CRITICAL, "[fgauge_read_IM_current] current(discharging) = %d mA\r\n", dvalue);
  657. }
  658. // Auto adjust value
  659. if (R_FG_VALUE != 20) {
  660. dprintf(CRITICAL, "[fgauge_read_IM_current] Auto adjust value due to the Rfg is %d\n Ori current=%d, ", R_FG_VALUE, dvalue);
  661. dvalue = (dvalue*20)/R_FG_VALUE;
  662. dprintf(CRITICAL, "[fgauge_read_IM_current] new current=%d\n", dvalue);
  663. }
  664. // K current
  665. if (R_FG_BOARD_SLOPE != R_FG_BOARD_BASE) {
  666. dvalue = ( (dvalue*R_FG_BOARD_BASE) + (R_FG_BOARD_SLOPE/2) ) / R_FG_BOARD_SLOPE;
  667. }
  668. // current compensate
  669. if (g_fg_is_charging == KAL_TRUE) {
  670. dvalue = dvalue + Current_Compensate_Value;
  671. } else {
  672. dvalue = dvalue - Current_Compensate_Value;
  673. }
  674. dprintf(CRITICAL, "[fgauge_read_IM_current] ori current=%d\n", dvalue);
  675. dvalue = ((dvalue*CAR_TUNE_VALUE)/100);
  676. dvalue = use_chip_trim_value(dvalue);
  677. dprintf(CRITICAL,"[fgauge_read_IM_current] final current=%d (ratio=%d)\n", dvalue, CAR_TUNE_VALUE);
  678. *(kal_int32*)(data) = dvalue;
  679. return;
  680. }
  681. void fgauge_initialization(void *data)
  682. {
  683. kal_uint32 ret=0;
  684. kal_int32 current_temp = 0;
  685. int m = 0;
  686. get_hw_chip_diff_trim_value();
  687. // 1. HW initialization
  688. //FGADC clock is 32768Hz from RTC
  689. //Enable FGADC in current mode at 32768Hz with auto-calibration
  690. //(1) Enable VA2
  691. //(2) Enable FGADC clock for digital
  692. pmic_set_register_value(PMIC_CLK_FGADC_ANA_CK_PDN,0);// mt6325_upmu_set_rg_fgadc_ana_ck_pdn(0);
  693. pmic_set_register_value(PMIC_CLK_FGADC_DIG_CK_PDN,0);// mt6325_upmu_set_rg_fgadc_dig_ck_pdn(0);
  694. //(3) Set current mode, auto-calibration mode and 32KHz clock source
  695. ret=pmic_config_interface(MT6353_FGADC_CON0, 0x0028, 0x00FF, 0x0);
  696. //(4) Enable FGADC
  697. ret=pmic_config_interface(MT6353_FGADC_CON0, 0x0029, 0x00FF, 0x0);
  698. //reset HW FG
  699. ret=pmic_config_interface(MT6353_FGADC_CON0, 0x7100, 0xFF00, 0x0);
  700. dprintf(CRITICAL,"******** [fgauge_initialization] reset HW FG!\n" );
  701. //set FG_OSR
  702. ret=pmic_config_interface(MT6353_FGADC_CON11, 0x8, 0xF, 0x0);
  703. dprintf(CRITICAL, "[fgauge_initialization] Reg[0x%x]=0x%x\n",MT6353_FGADC_CON11, upmu_get_reg_value(MT6353_FGADC_CON11));
  704. //make sure init finish
  705. m = 0;
  706. while (current_temp == 0) {
  707. fgauge_read_current(&current_temp);
  708. m++;
  709. if (m>1000) {
  710. dprintf(CRITICAL, "[fgauge_initialization] timeout!\r\n");
  711. break;
  712. }
  713. }
  714. dprintf(CRITICAL, "******** [fgauge_initialization] Done!\n" );
  715. return ;
  716. }
  717. void do_ptim(void)
  718. {
  719. kal_uint32 i;
  720. kal_uint32 vbat_reg;
  721. //PMICLOG("[do_ptim] start \n");
  722. //pmic_auxadc_lock();
  723. //pmic_set_register_value(PMIC_RG_AUXADC_RST,1);
  724. //pmic_set_register_value(PMIC_RG_AUXADC_RST,0);
  725. /*MT6353 only */
  726. pmic_set_register_value(PMIC_RG_ADCIN_VBAT_EN, 1);
  727. pmic_set_register_value(PMIC_AUXADC_SPL_NUM_LARGE, 0x0006);
  728. pmic_set_register_value(PMIC_AUXADC_IMP_AUTORPT_PRD,6);
  729. pmic_set_register_value(PMIC_CLK_AUXADC_SMPS_CK_PDN,0);
  730. pmic_set_register_value(PMIC_CLK_AUXADC_SMPS_CK_PDN_HWEN,0);
  731. pmic_set_register_value(PMIC_CLK_AUXADC_CK_PDN_HWEN,0);
  732. pmic_set_register_value(PMIC_CLK_AUXADC_CK_PDN,0);
  733. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,1);
  734. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,1);
  735. //restore to initial state
  736. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,0);
  737. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,0);
  738. //set issue interrupt
  739. //pmic_set_register_value(PMIC_RG_INT_EN_AUXADC_IMP,1);
  740. #if defined(SWCHR_POWER_PATH)
  741. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_CHSEL, 1);
  742. #else
  743. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_CHSEL, 0);
  744. #endif
  745. pmic_set_register_value(PMIC_AUXADC_IMP_AUTORPT_EN,1);
  746. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_CNT,3);
  747. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_MODE,1);
  748. // PMICLOG("[do_ptim] end %d %d \n",pmic_get_register_value(PMIC_RG_AUXADC_SMPS_CK_PDN),pmic_get_register_value(PMIC_RG_AUXADC_SMPS_CK_PDN_HWEN));
  749. while (pmic_get_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS)==0) {
  750. //PMICLOG("[do_ptim] PMIC_AUXADC_IMPEDANCE_IRQ_STATUS= %d \n",pmic_get_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS));
  751. mdelay(1);
  752. }
  753. /* MT6353 only */
  754. pmic_set_register_value(PMIC_RG_ADCIN_VBAT_EN, 0);
  755. mdelay(1);
  756. dprintf(CRITICAL, "[do_ptim] IMPEDANCE_IRQ_STATUS=%d, AUXADC_IMP=%d\n", pmic_get_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS), pmic_get_register_value(PMIC_RG_INT_STATUS_AUXADC_IMP));
  757. vbat_reg=pmic_get_register_value(PMIC_AUXADC_ADC_OUT_IMP_AVG);
  758. ptim_bat_vol=(vbat_reg*3*18000)/32768;
  759. dprintf(CRITICAL, "[do_ptim] vbat_reg=%d %d, ptim_bat_vol=%d\n", vbat_reg, pmic_get_register_value(PMIC_AUXADC_ADC_RDY_IMP), ptim_bat_vol);
  760. //disable
  761. pmic_set_register_value(PMIC_AUXADC_IMP_AUTORPT_EN,0);//typo
  762. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_MODE,0);
  763. //clear irq
  764. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,1);
  765. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,1);
  766. pmic_set_register_value(PMIC_AUXADC_CLR_IMP_CNT_STOP,0);
  767. pmic_set_register_value(PMIC_AUXADC_IMPEDANCE_IRQ_CLR,0);
  768. //PMICLOG("[do_ptim2] 0xee8=0x%x 0x2c6=0x%x\n", upmu_get_reg_value(0xee8),upmu_get_reg_value(0x2c6));
  769. //pmic_set_register_value(PMIC_RG_INT_STATUS_AUXADC_IMP,1);//write 1 to clear !
  770. //pmic_set_register_value(PMIC_RG_INT_EN_AUXADC_IMP,0);
  771. /*
  772. vbat_reg=pmic_get_register_value(PMIC_AUXADC_ADC_OUT_IMP_AVG);
  773. ptim_bat_vol=(vbat_reg*3*18000)/32768;
  774. */
  775. fgauge_read_IM_current((void *)&ptim_R_curr);
  776. }
  777. void enable_dummy_load(kal_uint32 en)
  778. {
  779. kal_uint32 reg;
  780. if (en==1) {
  781. /*1. disable isink pdn */
  782. pmic_set_register_value(PMIC_CLK_DRV_ISINK3_CK_PDN, 0);
  783. pmic_set_register_value(PMIC_CLK_DRV_ISINK2_CK_PDN, 0);
  784. pmic_set_register_value(PMIC_CLK_DRV_32K_CK_PDN, 0);
  785. /*1. disable isink pdn */
  786. pmic_set_register_value(PMIC_CLK_DRV_CHRIND_CK_PDN, 0);
  787. /* enable isink step */
  788. pmic_set_register_value(PMIC_ISINK_CH2_STEP, 0x7);
  789. pmic_set_register_value(PMIC_ISINK_CH3_STEP, 0x7);
  790. /* enable isink double */
  791. pmic_set_register_value(PMIC_RG_ISINK2_DOUBLE_EN,1);
  792. pmic_set_register_value(PMIC_RG_ISINK3_DOUBLE_EN,1);
  793. /*enable isink */
  794. pmic_set_register_value(PMIC_ISINK_CH3_BIAS_EN, 0x1);
  795. pmic_set_register_value(PMIC_ISINK_CH2_BIAS_EN, 0x1);
  796. pmic_set_register_value(PMIC_ISINK_CHOP3_EN, 0x1);
  797. pmic_set_register_value(PMIC_ISINK_CHOP2_EN, 0x1);
  798. pmic_set_register_value(PMIC_ISINK_CH3_EN, 0x1);
  799. pmic_set_register_value(PMIC_ISINK_CH2_EN, 0x1);
  800. /*PMICLOG("[enable dummy load]\n"); */
  801. } else {
  802. pmic_set_register_value(PMIC_ISINK_CH3_EN, 0);
  803. pmic_set_register_value(PMIC_ISINK_CH2_EN, 0);
  804. pmic_set_register_value(PMIC_ISINK_CHOP3_EN, 0);
  805. pmic_set_register_value(PMIC_ISINK_CHOP2_EN, 0);
  806. pmic_set_register_value(PMIC_ISINK_CH3_BIAS_EN, 0);
  807. pmic_set_register_value(PMIC_ISINK_CH2_BIAS_EN, 0);
  808. /* disable isink double */
  809. pmic_set_register_value(PMIC_RG_ISINK2_DOUBLE_EN,0);
  810. pmic_set_register_value(PMIC_RG_ISINK3_DOUBLE_EN,0);
  811. /*1. enable isink pdn */
  812. pmic_set_register_value(PMIC_CLK_DRV_ISINK3_CK_PDN, 0x1);
  813. pmic_set_register_value(PMIC_CLK_DRV_ISINK2_CK_PDN, 0x1);
  814. pmic_set_register_value(PMIC_CLK_DRV_32K_CK_PDN, 0x1);
  815. /*1. enable isink pdn */
  816. pmic_set_register_value(PMIC_CLK_DRV_CHRIND_CK_PDN, 0x1);
  817. /*PMICLOG("[disable dummy load]\n"); */
  818. }
  819. }
  820. int get_rac_val(void)
  821. {
  822. int volt_1=0;
  823. int volt_2=0;
  824. int curr_1=0;
  825. int curr_2=0;
  826. int rac_cal=0;
  827. int ret=0;
  828. kal_bool retry_state = KAL_FALSE;
  829. int retry_count=0;
  830. do {
  831. //adc and fg--------------------------------------------------------
  832. do_ptim();
  833. dprintf(CRITICAL, "[1,Trigger ADC PTIM mode] volt1=%d, curr_1=%d\n", ptim_bat_vol, ptim_R_curr);
  834. volt_1=ptim_bat_vol;
  835. curr_1=ptim_R_curr;
  836. dprintf(CRITICAL, "[2,enable dummy load]");
  837. enable_dummy_load(1);
  838. /* debug to measure bat volt & Isense */
  839. /* pmic_set_register_value(PMIC_RG_VIBR_EN, 0x1); */
  840. mdelay(1);
  841. //Wait --------------------------------------------------------------
  842. //adc and fg--------------------------------------------------------
  843. do_ptim();
  844. dprintf(CRITICAL, "[3,Trigger ADC PTIM mode again]0717 volt2=%d, curr_2=%d\n", ptim_bat_vol, ptim_R_curr);
  845. volt_2=ptim_bat_vol;
  846. curr_2=ptim_R_curr;
  847. //Disable dummy load-------------------------------------------------
  848. enable_dummy_load(0);
  849. /* debug to measure bat volt & Isense */
  850. /*pmic_set_register_value(PMIC_RG_VIBR_EN, 0); */
  851. //Calculate Rac------------------------------------------------------
  852. if ( (curr_2-curr_1) >= 700 && (curr_2-curr_1) <= 1200 && (volt_1-volt_2)>=80 ) { //40.0mA
  853. rac_cal=((volt_1-volt_2)*1000)/(curr_2-curr_1); //m-ohm
  854. if (rac_cal<0) {
  855. ret = (rac_cal-(rac_cal*2))*1;
  856. } else {
  857. ret = rac_cal*1;
  858. }
  859. } else {
  860. ret=-1;
  861. dprintf(CRITICAL, "[4,Calculate Rac] bypass due to (curr_x-curr_y) < 40mA\n");
  862. }
  863. dprintf(CRITICAL, "[5,Calculate Rac] volt_1=%d,volt_2=%d,curr_1=%d,curr_2=%d,rac_cal=%d,ret=%d,retry_count=%d\n",
  864. volt_1,volt_2,curr_1,curr_2,rac_cal,ret,retry_count);
  865. dprintf(CRITICAL, "[6,Calculate Rac] %d,%d,%d,%d,%d,%d,%d\n",
  866. volt_1,volt_2,curr_1,curr_2,rac_cal,ret,retry_count);
  867. //------------------------
  868. retry_count++;
  869. if ((retry_count < 3) && (ret == -1)) retry_state = KAL_TRUE;
  870. else retry_state = KAL_FALSE;
  871. } while (retry_state == KAL_TRUE);
  872. return ret;
  873. }
  874. void get_dlpt_imix_r(void)
  875. {
  876. int rac_val[5],rac_val_avg=0,rac_val_sum=0;
  877. int volt[5],curr[5],volt_avg=0,curr_avg=0;
  878. int imix;
  879. int i;
  880. int validcnt=0;
  881. int min=1000,max=0;
  882. for (i=0; i<5; i++) {
  883. rac_val[i]=get_rac_val();
  884. if (rac_val[i]<=min && rac_val[i]!=-1)
  885. min=rac_val[i];
  886. if (rac_val[i]>=max)
  887. max=rac_val[i];
  888. if (rac_val[i]!=-1) {
  889. rac_val_sum+=rac_val[i];
  890. validcnt++;
  891. }
  892. }
  893. if (validcnt>=4) {
  894. rac_val_sum=rac_val_sum-min-max;
  895. imix_r=rac_val_sum/(validcnt-2);
  896. } else if (validcnt!=0) {
  897. imix_r=rac_val_sum/validcnt;
  898. }
  899. dprintf(CRITICAL, "[dlpt_R] %d,%d,%d,%d,%d [%d:%d:%d]%d\n",rac_val[0],rac_val[1],rac_val[2],rac_val[3],rac_val[4],min,max,validcnt,imix_r);
  900. return;
  901. }
  902. #endif //#if defined(DLPT_FEATURE_SUPPORT)
  903. #else
  904. #include <platform/mt_typedefs.h>
  905. #include <platform/mt_reg_base.h>
  906. #include <printf.h>
  907. int imix_r=170;
  908. int get_bat_volt(int times)
  909. {
  910. int bat_vol;
  911. #if defined(SWCHR_POWER_PATH)
  912. bat_vol = get_i_sense_volt(times);
  913. #else
  914. bat_vol = get_bat_sense_volt(times);
  915. #endif
  916. return bat_vol;
  917. }
  918. void mt65xx_bat_init(void)
  919. {
  920. dprintf(CRITICAL, "[BATTERY] Skip mt65xx_bat_init !!\n\r");
  921. dprintf(CRITICAL, "[BATTERY] If you want to enable power off charging, \n\r");
  922. dprintf(CRITICAL, "[BATTERY] Please #define CFG_POWER_CHARGING!!\n\r");
  923. }
  924. #endif