mt_gpio_init.c 9.2 KB

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  1. /******************************************************************************
  2. * gpio_init.c - MT6755 GPIO Device Driver
  3. *
  4. * Copyright 2008-2009 MediaTek Co.,Ltd.
  5. *
  6. * DESCRIPTION:
  7. * default GPIO init
  8. *
  9. ******************************************************************************/
  10. #include <platform/mt_gpio.h>
  11. #if !defined(MACH_FPGA)
  12. #include <cust_power.h>
  13. #include <cust_gpio_boot.h>
  14. #endif
  15. #include <platform/mt_reg_base.h>
  16. #include <debug.h>
  17. #define GPIO_INIT_DEBUG 1
  18. /*----------------------------------------------------------------------------*/
  19. #define GPIOTAG "[GPIO] "
  20. #define GPIODBG(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  21. #define GPIOERR(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  22. #define GPIOVER(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  23. #define GPIO_WR32(addr, data) DRV_WriteReg32(addr,data)
  24. #define GPIO_RD32(addr) DRV_Reg32(addr)
  25. #define ADDR_BIT 0
  26. #define VAL_BIT 1
  27. #define MASK_BIT 2
  28. /*----------------------------------------------------------------------------*/
  29. #if defined(MACH_FPGA)
  30. void mt_gpio_set_default(void)
  31. {
  32. return;
  33. }
  34. #else
  35. #include <platform/gpio_init.h>
  36. #if defined(GPIO_INIT_DEBUG)
  37. //static GPIO_REGS saved;
  38. #endif
  39. void mt_gpio_set_default_chip(void)
  40. {
  41. #ifdef CD1_STYLE_FEATURE_PHONE_K2_RAINIER
  42. u32 idx;
  43. u32 val;
  44. u32 mask;
  45. for (idx = 0; idx < sizeof(gpio_init_value)/((sizeof(UINT32))*(MASK_BIT+1)); idx++) {
  46. mask = gpio_init_value[idx][MASK_BIT];
  47. val = GPIO_RD32(gpio_init_value[idx][ADDR_BIT]);
  48. val &= ~(mask);
  49. val |= ((gpio_init_value[idx][VAL_BIT])&mask);
  50. GPIO_WR32(gpio_init_value[idx][ADDR_BIT],val);
  51. }
  52. #else
  53. unsigned pin = 0;
  54. for (pin = 0; pin < MT_GPIO_BASE_MAX; pin++) {
  55. /* set GPIOx_MODE*/
  56. mt_set_gpio_mode(0x80000000+pin ,gpio_array[pin].mode);
  57. /* set GPIOx_DIR*/
  58. mt_set_gpio_dir(0x80000000+pin ,gpio_array[pin].dir);
  59. //GPIOVER("fwq2..........\n");
  60. /* set GPIOx_PULLEN*/
  61. mt_set_gpio_pull_enable(0x80000000+pin ,gpio_array[pin].pullen);
  62. //GPIOVER("fwq3..........\n");
  63. /* set GPIOx_PULL*/
  64. mt_set_gpio_pull_select(0x80000000+pin ,gpio_array[pin].pull);
  65. /* set GPIOx_DATAOUT*/
  66. mt_set_gpio_out(0x80000000+pin ,gpio_array[pin].dataout);
  67. //GPIOVER("fwq5..........\n");
  68. /* set GPIO0_SMT */
  69. mt_set_gpio_smt(0x80000000+pin ,gpio_array[pin].smt);
  70. //GPIOVER("smt1-init %d\n",pin);
  71. }
  72. #endif
  73. }
  74. void mt_gpio_set_driving(void)
  75. {
  76. #if 0
  77. u32 val;
  78. u32 mask;
  79. /* [MT6571] for MD BSI request */
  80. mask = 0x3000;
  81. val = GPIO_RD32(IO_CFG_T_BASE+0xF0);
  82. val &= ~(mask);
  83. val |= (0x0000 & mask);
  84. GPIO_WR32(IO_CFG_T_BASE+0xF0, val);
  85. /* [MT6571] end */
  86. /* [MT6571] for desense request (AUD IO) */
  87. mask = 0x30;
  88. val = GPIO_RD32(IO_CFG_L_BASE+0xA0);
  89. val &= ~(mask);
  90. val |= (0x00 & mask);
  91. GPIO_WR32(IO_CFG_L_BASE+0xA0, val);
  92. /* [MT6571] end */
  93. #endif
  94. }
  95. void mt_gpio_set_power(u8 mc1_power,u8 mc2_power, u8 sim1_power, u8 sim2_power)
  96. {
  97. #if CD1_STYLE_FEATURE_PHONE_K2_RAINIER
  98. u32 val;
  99. val = GPIO_RD32(GPIO_BASE+0x510);
  100. if (((val & 0x100)>>8) == 1) {
  101. GPIO_WR32(IO_CFG_L_BASE+0x48, 0x8000);
  102. }
  103. if (((val & 0x200)>>9) == 1) {
  104. GPIO_WR32(IO_CFG_L_BASE+0x48, 0x10000);
  105. }
  106. #else
  107. u32 reg=0;
  108. #if LIGHT_HSIEH
  109. //MC1
  110. if (mc1_power == GPIO_VIO28) {
  111. reg = GPIO_RD32(GPIO_BASE+0x0c28);
  112. reg |= 0xc30c000;
  113. GPIO_WR32(GPIO_BASE+0x0c28, reg);
  114. } else {
  115. reg = GPIO_RD32(GPIO_BASE+0x0c28);
  116. reg &= ~(0x3ffff<<12);
  117. GPIO_WR32(GPIO_BASE+0x0c28, reg);
  118. }
  119. //MC2
  120. if (mc2_power == GPIO_VIO28) {
  121. reg = GPIO_RD32(GPIO_BASE+0x0828);
  122. reg |= 0xc30c0;
  123. GPIO_WR32(GPIO_BASE+0x0828, reg);
  124. } else {
  125. reg = GPIO_RD32(GPIO_BASE+0x0828);
  126. reg &= ~(0x3ffff<<4);
  127. GPIO_WR32(GPIO_BASE+0x0828, reg);
  128. }
  129. #endif
  130. //sim1
  131. if (sim1_power == GPIO_VIO28) {
  132. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  133. //reg |= (0x6000);
  134. GPIO_WR32(IOCFG_0_BASE+0x0c28, reg);
  135. } else {
  136. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  137. reg &= ~(0x3f<<12);
  138. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  139. }
  140. //sim2
  141. if (sim2_power == GPIO_VIO28) {
  142. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  143. //reg |= 0x0c;
  144. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  145. } else {
  146. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  147. reg &= ~(0x3f<<6);
  148. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  149. }
  150. #endif
  151. }
  152. void mt_gpio_set_avoid_leakage(void)
  153. {
  154. #if 0
  155. #ifdef MTK_EMMC_SUPPORT
  156. GPIO_WR32(IO_CFG_B_BASE+0x58, 0x220000);
  157. #endif
  158. #endif
  159. }
  160. void mt_gpio_set_default(void)
  161. {
  162. //mt_gpio_set_avoid_leakage();
  163. mt_gpio_set_default_chip();
  164. //mt_gpio_set_driving();
  165. //mt_gpio_set_power();
  166. mutex_init(&gpio_mutex);
  167. return;
  168. }
  169. /*----------------------------------------------------------------------------*/
  170. //EXPORT_SYMBOL(mt_gpio_set_default);
  171. /*----------------------------------------------------------------------------*/
  172. #if CHECK_POINT_TEST
  173. void mt_gpio_checkpoint_save(void)
  174. {
  175. #if defined(GPIO_INIT_DEBUG)
  176. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  177. GPIO_REGS *cur = &saved;
  178. int idx;
  179. memset(cur, 0x00, sizeof(*cur));
  180. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++)
  181. cur->dir[idx].val = GPIO_RD32(&pReg->dir[idx]);
  182. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++)
  183. cur->pullen[idx].val = GPIO_RD32(&pReg->pullen[idx]);
  184. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++)
  185. cur->pullsel[idx].val =GPIO_RD32(&pReg->pullsel[idx]);
  186. /* for (idx = 0; idx < sizeof(pReg->dinv)/sizeof(pReg->dinv[0]); idx++)
  187. cur->dinv[idx].val =GPIO_RD32(&pReg->dinv[idx]);*/
  188. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++)
  189. cur->dout[idx].val = GPIO_RD32(&pReg->dout[idx]);
  190. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++)
  191. cur->mode[idx].val = GPIO_RD32(&pReg->mode[idx]);
  192. #endif
  193. }
  194. /*----------------------------------------------------------------------------*/
  195. EXPORT_SYMBOL(mt_gpio_checkpoint_save);
  196. /*----------------------------------------------------------------------------*/
  197. void mt_gpio_dump_diff(GPIO_REGS* pre, GPIO_REGS* cur)
  198. {
  199. #if defined(GPIO_INIT_DEBUG)
  200. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  201. int idx;
  202. unsigned char* p = (unsigned char*)pre;
  203. unsigned char* q = (unsigned char*)cur;
  204. GPIOVER("------ dumping difference between %p and %p ------\n", pre, cur);
  205. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++) {
  206. if (pre->dir[idx].val != cur->dir[idx].val)
  207. GPIOVER("diff: dir[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->dir[idx].val, cur->dir[idx].val);
  208. }
  209. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++) {
  210. if (pre->pullen[idx].val != cur->pullen[idx].val)
  211. GPIOVER("diff: pullen[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->pullen[idx].val, cur->pullen[idx].val);
  212. }
  213. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++) {
  214. if (pre->pullsel[idx].val != cur->pullsel[idx].val)
  215. GPIOVER("diff: pullsel[%2d]: 0x%08X <=> 0x%08X\n", idx, pre->pullsel[idx].val, cur->pullsel[idx].val);
  216. }
  217. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++) {
  218. if (pre->dout[idx].val != cur->dout[idx].val)
  219. GPIOVER("diff: dout[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->dout[idx].val, cur->dout[idx].val);
  220. }
  221. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++) {
  222. if (pre->mode[idx].val != cur->mode[idx].val)
  223. GPIOVER("diff: mode[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->mode[idx].val, cur->mode[idx].val);
  224. }
  225. for (idx = 0; idx < sizeof(*pre); idx++) {
  226. if (p[idx] != q[idx])
  227. GPIOVER("diff: raw[%2d]: 0x%02X <=> 0x%02X\n", idx, p[idx], q[idx]);
  228. }
  229. GPIOVER("memcmp(%p, %p, %d) = %d\n", p, q, sizeof(*pre), memcmp(p, q, sizeof(*pre)));
  230. GPIOVER("------ dumping difference end --------------------------------\n");
  231. #endif
  232. }
  233. /*----------------------------------------------------------------------------*/
  234. void mt_gpio_checkpoint_compare(void)
  235. {
  236. #if defined(GPIO_INIT_DEBUG)
  237. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  238. GPIO_REGS latest;
  239. GPIO_REGS *cur = &latest;
  240. int idx;
  241. memset(cur, 0x00, sizeof(*cur));
  242. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++)
  243. cur->dir[idx].val = GPIO_RD32(&pReg->dir[idx]);
  244. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++)
  245. cur->pullen[idx].val = GPIO_RD32(&pReg->pullen[idx]);
  246. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++)
  247. cur->pullsel[idx].val =GPIO_RD32(&pReg->pullsel[idx]);
  248. /* for (idx = 0; idx < sizeof(pReg->dinv)/sizeof(pReg->dinv[0]); idx++)
  249. cur->dinv[idx].val =GPIO_RD32(&pReg->dinv[idx]);*/
  250. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++)
  251. cur->dout[idx].val = GPIO_RD32(&pReg->dout[idx]);
  252. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++)
  253. cur->mode[idx].val = GPIO_RD32(&pReg->mode[idx]);
  254. //mt_gpio_dump_diff(&latest, &saved);
  255. //GPIODBG("memcmp(%p, %p, %d) = %d\n", &latest, &saved, sizeof(GPIO_REGS), memcmp(&latest, &saved, sizeof(GPIO_REGS)));
  256. if (memcmp(&latest, &saved, sizeof(GPIO_REGS))) {
  257. GPIODBG("checkpoint compare fail!!\n");
  258. GPIODBG("dump checkpoint....\n");
  259. //mt_gpio_dump(&saved);
  260. GPIODBG("\n\n");
  261. GPIODBG("dump current state\n");
  262. //mt_gpio_dump(&latest);
  263. GPIODBG("\n\n");
  264. mt_gpio_dump_diff(&saved, &latest);
  265. //WARN_ON(1);
  266. } else {
  267. GPIODBG("checkpoint compare success!!\n");
  268. }
  269. #endif
  270. }
  271. /*----------------------------------------------------------------------------*/
  272. EXPORT_SYMBOL(mt_gpio_checkpoint_compare);
  273. /*----------------------------------------------------------------------------*/
  274. #endif
  275. #endif