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mtk-lk
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upmu_common_6353.c

upmu_common_6353.c 358 KB
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
  1. /* Copyright Statement:
    2. 

  2. *
    3. 

  3. * This software/firmware and related documentation ("MediaTek Software") are
    4. 

  4. * protected under relevant copyright laws. The information contained herein
    5. 

  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
    6. 

  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
    7. 

  7. * any reproduction, modification, use or disclosure of MediaTek Software,
    8. 

  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
    9. 

  9. */
    10. 

  10. /* MediaTek Inc. (C) 2015. All rights reserved.
    11. 

  11. *
    12. 

  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
    13. 

  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
    14. 

  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
    15. 

  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
    16. 

  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
    17. 

  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
    18. 

  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
    19. 

  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
    20. 

  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
    21. 

  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
    22. 

  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
    23. 

  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
    24. 

  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
    25. 

  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
    26. 

  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
    27. 

  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
    28. 

  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
    29. 

  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
    30. 

  30. */
    31. 

  31. 

  32. #include <platform/mt_typedefs.h>
    33. 

  33. #include <platform/mt_reg_base.h>
    34. 

  34. #include <platform/mt_pmic.h>
    35. 

  35. #include <platform/mt_gpt.h>
    36. 

  36. #include <platform/pmic_wrap_init.h>
    37. 

  37. #include <printf.h>
    38. 

  38. #include <platform/upmu_hw.h>
    39. 

  39. #include <platform/upmu_common.h>
    40. 

  40. #include <platform/mt6311.h>
    41. 

  41. 

  42. const PMU_FLAG_TABLE_ENTRY pmu_flags_table[] = {
    43. 

  43. 	{PMIC_USBDL, PMIC_USBDL_ADDR, PMIC_USBDL_MASK, PMIC_USBDL_SHIFT},
    44. 

  44. 	{PMIC_VTCXO_CONFIG, PMIC_VTCXO_CONFIG_ADDR, PMIC_VTCXO_CONFIG_MASK, PMIC_VTCXO_CONFIG_SHIFT},
    45. 

  45. 	{PMIC_RG_THR_DET_DIS, PMIC_RG_THR_DET_DIS_ADDR, PMIC_RG_THR_DET_DIS_MASK, PMIC_RG_THR_DET_DIS_SHIFT},
    46. 

  46. 	{PMIC_RG_THR_TEST, PMIC_RG_THR_TEST_ADDR, PMIC_RG_THR_TEST_MASK, PMIC_RG_THR_TEST_SHIFT},
    47. 

  47. 	{PMIC_RG_STRUP_THER_DEB_RMAX, PMIC_RG_STRUP_THER_DEB_RMAX_ADDR, PMIC_RG_STRUP_THER_DEB_RMAX_MASK, PMIC_RG_STRUP_THER_DEB_RMAX_SHIFT},
    48. 

  48. 	{PMIC_RG_STRUP_THER_DEB_FMAX, PMIC_RG_STRUP_THER_DEB_FMAX_ADDR, PMIC_RG_STRUP_THER_DEB_FMAX_MASK, PMIC_RG_STRUP_THER_DEB_FMAX_SHIFT},
    49. 

  49. 	{PMIC_DDUVLO_DEB_EN, PMIC_DDUVLO_DEB_EN_ADDR, PMIC_DDUVLO_DEB_EN_MASK, PMIC_DDUVLO_DEB_EN_SHIFT},
    50. 

  50. 	{PMIC_RG_PWRBB_DEB_EN, PMIC_RG_PWRBB_DEB_EN_ADDR, PMIC_RG_PWRBB_DEB_EN_MASK, PMIC_RG_PWRBB_DEB_EN_SHIFT},
    51. 

  51. 	{PMIC_RG_STRUP_OSC_EN, PMIC_RG_STRUP_OSC_EN_ADDR, PMIC_RG_STRUP_OSC_EN_MASK, PMIC_RG_STRUP_OSC_EN_SHIFT},
    52. 

  52. 	{PMIC_RG_STRUP_OSC_EN_SEL, PMIC_RG_STRUP_OSC_EN_SEL_ADDR, PMIC_RG_STRUP_OSC_EN_SEL_MASK, PMIC_RG_STRUP_OSC_EN_SEL_SHIFT},
    53. 

  53. 	{PMIC_RG_STRUP_FT_CTRL, PMIC_RG_STRUP_FT_CTRL_ADDR, PMIC_RG_STRUP_FT_CTRL_MASK, PMIC_RG_STRUP_FT_CTRL_SHIFT},
    54. 

  54. 	{PMIC_RG_STRUP_PWRON_FORCE, PMIC_RG_STRUP_PWRON_FORCE_ADDR, PMIC_RG_STRUP_PWRON_FORCE_MASK, PMIC_RG_STRUP_PWRON_FORCE_SHIFT},
    55. 

  55. 	{PMIC_RG_BIASGEN_FORCE, PMIC_RG_BIASGEN_FORCE_ADDR, PMIC_RG_BIASGEN_FORCE_MASK, PMIC_RG_BIASGEN_FORCE_SHIFT},
    56. 

  56. 	{PMIC_RG_STRUP_PWRON, PMIC_RG_STRUP_PWRON_ADDR, PMIC_RG_STRUP_PWRON_MASK, PMIC_RG_STRUP_PWRON_SHIFT},
    57. 

  57. 	{PMIC_RG_STRUP_PWRON_SEL, PMIC_RG_STRUP_PWRON_SEL_ADDR, PMIC_RG_STRUP_PWRON_SEL_MASK, PMIC_RG_STRUP_PWRON_SEL_SHIFT},
    58. 

  58. 	{PMIC_RG_BIASGEN, PMIC_RG_BIASGEN_ADDR, PMIC_RG_BIASGEN_MASK, PMIC_RG_BIASGEN_SHIFT},
    59. 

  59. 	{PMIC_RG_BIASGEN_SEL, PMIC_RG_BIASGEN_SEL_ADDR, PMIC_RG_BIASGEN_SEL_MASK, PMIC_RG_BIASGEN_SEL_SHIFT},
    60. 

  60. 	{PMIC_RG_RTC_XOSC32_ENB, PMIC_RG_RTC_XOSC32_ENB_ADDR, PMIC_RG_RTC_XOSC32_ENB_MASK, PMIC_RG_RTC_XOSC32_ENB_SHIFT},
    61. 

  61. 	{PMIC_RG_RTC_XOSC32_ENB_SEL, PMIC_RG_RTC_XOSC32_ENB_SEL_ADDR, PMIC_RG_RTC_XOSC32_ENB_SEL_MASK, PMIC_RG_RTC_XOSC32_ENB_SEL_SHIFT},
    62. 

  62. 	{PMIC_STRUP_DIG_IO_PG_FORCE, PMIC_STRUP_DIG_IO_PG_FORCE_ADDR, PMIC_STRUP_DIG_IO_PG_FORCE_MASK, PMIC_STRUP_DIG_IO_PG_FORCE_SHIFT},
    63. 

  63. 	{PMIC_CLR_JUST_RST, PMIC_CLR_JUST_RST_ADDR, PMIC_CLR_JUST_RST_MASK, PMIC_CLR_JUST_RST_SHIFT},
    64. 

  64. 	{PMIC_UVLO_L2H_DEB_EN, PMIC_UVLO_L2H_DEB_EN_ADDR, PMIC_UVLO_L2H_DEB_EN_MASK, PMIC_UVLO_L2H_DEB_EN_SHIFT},
    65. 

  65. 	{PMIC_JUST_PWRKEY_RST, PMIC_JUST_PWRKEY_RST_ADDR, PMIC_JUST_PWRKEY_RST_MASK, PMIC_JUST_PWRKEY_RST_SHIFT},
    66. 

  66. 	{PMIC_DA_QI_OSC_EN, PMIC_DA_QI_OSC_EN_ADDR, PMIC_DA_QI_OSC_EN_MASK, PMIC_DA_QI_OSC_EN_SHIFT},
    67. 

  67. 	{PMIC_RG_STRUP_EXT_PMIC_EN, PMIC_RG_STRUP_EXT_PMIC_EN_ADDR, PMIC_RG_STRUP_EXT_PMIC_EN_MASK, PMIC_RG_STRUP_EXT_PMIC_EN_SHIFT},
    68. 

  68. 	{PMIC_RG_STRUP_EXT_PMIC_SEL, PMIC_RG_STRUP_EXT_PMIC_SEL_ADDR, PMIC_RG_STRUP_EXT_PMIC_SEL_MASK, PMIC_RG_STRUP_EXT_PMIC_SEL_SHIFT},
    69. 

  69. 	{PMIC_STRUP_CON8_RSV0, PMIC_STRUP_CON8_RSV0_ADDR, PMIC_STRUP_CON8_RSV0_MASK, PMIC_STRUP_CON8_RSV0_SHIFT},
    70. 

  70. 	{PMIC_DA_QI_EXT_PMIC_EN, PMIC_DA_QI_EXT_PMIC_EN_ADDR, PMIC_DA_QI_EXT_PMIC_EN_MASK, PMIC_DA_QI_EXT_PMIC_EN_SHIFT},
    71. 

  71. 	{PMIC_RG_STRUP_AUXADC_START_SW, PMIC_RG_STRUP_AUXADC_START_SW_ADDR, PMIC_RG_STRUP_AUXADC_START_SW_MASK, PMIC_RG_STRUP_AUXADC_START_SW_SHIFT},
    72. 

  72. 	{PMIC_RG_STRUP_AUXADC_RSTB_SW, PMIC_RG_STRUP_AUXADC_RSTB_SW_ADDR, PMIC_RG_STRUP_AUXADC_RSTB_SW_MASK, PMIC_RG_STRUP_AUXADC_RSTB_SW_SHIFT},
    73. 

  73. 	{PMIC_RG_STRUP_AUXADC_START_SEL, PMIC_RG_STRUP_AUXADC_START_SEL_ADDR, PMIC_RG_STRUP_AUXADC_START_SEL_MASK, PMIC_RG_STRUP_AUXADC_START_SEL_SHIFT},
    74. 

  74. 	{PMIC_RG_STRUP_AUXADC_RSTB_SEL, PMIC_RG_STRUP_AUXADC_RSTB_SEL_ADDR, PMIC_RG_STRUP_AUXADC_RSTB_SEL_MASK, PMIC_RG_STRUP_AUXADC_RSTB_SEL_SHIFT},
    75. 

  75. 	{PMIC_RG_STRUP_AUXADC_RPCNT_MAX, PMIC_RG_STRUP_AUXADC_RPCNT_MAX_ADDR, PMIC_RG_STRUP_AUXADC_RPCNT_MAX_MASK, PMIC_RG_STRUP_AUXADC_RPCNT_MAX_SHIFT},
    76. 

  76. 	{PMIC_STRUP_PWROFF_SEQ_EN, PMIC_STRUP_PWROFF_SEQ_EN_ADDR, PMIC_STRUP_PWROFF_SEQ_EN_MASK, PMIC_STRUP_PWROFF_SEQ_EN_SHIFT},
    77. 

  77. 	{PMIC_STRUP_PWROFF_PREOFF_EN, PMIC_STRUP_PWROFF_PREOFF_EN_ADDR, PMIC_STRUP_PWROFF_PREOFF_EN_MASK, PMIC_STRUP_PWROFF_PREOFF_EN_SHIFT},
    78. 

  78. 	{PMIC_STRUP_DIG0_RSV0, PMIC_STRUP_DIG0_RSV0_ADDR, PMIC_STRUP_DIG0_RSV0_MASK, PMIC_STRUP_DIG0_RSV0_SHIFT},
    79. 

  79. 	{PMIC_STRUP_DIG1_RSV0, PMIC_STRUP_DIG1_RSV0_ADDR, PMIC_STRUP_DIG1_RSV0_MASK, PMIC_STRUP_DIG1_RSV0_SHIFT},
    80. 

  80. 	{PMIC_RG_RSV_SWREG, PMIC_RG_RSV_SWREG_ADDR, PMIC_RG_RSV_SWREG_MASK, PMIC_RG_RSV_SWREG_SHIFT},
    81. 

  81. 	{PMIC_RG_STRUP_UVLO_U1U2_SEL, PMIC_RG_STRUP_UVLO_U1U2_SEL_ADDR, PMIC_RG_STRUP_UVLO_U1U2_SEL_MASK, PMIC_RG_STRUP_UVLO_U1U2_SEL_SHIFT},
    82. 

  82. 	{PMIC_RG_STRUP_UVLO_U1U2_SEL_SWCTRL, PMIC_RG_STRUP_UVLO_U1U2_SEL_SWCTRL_ADDR, PMIC_RG_STRUP_UVLO_U1U2_SEL_SWCTRL_MASK, PMIC_RG_STRUP_UVLO_U1U2_SEL_SWCTRL_SHIFT},
    83. 

  83. 	{PMIC_RG_STRUP_THR_CLR, PMIC_RG_STRUP_THR_CLR_ADDR, PMIC_RG_STRUP_THR_CLR_MASK, PMIC_RG_STRUP_THR_CLR_SHIFT},
    84. 

  84. 	{PMIC_RG_STRUP_LONG_PRESS_EXT_SEL, PMIC_RG_STRUP_LONG_PRESS_EXT_SEL_ADDR, PMIC_RG_STRUP_LONG_PRESS_EXT_SEL_MASK, PMIC_RG_STRUP_LONG_PRESS_EXT_SEL_SHIFT},
    85. 

  85. 	{PMIC_RG_STRUP_LONG_PRESS_EXT_TD, PMIC_RG_STRUP_LONG_PRESS_EXT_TD_ADDR, PMIC_RG_STRUP_LONG_PRESS_EXT_TD_MASK, PMIC_RG_STRUP_LONG_PRESS_EXT_TD_SHIFT},
    86. 

  86. 	{PMIC_RG_STRUP_LONG_PRESS_EXT_EN, PMIC_RG_STRUP_LONG_PRESS_EXT_EN_ADDR, PMIC_RG_STRUP_LONG_PRESS_EXT_EN_MASK, PMIC_RG_STRUP_LONG_PRESS_EXT_EN_SHIFT},
    87. 

  87. 	{PMIC_RG_STRUP_LONG_PRESS_EXT_CHR_CTRL, PMIC_RG_STRUP_LONG_PRESS_EXT_CHR_CTRL_ADDR, PMIC_RG_STRUP_LONG_PRESS_EXT_CHR_CTRL_MASK, PMIC_RG_STRUP_LONG_PRESS_EXT_CHR_CTRL_SHIFT},
    88. 

  88. 	{PMIC_RG_STRUP_LONG_PRESS_EXT_PWRKEY_CTRL, PMIC_RG_STRUP_LONG_PRESS_EXT_PWRKEY_CTRL_ADDR, PMIC_RG_STRUP_LONG_PRESS_EXT_PWRKEY_CTRL_MASK, PMIC_RG_STRUP_LONG_PRESS_EXT_PWRKEY_CTRL_SHIFT},
    89. 

  89. 	{PMIC_RG_STRUP_LONG_PRESS_EXT_PWRBB_CTRL, PMIC_RG_STRUP_LONG_PRESS_EXT_PWRBB_CTRL_ADDR, PMIC_RG_STRUP_LONG_PRESS_EXT_PWRBB_CTRL_MASK, PMIC_RG_STRUP_LONG_PRESS_EXT_PWRBB_CTRL_SHIFT},
    90. 

  90. 	{PMIC_RG_STRUP_ENVTEM, PMIC_RG_STRUP_ENVTEM_ADDR, PMIC_RG_STRUP_ENVTEM_MASK, PMIC_RG_STRUP_ENVTEM_SHIFT},
    91. 

  91. 	{PMIC_RG_STRUP_ENVTEM_CTRL, PMIC_RG_STRUP_ENVTEM_CTRL_ADDR, PMIC_RG_STRUP_ENVTEM_CTRL_MASK, PMIC_RG_STRUP_ENVTEM_CTRL_SHIFT},
    92. 

  92. 	{PMIC_RG_STRUP_PWRKEY_COUNT_RESET, PMIC_RG_STRUP_PWRKEY_COUNT_RESET_ADDR, PMIC_RG_STRUP_PWRKEY_COUNT_RESET_MASK, PMIC_RG_STRUP_PWRKEY_COUNT_RESET_SHIFT},
    93. 

  93. 	{PMIC_RG_STRUP_VCORE2_PG_H2L_EN, PMIC_RG_STRUP_VCORE2_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VCORE2_PG_H2L_EN_MASK, PMIC_RG_STRUP_VCORE2_PG_H2L_EN_SHIFT},
    94. 

  94. 	{PMIC_RG_STRUP_VMCH_PG_H2L_EN, PMIC_RG_STRUP_VMCH_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VMCH_PG_H2L_EN_MASK, PMIC_RG_STRUP_VMCH_PG_H2L_EN_SHIFT},
    95. 

  95. 	{PMIC_RG_STRUP_VMC_PG_H2L_EN, PMIC_RG_STRUP_VMC_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VMC_PG_H2L_EN_MASK, PMIC_RG_STRUP_VMC_PG_H2L_EN_SHIFT},
    96. 

  96. 	{PMIC_RG_STRUP_VUSB33_PG_H2L_EN, PMIC_RG_STRUP_VUSB33_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VUSB33_PG_H2L_EN_MASK, PMIC_RG_STRUP_VUSB33_PG_H2L_EN_SHIFT},
    97. 

  97. 	{PMIC_RG_STRUP_VSRAM_PROC_PG_H2L_EN, PMIC_RG_STRUP_VSRAM_PROC_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VSRAM_PROC_PG_H2L_EN_MASK, PMIC_RG_STRUP_VSRAM_PROC_PG_H2L_EN_SHIFT},
    98. 

  98. 	{PMIC_RG_STRUP_VPROC_PG_H2L_EN, PMIC_RG_STRUP_VPROC_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VPROC_PG_H2L_EN_MASK, PMIC_RG_STRUP_VPROC_PG_H2L_EN_SHIFT},
    99. 

  99. 	{PMIC_RG_STRUP_VDRAM_PG_H2L_EN, PMIC_RG_STRUP_VDRAM_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VDRAM_PG_H2L_EN_MASK, PMIC_RG_STRUP_VDRAM_PG_H2L_EN_SHIFT},
    100. 

  100. 	{PMIC_RG_STRUP_VAUD28_PG_H2L_EN, PMIC_RG_STRUP_VAUD28_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VAUD28_PG_H2L_EN_MASK, PMIC_RG_STRUP_VAUD28_PG_H2L_EN_SHIFT},
    101. 

  101. 	{PMIC_RG_STRUP_VEMC_PG_H2L_EN, PMIC_RG_STRUP_VEMC_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VEMC_PG_H2L_EN_MASK, PMIC_RG_STRUP_VEMC_PG_H2L_EN_SHIFT},
    102. 

  102. 	{PMIC_RG_STRUP_VS1_PG_H2L_EN, PMIC_RG_STRUP_VS1_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VS1_PG_H2L_EN_MASK, PMIC_RG_STRUP_VS1_PG_H2L_EN_SHIFT},
    103. 

  103. 	{PMIC_RG_STRUP_VCORE_PG_H2L_EN, PMIC_RG_STRUP_VCORE_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VCORE_PG_H2L_EN_MASK, PMIC_RG_STRUP_VCORE_PG_H2L_EN_SHIFT},
    104. 

  104. 	{PMIC_RG_STRUP_VAUX18_PG_H2L_EN, PMIC_RG_STRUP_VAUX18_PG_H2L_EN_ADDR, PMIC_RG_STRUP_VAUX18_PG_H2L_EN_MASK, PMIC_RG_STRUP_VAUX18_PG_H2L_EN_SHIFT},
    105. 

  105. 	{PMIC_RG_STRUP_VCORE2_PG_ENB, PMIC_RG_STRUP_VCORE2_PG_ENB_ADDR, PMIC_RG_STRUP_VCORE2_PG_ENB_MASK, PMIC_RG_STRUP_VCORE2_PG_ENB_SHIFT},
    106. 

  106. 	{PMIC_RG_STRUP_VMCH_PG_ENB, PMIC_RG_STRUP_VMCH_PG_ENB_ADDR, PMIC_RG_STRUP_VMCH_PG_ENB_MASK, PMIC_RG_STRUP_VMCH_PG_ENB_SHIFT},
    107. 

  107. 	{PMIC_RG_STRUP_VMC_PG_ENB, PMIC_RG_STRUP_VMC_PG_ENB_ADDR, PMIC_RG_STRUP_VMC_PG_ENB_MASK, PMIC_RG_STRUP_VMC_PG_ENB_SHIFT},
    108. 

  108. 	{PMIC_RG_STRUP_VXO22_PG_ENB, PMIC_RG_STRUP_VXO22_PG_ENB_ADDR, PMIC_RG_STRUP_VXO22_PG_ENB_MASK, PMIC_RG_STRUP_VXO22_PG_ENB_SHIFT},
    109. 

  109. 	{PMIC_RG_STRUP_VTCXO_PG_ENB, PMIC_RG_STRUP_VTCXO_PG_ENB_ADDR, PMIC_RG_STRUP_VTCXO_PG_ENB_MASK, PMIC_RG_STRUP_VTCXO_PG_ENB_SHIFT},
    110. 

  110. 	{PMIC_RG_STRUP_VUSB33_PG_ENB, PMIC_RG_STRUP_VUSB33_PG_ENB_ADDR, PMIC_RG_STRUP_VUSB33_PG_ENB_MASK, PMIC_RG_STRUP_VUSB33_PG_ENB_SHIFT},
    111. 

  111. 	{PMIC_RG_STRUP_VSRAM_PROC_PG_ENB, PMIC_RG_STRUP_VSRAM_PROC_PG_ENB_ADDR, PMIC_RG_STRUP_VSRAM_PROC_PG_ENB_MASK, PMIC_RG_STRUP_VSRAM_PROC_PG_ENB_SHIFT},
    112. 

  112. 	{PMIC_RG_STRUP_VPROC_PG_ENB, PMIC_RG_STRUP_VPROC_PG_ENB_ADDR, PMIC_RG_STRUP_VPROC_PG_ENB_MASK, PMIC_RG_STRUP_VPROC_PG_ENB_SHIFT},
    113. 

  113. 	{PMIC_RG_STRUP_VDRAM_PG_ENB, PMIC_RG_STRUP_VDRAM_PG_ENB_ADDR, PMIC_RG_STRUP_VDRAM_PG_ENB_MASK, PMIC_RG_STRUP_VDRAM_PG_ENB_SHIFT},
    114. 

  114. 	{PMIC_RG_STRUP_VAUD28_PG_ENB, PMIC_RG_STRUP_VAUD28_PG_ENB_ADDR, PMIC_RG_STRUP_VAUD28_PG_ENB_MASK, PMIC_RG_STRUP_VAUD28_PG_ENB_SHIFT},
    115. 

  115. 	{PMIC_RG_STRUP_VIO28_PG_ENB, PMIC_RG_STRUP_VIO28_PG_ENB_ADDR, PMIC_RG_STRUP_VIO28_PG_ENB_MASK, PMIC_RG_STRUP_VIO28_PG_ENB_SHIFT},
    116. 

  116. 	{PMIC_RG_STRUP_VEMC_PG_ENB, PMIC_RG_STRUP_VEMC_PG_ENB_ADDR, PMIC_RG_STRUP_VEMC_PG_ENB_MASK, PMIC_RG_STRUP_VEMC_PG_ENB_SHIFT},
    117. 

  117. 	{PMIC_RG_STRUP_VIO18_PG_ENB, PMIC_RG_STRUP_VIO18_PG_ENB_ADDR, PMIC_RG_STRUP_VIO18_PG_ENB_MASK, PMIC_RG_STRUP_VIO18_PG_ENB_SHIFT},
    118. 

  118. 	{PMIC_RG_STRUP_VS1_PG_ENB, PMIC_RG_STRUP_VS1_PG_ENB_ADDR, PMIC_RG_STRUP_VS1_PG_ENB_MASK, PMIC_RG_STRUP_VS1_PG_ENB_SHIFT},
    119. 

  119. 	{PMIC_RG_STRUP_VCORE_PG_ENB, PMIC_RG_STRUP_VCORE_PG_ENB_ADDR, PMIC_RG_STRUP_VCORE_PG_ENB_MASK, PMIC_RG_STRUP_VCORE_PG_ENB_SHIFT},
    120. 

  120. 	{PMIC_RG_STRUP_VAUX18_PG_ENB, PMIC_RG_STRUP_VAUX18_PG_ENB_ADDR, PMIC_RG_STRUP_VAUX18_PG_ENB_MASK, PMIC_RG_STRUP_VAUX18_PG_ENB_SHIFT},
    121. 

  121. 	{PMIC_RG_STRUP_VCORE2_OC_ENB, PMIC_RG_STRUP_VCORE2_OC_ENB_ADDR, PMIC_RG_STRUP_VCORE2_OC_ENB_MASK, PMIC_RG_STRUP_VCORE2_OC_ENB_SHIFT},
    122. 

  122. 	{PMIC_RG_STRUP_VPROC_OC_ENB, PMIC_RG_STRUP_VPROC_OC_ENB_ADDR, PMIC_RG_STRUP_VPROC_OC_ENB_MASK, PMIC_RG_STRUP_VPROC_OC_ENB_SHIFT},
    123. 

  123. 	{PMIC_RG_STRUP_VS1_OC_ENB, PMIC_RG_STRUP_VS1_OC_ENB_ADDR, PMIC_RG_STRUP_VS1_OC_ENB_MASK, PMIC_RG_STRUP_VS1_OC_ENB_SHIFT},
    124. 

  124. 	{PMIC_RG_STRUP_VCORE_OC_ENB, PMIC_RG_STRUP_VCORE_OC_ENB_ADDR, PMIC_RG_STRUP_VCORE_OC_ENB_MASK, PMIC_RG_STRUP_VCORE_OC_ENB_SHIFT},
    125. 

  125. 	{PMIC_RG_STRUP_LONG_PRESS_RESET_EXTEND, PMIC_RG_STRUP_LONG_PRESS_RESET_EXTEND_ADDR, PMIC_RG_STRUP_LONG_PRESS_RESET_EXTEND_MASK, PMIC_RG_STRUP_LONG_PRESS_RESET_EXTEND_SHIFT},
    126. 

  126. 	{PMIC_RG_THRDET_SEL, PMIC_RG_THRDET_SEL_ADDR, PMIC_RG_THRDET_SEL_MASK, PMIC_RG_THRDET_SEL_SHIFT},
    127. 

  127. 	{PMIC_RG_STRUP_THR_SEL, PMIC_RG_STRUP_THR_SEL_ADDR, PMIC_RG_STRUP_THR_SEL_MASK, PMIC_RG_STRUP_THR_SEL_SHIFT},
    128. 

  128. 	{PMIC_RG_THR_TMODE, PMIC_RG_THR_TMODE_ADDR, PMIC_RG_THR_TMODE_MASK, PMIC_RG_THR_TMODE_SHIFT},
    129. 

  129. 	{PMIC_RG_VREF_BG, PMIC_RG_VREF_BG_ADDR, PMIC_RG_VREF_BG_MASK, PMIC_RG_VREF_BG_SHIFT},
    130. 

  130. 	{PMIC_RG_STRUP_IREF_TRIM, PMIC_RG_STRUP_IREF_TRIM_ADDR, PMIC_RG_STRUP_IREF_TRIM_MASK, PMIC_RG_STRUP_IREF_TRIM_SHIFT},
    131. 

  131. 	{PMIC_RG_RST_DRVSEL, PMIC_RG_RST_DRVSEL_ADDR, PMIC_RG_RST_DRVSEL_MASK, PMIC_RG_RST_DRVSEL_SHIFT},
    132. 

  132. 	{PMIC_RG_EN_DRVSEL, PMIC_RG_EN_DRVSEL_ADDR, PMIC_RG_EN_DRVSEL_MASK, PMIC_RG_EN_DRVSEL_SHIFT},
    133. 

  133. 	{PMIC_RG_FCHR_KEYDET_EN, PMIC_RG_FCHR_KEYDET_EN_ADDR, PMIC_RG_FCHR_KEYDET_EN_MASK, PMIC_RG_FCHR_KEYDET_EN_SHIFT},
    134. 

  134. 	{PMIC_RG_FCHR_PU_EN, PMIC_RG_FCHR_PU_EN_ADDR, PMIC_RG_FCHR_PU_EN_MASK, PMIC_RG_FCHR_PU_EN_SHIFT},
    135. 

  135. 	{PMIC_RG_PMU_RSV, PMIC_RG_PMU_RSV_ADDR, PMIC_RG_PMU_RSV_MASK, PMIC_RG_PMU_RSV_SHIFT},
    136. 

  136. 	{PMIC_TYPE_C_PHY_RG_CC_RP_SEL, PMIC_TYPE_C_PHY_RG_CC_RP_SEL_ADDR, PMIC_TYPE_C_PHY_RG_CC_RP_SEL_MASK, PMIC_TYPE_C_PHY_RG_CC_RP_SEL_SHIFT},
    137. 

  137. 	{PMIC_REG_TYPE_C_PHY_RG_PD_TX_SLEW_CALEN, PMIC_REG_TYPE_C_PHY_RG_PD_TX_SLEW_CALEN_ADDR, PMIC_REG_TYPE_C_PHY_RG_PD_TX_SLEW_CALEN_MASK, PMIC_REG_TYPE_C_PHY_RG_PD_TX_SLEW_CALEN_SHIFT},
    138. 

  138. 	{PMIC_REG_TYPE_C_PHY_RG_PD_TXSLEW_I, PMIC_REG_TYPE_C_PHY_RG_PD_TXSLEW_I_ADDR, PMIC_REG_TYPE_C_PHY_RG_PD_TXSLEW_I_MASK, PMIC_REG_TYPE_C_PHY_RG_PD_TXSLEW_I_SHIFT},
    139. 

  139. 	{PMIC_REG_TYPE_C_PHY_RG_CC_MPX_SEL, PMIC_REG_TYPE_C_PHY_RG_CC_MPX_SEL_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC_MPX_SEL_MASK, PMIC_REG_TYPE_C_PHY_RG_CC_MPX_SEL_SHIFT},
    140. 

  140. 	{PMIC_REG_TYPE_C_PHY_RG_CC_RESERVE, PMIC_REG_TYPE_C_PHY_RG_CC_RESERVE_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC_RESERVE_MASK, PMIC_REG_TYPE_C_PHY_RG_CC_RESERVE_SHIFT},
    141. 

  141. 	{PMIC_REG_TYPE_C_VCMP_CC2_SW_SEL_ST_CNT_VAL, PMIC_REG_TYPE_C_VCMP_CC2_SW_SEL_ST_CNT_VAL_ADDR, PMIC_REG_TYPE_C_VCMP_CC2_SW_SEL_ST_CNT_VAL_MASK, PMIC_REG_TYPE_C_VCMP_CC2_SW_SEL_ST_CNT_VAL_SHIFT},
    142. 

  142. 	{PMIC_REG_TYPE_C_VCMP_BIAS_EN_ST_CNT_VAL, PMIC_REG_TYPE_C_VCMP_BIAS_EN_ST_CNT_VAL_ADDR, PMIC_REG_TYPE_C_VCMP_BIAS_EN_ST_CNT_VAL_MASK, PMIC_REG_TYPE_C_VCMP_BIAS_EN_ST_CNT_VAL_SHIFT},
    143. 

  143. 	{PMIC_REG_TYPE_C_VCMP_DAC_EN_ST_CNT_VAL, PMIC_REG_TYPE_C_VCMP_DAC_EN_ST_CNT_VAL_ADDR, PMIC_REG_TYPE_C_VCMP_DAC_EN_ST_CNT_VAL_MASK, PMIC_REG_TYPE_C_VCMP_DAC_EN_ST_CNT_VAL_SHIFT},
    144. 

  144. 	{PMIC_REG_TYPE_C_PORT_SUPPORT_ROLE, PMIC_REG_TYPE_C_PORT_SUPPORT_ROLE_ADDR, PMIC_REG_TYPE_C_PORT_SUPPORT_ROLE_MASK, PMIC_REG_TYPE_C_PORT_SUPPORT_ROLE_SHIFT},
    145. 

  145. 	{PMIC_REG_TYPE_C_ADC_EN, PMIC_REG_TYPE_C_ADC_EN_ADDR, PMIC_REG_TYPE_C_ADC_EN_MASK, PMIC_REG_TYPE_C_ADC_EN_SHIFT},
    146. 

  146. 	{PMIC_REG_TYPE_C_ACC_EN, PMIC_REG_TYPE_C_ACC_EN_ADDR, PMIC_REG_TYPE_C_ACC_EN_MASK, PMIC_REG_TYPE_C_ACC_EN_SHIFT},
    147. 

  147. 	{PMIC_REG_TYPE_C_AUDIO_ACC_EN, PMIC_REG_TYPE_C_AUDIO_ACC_EN_ADDR, PMIC_REG_TYPE_C_AUDIO_ACC_EN_MASK, PMIC_REG_TYPE_C_AUDIO_ACC_EN_SHIFT},
    148. 

  148. 	{PMIC_REG_TYPE_C_DEBUG_ACC_EN, PMIC_REG_TYPE_C_DEBUG_ACC_EN_ADDR, PMIC_REG_TYPE_C_DEBUG_ACC_EN_MASK, PMIC_REG_TYPE_C_DEBUG_ACC_EN_SHIFT},
    149. 

  149. 	{PMIC_REG_TYPE_C_TRY_SRC_ST_EN, PMIC_REG_TYPE_C_TRY_SRC_ST_EN_ADDR, PMIC_REG_TYPE_C_TRY_SRC_ST_EN_MASK, PMIC_REG_TYPE_C_TRY_SRC_ST_EN_SHIFT},
    150. 

  150. 	{PMIC_REG_TYPE_C_ATTACH_SRC_2_TRY_WAIT_SNK_ST_EN, PMIC_REG_TYPE_C_ATTACH_SRC_2_TRY_WAIT_SNK_ST_EN_ADDR, PMIC_REG_TYPE_C_ATTACH_SRC_2_TRY_WAIT_SNK_ST_EN_MASK, PMIC_REG_TYPE_C_ATTACH_SRC_2_TRY_WAIT_SNK_ST_EN_SHIFT},
    151. 

  151. 	{PMIC_REG_TYPE_C_PD2CC_DET_DISABLE_EN, PMIC_REG_TYPE_C_PD2CC_DET_DISABLE_EN_ADDR, PMIC_REG_TYPE_C_PD2CC_DET_DISABLE_EN_MASK, PMIC_REG_TYPE_C_PD2CC_DET_DISABLE_EN_SHIFT},
    152. 

  152. 	{PMIC_REG_TYPE_C_ATTACH_SRC_OPEN_PDDEBOUNCE_EN, PMIC_REG_TYPE_C_ATTACH_SRC_OPEN_PDDEBOUNCE_EN_ADDR, PMIC_REG_TYPE_C_ATTACH_SRC_OPEN_PDDEBOUNCE_EN_MASK, PMIC_REG_TYPE_C_ATTACH_SRC_OPEN_PDDEBOUNCE_EN_SHIFT},
    153. 

  153. 	{PMIC_REG_TYPE_C_DISABLE_ST_RD_EN, PMIC_REG_TYPE_C_DISABLE_ST_RD_EN_ADDR, PMIC_REG_TYPE_C_DISABLE_ST_RD_EN_MASK, PMIC_REG_TYPE_C_DISABLE_ST_RD_EN_SHIFT},
    154. 

  154. 	{PMIC_W1_TYPE_C_SW_ENT_DISABLE_CMD, PMIC_W1_TYPE_C_SW_ENT_DISABLE_CMD_ADDR, PMIC_W1_TYPE_C_SW_ENT_DISABLE_CMD_MASK, PMIC_W1_TYPE_C_SW_ENT_DISABLE_CMD_SHIFT},
    155. 

  155. 	{PMIC_W1_TYPE_C_SW_ENT_UNATCH_SRC_CMD, PMIC_W1_TYPE_C_SW_ENT_UNATCH_SRC_CMD_ADDR, PMIC_W1_TYPE_C_SW_ENT_UNATCH_SRC_CMD_MASK, PMIC_W1_TYPE_C_SW_ENT_UNATCH_SRC_CMD_SHIFT},
    156. 

  156. 	{PMIC_W1_TYPE_C_SW_ENT_UNATCH_SNK_CMD, PMIC_W1_TYPE_C_SW_ENT_UNATCH_SNK_CMD_ADDR, PMIC_W1_TYPE_C_SW_ENT_UNATCH_SNK_CMD_MASK, PMIC_W1_TYPE_C_SW_ENT_UNATCH_SNK_CMD_SHIFT},
    157. 

  157. 	{PMIC_W1_TYPE_C_SW_PR_SWAP_INDICATE_CMD, PMIC_W1_TYPE_C_SW_PR_SWAP_INDICATE_CMD_ADDR, PMIC_W1_TYPE_C_SW_PR_SWAP_INDICATE_CMD_MASK, PMIC_W1_TYPE_C_SW_PR_SWAP_INDICATE_CMD_SHIFT},
    158. 

  158. 	{PMIC_W1_TYPE_C_SW_VCONN_SWAP_INDICATE_CMD, PMIC_W1_TYPE_C_SW_VCONN_SWAP_INDICATE_CMD_ADDR, PMIC_W1_TYPE_C_SW_VCONN_SWAP_INDICATE_CMD_MASK, PMIC_W1_TYPE_C_SW_VCONN_SWAP_INDICATE_CMD_SHIFT},
    159. 

  159. 	{PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_DEFAULT_CMD, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_DEFAULT_CMD_ADDR, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_DEFAULT_CMD_MASK, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_DEFAULT_CMD_SHIFT},
    160. 

  160. 	{PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_15_CMD, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_15_CMD_ADDR, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_15_CMD_MASK, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_15_CMD_SHIFT},
    161. 

  161. 	{PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_30_CMD, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_30_CMD_ADDR, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_30_CMD_MASK, PMIC_W1_TYPE_C_SW_ADC_RESULT_MET_VRD_30_CMD_SHIFT},
    162. 

  162. 	{PMIC_TYPE_C_SW_VBUS_PRESENT, PMIC_TYPE_C_SW_VBUS_PRESENT_ADDR, PMIC_TYPE_C_SW_VBUS_PRESENT_MASK, PMIC_TYPE_C_SW_VBUS_PRESENT_SHIFT},
    163. 

  163. 	{PMIC_TYPE_C_SW_DA_DRIVE_VCONN_EN, PMIC_TYPE_C_SW_DA_DRIVE_VCONN_EN_ADDR, PMIC_TYPE_C_SW_DA_DRIVE_VCONN_EN_MASK, PMIC_TYPE_C_SW_DA_DRIVE_VCONN_EN_SHIFT},
    164. 

  164. 	{PMIC_TYPE_C_SW_VBUS_DET_DIS, PMIC_TYPE_C_SW_VBUS_DET_DIS_ADDR, PMIC_TYPE_C_SW_VBUS_DET_DIS_MASK, PMIC_TYPE_C_SW_VBUS_DET_DIS_SHIFT},
    165. 

  165. 	{PMIC_TYPE_C_SW_CC_DET_DIS, PMIC_TYPE_C_SW_CC_DET_DIS_ADDR, PMIC_TYPE_C_SW_CC_DET_DIS_MASK, PMIC_TYPE_C_SW_CC_DET_DIS_SHIFT},
    166. 

  166. 	{PMIC_TYPE_C_SW_PD_EN, PMIC_TYPE_C_SW_PD_EN_ADDR, PMIC_TYPE_C_SW_PD_EN_MASK, PMIC_TYPE_C_SW_PD_EN_SHIFT},
    167. 

  167. 	{PMIC_W1_TYPE_C_SW_ENT_SNK_PWR_REDETECT_CMD, PMIC_W1_TYPE_C_SW_ENT_SNK_PWR_REDETECT_CMD_ADDR, PMIC_W1_TYPE_C_SW_ENT_SNK_PWR_REDETECT_CMD_MASK, PMIC_W1_TYPE_C_SW_ENT_SNK_PWR_REDETECT_CMD_SHIFT},
    168. 

  168. 	{PMIC_REG_TYPE_C_CC_VOL_PERIODIC_MEAS_VAL, PMIC_REG_TYPE_C_CC_VOL_PERIODIC_MEAS_VAL_ADDR, PMIC_REG_TYPE_C_CC_VOL_PERIODIC_MEAS_VAL_MASK, PMIC_REG_TYPE_C_CC_VOL_PERIODIC_MEAS_VAL_SHIFT},
    169. 

  169. 	{PMIC_REG_TYPE_C_CC_VOL_CC_DEBOUNCE_CNT_VAL, PMIC_REG_TYPE_C_CC_VOL_CC_DEBOUNCE_CNT_VAL_ADDR, PMIC_REG_TYPE_C_CC_VOL_CC_DEBOUNCE_CNT_VAL_MASK, PMIC_REG_TYPE_C_CC_VOL_CC_DEBOUNCE_CNT_VAL_SHIFT},
    170. 

  170. 	{PMIC_REG_TYPE_C_CC_VOL_PD_DEBOUNCE_CNT_VAL, PMIC_REG_TYPE_C_CC_VOL_PD_DEBOUNCE_CNT_VAL_ADDR, PMIC_REG_TYPE_C_CC_VOL_PD_DEBOUNCE_CNT_VAL_MASK, PMIC_REG_TYPE_C_CC_VOL_PD_DEBOUNCE_CNT_VAL_SHIFT},
    171. 

  171. 	{PMIC_REG_TYPE_C_DRP_SRC_CNT_VAL_0, PMIC_REG_TYPE_C_DRP_SRC_CNT_VAL_0_ADDR, PMIC_REG_TYPE_C_DRP_SRC_CNT_VAL_0_MASK, PMIC_REG_TYPE_C_DRP_SRC_CNT_VAL_0_SHIFT},
    172. 

  172. 	{PMIC_REG_TYPE_C_DRP_SNK_CNT_VAL_0, PMIC_REG_TYPE_C_DRP_SNK_CNT_VAL_0_ADDR, PMIC_REG_TYPE_C_DRP_SNK_CNT_VAL_0_MASK, PMIC_REG_TYPE_C_DRP_SNK_CNT_VAL_0_SHIFT},
    173. 

  173. 	{PMIC_REG_TYPE_C_DRP_TRY_CNT_VAL_0, PMIC_REG_TYPE_C_DRP_TRY_CNT_VAL_0_ADDR, PMIC_REG_TYPE_C_DRP_TRY_CNT_VAL_0_MASK, PMIC_REG_TYPE_C_DRP_TRY_CNT_VAL_0_SHIFT},
    174. 

  174. 	{PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_0, PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_0_ADDR, PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_0_MASK, PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_0_SHIFT},
    175. 

  175. 	{PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_1, PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_1_ADDR, PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_1_MASK, PMIC_REG_TYPE_C_DRP_TRY_WAIT_CNT_VAL_1_SHIFT},
    176. 

  176. 	{PMIC_REG_TYPE_C_CC_SRC_VOPEN_DEFAULT_DAC_VAL, PMIC_REG_TYPE_C_CC_SRC_VOPEN_DEFAULT_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SRC_VOPEN_DEFAULT_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SRC_VOPEN_DEFAULT_DAC_VAL_SHIFT},
    177. 

  177. 	{PMIC_REG_TYPE_C_CC_SRC_VRD_DEFAULT_DAC_VAL, PMIC_REG_TYPE_C_CC_SRC_VRD_DEFAULT_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SRC_VRD_DEFAULT_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SRC_VRD_DEFAULT_DAC_VAL_SHIFT},
    178. 

  178. 	{PMIC_REG_TYPE_C_CC_SRC_VOPEN_15_DAC_VAL, PMIC_REG_TYPE_C_CC_SRC_VOPEN_15_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SRC_VOPEN_15_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SRC_VOPEN_15_DAC_VAL_SHIFT},
    179. 

  179. 	{PMIC_REG_TYPE_C_CC_SRC_VRD_15_DAC_VAL, PMIC_REG_TYPE_C_CC_SRC_VRD_15_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SRC_VRD_15_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SRC_VRD_15_DAC_VAL_SHIFT},
    180. 

  180. 	{PMIC_REG_TYPE_C_CC_SRC_VOPEN_30_DAC_VAL, PMIC_REG_TYPE_C_CC_SRC_VOPEN_30_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SRC_VOPEN_30_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SRC_VOPEN_30_DAC_VAL_SHIFT},
    181. 

  181. 	{PMIC_REG_TYPE_C_CC_SRC_VRD_30_DAC_VAL, PMIC_REG_TYPE_C_CC_SRC_VRD_30_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SRC_VRD_30_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SRC_VRD_30_DAC_VAL_SHIFT},
    182. 

  182. 	{PMIC_REG_TYPE_C_CC_SNK_VRP30_DAC_VAL, PMIC_REG_TYPE_C_CC_SNK_VRP30_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SNK_VRP30_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SNK_VRP30_DAC_VAL_SHIFT},
    183. 

  183. 	{PMIC_REG_TYPE_C_CC_SNK_VRP15_DAC_VAL, PMIC_REG_TYPE_C_CC_SNK_VRP15_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SNK_VRP15_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SNK_VRP15_DAC_VAL_SHIFT},
    184. 

  184. 	{PMIC_REG_TYPE_C_CC_SNK_VRPUSB_DAC_VAL, PMIC_REG_TYPE_C_CC_SNK_VRPUSB_DAC_VAL_ADDR, PMIC_REG_TYPE_C_CC_SNK_VRPUSB_DAC_VAL_MASK, PMIC_REG_TYPE_C_CC_SNK_VRPUSB_DAC_VAL_SHIFT},
    185. 

  185. 	{PMIC_REG_TYPE_C_CC_ENT_ATTACH_SRC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_ATTACH_SRC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_ATTACH_SRC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_ATTACH_SRC_INTR_EN_SHIFT},
    186. 

  186. 	{PMIC_REG_TYPE_C_CC_ENT_ATTACH_SNK_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_ATTACH_SNK_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_ATTACH_SNK_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_ATTACH_SNK_INTR_EN_SHIFT},
    187. 

  187. 	{PMIC_REG_TYPE_C_CC_ENT_AUDIO_ACC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_AUDIO_ACC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_AUDIO_ACC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_AUDIO_ACC_INTR_EN_SHIFT},
    188. 

  188. 	{PMIC_REG_TYPE_C_CC_ENT_DBG_ACC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_DBG_ACC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_DBG_ACC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_DBG_ACC_INTR_EN_SHIFT},
    189. 

  189. 	{PMIC_REG_TYPE_C_CC_ENT_DISABLE_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_DISABLE_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_DISABLE_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_DISABLE_INTR_EN_SHIFT},
    190. 

  190. 	{PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_EN_SHIFT},
    191. 

  191. 	{PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_EN_SHIFT},
    192. 

  192. 	{PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_EN_SHIFT},
    193. 

  193. 	{PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_EN_SHIFT},
    194. 

  194. 	{PMIC_REG_TYPE_C_CC_ENT_TRY_SRC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_TRY_SRC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_TRY_SRC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_TRY_SRC_INTR_EN_SHIFT},
    195. 

  195. 	{PMIC_REG_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_EN_SHIFT},
    196. 

  196. 	{PMIC_REG_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_EN_SHIFT},
    197. 

  197. 	{PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_EN_SHIFT},
    198. 

  198. 	{PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_EN_SHIFT},
    199. 

  199. 	{PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_EN_SHIFT},
    200. 

  200. 	{PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_15_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_15_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_15_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_15_INTR_EN_SHIFT},
    201. 

  201. 	{PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_30_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_30_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_30_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_30_INTR_EN_SHIFT},
    202. 

  202. 	{PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_EN, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_EN_ADDR, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_EN_MASK, PMIC_REG_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_EN_SHIFT},
    203. 

  203. 	{PMIC_TYPE_C_CC_ENT_ATTACH_SRC_INTR, PMIC_TYPE_C_CC_ENT_ATTACH_SRC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_ATTACH_SRC_INTR_MASK, PMIC_TYPE_C_CC_ENT_ATTACH_SRC_INTR_SHIFT},
    204. 

  204. 	{PMIC_TYPE_C_CC_ENT_ATTACH_SNK_INTR, PMIC_TYPE_C_CC_ENT_ATTACH_SNK_INTR_ADDR, PMIC_TYPE_C_CC_ENT_ATTACH_SNK_INTR_MASK, PMIC_TYPE_C_CC_ENT_ATTACH_SNK_INTR_SHIFT},
    205. 

  205. 	{PMIC_TYPE_C_CC_ENT_AUDIO_ACC_INTR, PMIC_TYPE_C_CC_ENT_AUDIO_ACC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_AUDIO_ACC_INTR_MASK, PMIC_TYPE_C_CC_ENT_AUDIO_ACC_INTR_SHIFT},
    206. 

  206. 	{PMIC_TYPE_C_CC_ENT_DBG_ACC_INTR, PMIC_TYPE_C_CC_ENT_DBG_ACC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_DBG_ACC_INTR_MASK, PMIC_TYPE_C_CC_ENT_DBG_ACC_INTR_SHIFT},
    207. 

  207. 	{PMIC_TYPE_C_CC_ENT_DISABLE_INTR, PMIC_TYPE_C_CC_ENT_DISABLE_INTR_ADDR, PMIC_TYPE_C_CC_ENT_DISABLE_INTR_MASK, PMIC_TYPE_C_CC_ENT_DISABLE_INTR_SHIFT},
    208. 

  208. 	{PMIC_TYPE_C_CC_ENT_UNATTACH_SRC_INTR, PMIC_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_MASK, PMIC_TYPE_C_CC_ENT_UNATTACH_SRC_INTR_SHIFT},
    209. 

  209. 	{PMIC_TYPE_C_CC_ENT_UNATTACH_SNK_INTR, PMIC_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_ADDR, PMIC_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_MASK, PMIC_TYPE_C_CC_ENT_UNATTACH_SNK_INTR_SHIFT},
    210. 

  210. 	{PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_MASK, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SRC_INTR_SHIFT},
    211. 

  211. 	{PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_ADDR, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_MASK, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_SNK_INTR_SHIFT},
    212. 

  212. 	{PMIC_TYPE_C_CC_ENT_TRY_SRC_INTR, PMIC_TYPE_C_CC_ENT_TRY_SRC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_TRY_SRC_INTR_MASK, PMIC_TYPE_C_CC_ENT_TRY_SRC_INTR_SHIFT},
    213. 

  213. 	{PMIC_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR, PMIC_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_ADDR, PMIC_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_MASK, PMIC_TYPE_C_CC_ENT_TRY_WAIT_SNK_INTR_SHIFT},
    214. 

  214. 	{PMIC_TYPE_C_CC_ENT_UNATTACH_ACC_INTR, PMIC_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_MASK, PMIC_TYPE_C_CC_ENT_UNATTACH_ACC_INTR_SHIFT},
    215. 

  215. 	{PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_ADDR, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_MASK, PMIC_TYPE_C_CC_ENT_ATTACH_WAIT_ACC_INTR_SHIFT},
    216. 

  216. 	{PMIC_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR, PMIC_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_ADDR, PMIC_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_MASK, PMIC_TYPE_C_CC_ENT_SNK_PWR_IDLE_INTR_SHIFT},
    217. 

  217. 	{PMIC_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR, PMIC_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_ADDR, PMIC_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_MASK, PMIC_TYPE_C_CC_ENT_SNK_PWR_DEFAULT_INTR_SHIFT},
    218. 

  218. 	{PMIC_TYPE_C_CC_ENT_SNK_PWR_15_INTR, PMIC_TYPE_C_CC_ENT_SNK_PWR_15_INTR_ADDR, PMIC_TYPE_C_CC_ENT_SNK_PWR_15_INTR_MASK, PMIC_TYPE_C_CC_ENT_SNK_PWR_15_INTR_SHIFT},
    219. 

  219. 	{PMIC_TYPE_C_CC_ENT_SNK_PWR_30_INTR, PMIC_TYPE_C_CC_ENT_SNK_PWR_30_INTR_ADDR, PMIC_TYPE_C_CC_ENT_SNK_PWR_30_INTR_MASK, PMIC_TYPE_C_CC_ENT_SNK_PWR_30_INTR_SHIFT},
    220. 

  220. 	{PMIC_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR, PMIC_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_ADDR, PMIC_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_MASK, PMIC_TYPE_C_CC_ENT_SNK_PWR_REDETECT_INTR_SHIFT},
    221. 

  221. 	{PMIC_RO_TYPE_C_CC_ST, PMIC_RO_TYPE_C_CC_ST_ADDR, PMIC_RO_TYPE_C_CC_ST_MASK, PMIC_RO_TYPE_C_CC_ST_SHIFT},
    222. 

  222. 	{PMIC_RO_TYPE_C_ROUTED_CC, PMIC_RO_TYPE_C_ROUTED_CC_ADDR, PMIC_RO_TYPE_C_ROUTED_CC_MASK, PMIC_RO_TYPE_C_ROUTED_CC_SHIFT},
    223. 

  223. 	{PMIC_RO_TYPE_C_CC_SNK_PWR_ST, PMIC_RO_TYPE_C_CC_SNK_PWR_ST_ADDR, PMIC_RO_TYPE_C_CC_SNK_PWR_ST_MASK, PMIC_RO_TYPE_C_CC_SNK_PWR_ST_SHIFT},
    224. 

  224. 	{PMIC_RO_TYPE_C_CC_PWR_ROLE, PMIC_RO_TYPE_C_CC_PWR_ROLE_ADDR, PMIC_RO_TYPE_C_CC_PWR_ROLE_MASK, PMIC_RO_TYPE_C_CC_PWR_ROLE_SHIFT},
    225. 

  225. 	{PMIC_RO_TYPE_C_DRIVE_VCONN_CAPABLE, PMIC_RO_TYPE_C_DRIVE_VCONN_CAPABLE_ADDR, PMIC_RO_TYPE_C_DRIVE_VCONN_CAPABLE_MASK, PMIC_RO_TYPE_C_DRIVE_VCONN_CAPABLE_SHIFT},
    226. 

  226. 	{PMIC_RO_TYPE_C_AD_CC_CMP_OUT, PMIC_RO_TYPE_C_AD_CC_CMP_OUT_ADDR, PMIC_RO_TYPE_C_AD_CC_CMP_OUT_MASK, PMIC_RO_TYPE_C_AD_CC_CMP_OUT_SHIFT},
    227. 

  227. 	{PMIC_RO_AD_CC_VUSB33_RDY, PMIC_RO_AD_CC_VUSB33_RDY_ADDR, PMIC_RO_AD_CC_VUSB33_RDY_MASK, PMIC_RO_AD_CC_VUSB33_RDY_SHIFT},
    228. 

  228. 	{PMIC_REG_TYPE_C_PHY_RG_CC1_RPDE, PMIC_REG_TYPE_C_PHY_RG_CC1_RPDE_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC1_RPDE_MASK, PMIC_REG_TYPE_C_PHY_RG_CC1_RPDE_SHIFT},
    229. 

  229. 	{PMIC_REG_TYPE_C_PHY_RG_CC1_RP15, PMIC_REG_TYPE_C_PHY_RG_CC1_RP15_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC1_RP15_MASK, PMIC_REG_TYPE_C_PHY_RG_CC1_RP15_SHIFT},
    230. 

  230. 	{PMIC_REG_TYPE_C_PHY_RG_CC1_RP3, PMIC_REG_TYPE_C_PHY_RG_CC1_RP3_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC1_RP3_MASK, PMIC_REG_TYPE_C_PHY_RG_CC1_RP3_SHIFT},
    231. 

  231. 	{PMIC_REG_TYPE_C_PHY_RG_CC1_RD, PMIC_REG_TYPE_C_PHY_RG_CC1_RD_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC1_RD_MASK, PMIC_REG_TYPE_C_PHY_RG_CC1_RD_SHIFT},
    232. 

  232. 	{PMIC_REG_TYPE_C_PHY_RG_CC2_RPDE, PMIC_REG_TYPE_C_PHY_RG_CC2_RPDE_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC2_RPDE_MASK, PMIC_REG_TYPE_C_PHY_RG_CC2_RPDE_SHIFT},
    233. 

  233. 	{PMIC_REG_TYPE_C_PHY_RG_CC2_RP15, PMIC_REG_TYPE_C_PHY_RG_CC2_RP15_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC2_RP15_MASK, PMIC_REG_TYPE_C_PHY_RG_CC2_RP15_SHIFT},
    234. 

  234. 	{PMIC_REG_TYPE_C_PHY_RG_CC2_RP3, PMIC_REG_TYPE_C_PHY_RG_CC2_RP3_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC2_RP3_MASK, PMIC_REG_TYPE_C_PHY_RG_CC2_RP3_SHIFT},
    235. 

  235. 	{PMIC_REG_TYPE_C_PHY_RG_CC2_RD, PMIC_REG_TYPE_C_PHY_RG_CC2_RD_ADDR, PMIC_REG_TYPE_C_PHY_RG_CC2_RD_MASK, PMIC_REG_TYPE_C_PHY_RG_CC2_RD_SHIFT},
    236. 

  236. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC1, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC1_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC1_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC1_SHIFT},
    237. 

  237. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC2, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC2_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC2_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_RCC2_SHIFT},
    238. 

  238. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LEV_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LEV_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LEV_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LEV_EN_SHIFT},
    239. 

  239. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SW_SEL, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SW_SEL_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SW_SEL_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SW_SEL_SHIFT},
    240. 

  240. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_BIAS_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_BIAS_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_BIAS_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_BIAS_EN_SHIFT},
    241. 

  241. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LPF_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LPF_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LPF_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_LPF_EN_SHIFT},
    242. 

  242. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_ADCSW_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_ADCSW_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_ADCSW_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_ADCSW_EN_SHIFT},
    243. 

  243. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SASW_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SASW_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SASW_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SASW_EN_SHIFT},
    244. 

  244. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_EN_SHIFT},
    245. 

  245. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SACLK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SACLK_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SACLK_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_SACLK_SHIFT},
    246. 

  246. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_IN, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_IN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_IN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_IN_SHIFT},
    247. 

  247. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_CAL, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_CAL_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_CAL_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_CAL_SHIFT},
    248. 

  248. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_GAIN_CAL, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_GAIN_CAL_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_GAIN_CAL_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_EN_DA_CC_DAC_GAIN_CAL_SHIFT},
    249. 

  249. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC1_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC1_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC1_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC1_EN_SHIFT},
    250. 

  250. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC1_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC1_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC1_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC1_EN_SHIFT},
    251. 

  251. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC1_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC1_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC1_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC1_EN_SHIFT},
    252. 

  252. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC2_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC2_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC2_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RPCC2_EN_SHIFT},
    253. 

  253. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC2_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC2_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC2_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RDCC2_EN_SHIFT},
    254. 

  254. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC2_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC2_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC2_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_RACC2_EN_SHIFT},
    255. 

  255. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LEV_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LEV_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LEV_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LEV_EN_SHIFT},
    256. 

  256. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SW_SEL, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SW_SEL_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SW_SEL_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SW_SEL_SHIFT},
    257. 

  257. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_BIAS_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_BIAS_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_BIAS_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_BIAS_EN_SHIFT},
    258. 

  258. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LPF_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LPF_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LPF_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_LPF_EN_SHIFT},
    259. 

  259. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_ADCSW_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_ADCSW_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_ADCSW_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_ADCSW_EN_SHIFT},
    260. 

  260. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SASW_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SASW_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SASW_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SASW_EN_SHIFT},
    261. 

  261. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_EN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_EN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_EN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_EN_SHIFT},
    262. 

  262. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SACLK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SACLK_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SACLK_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_SACLK_SHIFT},
    263. 

  263. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_IN, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_IN_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_IN_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_IN_SHIFT},
    264. 

  264. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_CAL, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_CAL_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_CAL_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_CAL_SHIFT},
    265. 

  265. 	{PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_GAIN_CAL, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_GAIN_CAL_ADDR, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_GAIN_CAL_MASK, PMIC_REG_TYPE_C_SW_FORCE_MODE_DA_CC_DAC_GAIN_CAL_SHIFT},
    266. 

  266. 	{PMIC_TYPE_C_DAC_CAL_START, PMIC_TYPE_C_DAC_CAL_START_ADDR, PMIC_TYPE_C_DAC_CAL_START_MASK, PMIC_TYPE_C_DAC_CAL_START_SHIFT},
    267. 

  267. 	{PMIC_REG_TYPE_C_DAC_CAL_STAGE, PMIC_REG_TYPE_C_DAC_CAL_STAGE_ADDR, PMIC_REG_TYPE_C_DAC_CAL_STAGE_MASK, PMIC_REG_TYPE_C_DAC_CAL_STAGE_SHIFT},
    268. 

  268. 	{PMIC_RO_TYPE_C_DAC_OK, PMIC_RO_TYPE_C_DAC_OK_ADDR, PMIC_RO_TYPE_C_DAC_OK_MASK, PMIC_RO_TYPE_C_DAC_OK_SHIFT},
    269. 

  269. 	{PMIC_RO_TYPE_C_DAC_FAIL, PMIC_RO_TYPE_C_DAC_FAIL_ADDR, PMIC_RO_TYPE_C_DAC_FAIL_MASK, PMIC_RO_TYPE_C_DAC_FAIL_SHIFT},
    270. 

  270. 	{PMIC_RO_DA_CC_DAC_CAL, PMIC_RO_DA_CC_DAC_CAL_ADDR, PMIC_RO_DA_CC_DAC_CAL_MASK, PMIC_RO_DA_CC_DAC_CAL_SHIFT},
    271. 

  271. 	{PMIC_RO_DA_CC_DAC_GAIN_CAL, PMIC_RO_DA_CC_DAC_GAIN_CAL_ADDR, PMIC_RO_DA_CC_DAC_GAIN_CAL_MASK, PMIC_RO_DA_CC_DAC_GAIN_CAL_SHIFT},
    272. 

  272. 	{PMIC_REG_TYPE_C_DBG_PORT_SEL_0, PMIC_REG_TYPE_C_DBG_PORT_SEL_0_ADDR, PMIC_REG_TYPE_C_DBG_PORT_SEL_0_MASK, PMIC_REG_TYPE_C_DBG_PORT_SEL_0_SHIFT},
    273. 

  273. 	{PMIC_REG_TYPE_C_DBG_PORT_SEL_1, PMIC_REG_TYPE_C_DBG_PORT_SEL_1_ADDR, PMIC_REG_TYPE_C_DBG_PORT_SEL_1_MASK, PMIC_REG_TYPE_C_DBG_PORT_SEL_1_SHIFT},
    274. 

  274. 	{PMIC_REG_TYPE_C_DBG_MOD_SEL, PMIC_REG_TYPE_C_DBG_MOD_SEL_ADDR, PMIC_REG_TYPE_C_DBG_MOD_SEL_MASK, PMIC_REG_TYPE_C_DBG_MOD_SEL_SHIFT},
    275. 

  275. 	{PMIC_RO_TYPE_C_DBG_OUT_READ_0, PMIC_RO_TYPE_C_DBG_OUT_READ_0_ADDR, PMIC_RO_TYPE_C_DBG_OUT_READ_0_MASK, PMIC_RO_TYPE_C_DBG_OUT_READ_0_SHIFT},
    276. 

  276. 	{PMIC_RO_TYPE_C_DBG_OUT_READ_1, PMIC_RO_TYPE_C_DBG_OUT_READ_1_ADDR, PMIC_RO_TYPE_C_DBG_OUT_READ_1_MASK, PMIC_RO_TYPE_C_DBG_OUT_READ_1_SHIFT},
    277. 

  277. 	{PMIC_HWCID, PMIC_HWCID_ADDR, PMIC_HWCID_MASK, PMIC_HWCID_SHIFT},
    278. 

  278. 	{PMIC_SWCID, PMIC_SWCID_ADDR, PMIC_SWCID_MASK, PMIC_SWCID_SHIFT},
    279. 

  279. 	{PMIC_RG_SRCLKEN_IN0_EN, PMIC_RG_SRCLKEN_IN0_EN_ADDR, PMIC_RG_SRCLKEN_IN0_EN_MASK, PMIC_RG_SRCLKEN_IN0_EN_SHIFT},
    280. 

  280. 	{PMIC_RG_SRCLKEN_IN1_EN, PMIC_RG_SRCLKEN_IN1_EN_ADDR, PMIC_RG_SRCLKEN_IN1_EN_MASK, PMIC_RG_SRCLKEN_IN1_EN_SHIFT},
    281. 

  281. 	{PMIC_RG_OSC_SEL, PMIC_RG_OSC_SEL_ADDR, PMIC_RG_OSC_SEL_MASK, PMIC_RG_OSC_SEL_SHIFT},
    282. 

  282. 	{PMIC_RG_SRCLKEN_IN2_EN, PMIC_RG_SRCLKEN_IN2_EN_ADDR, PMIC_RG_SRCLKEN_IN2_EN_MASK, PMIC_RG_SRCLKEN_IN2_EN_SHIFT},
    283. 

  283. 	{PMIC_RG_SRCLKEN_IN0_HW_MODE, PMIC_RG_SRCLKEN_IN0_HW_MODE_ADDR, PMIC_RG_SRCLKEN_IN0_HW_MODE_MASK, PMIC_RG_SRCLKEN_IN0_HW_MODE_SHIFT},
    284. 

  284. 	{PMIC_RG_SRCLKEN_IN1_HW_MODE, PMIC_RG_SRCLKEN_IN1_HW_MODE_ADDR, PMIC_RG_SRCLKEN_IN1_HW_MODE_MASK, PMIC_RG_SRCLKEN_IN1_HW_MODE_SHIFT},
    285. 

  285. 	{PMIC_RG_OSC_SEL_HW_MODE, PMIC_RG_OSC_SEL_HW_MODE_ADDR, PMIC_RG_OSC_SEL_HW_MODE_MASK, PMIC_RG_OSC_SEL_HW_MODE_SHIFT},
    286. 

  286. 	{PMIC_RG_SRCLKEN_IN_SYNC_EN, PMIC_RG_SRCLKEN_IN_SYNC_EN_ADDR, PMIC_RG_SRCLKEN_IN_SYNC_EN_MASK, PMIC_RG_SRCLKEN_IN_SYNC_EN_SHIFT},
    287. 

  287. 	{PMIC_RG_OSC_EN_AUTO_OFF, PMIC_RG_OSC_EN_AUTO_OFF_ADDR, PMIC_RG_OSC_EN_AUTO_OFF_MASK, PMIC_RG_OSC_EN_AUTO_OFF_SHIFT},
    288. 

  288. 	{PMIC_TEST_OUT, PMIC_TEST_OUT_ADDR, PMIC_TEST_OUT_MASK, PMIC_TEST_OUT_SHIFT},
    289. 

  289. 	{PMIC_RG_MON_FLAG_SEL, PMIC_RG_MON_FLAG_SEL_ADDR, PMIC_RG_MON_FLAG_SEL_MASK, PMIC_RG_MON_FLAG_SEL_SHIFT},
    290. 

  290. 	{PMIC_RG_MON_GRP_SEL, PMIC_RG_MON_GRP_SEL_ADDR, PMIC_RG_MON_GRP_SEL_MASK, PMIC_RG_MON_GRP_SEL_SHIFT},
    291. 

  291. 	{PMIC_RG_NANDTREE_MODE, PMIC_RG_NANDTREE_MODE_ADDR, PMIC_RG_NANDTREE_MODE_MASK, PMIC_RG_NANDTREE_MODE_SHIFT},
    292. 

  292. 	{PMIC_RG_TEST_AUXADC, PMIC_RG_TEST_AUXADC_ADDR, PMIC_RG_TEST_AUXADC_MASK, PMIC_RG_TEST_AUXADC_SHIFT},
    293. 

  293. 	{PMIC_RG_EFUSE_MODE, PMIC_RG_EFUSE_MODE_ADDR, PMIC_RG_EFUSE_MODE_MASK, PMIC_RG_EFUSE_MODE_SHIFT},
    294. 

  294. 	{PMIC_RG_TEST_STRUP, PMIC_RG_TEST_STRUP_ADDR, PMIC_RG_TEST_STRUP_MASK, PMIC_RG_TEST_STRUP_SHIFT},
    295. 

  295. 	{PMIC_TESTMODE_SW, PMIC_TESTMODE_SW_ADDR, PMIC_TESTMODE_SW_MASK, PMIC_TESTMODE_SW_SHIFT},
    296. 

  296. 	{PMIC_EN_STATUS_VDRAM, PMIC_EN_STATUS_VDRAM_ADDR, PMIC_EN_STATUS_VDRAM_MASK, PMIC_EN_STATUS_VDRAM_SHIFT},
    297. 

  297. 	{PMIC_EN_STATUS_VSRAM_PROC, PMIC_EN_STATUS_VSRAM_PROC_ADDR, PMIC_EN_STATUS_VSRAM_PROC_MASK, PMIC_EN_STATUS_VSRAM_PROC_SHIFT},
    298. 

  298. 	{PMIC_EN_STATUS_VAUD28, PMIC_EN_STATUS_VAUD28_ADDR, PMIC_EN_STATUS_VAUD28_MASK, PMIC_EN_STATUS_VAUD28_SHIFT},
    299. 

  299. 	{PMIC_EN_STATUS_VAUX18, PMIC_EN_STATUS_VAUX18_ADDR, PMIC_EN_STATUS_VAUX18_MASK, PMIC_EN_STATUS_VAUX18_SHIFT},
    300. 

  300. 	{PMIC_EN_STATUS_VCAMD, PMIC_EN_STATUS_VCAMD_ADDR, PMIC_EN_STATUS_VCAMD_MASK, PMIC_EN_STATUS_VCAMD_SHIFT},
    301. 

  301. 	{PMIC_EN_STATUS_VLDO28, PMIC_EN_STATUS_VLDO28_ADDR, PMIC_EN_STATUS_VLDO28_MASK, PMIC_EN_STATUS_VLDO28_SHIFT},
    302. 

  302. 	{PMIC_EN_STATUS_VCAMIO, PMIC_EN_STATUS_VCAMIO_ADDR, PMIC_EN_STATUS_VCAMIO_MASK, PMIC_EN_STATUS_VCAMIO_SHIFT},
    303. 

  303. 	{PMIC_EN_STATUS_VCAMA, PMIC_EN_STATUS_VCAMA_ADDR, PMIC_EN_STATUS_VCAMA_MASK, PMIC_EN_STATUS_VCAMA_SHIFT},
    304. 

  304. 	{PMIC_EN_STATUS_VCN18, PMIC_EN_STATUS_VCN18_ADDR, PMIC_EN_STATUS_VCN18_MASK, PMIC_EN_STATUS_VCN18_SHIFT},
    305. 

  305. 	{PMIC_EN_STATUS_VCN28, PMIC_EN_STATUS_VCN28_ADDR, PMIC_EN_STATUS_VCN28_MASK, PMIC_EN_STATUS_VCN28_SHIFT},
    306. 

  306. 	{PMIC_EN_STATUS_VCN33, PMIC_EN_STATUS_VCN33_ADDR, PMIC_EN_STATUS_VCN33_MASK, PMIC_EN_STATUS_VCN33_SHIFT},
    307. 

  307. 	{PMIC_EN_STATUS_VRF12, PMIC_EN_STATUS_VRF12_ADDR, PMIC_EN_STATUS_VRF12_MASK, PMIC_EN_STATUS_VRF12_SHIFT},
    308. 

  308. 	{PMIC_EN_STATUS_VRF18, PMIC_EN_STATUS_VRF18_ADDR, PMIC_EN_STATUS_VRF18_MASK, PMIC_EN_STATUS_VRF18_SHIFT},
    309. 

  309. 	{PMIC_EN_STATUS_VXO22, PMIC_EN_STATUS_VXO22_ADDR, PMIC_EN_STATUS_VXO22_MASK, PMIC_EN_STATUS_VXO22_SHIFT},
    310. 

  310. 	{PMIC_EN_STATUS_VTCXO24, PMIC_EN_STATUS_VTCXO24_ADDR, PMIC_EN_STATUS_VTCXO24_MASK, PMIC_EN_STATUS_VTCXO24_SHIFT},
    311. 

  311. 	{PMIC_EN_STATUS_VTCXO28, PMIC_EN_STATUS_VTCXO28_ADDR, PMIC_EN_STATUS_VTCXO28_MASK, PMIC_EN_STATUS_VTCXO28_SHIFT},
    312. 

  312. 	{PMIC_EN_STATUS_VS1, PMIC_EN_STATUS_VS1_ADDR, PMIC_EN_STATUS_VS1_MASK, PMIC_EN_STATUS_VS1_SHIFT},
    313. 

  313. 	{PMIC_EN_STATUS_VCORE, PMIC_EN_STATUS_VCORE_ADDR, PMIC_EN_STATUS_VCORE_MASK, PMIC_EN_STATUS_VCORE_SHIFT},
    314. 

  314. 	{PMIC_EN_STATUS_VPROC, PMIC_EN_STATUS_VPROC_ADDR, PMIC_EN_STATUS_VPROC_MASK, PMIC_EN_STATUS_VPROC_SHIFT},
    315. 

  315. 	{PMIC_EN_STATUS_VPA, PMIC_EN_STATUS_VPA_ADDR, PMIC_EN_STATUS_VPA_MASK, PMIC_EN_STATUS_VPA_SHIFT},
    316. 

  316. 	{PMIC_EN_STATUS_VRTC, PMIC_EN_STATUS_VRTC_ADDR, PMIC_EN_STATUS_VRTC_MASK, PMIC_EN_STATUS_VRTC_SHIFT},
    317. 

  317. 	{PMIC_EN_STATUS_TREF, PMIC_EN_STATUS_TREF_ADDR, PMIC_EN_STATUS_TREF_MASK, PMIC_EN_STATUS_TREF_SHIFT},
    318. 

  318. 	{PMIC_EN_STATUS_VIBR, PMIC_EN_STATUS_VIBR_ADDR, PMIC_EN_STATUS_VIBR_MASK, PMIC_EN_STATUS_VIBR_SHIFT},
    319. 

  319. 	{PMIC_EN_STATUS_VIO18, PMIC_EN_STATUS_VIO18_ADDR, PMIC_EN_STATUS_VIO18_MASK, PMIC_EN_STATUS_VIO18_SHIFT},
    320. 

  320. 	{PMIC_EN_STATUS_VEMC33, PMIC_EN_STATUS_VEMC33_ADDR, PMIC_EN_STATUS_VEMC33_MASK, PMIC_EN_STATUS_VEMC33_SHIFT},
    321. 

  321. 	{PMIC_EN_STATUS_VUSB33, PMIC_EN_STATUS_VUSB33_ADDR, PMIC_EN_STATUS_VUSB33_MASK, PMIC_EN_STATUS_VUSB33_SHIFT},
    322. 

  322. 	{PMIC_EN_STATUS_VMCH, PMIC_EN_STATUS_VMCH_ADDR, PMIC_EN_STATUS_VMCH_MASK, PMIC_EN_STATUS_VMCH_SHIFT},
    323. 

  323. 	{PMIC_EN_STATUS_VMC, PMIC_EN_STATUS_VMC_ADDR, PMIC_EN_STATUS_VMC_MASK, PMIC_EN_STATUS_VMC_SHIFT},
    324. 

  324. 	{PMIC_EN_STATUS_VIO28, PMIC_EN_STATUS_VIO28_ADDR, PMIC_EN_STATUS_VIO28_MASK, PMIC_EN_STATUS_VIO28_SHIFT},
    325. 

  325. 	{PMIC_EN_STATUS_VSIM2, PMIC_EN_STATUS_VSIM2_ADDR, PMIC_EN_STATUS_VSIM2_MASK, PMIC_EN_STATUS_VSIM2_SHIFT},
    326. 

  326. 	{PMIC_EN_STATUS_VSIM1, PMIC_EN_STATUS_VSIM1_ADDR, PMIC_EN_STATUS_VSIM1_MASK, PMIC_EN_STATUS_VSIM1_SHIFT},
    327. 

  327. 	{PMIC_OC_STATUS_VDRAM, PMIC_OC_STATUS_VDRAM_ADDR, PMIC_OC_STATUS_VDRAM_MASK, PMIC_OC_STATUS_VDRAM_SHIFT},
    328. 

  328. 	{PMIC_OC_STATUS_VSRAM_PROC, PMIC_OC_STATUS_VSRAM_PROC_ADDR, PMIC_OC_STATUS_VSRAM_PROC_MASK, PMIC_OC_STATUS_VSRAM_PROC_SHIFT},
    329. 

  329. 	{PMIC_OC_STATUS_VAUD28, PMIC_OC_STATUS_VAUD28_ADDR, PMIC_OC_STATUS_VAUD28_MASK, PMIC_OC_STATUS_VAUD28_SHIFT},
    330. 

  330. 	{PMIC_OC_STATUS_VAUX18, PMIC_OC_STATUS_VAUX18_ADDR, PMIC_OC_STATUS_VAUX18_MASK, PMIC_OC_STATUS_VAUX18_SHIFT},
    331. 

  331. 	{PMIC_OC_STATUS_VCAMD, PMIC_OC_STATUS_VCAMD_ADDR, PMIC_OC_STATUS_VCAMD_MASK, PMIC_OC_STATUS_VCAMD_SHIFT},
    332. 

  332. 	{PMIC_OC_STATUS_VLDO28, PMIC_OC_STATUS_VLDO28_ADDR, PMIC_OC_STATUS_VLDO28_MASK, PMIC_OC_STATUS_VLDO28_SHIFT},
    333. 

  333. 	{PMIC_OC_STATUS_VCAMIO, PMIC_OC_STATUS_VCAMIO_ADDR, PMIC_OC_STATUS_VCAMIO_MASK, PMIC_OC_STATUS_VCAMIO_SHIFT},
    334. 

  334. 	{PMIC_OC_STATUS_VCAMA, PMIC_OC_STATUS_VCAMA_ADDR, PMIC_OC_STATUS_VCAMA_MASK, PMIC_OC_STATUS_VCAMA_SHIFT},
    335. 

  335. 	{PMIC_OC_STATUS_VCN18, PMIC_OC_STATUS_VCN18_ADDR, PMIC_OC_STATUS_VCN18_MASK, PMIC_OC_STATUS_VCN18_SHIFT},
    336. 

  336. 	{PMIC_OC_STATUS_VCN28, PMIC_OC_STATUS_VCN28_ADDR, PMIC_OC_STATUS_VCN28_MASK, PMIC_OC_STATUS_VCN28_SHIFT},
    337. 

  337. 	{PMIC_OC_STATUS_VCN33, PMIC_OC_STATUS_VCN33_ADDR, PMIC_OC_STATUS_VCN33_MASK, PMIC_OC_STATUS_VCN33_SHIFT},
    338. 

  338. 	{PMIC_OC_STATUS_VRF12, PMIC_OC_STATUS_VRF12_ADDR, PMIC_OC_STATUS_VRF12_MASK, PMIC_OC_STATUS_VRF12_SHIFT},
    339. 

  339. 	{PMIC_OC_STATUS_VRF18, PMIC_OC_STATUS_VRF18_ADDR, PMIC_OC_STATUS_VRF18_MASK, PMIC_OC_STATUS_VRF18_SHIFT},
    340. 

  340. 	{PMIC_OC_STATUS_VXO22, PMIC_OC_STATUS_VXO22_ADDR, PMIC_OC_STATUS_VXO22_MASK, PMIC_OC_STATUS_VXO22_SHIFT},
    341. 

  341. 	{PMIC_OC_STATUS_VTCXO24, PMIC_OC_STATUS_VTCXO24_ADDR, PMIC_OC_STATUS_VTCXO24_MASK, PMIC_OC_STATUS_VTCXO24_SHIFT},
    342. 

  342. 	{PMIC_OC_STATUS_VTCXO28, PMIC_OC_STATUS_VTCXO28_ADDR, PMIC_OC_STATUS_VTCXO28_MASK, PMIC_OC_STATUS_VTCXO28_SHIFT},
    343. 

  343. 	{PMIC_OC_STATUS_VS1, PMIC_OC_STATUS_VS1_ADDR, PMIC_OC_STATUS_VS1_MASK, PMIC_OC_STATUS_VS1_SHIFT},
    344. 

  344. 	{PMIC_OC_STATUS_VCORE, PMIC_OC_STATUS_VCORE_ADDR, PMIC_OC_STATUS_VCORE_MASK, PMIC_OC_STATUS_VCORE_SHIFT},
    345. 

  345. 	{PMIC_OC_STATUS_VPROC, PMIC_OC_STATUS_VPROC_ADDR, PMIC_OC_STATUS_VPROC_MASK, PMIC_OC_STATUS_VPROC_SHIFT},
    346. 

  346. 	{PMIC_OC_STATUS_VPA, PMIC_OC_STATUS_VPA_ADDR, PMIC_OC_STATUS_VPA_MASK, PMIC_OC_STATUS_VPA_SHIFT},
    347. 

  347. 	{PMIC_OC_STATUS_TREF, PMIC_OC_STATUS_TREF_ADDR, PMIC_OC_STATUS_TREF_MASK, PMIC_OC_STATUS_TREF_SHIFT},
    348. 

  348. 	{PMIC_OC_STATUS_VIBR, PMIC_OC_STATUS_VIBR_ADDR, PMIC_OC_STATUS_VIBR_MASK, PMIC_OC_STATUS_VIBR_SHIFT},
    349. 

  349. 	{PMIC_OC_STATUS_VIO18, PMIC_OC_STATUS_VIO18_ADDR, PMIC_OC_STATUS_VIO18_MASK, PMIC_OC_STATUS_VIO18_SHIFT},
    350. 

  350. 	{PMIC_OC_STATUS_VEMC33, PMIC_OC_STATUS_VEMC33_ADDR, PMIC_OC_STATUS_VEMC33_MASK, PMIC_OC_STATUS_VEMC33_SHIFT},
    351. 

  351. 	{PMIC_OC_STATUS_VUSB33, PMIC_OC_STATUS_VUSB33_ADDR, PMIC_OC_STATUS_VUSB33_MASK, PMIC_OC_STATUS_VUSB33_SHIFT},
    352. 

  352. 	{PMIC_OC_STATUS_VMCH, PMIC_OC_STATUS_VMCH_ADDR, PMIC_OC_STATUS_VMCH_MASK, PMIC_OC_STATUS_VMCH_SHIFT},
    353. 

  353. 	{PMIC_OC_STATUS_VMC, PMIC_OC_STATUS_VMC_ADDR, PMIC_OC_STATUS_VMC_MASK, PMIC_OC_STATUS_VMC_SHIFT},
    354. 

  354. 	{PMIC_OC_STATUS_VIO28, PMIC_OC_STATUS_VIO28_ADDR, PMIC_OC_STATUS_VIO28_MASK, PMIC_OC_STATUS_VIO28_SHIFT},
    355. 

  355. 	{PMIC_OC_STATUS_VSIM2, PMIC_OC_STATUS_VSIM2_ADDR, PMIC_OC_STATUS_VSIM2_MASK, PMIC_OC_STATUS_VSIM2_SHIFT},
    356. 

  356. 	{PMIC_OC_STATUS_VSIM1, PMIC_OC_STATUS_VSIM1_ADDR, PMIC_OC_STATUS_VSIM1_MASK, PMIC_OC_STATUS_VSIM1_SHIFT},
    357. 

  357. 	{PMIC_VCORE2_PG_DEB, PMIC_VCORE2_PG_DEB_ADDR, PMIC_VCORE2_PG_DEB_MASK, PMIC_VCORE2_PG_DEB_SHIFT},
    358. 

  358. 	{PMIC_VS1_PG_DEB, PMIC_VS1_PG_DEB_ADDR, PMIC_VS1_PG_DEB_MASK, PMIC_VS1_PG_DEB_SHIFT},
    359. 

  359. 	{PMIC_VCORE_PG_DEB, PMIC_VCORE_PG_DEB_ADDR, PMIC_VCORE_PG_DEB_MASK, PMIC_VCORE_PG_DEB_SHIFT},
    360. 

  360. 	{PMIC_VPROC_PG_DEB, PMIC_VPROC_PG_DEB_ADDR, PMIC_VPROC_PG_DEB_MASK, PMIC_VPROC_PG_DEB_SHIFT},
    361. 

  361. 	{PMIC_VIO18_PG_DEB, PMIC_VIO18_PG_DEB_ADDR, PMIC_VIO18_PG_DEB_MASK, PMIC_VIO18_PG_DEB_SHIFT},
    362. 

  362. 	{PMIC_VEMC33_PG_DEB, PMIC_VEMC33_PG_DEB_ADDR, PMIC_VEMC33_PG_DEB_MASK, PMIC_VEMC33_PG_DEB_SHIFT},
    363. 

  363. 	{PMIC_VUSB33_PG_DEB, PMIC_VUSB33_PG_DEB_ADDR, PMIC_VUSB33_PG_DEB_MASK, PMIC_VUSB33_PG_DEB_SHIFT},
    364. 

  364. 	{PMIC_VMCH_PG_DEB, PMIC_VMCH_PG_DEB_ADDR, PMIC_VMCH_PG_DEB_MASK, PMIC_VMCH_PG_DEB_SHIFT},
    365. 

  365. 	{PMIC_VMC_PG_DEB, PMIC_VMC_PG_DEB_ADDR, PMIC_VMC_PG_DEB_MASK, PMIC_VMC_PG_DEB_SHIFT},
    366. 

  366. 	{PMIC_VIO28_PG_DEB, PMIC_VIO28_PG_DEB_ADDR, PMIC_VIO28_PG_DEB_MASK, PMIC_VIO28_PG_DEB_SHIFT},
    367. 

  367. 	{PMIC_VDRAM_PG_DEB, PMIC_VDRAM_PG_DEB_ADDR, PMIC_VDRAM_PG_DEB_MASK, PMIC_VDRAM_PG_DEB_SHIFT},
    368. 

  368. 	{PMIC_VSRAM_PROC_PG_DEB, PMIC_VSRAM_PROC_PG_DEB_ADDR, PMIC_VSRAM_PROC_PG_DEB_MASK, PMIC_VSRAM_PROC_PG_DEB_SHIFT},
    369. 

  369. 	{PMIC_VAUD28_PG_DEB, PMIC_VAUD28_PG_DEB_ADDR, PMIC_VAUD28_PG_DEB_MASK, PMIC_VAUD28_PG_DEB_SHIFT},
    370. 

  370. 	{PMIC_VAUX18_PG_DEB, PMIC_VAUX18_PG_DEB_ADDR, PMIC_VAUX18_PG_DEB_MASK, PMIC_VAUX18_PG_DEB_SHIFT},
    371. 

  371. 	{PMIC_VXO22_PG_DEB, PMIC_VXO22_PG_DEB_ADDR, PMIC_VXO22_PG_DEB_MASK, PMIC_VXO22_PG_DEB_SHIFT},
    372. 

  372. 	{PMIC_VTCXO24_PG_DEB, PMIC_VTCXO24_PG_DEB_ADDR, PMIC_VTCXO24_PG_DEB_MASK, PMIC_VTCXO24_PG_DEB_SHIFT},
    373. 

  373. 	{PMIC_STRUP_VMCH_PG_STATUS_GATED, PMIC_STRUP_VMCH_PG_STATUS_GATED_ADDR, PMIC_STRUP_VMCH_PG_STATUS_GATED_MASK, PMIC_STRUP_VMCH_PG_STATUS_GATED_SHIFT},
    374. 

  374. 	{PMIC_STRUP_VMC_PG_STATUS_GATED, PMIC_STRUP_VMC_PG_STATUS_GATED_ADDR, PMIC_STRUP_VMC_PG_STATUS_GATED_MASK, PMIC_STRUP_VMC_PG_STATUS_GATED_SHIFT},
    375. 

  375. 	{PMIC_STRUP_VXO22_PG_STATUS_GATED, PMIC_STRUP_VXO22_PG_STATUS_GATED_ADDR, PMIC_STRUP_VXO22_PG_STATUS_GATED_MASK, PMIC_STRUP_VXO22_PG_STATUS_GATED_SHIFT},
    376. 

  376. 	{PMIC_STRUP_VTCXO24_PG_STATUS_GATED, PMIC_STRUP_VTCXO24_PG_STATUS_GATED_ADDR, PMIC_STRUP_VTCXO24_PG_STATUS_GATED_MASK, PMIC_STRUP_VTCXO24_PG_STATUS_GATED_SHIFT},
    377. 

  377. 	{PMIC_STRUP_VUSB33_PG_STATUS_GATED, PMIC_STRUP_VUSB33_PG_STATUS_GATED_ADDR, PMIC_STRUP_VUSB33_PG_STATUS_GATED_MASK, PMIC_STRUP_VUSB33_PG_STATUS_GATED_SHIFT},
    378. 

  378. 	{PMIC_STRUP_VSRAM_PROC_PG_STATUS_GATED, PMIC_STRUP_VSRAM_PROC_PG_STATUS_GATED_ADDR, PMIC_STRUP_VSRAM_PROC_PG_STATUS_GATED_MASK, PMIC_STRUP_VSRAM_PROC_PG_STATUS_GATED_SHIFT},
    379. 

  379. 	{PMIC_STRUP_VPROC_PG_STATUS_GATED, PMIC_STRUP_VPROC_PG_STATUS_GATED_ADDR, PMIC_STRUP_VPROC_PG_STATUS_GATED_MASK, PMIC_STRUP_VPROC_PG_STATUS_GATED_SHIFT},
    380. 

  380. 	{PMIC_STRUP_VDRAM_PG_STATUS_GATED, PMIC_STRUP_VDRAM_PG_STATUS_GATED_ADDR, PMIC_STRUP_VDRAM_PG_STATUS_GATED_MASK, PMIC_STRUP_VDRAM_PG_STATUS_GATED_SHIFT},
    381. 

  381. 	{PMIC_STRUP_VAUD28_PG_STATUS_GATED, PMIC_STRUP_VAUD28_PG_STATUS_GATED_ADDR, PMIC_STRUP_VAUD28_PG_STATUS_GATED_MASK, PMIC_STRUP_VAUD28_PG_STATUS_GATED_SHIFT},
    382. 

  382. 	{PMIC_STRUP_VIO28_PG_STATUS_GATED, PMIC_STRUP_VIO28_PG_STATUS_GATED_ADDR, PMIC_STRUP_VIO28_PG_STATUS_GATED_MASK, PMIC_STRUP_VIO28_PG_STATUS_GATED_SHIFT},
    383. 

  383. 	{PMIC_STRUP_VEMC33_PG_STATUS_GATED, PMIC_STRUP_VEMC33_PG_STATUS_GATED_ADDR, PMIC_STRUP_VEMC33_PG_STATUS_GATED_MASK, PMIC_STRUP_VEMC33_PG_STATUS_GATED_SHIFT},
    384. 

  384. 	{PMIC_STRUP_VIO18_PG_STATUS_GATED, PMIC_STRUP_VIO18_PG_STATUS_GATED_ADDR, PMIC_STRUP_VIO18_PG_STATUS_GATED_MASK, PMIC_STRUP_VIO18_PG_STATUS_GATED_SHIFT},
    385. 

  385. 	{PMIC_STRUP_VS1_PG_STATUS_GATED, PMIC_STRUP_VS1_PG_STATUS_GATED_ADDR, PMIC_STRUP_VS1_PG_STATUS_GATED_MASK, PMIC_STRUP_VS1_PG_STATUS_GATED_SHIFT},
    386. 

  386. 	{PMIC_STRUP_VCORE_PG_STATUS_GATED, PMIC_STRUP_VCORE_PG_STATUS_GATED_ADDR, PMIC_STRUP_VCORE_PG_STATUS_GATED_MASK, PMIC_STRUP_VCORE_PG_STATUS_GATED_SHIFT},
    387. 

  387. 	{PMIC_STRUP_VAUX18_PG_STATUS_GATED, PMIC_STRUP_VAUX18_PG_STATUS_GATED_ADDR, PMIC_STRUP_VAUX18_PG_STATUS_GATED_MASK, PMIC_STRUP_VAUX18_PG_STATUS_GATED_SHIFT},
    388. 

  388. 	{PMIC_STRUP_VCORE2_PG_STATUS_GATED, PMIC_STRUP_VCORE2_PG_STATUS_GATED_ADDR, PMIC_STRUP_VCORE2_PG_STATUS_GATED_MASK, PMIC_STRUP_VCORE2_PG_STATUS_GATED_SHIFT},
    389. 

  389. 	{PMIC_PMU_THERMAL_DEB, PMIC_PMU_THERMAL_DEB_ADDR, PMIC_PMU_THERMAL_DEB_MASK, PMIC_PMU_THERMAL_DEB_SHIFT},
    390. 

  390. 	{PMIC_STRUP_THERMAL_STATUS, PMIC_STRUP_THERMAL_STATUS_ADDR, PMIC_STRUP_THERMAL_STATUS_MASK, PMIC_STRUP_THERMAL_STATUS_SHIFT},
    391. 

  391. 	{PMIC_PMU_TEST_MODE_SCAN, PMIC_PMU_TEST_MODE_SCAN_ADDR, PMIC_PMU_TEST_MODE_SCAN_MASK, PMIC_PMU_TEST_MODE_SCAN_SHIFT},
    392. 

  392. 	{PMIC_PWRKEY_DEB, PMIC_PWRKEY_DEB_ADDR, PMIC_PWRKEY_DEB_MASK, PMIC_PWRKEY_DEB_SHIFT},
    393. 

  393. 	{PMIC_HOMEKEY_DEB, PMIC_HOMEKEY_DEB_ADDR, PMIC_HOMEKEY_DEB_MASK, PMIC_HOMEKEY_DEB_SHIFT},
    394. 

  394. 	{PMIC_RTC_XTAL_DET_DONE, PMIC_RTC_XTAL_DET_DONE_ADDR, PMIC_RTC_XTAL_DET_DONE_MASK, PMIC_RTC_XTAL_DET_DONE_SHIFT},
    395. 

  395. 	{PMIC_XOSC32_ENB_DET, PMIC_XOSC32_ENB_DET_ADDR, PMIC_XOSC32_ENB_DET_MASK, PMIC_XOSC32_ENB_DET_SHIFT},
    396. 

  396. 	{PMIC_RTC_XTAL_DET_RSV, PMIC_RTC_XTAL_DET_RSV_ADDR, PMIC_RTC_XTAL_DET_RSV_MASK, PMIC_RTC_XTAL_DET_RSV_SHIFT},
    397. 

  397. 	{PMIC_RG_PMU_TDSEL, PMIC_RG_PMU_TDSEL_ADDR, PMIC_RG_PMU_TDSEL_MASK, PMIC_RG_PMU_TDSEL_SHIFT},
    398. 

  398. 	{PMIC_RG_SPI_TDSEL, PMIC_RG_SPI_TDSEL_ADDR, PMIC_RG_SPI_TDSEL_MASK, PMIC_RG_SPI_TDSEL_SHIFT},
    399. 

  399. 	{PMIC_RG_AUD_TDSEL, PMIC_RG_AUD_TDSEL_ADDR, PMIC_RG_AUD_TDSEL_MASK, PMIC_RG_AUD_TDSEL_SHIFT},
    400. 

  400. 	{PMIC_RG_E32CAL_TDSEL, PMIC_RG_E32CAL_TDSEL_ADDR, PMIC_RG_E32CAL_TDSEL_MASK, PMIC_RG_E32CAL_TDSEL_SHIFT},
    401. 

  401. 	{PMIC_RG_PMU_RDSEL, PMIC_RG_PMU_RDSEL_ADDR, PMIC_RG_PMU_RDSEL_MASK, PMIC_RG_PMU_RDSEL_SHIFT},
    402. 

  402. 	{PMIC_RG_SPI_RDSEL, PMIC_RG_SPI_RDSEL_ADDR, PMIC_RG_SPI_RDSEL_MASK, PMIC_RG_SPI_RDSEL_SHIFT},
    403. 

  403. 	{PMIC_RG_AUD_RDSEL, PMIC_RG_AUD_RDSEL_ADDR, PMIC_RG_AUD_RDSEL_MASK, PMIC_RG_AUD_RDSEL_SHIFT},
    404. 

  404. 	{PMIC_RG_E32CAL_RDSEL, PMIC_RG_E32CAL_RDSEL_ADDR, PMIC_RG_E32CAL_RDSEL_MASK, PMIC_RG_E32CAL_RDSEL_SHIFT},
    405. 

  405. 	{PMIC_RG_SMT_WDTRSTB_IN, PMIC_RG_SMT_WDTRSTB_IN_ADDR, PMIC_RG_SMT_WDTRSTB_IN_MASK, PMIC_RG_SMT_WDTRSTB_IN_SHIFT},
    406. 

  406. 	{PMIC_RG_SMT_HOMEKEY, PMIC_RG_SMT_HOMEKEY_ADDR, PMIC_RG_SMT_HOMEKEY_MASK, PMIC_RG_SMT_HOMEKEY_SHIFT},
    407. 

  407. 	{PMIC_RG_SMT_SRCLKEN_IN0, PMIC_RG_SMT_SRCLKEN_IN0_ADDR, PMIC_RG_SMT_SRCLKEN_IN0_MASK, PMIC_RG_SMT_SRCLKEN_IN0_SHIFT},
    408. 

  408. 	{PMIC_RG_SMT_SRCLKEN_IN1, PMIC_RG_SMT_SRCLKEN_IN1_ADDR, PMIC_RG_SMT_SRCLKEN_IN1_MASK, PMIC_RG_SMT_SRCLKEN_IN1_SHIFT},
    409. 

  409. 	{PMIC_RG_SMT_RTC_32K1V8_0, PMIC_RG_SMT_RTC_32K1V8_0_ADDR, PMIC_RG_SMT_RTC_32K1V8_0_MASK, PMIC_RG_SMT_RTC_32K1V8_0_SHIFT},
    410. 

  410. 	{PMIC_RG_SMT_RTC_32K1V8_1, PMIC_RG_SMT_RTC_32K1V8_1_ADDR, PMIC_RG_SMT_RTC_32K1V8_1_MASK, PMIC_RG_SMT_RTC_32K1V8_1_SHIFT},
    411. 

  411. 	{PMIC_RG_SMT_SPI_CLK, PMIC_RG_SMT_SPI_CLK_ADDR, PMIC_RG_SMT_SPI_CLK_MASK, PMIC_RG_SMT_SPI_CLK_SHIFT},
    412. 

  412. 	{PMIC_RG_SMT_SPI_CSN, PMIC_RG_SMT_SPI_CSN_ADDR, PMIC_RG_SMT_SPI_CSN_MASK, PMIC_RG_SMT_SPI_CSN_SHIFT},
    413. 

  413. 	{PMIC_RG_SMT_SPI_MOSI, PMIC_RG_SMT_SPI_MOSI_ADDR, PMIC_RG_SMT_SPI_MOSI_MASK, PMIC_RG_SMT_SPI_MOSI_SHIFT},
    414. 

  414. 	{PMIC_RG_SMT_SPI_MISO, PMIC_RG_SMT_SPI_MISO_ADDR, PMIC_RG_SMT_SPI_MISO_MASK, PMIC_RG_SMT_SPI_MISO_SHIFT},
    415. 

  415. 	{PMIC_RG_SMT_AUD_CLK, PMIC_RG_SMT_AUD_CLK_ADDR, PMIC_RG_SMT_AUD_CLK_MASK, PMIC_RG_SMT_AUD_CLK_SHIFT},
    416. 

  416. 	{PMIC_RG_SMT_AUD_DAT_MOSI, PMIC_RG_SMT_AUD_DAT_MOSI_ADDR, PMIC_RG_SMT_AUD_DAT_MOSI_MASK, PMIC_RG_SMT_AUD_DAT_MOSI_SHIFT},
    417. 

  417. 	{PMIC_RG_SMT_AUD_DAT_MISO, PMIC_RG_SMT_AUD_DAT_MISO_ADDR, PMIC_RG_SMT_AUD_DAT_MISO_MASK, PMIC_RG_SMT_AUD_DAT_MISO_SHIFT},
    418. 

  418. 	{PMIC_RG_SMT_ANC_DAT_MOSI, PMIC_RG_SMT_ANC_DAT_MOSI_ADDR, PMIC_RG_SMT_ANC_DAT_MOSI_MASK, PMIC_RG_SMT_ANC_DAT_MOSI_SHIFT},
    419. 

  419. 	{PMIC_RG_SMT_VOW_CLK_MISO, PMIC_RG_SMT_VOW_CLK_MISO_ADDR, PMIC_RG_SMT_VOW_CLK_MISO_MASK, PMIC_RG_SMT_VOW_CLK_MISO_SHIFT},
    420. 

  420. 	{PMIC_RG_SMT_ENBB, PMIC_RG_SMT_ENBB_ADDR, PMIC_RG_SMT_ENBB_MASK, PMIC_RG_SMT_ENBB_SHIFT},
    421. 

  421. 	{PMIC_RG_SMT_XOSC_EN, PMIC_RG_SMT_XOSC_EN_ADDR, PMIC_RG_SMT_XOSC_EN_MASK, PMIC_RG_SMT_XOSC_EN_SHIFT},
    422. 

  422. 	{PMIC_RG_OCTL_SRCLKEN_IN0, PMIC_RG_OCTL_SRCLKEN_IN0_ADDR, PMIC_RG_OCTL_SRCLKEN_IN0_MASK, PMIC_RG_OCTL_SRCLKEN_IN0_SHIFT},
    423. 

  423. 	{PMIC_RG_OCTL_SRCLKEN_IN1, PMIC_RG_OCTL_SRCLKEN_IN1_ADDR, PMIC_RG_OCTL_SRCLKEN_IN1_MASK, PMIC_RG_OCTL_SRCLKEN_IN1_SHIFT},
    424. 

  424. 	{PMIC_RG_OCTL_RTC_32K1V8_0, PMIC_RG_OCTL_RTC_32K1V8_0_ADDR, PMIC_RG_OCTL_RTC_32K1V8_0_MASK, PMIC_RG_OCTL_RTC_32K1V8_0_SHIFT},
    425. 

  425. 	{PMIC_RG_OCTL_RTC_32K1V8_1, PMIC_RG_OCTL_RTC_32K1V8_1_ADDR, PMIC_RG_OCTL_RTC_32K1V8_1_MASK, PMIC_RG_OCTL_RTC_32K1V8_1_SHIFT},
    426. 

  426. 	{PMIC_RG_OCTL_SPI_CLK, PMIC_RG_OCTL_SPI_CLK_ADDR, PMIC_RG_OCTL_SPI_CLK_MASK, PMIC_RG_OCTL_SPI_CLK_SHIFT},
    427. 

  427. 	{PMIC_RG_OCTL_SPI_CSN, PMIC_RG_OCTL_SPI_CSN_ADDR, PMIC_RG_OCTL_SPI_CSN_MASK, PMIC_RG_OCTL_SPI_CSN_SHIFT},
    428. 

  428. 	{PMIC_RG_OCTL_SPI_MOSI, PMIC_RG_OCTL_SPI_MOSI_ADDR, PMIC_RG_OCTL_SPI_MOSI_MASK, PMIC_RG_OCTL_SPI_MOSI_SHIFT},
    429. 

  429. 	{PMIC_RG_OCTL_SPI_MISO, PMIC_RG_OCTL_SPI_MISO_ADDR, PMIC_RG_OCTL_SPI_MISO_MASK, PMIC_RG_OCTL_SPI_MISO_SHIFT},
    430. 

  430. 	{PMIC_RG_OCTL_AUD_DAT_MOSI, PMIC_RG_OCTL_AUD_DAT_MOSI_ADDR, PMIC_RG_OCTL_AUD_DAT_MOSI_MASK, PMIC_RG_OCTL_AUD_DAT_MOSI_SHIFT},
    431. 

  431. 	{PMIC_RG_OCTL_AUD_DAT_MISO, PMIC_RG_OCTL_AUD_DAT_MISO_ADDR, PMIC_RG_OCTL_AUD_DAT_MISO_MASK, PMIC_RG_OCTL_AUD_DAT_MISO_SHIFT},
    432. 

  432. 	{PMIC_RG_OCTL_AUD_CLK, PMIC_RG_OCTL_AUD_CLK_ADDR, PMIC_RG_OCTL_AUD_CLK_MASK, PMIC_RG_OCTL_AUD_CLK_SHIFT},
    433. 

  433. 	{PMIC_RG_OCTL_ANC_DAT_MOSI, PMIC_RG_OCTL_ANC_DAT_MOSI_ADDR, PMIC_RG_OCTL_ANC_DAT_MOSI_MASK, PMIC_RG_OCTL_ANC_DAT_MOSI_SHIFT},
    434. 

  434. 	{PMIC_RG_OCTL_HOMEKEY, PMIC_RG_OCTL_HOMEKEY_ADDR, PMIC_RG_OCTL_HOMEKEY_MASK, PMIC_RG_OCTL_HOMEKEY_SHIFT},
    435. 

  435. 	{PMIC_RG_OCTL_ENBB, PMIC_RG_OCTL_ENBB_ADDR, PMIC_RG_OCTL_ENBB_MASK, PMIC_RG_OCTL_ENBB_SHIFT},
    436. 

  436. 	{PMIC_RG_OCTL_XOSC_EN, PMIC_RG_OCTL_XOSC_EN_ADDR, PMIC_RG_OCTL_XOSC_EN_MASK, PMIC_RG_OCTL_XOSC_EN_SHIFT},
    437. 

  437. 	{PMIC_RG_OCTL_VOW_CLK_MISO, PMIC_RG_OCTL_VOW_CLK_MISO_ADDR, PMIC_RG_OCTL_VOW_CLK_MISO_MASK, PMIC_RG_OCTL_VOW_CLK_MISO_SHIFT},
    438. 

  438. 	{PMIC_TOP_STATUS, PMIC_TOP_STATUS_ADDR, PMIC_TOP_STATUS_MASK, PMIC_TOP_STATUS_SHIFT},
    439. 

  439. 	{PMIC_TOP_STATUS_SET, PMIC_TOP_STATUS_SET_ADDR, PMIC_TOP_STATUS_SET_MASK, PMIC_TOP_STATUS_SET_SHIFT},
    440. 

  440. 	{PMIC_TOP_STATUS_CLR, PMIC_TOP_STATUS_CLR_ADDR, PMIC_TOP_STATUS_CLR_MASK, PMIC_TOP_STATUS_CLR_SHIFT},
    441. 

  441. 	{PMIC_CLK_RSV_CON0_RSV, PMIC_CLK_RSV_CON0_RSV_ADDR, PMIC_CLK_RSV_CON0_RSV_MASK, PMIC_CLK_RSV_CON0_RSV_SHIFT},
    442. 

  442. 	{PMIC_RG_DCXO_PWRKEY_RSTB_SEL, PMIC_RG_DCXO_PWRKEY_RSTB_SEL_ADDR, PMIC_RG_DCXO_PWRKEY_RSTB_SEL_MASK, PMIC_RG_DCXO_PWRKEY_RSTB_SEL_SHIFT},
    443. 

  443. 	{PMIC_CLK_SRCVOLTEN_SW, PMIC_CLK_SRCVOLTEN_SW_ADDR, PMIC_CLK_SRCVOLTEN_SW_MASK, PMIC_CLK_SRCVOLTEN_SW_SHIFT},
    444. 

  444. 	{PMIC_CLK_BUCK_OSC_SEL_SW, PMIC_CLK_BUCK_OSC_SEL_SW_ADDR, PMIC_CLK_BUCK_OSC_SEL_SW_MASK, PMIC_CLK_BUCK_OSC_SEL_SW_SHIFT},
    445. 

  445. 	{PMIC_CLK_VOWEN_SW, PMIC_CLK_VOWEN_SW_ADDR, PMIC_CLK_VOWEN_SW_MASK, PMIC_CLK_VOWEN_SW_SHIFT},
    446. 

  446. 	{PMIC_CLK_SRCVOLTEN_MODE, PMIC_CLK_SRCVOLTEN_MODE_ADDR, PMIC_CLK_SRCVOLTEN_MODE_MASK, PMIC_CLK_SRCVOLTEN_MODE_SHIFT},
    447. 

  447. 	{PMIC_CLK_BUCK_OSC_SEL_MODE, PMIC_CLK_BUCK_OSC_SEL_MODE_ADDR, PMIC_CLK_BUCK_OSC_SEL_MODE_MASK, PMIC_CLK_BUCK_OSC_SEL_MODE_SHIFT},
    448. 

  448. 	{PMIC_CLK_VOWEN_MODE, PMIC_CLK_VOWEN_MODE_ADDR, PMIC_CLK_VOWEN_MODE_MASK, PMIC_CLK_VOWEN_MODE_SHIFT},
    449. 

  449. 	{PMIC_RG_TOP_CKSEL_CON2_RSV, PMIC_RG_TOP_CKSEL_CON2_RSV_ADDR, PMIC_RG_TOP_CKSEL_CON2_RSV_MASK, PMIC_RG_TOP_CKSEL_CON2_RSV_SHIFT},
    450. 

  450. 	{PMIC_CLK_BUCK_CON0_RSV, PMIC_CLK_BUCK_CON0_RSV_ADDR, PMIC_CLK_BUCK_CON0_RSV_MASK, PMIC_CLK_BUCK_CON0_RSV_SHIFT},
    451. 

  451. 	{PMIC_CLK_BUCK_CON0_SET, PMIC_CLK_BUCK_CON0_SET_ADDR, PMIC_CLK_BUCK_CON0_SET_MASK, PMIC_CLK_BUCK_CON0_SET_SHIFT},
    452. 

  452. 	{PMIC_CLK_BUCK_CON0_CLR, PMIC_CLK_BUCK_CON0_CLR_ADDR, PMIC_CLK_BUCK_CON0_CLR_MASK, PMIC_CLK_BUCK_CON0_CLR_SHIFT},
    453. 

  453. 	{PMIC_CLK_BUCK_VCORE_OSC_SEL_SW, PMIC_CLK_BUCK_VCORE_OSC_SEL_SW_ADDR, PMIC_CLK_BUCK_VCORE_OSC_SEL_SW_MASK, PMIC_CLK_BUCK_VCORE_OSC_SEL_SW_SHIFT},
    454. 

  454. 	{PMIC_CLK_BUCK_VCORE2_OSC_SEL_SW, PMIC_CLK_BUCK_VCORE2_OSC_SEL_SW_ADDR, PMIC_CLK_BUCK_VCORE2_OSC_SEL_SW_MASK, PMIC_CLK_BUCK_VCORE2_OSC_SEL_SW_SHIFT},
    455. 

  455. 	{PMIC_CLK_BUCK_VPROC_OSC_SEL_SW, PMIC_CLK_BUCK_VPROC_OSC_SEL_SW_ADDR, PMIC_CLK_BUCK_VPROC_OSC_SEL_SW_MASK, PMIC_CLK_BUCK_VPROC_OSC_SEL_SW_SHIFT},
    456. 

  456. 	{PMIC_CLK_BUCK_VPA_OSC_SEL_SW, PMIC_CLK_BUCK_VPA_OSC_SEL_SW_ADDR, PMIC_CLK_BUCK_VPA_OSC_SEL_SW_MASK, PMIC_CLK_BUCK_VPA_OSC_SEL_SW_SHIFT},
    457. 

  457. 	{PMIC_CLK_BUCK_VS1_OSC_SEL_SW, PMIC_CLK_BUCK_VS1_OSC_SEL_SW_ADDR, PMIC_CLK_BUCK_VS1_OSC_SEL_SW_MASK, PMIC_CLK_BUCK_VS1_OSC_SEL_SW_SHIFT},
    458. 

  458. 	{PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_SW, PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_SW_ADDR, PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_SW_MASK, PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_SW_SHIFT},
    459. 

  459. 	{PMIC_CLK_BUCK_VCORE_OSC_SEL_MODE, PMIC_CLK_BUCK_VCORE_OSC_SEL_MODE_ADDR, PMIC_CLK_BUCK_VCORE_OSC_SEL_MODE_MASK, PMIC_CLK_BUCK_VCORE_OSC_SEL_MODE_SHIFT},
    460. 

  460. 	{PMIC_CLK_BUCK_VCORE2_OSC_SEL_MODE, PMIC_CLK_BUCK_VCORE2_OSC_SEL_MODE_ADDR, PMIC_CLK_BUCK_VCORE2_OSC_SEL_MODE_MASK, PMIC_CLK_BUCK_VCORE2_OSC_SEL_MODE_SHIFT},
    461. 

  461. 	{PMIC_CLK_BUCK_VPROC_OSC_SEL_MODE, PMIC_CLK_BUCK_VPROC_OSC_SEL_MODE_ADDR, PMIC_CLK_BUCK_VPROC_OSC_SEL_MODE_MASK, PMIC_CLK_BUCK_VPROC_OSC_SEL_MODE_SHIFT},
    462. 

  462. 	{PMIC_CLK_BUCK_VPA_OSC_SEL_MODE, PMIC_CLK_BUCK_VPA_OSC_SEL_MODE_ADDR, PMIC_CLK_BUCK_VPA_OSC_SEL_MODE_MASK, PMIC_CLK_BUCK_VPA_OSC_SEL_MODE_SHIFT},
    463. 

  463. 	{PMIC_CLK_BUCK_VS1_OSC_SEL_MODE, PMIC_CLK_BUCK_VS1_OSC_SEL_MODE_ADDR, PMIC_CLK_BUCK_VS1_OSC_SEL_MODE_MASK, PMIC_CLK_BUCK_VS1_OSC_SEL_MODE_SHIFT},
    464. 

  464. 	{PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_MODE, PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_MODE_ADDR, PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_MODE_MASK, PMIC_CLK_LDO_VSRAM_PROC_OSC_SEL_MODE_SHIFT},
    465. 

  465. 	{PMIC_CLK_BUCK_CON1_RSV, PMIC_CLK_BUCK_CON1_RSV_ADDR, PMIC_CLK_BUCK_CON1_RSV_MASK, PMIC_CLK_BUCK_CON1_RSV_SHIFT},
    466. 

  466. 	{PMIC_CLK_BUCK_CON1_SET, PMIC_CLK_BUCK_CON1_SET_ADDR, PMIC_CLK_BUCK_CON1_SET_MASK, PMIC_CLK_BUCK_CON1_SET_SHIFT},
    467. 

  467. 	{PMIC_CLK_BUCK_CON1_CLR, PMIC_CLK_BUCK_CON1_CLR_ADDR, PMIC_CLK_BUCK_CON1_CLR_MASK, PMIC_CLK_BUCK_CON1_CLR_SHIFT},
    468. 

  468. 	{PMIC_RG_CLKSQ_EN_AUD, PMIC_RG_CLKSQ_EN_AUD_ADDR, PMIC_RG_CLKSQ_EN_AUD_MASK, PMIC_RG_CLKSQ_EN_AUD_SHIFT},
    469. 

  469. 	{PMIC_RG_CLKSQ_EN_FQR, PMIC_RG_CLKSQ_EN_FQR_ADDR, PMIC_RG_CLKSQ_EN_FQR_MASK, PMIC_RG_CLKSQ_EN_FQR_SHIFT},
    470. 

  470. 	{PMIC_RG_CLKSQ_EN_AUX_AP, PMIC_RG_CLKSQ_EN_AUX_AP_ADDR, PMIC_RG_CLKSQ_EN_AUX_AP_MASK, PMIC_RG_CLKSQ_EN_AUX_AP_SHIFT},
    471. 

  471. 	{PMIC_RG_CLKSQ_EN_AUX_MD, PMIC_RG_CLKSQ_EN_AUX_MD_ADDR, PMIC_RG_CLKSQ_EN_AUX_MD_MASK, PMIC_RG_CLKSQ_EN_AUX_MD_SHIFT},
    472. 

  472. 	{PMIC_RG_CLKSQ_EN_AUX_GPS, PMIC_RG_CLKSQ_EN_AUX_GPS_ADDR, PMIC_RG_CLKSQ_EN_AUX_GPS_MASK, PMIC_RG_CLKSQ_EN_AUX_GPS_SHIFT},
    473. 

  473. 	{PMIC_RG_CLKSQ_EN_AUX_RSV, PMIC_RG_CLKSQ_EN_AUX_RSV_ADDR, PMIC_RG_CLKSQ_EN_AUX_RSV_MASK, PMIC_RG_CLKSQ_EN_AUX_RSV_SHIFT},
    474. 

  474. 	{PMIC_RG_CLKSQ_EN_AUX_AP_MODE, PMIC_RG_CLKSQ_EN_AUX_AP_MODE_ADDR, PMIC_RG_CLKSQ_EN_AUX_AP_MODE_MASK, PMIC_RG_CLKSQ_EN_AUX_AP_MODE_SHIFT},
    475. 

  475. 	{PMIC_RG_CLKSQ_EN_AUX_MD_MODE, PMIC_RG_CLKSQ_EN_AUX_MD_MODE_ADDR, PMIC_RG_CLKSQ_EN_AUX_MD_MODE_MASK, PMIC_RG_CLKSQ_EN_AUX_MD_MODE_SHIFT},
    476. 

  476. 	{PMIC_RG_CLKSQ_IN_SEL_VA18, PMIC_RG_CLKSQ_IN_SEL_VA18_ADDR, PMIC_RG_CLKSQ_IN_SEL_VA18_MASK, PMIC_RG_CLKSQ_IN_SEL_VA18_SHIFT},
    477. 

  477. 	{PMIC_RG_CLKSQ_IN_SEL_VA18_SWCTRL, PMIC_RG_CLKSQ_IN_SEL_VA18_SWCTRL_ADDR, PMIC_RG_CLKSQ_IN_SEL_VA18_SWCTRL_MASK, PMIC_RG_CLKSQ_IN_SEL_VA18_SWCTRL_SHIFT},
    478. 

  478. 	{PMIC_TOP_CLKSQ_RSV, PMIC_TOP_CLKSQ_RSV_ADDR, PMIC_TOP_CLKSQ_RSV_MASK, PMIC_TOP_CLKSQ_RSV_SHIFT},
    479. 

  479. 	{PMIC_DA_CLKSQ_EN_VA28, PMIC_DA_CLKSQ_EN_VA28_ADDR, PMIC_DA_CLKSQ_EN_VA28_MASK, PMIC_DA_CLKSQ_EN_VA28_SHIFT},
    480. 

  480. 	{PMIC_TOP_CLKSQ_SET, PMIC_TOP_CLKSQ_SET_ADDR, PMIC_TOP_CLKSQ_SET_MASK, PMIC_TOP_CLKSQ_SET_SHIFT},
    481. 

  481. 	{PMIC_TOP_CLKSQ_CLR, PMIC_TOP_CLKSQ_CLR_ADDR, PMIC_TOP_CLKSQ_CLR_MASK, PMIC_TOP_CLKSQ_CLR_SHIFT},
    482. 

  482. 	{PMIC_RG_CLKSQ_RTC_EN, PMIC_RG_CLKSQ_RTC_EN_ADDR, PMIC_RG_CLKSQ_RTC_EN_MASK, PMIC_RG_CLKSQ_RTC_EN_SHIFT},
    483. 

  483. 	{PMIC_RG_CLKSQ_RTC_EN_HW_MODE, PMIC_RG_CLKSQ_RTC_EN_HW_MODE_ADDR, PMIC_RG_CLKSQ_RTC_EN_HW_MODE_MASK, PMIC_RG_CLKSQ_RTC_EN_HW_MODE_SHIFT},
    484. 

  484. 	{PMIC_TOP_CLKSQ_RTC_RSV0, PMIC_TOP_CLKSQ_RTC_RSV0_ADDR, PMIC_TOP_CLKSQ_RTC_RSV0_MASK, PMIC_TOP_CLKSQ_RTC_RSV0_SHIFT},
    485. 

  485. 	{PMIC_RG_ENBB_SEL, PMIC_RG_ENBB_SEL_ADDR, PMIC_RG_ENBB_SEL_MASK, PMIC_RG_ENBB_SEL_SHIFT},
    486. 

  486. 	{PMIC_RG_XOSC_EN_SEL, PMIC_RG_XOSC_EN_SEL_ADDR, PMIC_RG_XOSC_EN_SEL_MASK, PMIC_RG_XOSC_EN_SEL_SHIFT},
    487. 

  487. 	{PMIC_TOP_CLKSQ_RTC_RSV1, PMIC_TOP_CLKSQ_RTC_RSV1_ADDR, PMIC_TOP_CLKSQ_RTC_RSV1_MASK, PMIC_TOP_CLKSQ_RTC_RSV1_SHIFT},
    488. 

  488. 	{PMIC_DA_CLKSQ_EN_VDIG18, PMIC_DA_CLKSQ_EN_VDIG18_ADDR, PMIC_DA_CLKSQ_EN_VDIG18_MASK, PMIC_DA_CLKSQ_EN_VDIG18_SHIFT},
    489. 

  489. 	{PMIC_TOP_CLKSQ_RTC_SET, PMIC_TOP_CLKSQ_RTC_SET_ADDR, PMIC_TOP_CLKSQ_RTC_SET_MASK, PMIC_TOP_CLKSQ_RTC_SET_SHIFT},
    490. 

  490. 	{PMIC_TOP_CLKSQ_RTC_CLR, PMIC_TOP_CLKSQ_RTC_CLR_ADDR, PMIC_TOP_CLKSQ_RTC_CLR_MASK, PMIC_TOP_CLKSQ_RTC_CLR_SHIFT},
    491. 

  491. 	{PMIC_OSC_75K_TRIM, PMIC_OSC_75K_TRIM_ADDR, PMIC_OSC_75K_TRIM_MASK, PMIC_OSC_75K_TRIM_SHIFT},
    492. 

  492. 	{PMIC_RG_OSC_75K_TRIM_EN, PMIC_RG_OSC_75K_TRIM_EN_ADDR, PMIC_RG_OSC_75K_TRIM_EN_MASK, PMIC_RG_OSC_75K_TRIM_EN_SHIFT},
    493. 

  493. 	{PMIC_RG_OSC_75K_TRIM_RATE, PMIC_RG_OSC_75K_TRIM_RATE_ADDR, PMIC_RG_OSC_75K_TRIM_RATE_MASK, PMIC_RG_OSC_75K_TRIM_RATE_SHIFT},
    494. 

  494. 	{PMIC_DA_OSC_75K_TRIM, PMIC_DA_OSC_75K_TRIM_ADDR, PMIC_DA_OSC_75K_TRIM_MASK, PMIC_DA_OSC_75K_TRIM_SHIFT},
    495. 

  495. 	{PMIC_CLK_PMU75K_CK_TST_DIS, PMIC_CLK_PMU75K_CK_TST_DIS_ADDR, PMIC_CLK_PMU75K_CK_TST_DIS_MASK, PMIC_CLK_PMU75K_CK_TST_DIS_SHIFT},
    496. 

  496. 	{PMIC_CLK_SMPS_CK_TST_DIS, PMIC_CLK_SMPS_CK_TST_DIS_ADDR, PMIC_CLK_SMPS_CK_TST_DIS_MASK, PMIC_CLK_SMPS_CK_TST_DIS_SHIFT},
    497. 

  497. 	{PMIC_CLK_AUD26M_CK_TST_DIS, PMIC_CLK_AUD26M_CK_TST_DIS_ADDR, PMIC_CLK_AUD26M_CK_TST_DIS_MASK, PMIC_CLK_AUD26M_CK_TST_DIS_SHIFT},
    498. 

  498. 	{PMIC_CLK_VOW12M_CK_TST_DIS, PMIC_CLK_VOW12M_CK_TST_DIS_ADDR, PMIC_CLK_VOW12M_CK_TST_DIS_MASK, PMIC_CLK_VOW12M_CK_TST_DIS_SHIFT},
    499. 

  499. 	{PMIC_CLK_RTC32K_CK_TST_DIS, PMIC_CLK_RTC32K_CK_TST_DIS_ADDR, PMIC_CLK_RTC32K_CK_TST_DIS_MASK, PMIC_CLK_RTC32K_CK_TST_DIS_SHIFT},
    500. 

  500. 	{PMIC_CLK_RTC26M_CK_TST_DIS, PMIC_CLK_RTC26M_CK_TST_DIS_ADDR, PMIC_CLK_RTC26M_CK_TST_DIS_MASK, PMIC_CLK_RTC26M_CK_TST_DIS_SHIFT},
    501. 

  501. 	{PMIC_CLK_FG_CK_TST_DIS, PMIC_CLK_FG_CK_TST_DIS_ADDR, PMIC_CLK_FG_CK_TST_DIS_MASK, PMIC_CLK_FG_CK_TST_DIS_SHIFT},
    502. 

  502. 	{PMIC_CLK_SPK_CK_TST_DIS, PMIC_CLK_SPK_CK_TST_DIS_ADDR, PMIC_CLK_SPK_CK_TST_DIS_MASK, PMIC_CLK_SPK_CK_TST_DIS_SHIFT},
    503. 

  503. 	{PMIC_CLK_CKROOTTST_CON0_RSV, PMIC_CLK_CKROOTTST_CON0_RSV_ADDR, PMIC_CLK_CKROOTTST_CON0_RSV_MASK, PMIC_CLK_CKROOTTST_CON0_RSV_SHIFT},
    504. 

  504. 	{PMIC_CLK_BUCK_ANA_AUTO_OFF_DIS, PMIC_CLK_BUCK_ANA_AUTO_OFF_DIS_ADDR, PMIC_CLK_BUCK_ANA_AUTO_OFF_DIS_MASK, PMIC_CLK_BUCK_ANA_AUTO_OFF_DIS_SHIFT},
    505. 

  505. 	{PMIC_CLK_PMU75K_CK_TSTSEL, PMIC_CLK_PMU75K_CK_TSTSEL_ADDR, PMIC_CLK_PMU75K_CK_TSTSEL_MASK, PMIC_CLK_PMU75K_CK_TSTSEL_SHIFT},
    506. 

  506. 	{PMIC_CLK_SMPS_CK_TSTSEL, PMIC_CLK_SMPS_CK_TSTSEL_ADDR, PMIC_CLK_SMPS_CK_TSTSEL_MASK, PMIC_CLK_SMPS_CK_TSTSEL_SHIFT},
    507. 

  507. 	{PMIC_CLK_AUD26M_CK_TSTSEL, PMIC_CLK_AUD26M_CK_TSTSEL_ADDR, PMIC_CLK_AUD26M_CK_TSTSEL_MASK, PMIC_CLK_AUD26M_CK_TSTSEL_SHIFT},
    508. 

  508. 	{PMIC_CLK_VOW12M_CK_TSTSEL, PMIC_CLK_VOW12M_CK_TSTSEL_ADDR, PMIC_CLK_VOW12M_CK_TSTSEL_MASK, PMIC_CLK_VOW12M_CK_TSTSEL_SHIFT},
    509. 

  509. 	{PMIC_CLK_RTC32K_CK_TSTSEL, PMIC_CLK_RTC32K_CK_TSTSEL_ADDR, PMIC_CLK_RTC32K_CK_TSTSEL_MASK, PMIC_CLK_RTC32K_CK_TSTSEL_SHIFT},
    510. 

  510. 	{PMIC_CLK_RTC26M_CK_TSTSEL, PMIC_CLK_RTC26M_CK_TSTSEL_ADDR, PMIC_CLK_RTC26M_CK_TSTSEL_MASK, PMIC_CLK_RTC26M_CK_TSTSEL_SHIFT},
    511. 

  511. 	{PMIC_CLK_FG_CK_TSTSEL, PMIC_CLK_FG_CK_TSTSEL_ADDR, PMIC_CLK_FG_CK_TSTSEL_MASK, PMIC_CLK_FG_CK_TSTSEL_SHIFT},
    512. 

  512. 	{PMIC_CLK_SPK_CK_TSTSEL, PMIC_CLK_SPK_CK_TSTSEL_ADDR, PMIC_CLK_SPK_CK_TSTSEL_MASK, PMIC_CLK_SPK_CK_TSTSEL_SHIFT},
    513. 

  513. 	{PMIC_CLK_CKROOTTST_CON1_RSV, PMIC_CLK_CKROOTTST_CON1_RSV_ADDR, PMIC_CLK_CKROOTTST_CON1_RSV_MASK, PMIC_CLK_CKROOTTST_CON1_RSV_SHIFT},
    514. 

  514. 	{PMIC_CLK_RTC32K_1V8_0_O_PDN, PMIC_CLK_RTC32K_1V8_0_O_PDN_ADDR, PMIC_CLK_RTC32K_1V8_0_O_PDN_MASK, PMIC_CLK_RTC32K_1V8_0_O_PDN_SHIFT},
    515. 

  515. 	{PMIC_CLK_RTC32K_1V8_1_O_PDN, PMIC_CLK_RTC32K_1V8_1_O_PDN_ADDR, PMIC_CLK_RTC32K_1V8_1_O_PDN_MASK, PMIC_CLK_RTC32K_1V8_1_O_PDN_SHIFT},
    516. 

  516. 	{PMIC_CLK_RTC_2SEC_OFF_DET_PDN, PMIC_CLK_RTC_2SEC_OFF_DET_PDN_ADDR, PMIC_CLK_RTC_2SEC_OFF_DET_PDN_MASK, PMIC_CLK_RTC_2SEC_OFF_DET_PDN_SHIFT},
    517. 

  517. 	{PMIC_CLK_PDN_CON0_RSV, PMIC_CLK_PDN_CON0_RSV_ADDR, PMIC_CLK_PDN_CON0_RSV_MASK, PMIC_CLK_PDN_CON0_RSV_SHIFT},
    518. 

  518. 	{PMIC_CLK_PDN_CON0_SET, PMIC_CLK_PDN_CON0_SET_ADDR, PMIC_CLK_PDN_CON0_SET_MASK, PMIC_CLK_PDN_CON0_SET_SHIFT},
    519. 

  519. 	{PMIC_CLK_PDN_CON0_CLR, PMIC_CLK_PDN_CON0_CLR_ADDR, PMIC_CLK_PDN_CON0_CLR_MASK, PMIC_CLK_PDN_CON0_CLR_SHIFT},
    520. 

  520. 	{PMIC_CLK_ZCD13M_CK_PDN, PMIC_CLK_ZCD13M_CK_PDN_ADDR, PMIC_CLK_ZCD13M_CK_PDN_MASK, PMIC_CLK_ZCD13M_CK_PDN_SHIFT},
    521. 

  521. 	{PMIC_CLK_SMPS_CK_DIV_PDN, PMIC_CLK_SMPS_CK_DIV_PDN_ADDR, PMIC_CLK_SMPS_CK_DIV_PDN_MASK, PMIC_CLK_SMPS_CK_DIV_PDN_SHIFT},
    522. 

  522. 	{PMIC_CLK_BUCK_ANA_CK_PDN, PMIC_CLK_BUCK_ANA_CK_PDN_ADDR, PMIC_CLK_BUCK_ANA_CK_PDN_MASK, PMIC_CLK_BUCK_ANA_CK_PDN_SHIFT},
    523. 

  523. 	{PMIC_CLK_PDN_CON1_RSV, PMIC_CLK_PDN_CON1_RSV_ADDR, PMIC_CLK_PDN_CON1_RSV_MASK, PMIC_CLK_PDN_CON1_RSV_SHIFT},
    524. 

  524. 	{PMIC_CLK_PDN_CON1_SET, PMIC_CLK_PDN_CON1_SET_ADDR, PMIC_CLK_PDN_CON1_SET_MASK, PMIC_CLK_PDN_CON1_SET_SHIFT},
    525. 

  525. 	{PMIC_CLK_PDN_CON1_CLR, PMIC_CLK_PDN_CON1_CLR_ADDR, PMIC_CLK_PDN_CON1_CLR_MASK, PMIC_CLK_PDN_CON1_CLR_SHIFT},
    526. 

  526. 	{PMIC_CLK_OSC_SEL_HW_SRC_SEL, PMIC_CLK_OSC_SEL_HW_SRC_SEL_ADDR, PMIC_CLK_OSC_SEL_HW_SRC_SEL_MASK, PMIC_CLK_OSC_SEL_HW_SRC_SEL_SHIFT},
    527. 

  527. 	{PMIC_CLK_SRCLKEN_SRC_SEL, PMIC_CLK_SRCLKEN_SRC_SEL_ADDR, PMIC_CLK_SRCLKEN_SRC_SEL_MASK, PMIC_CLK_SRCLKEN_SRC_SEL_SHIFT},
    528. 

  528. 	{PMIC_CLK_SEL_CON0_RSV, PMIC_CLK_SEL_CON0_RSV_ADDR, PMIC_CLK_SEL_CON0_RSV_MASK, PMIC_CLK_SEL_CON0_RSV_SHIFT},
    529. 

  529. 	{PMIC_CLK_SEL_CON0_SET, PMIC_CLK_SEL_CON0_SET_ADDR, PMIC_CLK_SEL_CON0_SET_MASK, PMIC_CLK_SEL_CON0_SET_SHIFT},
    530. 

  530. 	{PMIC_CLK_SEL_CON0_CLR, PMIC_CLK_SEL_CON0_CLR_ADDR, PMIC_CLK_SEL_CON0_CLR_MASK, PMIC_CLK_SEL_CON0_CLR_SHIFT},
    531. 

  531. 	{PMIC_CLK_AUXADC_CK_CKSEL_HWEN, PMIC_CLK_AUXADC_CK_CKSEL_HWEN_ADDR, PMIC_CLK_AUXADC_CK_CKSEL_HWEN_MASK, PMIC_CLK_AUXADC_CK_CKSEL_HWEN_SHIFT},
    532. 

  532. 	{PMIC_CLK_AUXADC_CK_CKSEL, PMIC_CLK_AUXADC_CK_CKSEL_ADDR, PMIC_CLK_AUXADC_CK_CKSEL_MASK, PMIC_CLK_AUXADC_CK_CKSEL_SHIFT},
    533. 

  533. 	{PMIC_CLK_75K_32K_SEL, PMIC_CLK_75K_32K_SEL_ADDR, PMIC_CLK_75K_32K_SEL_MASK, PMIC_CLK_75K_32K_SEL_SHIFT},
    534. 

  534. 	{PMIC_CLK_SEL_CON1_RSV, PMIC_CLK_SEL_CON1_RSV_ADDR, PMIC_CLK_SEL_CON1_RSV_MASK, PMIC_CLK_SEL_CON1_RSV_SHIFT},
    535. 

  535. 	{PMIC_CLK_SEL_CON1_SET, PMIC_CLK_SEL_CON1_SET_ADDR, PMIC_CLK_SEL_CON1_SET_MASK, PMIC_CLK_SEL_CON1_SET_SHIFT},
    536. 

  536. 	{PMIC_CLK_SEL_CON1_CLR, PMIC_CLK_SEL_CON1_CLR_ADDR, PMIC_CLK_SEL_CON1_CLR_MASK, PMIC_CLK_SEL_CON1_CLR_SHIFT},
    537. 

  537. 	{PMIC_CLK_G_SMPS_PD_CK_PDN, PMIC_CLK_G_SMPS_PD_CK_PDN_ADDR, PMIC_CLK_G_SMPS_PD_CK_PDN_MASK, PMIC_CLK_G_SMPS_PD_CK_PDN_SHIFT},
    538. 

  538. 	{PMIC_CLK_G_SMPS_AUD_CK_PDN, PMIC_CLK_G_SMPS_AUD_CK_PDN_ADDR, PMIC_CLK_G_SMPS_AUD_CK_PDN_MASK, PMIC_CLK_G_SMPS_AUD_CK_PDN_SHIFT},
    539. 

  539. 	{PMIC_CLK_G_SMPS_TEST_CK_PDN, PMIC_CLK_G_SMPS_TEST_CK_PDN_ADDR, PMIC_CLK_G_SMPS_TEST_CK_PDN_MASK, PMIC_CLK_G_SMPS_TEST_CK_PDN_SHIFT},
    540. 

  540. 	{PMIC_CLK_ACCDET_CK_PDN, PMIC_CLK_ACCDET_CK_PDN_ADDR, PMIC_CLK_ACCDET_CK_PDN_MASK, PMIC_CLK_ACCDET_CK_PDN_SHIFT},
    541. 

  541. 	{PMIC_CLK_AUDIF_CK_PDN, PMIC_CLK_AUDIF_CK_PDN_ADDR, PMIC_CLK_AUDIF_CK_PDN_MASK, PMIC_CLK_AUDIF_CK_PDN_SHIFT},
    542. 

  542. 	{PMIC_CLK_AUD_CK_PDN, PMIC_CLK_AUD_CK_PDN_ADDR, PMIC_CLK_AUD_CK_PDN_MASK, PMIC_CLK_AUD_CK_PDN_SHIFT},
    543. 

  543. 	{PMIC_CLK_AUDNCP_CK_PDN, PMIC_CLK_AUDNCP_CK_PDN_ADDR, PMIC_CLK_AUDNCP_CK_PDN_MASK, PMIC_CLK_AUDNCP_CK_PDN_SHIFT},
    544. 

  544. 	{PMIC_CLK_AUXADC_1M_CK_PDN, PMIC_CLK_AUXADC_1M_CK_PDN_ADDR, PMIC_CLK_AUXADC_1M_CK_PDN_MASK, PMIC_CLK_AUXADC_1M_CK_PDN_SHIFT},
    545. 

  545. 	{PMIC_CLK_AUXADC_SMPS_CK_PDN, PMIC_CLK_AUXADC_SMPS_CK_PDN_ADDR, PMIC_CLK_AUXADC_SMPS_CK_PDN_MASK, PMIC_CLK_AUXADC_SMPS_CK_PDN_SHIFT},
    546. 

  546. 	{PMIC_CLK_AUXADC_RNG_CK_PDN, PMIC_CLK_AUXADC_RNG_CK_PDN_ADDR, PMIC_CLK_AUXADC_RNG_CK_PDN_MASK, PMIC_CLK_AUXADC_RNG_CK_PDN_SHIFT},
    547. 

  547. 	{PMIC_CLK_AUXADC_26M_CK_PDN, PMIC_CLK_AUXADC_26M_CK_PDN_ADDR, PMIC_CLK_AUXADC_26M_CK_PDN_MASK, PMIC_CLK_AUXADC_26M_CK_PDN_SHIFT},
    548. 

  548. 	{PMIC_CLK_AUXADC_CK_PDN, PMIC_CLK_AUXADC_CK_PDN_ADDR, PMIC_CLK_AUXADC_CK_PDN_MASK, PMIC_CLK_AUXADC_CK_PDN_SHIFT},
    549. 

  549. 	{PMIC_CLK_DRV_ISINK0_CK_PDN, PMIC_CLK_DRV_ISINK0_CK_PDN_ADDR, PMIC_CLK_DRV_ISINK0_CK_PDN_MASK, PMIC_CLK_DRV_ISINK0_CK_PDN_SHIFT},
    550. 

  550. 	{PMIC_CLK_DRV_ISINK1_CK_PDN, PMIC_CLK_DRV_ISINK1_CK_PDN_ADDR, PMIC_CLK_DRV_ISINK1_CK_PDN_MASK, PMIC_CLK_DRV_ISINK1_CK_PDN_SHIFT},
    551. 

  551. 	{PMIC_CLK_DRV_ISINK2_CK_PDN, PMIC_CLK_DRV_ISINK2_CK_PDN_ADDR, PMIC_CLK_DRV_ISINK2_CK_PDN_MASK, PMIC_CLK_DRV_ISINK2_CK_PDN_SHIFT},
    552. 

  552. 	{PMIC_CLK_DRV_ISINK3_CK_PDN, PMIC_CLK_DRV_ISINK3_CK_PDN_ADDR, PMIC_CLK_DRV_ISINK3_CK_PDN_MASK, PMIC_CLK_DRV_ISINK3_CK_PDN_SHIFT},
    553. 

  553. 	{PMIC_CLK_CKPDN_CON0_SET, PMIC_CLK_CKPDN_CON0_SET_ADDR, PMIC_CLK_CKPDN_CON0_SET_MASK, PMIC_CLK_CKPDN_CON0_SET_SHIFT},
    554. 

  554. 	{PMIC_CLK_CKPDN_CON0_CLR, PMIC_CLK_CKPDN_CON0_CLR_ADDR, PMIC_CLK_CKPDN_CON0_CLR_MASK, PMIC_CLK_CKPDN_CON0_CLR_SHIFT},
    555. 

  555. 	{PMIC_CLK_DRV_CHRIND_CK_PDN, PMIC_CLK_DRV_CHRIND_CK_PDN_ADDR, PMIC_CLK_DRV_CHRIND_CK_PDN_MASK, PMIC_CLK_DRV_CHRIND_CK_PDN_SHIFT},
    556. 

  556. 	{PMIC_CLK_DRV_32K_CK_PDN, PMIC_CLK_DRV_32K_CK_PDN_ADDR, PMIC_CLK_DRV_32K_CK_PDN_MASK, PMIC_CLK_DRV_32K_CK_PDN_SHIFT},
    557. 

  557. 	{PMIC_CLK_BUCK_1M_CK_PDN, PMIC_CLK_BUCK_1M_CK_PDN_ADDR, PMIC_CLK_BUCK_1M_CK_PDN_MASK, PMIC_CLK_BUCK_1M_CK_PDN_SHIFT},
    558. 

  558. 	{PMIC_CLK_BUCK_32K_CK_PDN, PMIC_CLK_BUCK_32K_CK_PDN_ADDR, PMIC_CLK_BUCK_32K_CK_PDN_MASK, PMIC_CLK_BUCK_32K_CK_PDN_SHIFT},
    559. 

  559. 	{PMIC_CLK_BUCK_9M_CK_PDN, PMIC_CLK_BUCK_9M_CK_PDN_ADDR, PMIC_CLK_BUCK_9M_CK_PDN_MASK, PMIC_CLK_BUCK_9M_CK_PDN_SHIFT},
    560. 

  560. 	{PMIC_CLK_PWMOC_6M_CK_PDN, PMIC_CLK_PWMOC_6M_CK_PDN_ADDR, PMIC_CLK_PWMOC_6M_CK_PDN_MASK, PMIC_CLK_PWMOC_6M_CK_PDN_SHIFT},
    561. 

  561. 	{PMIC_CLK_BUCK_VPROC_9M_CK_PDN, PMIC_CLK_BUCK_VPROC_9M_CK_PDN_ADDR, PMIC_CLK_BUCK_VPROC_9M_CK_PDN_MASK, PMIC_CLK_BUCK_VPROC_9M_CK_PDN_SHIFT},
    562. 

  562. 	{PMIC_CLK_BUCK_VCORE_9M_CK_PDN, PMIC_CLK_BUCK_VCORE_9M_CK_PDN_ADDR, PMIC_CLK_BUCK_VCORE_9M_CK_PDN_MASK, PMIC_CLK_BUCK_VCORE_9M_CK_PDN_SHIFT},
    563. 

  563. 	{PMIC_CLK_BUCK_VCORE2_9M_CK_PDN, PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_ADDR, PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_MASK, PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_SHIFT},
    564. 

  564. 	{PMIC_CLK_BUCK_VPA_9M_CK_PDN, PMIC_CLK_BUCK_VPA_9M_CK_PDN_ADDR, PMIC_CLK_BUCK_VPA_9M_CK_PDN_MASK, PMIC_CLK_BUCK_VPA_9M_CK_PDN_SHIFT},
    565. 

  565. 	{PMIC_CLK_BUCK_VS1_9M_CK_PDN, PMIC_CLK_BUCK_VS1_9M_CK_PDN_ADDR, PMIC_CLK_BUCK_VS1_9M_CK_PDN_MASK, PMIC_CLK_BUCK_VS1_9M_CK_PDN_SHIFT},
    566. 

  566. 	{PMIC_CLK_FQMTR_CK_PDN, PMIC_CLK_FQMTR_CK_PDN_ADDR, PMIC_CLK_FQMTR_CK_PDN_MASK, PMIC_CLK_FQMTR_CK_PDN_SHIFT},
    567. 

  567. 	{PMIC_CLK_FQMTR_32K_CK_PDN, PMIC_CLK_FQMTR_32K_CK_PDN_ADDR, PMIC_CLK_FQMTR_32K_CK_PDN_MASK, PMIC_CLK_FQMTR_32K_CK_PDN_SHIFT},
    568. 

  568. 	{PMIC_CLK_INTRP_CK_PDN, PMIC_CLK_INTRP_CK_PDN_ADDR, PMIC_CLK_INTRP_CK_PDN_MASK, PMIC_CLK_INTRP_CK_PDN_SHIFT},
    569. 

  569. 	{PMIC_CLK_INTRP_PRE_OC_CK_PDN, PMIC_CLK_INTRP_PRE_OC_CK_PDN_ADDR, PMIC_CLK_INTRP_PRE_OC_CK_PDN_MASK, PMIC_CLK_INTRP_PRE_OC_CK_PDN_SHIFT},
    570. 

  570. 	{PMIC_CLK_STB_1M_CK_PDN, PMIC_CLK_STB_1M_CK_PDN_ADDR, PMIC_CLK_STB_1M_CK_PDN_MASK, PMIC_CLK_STB_1M_CK_PDN_SHIFT},
    571. 

  571. 	{PMIC_CLK_CKPDN_CON1_SET, PMIC_CLK_CKPDN_CON1_SET_ADDR, PMIC_CLK_CKPDN_CON1_SET_MASK, PMIC_CLK_CKPDN_CON1_SET_SHIFT},
    572. 

  572. 	{PMIC_CLK_CKPDN_CON1_CLR, PMIC_CLK_CKPDN_CON1_CLR_ADDR, PMIC_CLK_CKPDN_CON1_CLR_MASK, PMIC_CLK_CKPDN_CON1_CLR_SHIFT},
    573. 

  573. 	{PMIC_CLK_LDO_CALI_75K_CK_PDN, PMIC_CLK_LDO_CALI_75K_CK_PDN_ADDR, PMIC_CLK_LDO_CALI_75K_CK_PDN_MASK, PMIC_CLK_LDO_CALI_75K_CK_PDN_SHIFT},
    574. 

  574. 	{PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN, PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_ADDR, PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_MASK, PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_SHIFT},
    575. 

  575. 	{PMIC_CLK_RTC_26M_CK_PDN, PMIC_CLK_RTC_26M_CK_PDN_ADDR, PMIC_CLK_RTC_26M_CK_PDN_MASK, PMIC_CLK_RTC_26M_CK_PDN_SHIFT},
    576. 

  576. 	{PMIC_CLK_RTC_32K_CK_PDN, PMIC_CLK_RTC_32K_CK_PDN_ADDR, PMIC_CLK_RTC_32K_CK_PDN_MASK, PMIC_CLK_RTC_32K_CK_PDN_SHIFT},
    577. 

  577. 	{PMIC_CLK_RTC_MCLK_PDN, PMIC_CLK_RTC_MCLK_PDN_ADDR, PMIC_CLK_RTC_MCLK_PDN_MASK, PMIC_CLK_RTC_MCLK_PDN_SHIFT},
    578. 

  578. 	{PMIC_CLK_RTC_75K_CK_PDN, PMIC_CLK_RTC_75K_CK_PDN_ADDR, PMIC_CLK_RTC_75K_CK_PDN_MASK, PMIC_CLK_RTC_75K_CK_PDN_SHIFT},
    579. 

  579. 	{PMIC_CLK_RTCDET_CK_PDN, PMIC_CLK_RTCDET_CK_PDN_ADDR, PMIC_CLK_RTCDET_CK_PDN_MASK, PMIC_CLK_RTCDET_CK_PDN_SHIFT},
    580. 

  580. 	{PMIC_CLK_RTC_EOSC32_CK_PDN, PMIC_CLK_RTC_EOSC32_CK_PDN_ADDR, PMIC_CLK_RTC_EOSC32_CK_PDN_MASK, PMIC_CLK_RTC_EOSC32_CK_PDN_SHIFT},
    581. 

  581. 	{PMIC_CLK_EOSC_CALI_TEST_CK_PDN, PMIC_CLK_EOSC_CALI_TEST_CK_PDN_ADDR, PMIC_CLK_EOSC_CALI_TEST_CK_PDN_MASK, PMIC_CLK_EOSC_CALI_TEST_CK_PDN_SHIFT},
    582. 

  582. 	{PMIC_CLK_FGADC_ANA_CK_PDN, PMIC_CLK_FGADC_ANA_CK_PDN_ADDR, PMIC_CLK_FGADC_ANA_CK_PDN_MASK, PMIC_CLK_FGADC_ANA_CK_PDN_SHIFT},
    583. 

  583. 	{PMIC_CLK_FGADC_DIG_CK_PDN, PMIC_CLK_FGADC_DIG_CK_PDN_ADDR, PMIC_CLK_FGADC_DIG_CK_PDN_MASK, PMIC_CLK_FGADC_DIG_CK_PDN_SHIFT},
    584. 

  584. 	{PMIC_CLK_FGADC_FT_CK_PDN, PMIC_CLK_FGADC_FT_CK_PDN_ADDR, PMIC_CLK_FGADC_FT_CK_PDN_MASK, PMIC_CLK_FGADC_FT_CK_PDN_SHIFT},
    585. 

  585. 	{PMIC_CLK_TRIM_75K_CK_PDN, PMIC_CLK_TRIM_75K_CK_PDN_ADDR, PMIC_CLK_TRIM_75K_CK_PDN_MASK, PMIC_CLK_TRIM_75K_CK_PDN_SHIFT},
    586. 

  586. 	{PMIC_CLK_EFUSE_CK_PDN, PMIC_CLK_EFUSE_CK_PDN_ADDR, PMIC_CLK_EFUSE_CK_PDN_MASK, PMIC_CLK_EFUSE_CK_PDN_SHIFT},
    587. 

  587. 	{PMIC_CLK_STRUP_75K_CK_PDN, PMIC_CLK_STRUP_75K_CK_PDN_ADDR, PMIC_CLK_STRUP_75K_CK_PDN_MASK, PMIC_CLK_STRUP_75K_CK_PDN_SHIFT},
    588. 

  588. 	{PMIC_CLK_STRUP_32K_CK_PDN, PMIC_CLK_STRUP_32K_CK_PDN_ADDR, PMIC_CLK_STRUP_32K_CK_PDN_MASK, PMIC_CLK_STRUP_32K_CK_PDN_SHIFT},
    589. 

  589. 	{PMIC_CLK_CKPDN_CON2_SET, PMIC_CLK_CKPDN_CON2_SET_ADDR, PMIC_CLK_CKPDN_CON2_SET_MASK, PMIC_CLK_CKPDN_CON2_SET_SHIFT},
    590. 

  590. 	{PMIC_CLK_CKPDN_CON2_CLR, PMIC_CLK_CKPDN_CON2_CLR_ADDR, PMIC_CLK_CKPDN_CON2_CLR_MASK, PMIC_CLK_CKPDN_CON2_CLR_SHIFT},
    591. 

  591. 	{PMIC_CLK_PCHR_32K_CK_PDN, PMIC_CLK_PCHR_32K_CK_PDN_ADDR, PMIC_CLK_PCHR_32K_CK_PDN_MASK, PMIC_CLK_PCHR_32K_CK_PDN_SHIFT},
    592. 

  592. 	{PMIC_CLK_PCHR_TEST_CK_PDN, PMIC_CLK_PCHR_TEST_CK_PDN_ADDR, PMIC_CLK_PCHR_TEST_CK_PDN_MASK, PMIC_CLK_PCHR_TEST_CK_PDN_SHIFT},
    593. 

  593. 	{PMIC_CLK_SPI_CK_PDN, PMIC_CLK_SPI_CK_PDN_ADDR, PMIC_CLK_SPI_CK_PDN_MASK, PMIC_CLK_SPI_CK_PDN_SHIFT},
    594. 

  594. 	{PMIC_CLK_BGR_TEST_CK_PDN, PMIC_CLK_BGR_TEST_CK_PDN_ADDR, PMIC_CLK_BGR_TEST_CK_PDN_MASK, PMIC_CLK_BGR_TEST_CK_PDN_SHIFT},
    595. 

  595. 	{PMIC_CLK_TYPE_C_CC_CK_PDN, PMIC_CLK_TYPE_C_CC_CK_PDN_ADDR, PMIC_CLK_TYPE_C_CC_CK_PDN_MASK, PMIC_CLK_TYPE_C_CC_CK_PDN_SHIFT},
    596. 

  596. 	{PMIC_CLK_TYPE_C_CSR_CK_PDN, PMIC_CLK_TYPE_C_CSR_CK_PDN_ADDR, PMIC_CLK_TYPE_C_CSR_CK_PDN_MASK, PMIC_CLK_TYPE_C_CSR_CK_PDN_SHIFT},
    597. 

  597. 	{PMIC_CLK_SPK_CK_PDN, PMIC_CLK_SPK_CK_PDN_ADDR, PMIC_CLK_SPK_CK_PDN_MASK, PMIC_CLK_SPK_CK_PDN_SHIFT},
    598. 

  598. 	{PMIC_CLK_SPK_PWM_CK_PDN, PMIC_CLK_SPK_PWM_CK_PDN_ADDR, PMIC_CLK_SPK_PWM_CK_PDN_MASK, PMIC_CLK_SPK_PWM_CK_PDN_SHIFT},
    599. 

  599. 	{PMIC_CLK_RSV_PDN, PMIC_CLK_RSV_PDN_ADDR, PMIC_CLK_RSV_PDN_MASK, PMIC_CLK_RSV_PDN_SHIFT},
    600. 

  600. 	{PMIC_CLK_CKPDN_CON3_SET, PMIC_CLK_CKPDN_CON3_SET_ADDR, PMIC_CLK_CKPDN_CON3_SET_MASK, PMIC_CLK_CKPDN_CON3_SET_SHIFT},
    601. 

  601. 	{PMIC_CLK_CKPDN_CON3_CLR, PMIC_CLK_CKPDN_CON3_CLR_ADDR, PMIC_CLK_CKPDN_CON3_CLR_MASK, PMIC_CLK_CKPDN_CON3_CLR_SHIFT},
    602. 

  602. 	{PMIC_CLK_G_SMPS_PD_CK_PDN_HWEN, PMIC_CLK_G_SMPS_PD_CK_PDN_HWEN_ADDR, PMIC_CLK_G_SMPS_PD_CK_PDN_HWEN_MASK, PMIC_CLK_G_SMPS_PD_CK_PDN_HWEN_SHIFT},
    603. 

  603. 	{PMIC_CLK_G_SMPS_AUD_CK_PDN_HWEN, PMIC_CLK_G_SMPS_AUD_CK_PDN_HWEN_ADDR, PMIC_CLK_G_SMPS_AUD_CK_PDN_HWEN_MASK, PMIC_CLK_G_SMPS_AUD_CK_PDN_HWEN_SHIFT},
    604. 

  604. 	{PMIC_CLK_AUXADC_SMPS_CK_PDN_HWEN, PMIC_CLK_AUXADC_SMPS_CK_PDN_HWEN_ADDR, PMIC_CLK_AUXADC_SMPS_CK_PDN_HWEN_MASK, PMIC_CLK_AUXADC_SMPS_CK_PDN_HWEN_SHIFT},
    605. 

  605. 	{PMIC_CLK_AUXADC_26M_CK_PDN_HWEN, PMIC_CLK_AUXADC_26M_CK_PDN_HWEN_ADDR, PMIC_CLK_AUXADC_26M_CK_PDN_HWEN_MASK, PMIC_CLK_AUXADC_26M_CK_PDN_HWEN_SHIFT},
    606. 

  606. 	{PMIC_CLK_AUXADC_CK_PDN_HWEN, PMIC_CLK_AUXADC_CK_PDN_HWEN_ADDR, PMIC_CLK_AUXADC_CK_PDN_HWEN_MASK, PMIC_CLK_AUXADC_CK_PDN_HWEN_SHIFT},
    607. 

  607. 	{PMIC_CLK_BUCK_1M_CK_PDN_HWEN, PMIC_CLK_BUCK_1M_CK_PDN_HWEN_ADDR, PMIC_CLK_BUCK_1M_CK_PDN_HWEN_MASK, PMIC_CLK_BUCK_1M_CK_PDN_HWEN_SHIFT},
    608. 

  608. 	{PMIC_CLK_BUCK_VPROC_9M_CK_PDN_HWEN, PMIC_CLK_BUCK_VPROC_9M_CK_PDN_HWEN_ADDR, PMIC_CLK_BUCK_VPROC_9M_CK_PDN_HWEN_MASK, PMIC_CLK_BUCK_VPROC_9M_CK_PDN_HWEN_SHIFT},
    609. 

  609. 	{PMIC_CLK_BUCK_VCORE_9M_CK_PDN_HWEN, PMIC_CLK_BUCK_VCORE_9M_CK_PDN_HWEN_ADDR, PMIC_CLK_BUCK_VCORE_9M_CK_PDN_HWEN_MASK, PMIC_CLK_BUCK_VCORE_9M_CK_PDN_HWEN_SHIFT},
    610. 

  610. 	{PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_HWEN, PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_HWEN_ADDR, PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_HWEN_MASK, PMIC_CLK_BUCK_VCORE2_9M_CK_PDN_HWEN_SHIFT},
    611. 

  611. 	{PMIC_CLK_BUCK_VPA_9M_CK_PDN_HWEN, PMIC_CLK_BUCK_VPA_9M_CK_PDN_HWEN_ADDR, PMIC_CLK_BUCK_VPA_9M_CK_PDN_HWEN_MASK, PMIC_CLK_BUCK_VPA_9M_CK_PDN_HWEN_SHIFT},
    612. 

  612. 	{PMIC_CLK_BUCK_VS1_9M_CK_PDN_HWEN, PMIC_CLK_BUCK_VS1_9M_CK_PDN_HWEN_ADDR, PMIC_CLK_BUCK_VS1_9M_CK_PDN_HWEN_MASK, PMIC_CLK_BUCK_VS1_9M_CK_PDN_HWEN_SHIFT},
    613. 

  613. 	{PMIC_CLK_STB_1M_CK_PDN_HWEN, PMIC_CLK_STB_1M_CK_PDN_HWEN_ADDR, PMIC_CLK_STB_1M_CK_PDN_HWEN_MASK, PMIC_CLK_STB_1M_CK_PDN_HWEN_SHIFT},
    614. 

  614. 	{PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_HWEN, PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_HWEN_ADDR, PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_HWEN_MASK, PMIC_CLK_LDO_VSRAM_PROC_9M_CK_PDN_HWEN_SHIFT},
    615. 

  615. 	{PMIC_CLK_RTC_26M_CK_PDN_HWEN, PMIC_CLK_RTC_26M_CK_PDN_HWEN_ADDR, PMIC_CLK_RTC_26M_CK_PDN_HWEN_MASK, PMIC_CLK_RTC_26M_CK_PDN_HWEN_SHIFT},
    616. 

  616. 	{PMIC_CLK_RSV_PDN_HWEN, PMIC_CLK_RSV_PDN_HWEN_ADDR, PMIC_CLK_RSV_PDN_HWEN_MASK, PMIC_CLK_RSV_PDN_HWEN_SHIFT},
    617. 

  617. 	{PMIC_CLK_CKPDN_HWEN_CON0_SET, PMIC_CLK_CKPDN_HWEN_CON0_SET_ADDR, PMIC_CLK_CKPDN_HWEN_CON0_SET_MASK, PMIC_CLK_CKPDN_HWEN_CON0_SET_SHIFT},
    618. 

  618. 	{PMIC_CLK_CKPDN_HWEN_CON0_CLR, PMIC_CLK_CKPDN_HWEN_CON0_CLR_ADDR, PMIC_CLK_CKPDN_HWEN_CON0_CLR_MASK, PMIC_CLK_CKPDN_HWEN_CON0_CLR_SHIFT},
    619. 

  619. 	{PMIC_CLK_AUDIF_CK_CKSEL, PMIC_CLK_AUDIF_CK_CKSEL_ADDR, PMIC_CLK_AUDIF_CK_CKSEL_MASK, PMIC_CLK_AUDIF_CK_CKSEL_SHIFT},
    620. 

  620. 	{PMIC_CLK_AUD_CK_CKSEL, PMIC_CLK_AUD_CK_CKSEL_ADDR, PMIC_CLK_AUD_CK_CKSEL_MASK, PMIC_CLK_AUD_CK_CKSEL_SHIFT},
    621. 

  621. 	{PMIC_CLK_FQMTR_CK_CKSEL, PMIC_CLK_FQMTR_CK_CKSEL_ADDR, PMIC_CLK_FQMTR_CK_CKSEL_MASK, PMIC_CLK_FQMTR_CK_CKSEL_SHIFT},
    622. 

  622. 	{PMIC_CLK_FGADC_ANA_CK_CKSEL, PMIC_CLK_FGADC_ANA_CK_CKSEL_ADDR, PMIC_CLK_FGADC_ANA_CK_CKSEL_MASK, PMIC_CLK_FGADC_ANA_CK_CKSEL_SHIFT},
    623. 

  623. 	{PMIC_CLK_PCHR_TEST_CK_CKSEL, PMIC_CLK_PCHR_TEST_CK_CKSEL_ADDR, PMIC_CLK_PCHR_TEST_CK_CKSEL_MASK, PMIC_CLK_PCHR_TEST_CK_CKSEL_SHIFT},
    624. 

  624. 	{PMIC_CLK_BGR_TEST_CK_CKSEL, PMIC_CLK_BGR_TEST_CK_CKSEL_ADDR, PMIC_CLK_BGR_TEST_CK_CKSEL_MASK, PMIC_CLK_BGR_TEST_CK_CKSEL_SHIFT},
    625. 

  625. 	{PMIC_CLK_EFUSE_CK_PDN_HWEN, PMIC_CLK_EFUSE_CK_PDN_HWEN_ADDR, PMIC_CLK_EFUSE_CK_PDN_HWEN_MASK, PMIC_CLK_EFUSE_CK_PDN_HWEN_SHIFT},
    626. 

  626. 	{PMIC_CLK_RSV_CKSEL, PMIC_CLK_RSV_CKSEL_ADDR, PMIC_CLK_RSV_CKSEL_MASK, PMIC_CLK_RSV_CKSEL_SHIFT},
    627. 

  627. 	{PMIC_CLK_CKSEL_CON0_SET, PMIC_CLK_CKSEL_CON0_SET_ADDR, PMIC_CLK_CKSEL_CON0_SET_MASK, PMIC_CLK_CKSEL_CON0_SET_SHIFT},
    628. 

  628. 	{PMIC_CLK_CKSEL_CON0_CLR, PMIC_CLK_CKSEL_CON0_CLR_ADDR, PMIC_CLK_CKSEL_CON0_CLR_MASK, PMIC_CLK_CKSEL_CON0_CLR_SHIFT},
    629. 

  629. 	{PMIC_CLK_AUXADC_SMPS_CK_DIVSEL, PMIC_CLK_AUXADC_SMPS_CK_DIVSEL_ADDR, PMIC_CLK_AUXADC_SMPS_CK_DIVSEL_MASK, PMIC_CLK_AUXADC_SMPS_CK_DIVSEL_SHIFT},
    630. 

  630. 	{PMIC_CLK_AUXADC_26M_CK_DIVSEL, PMIC_CLK_AUXADC_26M_CK_DIVSEL_ADDR, PMIC_CLK_AUXADC_26M_CK_DIVSEL_MASK, PMIC_CLK_AUXADC_26M_CK_DIVSEL_SHIFT},
    631. 

  631. 	{PMIC_CLK_BUCK_9M_CK_DIVSEL, PMIC_CLK_BUCK_9M_CK_DIVSEL_ADDR, PMIC_CLK_BUCK_9M_CK_DIVSEL_MASK, PMIC_CLK_BUCK_9M_CK_DIVSEL_SHIFT},
    632. 

  632. 	{PMIC_CLK_REG_CK_DIVSEL, PMIC_CLK_REG_CK_DIVSEL_ADDR, PMIC_CLK_REG_CK_DIVSEL_MASK, PMIC_CLK_REG_CK_DIVSEL_SHIFT},
    633. 

  633. 	{PMIC_CLK_SPK_CK_DIVSEL, PMIC_CLK_SPK_CK_DIVSEL_ADDR, PMIC_CLK_SPK_CK_DIVSEL_MASK, PMIC_CLK_SPK_CK_DIVSEL_SHIFT},
    634. 

  634. 	{PMIC_CLK_SPK_PWM_CK_DIVSEL, PMIC_CLK_SPK_PWM_CK_DIVSEL_ADDR, PMIC_CLK_SPK_PWM_CK_DIVSEL_MASK, PMIC_CLK_SPK_PWM_CK_DIVSEL_SHIFT},
    635. 

  635. 	{PMIC_CLK_RSV_DIVSEL, PMIC_CLK_RSV_DIVSEL_ADDR, PMIC_CLK_RSV_DIVSEL_MASK, PMIC_CLK_RSV_DIVSEL_SHIFT},
    636. 

  636. 	{PMIC_CLK_CKDIVSEL_CON0_SET, PMIC_CLK_CKDIVSEL_CON0_SET_ADDR, PMIC_CLK_CKDIVSEL_CON0_SET_MASK, PMIC_CLK_CKDIVSEL_CON0_SET_SHIFT},
    637. 

  637. 	{PMIC_CLK_CKDIVSEL_CON0_CLR, PMIC_CLK_CKDIVSEL_CON0_CLR_ADDR, PMIC_CLK_CKDIVSEL_CON0_CLR_MASK, PMIC_CLK_CKDIVSEL_CON0_CLR_SHIFT},
    638. 

  638. 	{PMIC_CLK_AUDIF_CK_TSTSEL, PMIC_CLK_AUDIF_CK_TSTSEL_ADDR, PMIC_CLK_AUDIF_CK_TSTSEL_MASK, PMIC_CLK_AUDIF_CK_TSTSEL_SHIFT},
    639. 

  639. 	{PMIC_CLK_AUD_CK_TSTSEL, PMIC_CLK_AUD_CK_TSTSEL_ADDR, PMIC_CLK_AUD_CK_TSTSEL_MASK, PMIC_CLK_AUD_CK_TSTSEL_SHIFT},
    640. 

  640. 	{PMIC_CLK_AUXADC_SMPS_CK_TSTSEL, PMIC_CLK_AUXADC_SMPS_CK_TSTSEL_ADDR, PMIC_CLK_AUXADC_SMPS_CK_TSTSEL_MASK, PMIC_CLK_AUXADC_SMPS_CK_TSTSEL_SHIFT},
    641. 

  641. 	{PMIC_CLK_AUXADC_26M_CK_TSTSEL, PMIC_CLK_AUXADC_26M_CK_TSTSEL_ADDR, PMIC_CLK_AUXADC_26M_CK_TSTSEL_MASK, PMIC_CLK_AUXADC_26M_CK_TSTSEL_SHIFT},
    642. 

  642. 	{PMIC_CLK_AUXADC_CK_TSTSEL, PMIC_CLK_AUXADC_CK_TSTSEL_ADDR, PMIC_CLK_AUXADC_CK_TSTSEL_MASK, PMIC_CLK_AUXADC_CK_TSTSEL_SHIFT},
    643. 

  643. 	{PMIC_CLK_DRV_CHRIND_CK_TSTSEL, PMIC_CLK_DRV_CHRIND_CK_TSTSEL_ADDR, PMIC_CLK_DRV_CHRIND_CK_TSTSEL_MASK, PMIC_CLK_DRV_CHRIND_CK_TSTSEL_SHIFT},
    644. 

  644. 	{PMIC_CLK_FQMTR_CK_TSTSEL, PMIC_CLK_FQMTR_CK_TSTSEL_ADDR, PMIC_CLK_FQMTR_CK_TSTSEL_MASK, PMIC_CLK_FQMTR_CK_TSTSEL_SHIFT},
    645. 

  645. 	{PMIC_CLK_RTCDET_CK_TSTSEL, PMIC_CLK_RTCDET_CK_TSTSEL_ADDR, PMIC_CLK_RTCDET_CK_TSTSEL_MASK, PMIC_CLK_RTCDET_CK_TSTSEL_SHIFT},
    646. 

  646. 	{PMIC_CLK_RTC_EOSC32_CK_TSTSEL, PMIC_CLK_RTC_EOSC32_CK_TSTSEL_ADDR, PMIC_CLK_RTC_EOSC32_CK_TSTSEL_MASK, PMIC_CLK_RTC_EOSC32_CK_TSTSEL_SHIFT},
    647. 

  647. 	{PMIC_CLK_EOSC_CALI_TEST_CK_TSTSEL, PMIC_CLK_EOSC_CALI_TEST_CK_TSTSEL_ADDR, PMIC_CLK_EOSC_CALI_TEST_CK_TSTSEL_MASK, PMIC_CLK_EOSC_CALI_TEST_CK_TSTSEL_SHIFT},
    648. 

  648. 	{PMIC_CLK_FGADC_ANA_CK_TSTSEL, PMIC_CLK_FGADC_ANA_CK_TSTSEL_ADDR, PMIC_CLK_FGADC_ANA_CK_TSTSEL_MASK, PMIC_CLK_FGADC_ANA_CK_TSTSEL_SHIFT},
    649. 

  649. 	{PMIC_CLK_PCHR_TEST_CK_TSTSEL, PMIC_CLK_PCHR_TEST_CK_TSTSEL_ADDR, PMIC_CLK_PCHR_TEST_CK_TSTSEL_MASK, PMIC_CLK_PCHR_TEST_CK_TSTSEL_SHIFT},
    650. 

  650. 	{PMIC_CLK_BGR_TEST_CK_TSTSEL, PMIC_CLK_BGR_TEST_CK_TSTSEL_ADDR, PMIC_CLK_BGR_TEST_CK_TSTSEL_MASK, PMIC_CLK_BGR_TEST_CK_TSTSEL_SHIFT},
    651. 

  651. 	{PMIC_CLK_RSV_TSTSEL, PMIC_CLK_RSV_TSTSEL_ADDR, PMIC_CLK_RSV_TSTSEL_MASK, PMIC_CLK_RSV_TSTSEL_SHIFT},
    652. 

  652. 	{PMIC_RG_EFUSE_MAN_RST, PMIC_RG_EFUSE_MAN_RST_ADDR, PMIC_RG_EFUSE_MAN_RST_MASK, PMIC_RG_EFUSE_MAN_RST_SHIFT},
    653. 

  653. 	{PMIC_RG_AUXADC_RST, PMIC_RG_AUXADC_RST_ADDR, PMIC_RG_AUXADC_RST_MASK, PMIC_RG_AUXADC_RST_SHIFT},
    654. 

  654. 	{PMIC_RG_AUXADC_REG_RST, PMIC_RG_AUXADC_REG_RST_ADDR, PMIC_RG_AUXADC_REG_RST_MASK, PMIC_RG_AUXADC_REG_RST_SHIFT},
    655. 

  655. 	{PMIC_RG_AUDIO_RST, PMIC_RG_AUDIO_RST_ADDR, PMIC_RG_AUDIO_RST_MASK, PMIC_RG_AUDIO_RST_SHIFT},
    656. 

  656. 	{PMIC_RG_ACCDET_RST, PMIC_RG_ACCDET_RST_ADDR, PMIC_RG_ACCDET_RST_MASK, PMIC_RG_ACCDET_RST_SHIFT},
    657. 

  657. 	{PMIC_RG_BIF_RST, PMIC_RG_BIF_RST_ADDR, PMIC_RG_BIF_RST_MASK, PMIC_RG_BIF_RST_SHIFT},
    658. 

  658. 	{PMIC_RG_DRIVER_RST, PMIC_RG_DRIVER_RST_ADDR, PMIC_RG_DRIVER_RST_MASK, PMIC_RG_DRIVER_RST_SHIFT},
    659. 

  659. 	{PMIC_RG_FGADC_RST, PMIC_RG_FGADC_RST_ADDR, PMIC_RG_FGADC_RST_MASK, PMIC_RG_FGADC_RST_SHIFT},
    660. 

  660. 	{PMIC_RG_FQMTR_RST, PMIC_RG_FQMTR_RST_ADDR, PMIC_RG_FQMTR_RST_MASK, PMIC_RG_FQMTR_RST_SHIFT},
    661. 

  661. 	{PMIC_RG_RTC_RST, PMIC_RG_RTC_RST_ADDR, PMIC_RG_RTC_RST_MASK, PMIC_RG_RTC_RST_SHIFT},
    662. 

  662. 	{PMIC_RG_TYPE_C_CC_RST, PMIC_RG_TYPE_C_CC_RST_ADDR, PMIC_RG_TYPE_C_CC_RST_MASK, PMIC_RG_TYPE_C_CC_RST_SHIFT},
    663. 

  663. 	{PMIC_RG_CHRWDT_RST, PMIC_RG_CHRWDT_RST_ADDR, PMIC_RG_CHRWDT_RST_MASK, PMIC_RG_CHRWDT_RST_SHIFT},
    664. 

  664. 	{PMIC_RG_ZCD_RST, PMIC_RG_ZCD_RST_ADDR, PMIC_RG_ZCD_RST_MASK, PMIC_RG_ZCD_RST_SHIFT},
    665. 

  665. 	{PMIC_RG_AUDNCP_RST, PMIC_RG_AUDNCP_RST_ADDR, PMIC_RG_AUDNCP_RST_MASK, PMIC_RG_AUDNCP_RST_SHIFT},
    666. 

  666. 	{PMIC_RG_CLK_TRIM_RST, PMIC_RG_CLK_TRIM_RST_ADDR, PMIC_RG_CLK_TRIM_RST_MASK, PMIC_RG_CLK_TRIM_RST_SHIFT},
    667. 

  667. 	{PMIC_RG_BUCK_SRCLKEN_RST, PMIC_RG_BUCK_SRCLKEN_RST_ADDR, PMIC_RG_BUCK_SRCLKEN_RST_MASK, PMIC_RG_BUCK_SRCLKEN_RST_SHIFT},
    668. 

  668. 	{PMIC_TOP_RST_CON0_SET, PMIC_TOP_RST_CON0_SET_ADDR, PMIC_TOP_RST_CON0_SET_MASK, PMIC_TOP_RST_CON0_SET_SHIFT},
    669. 

  669. 	{PMIC_TOP_RST_CON0_CLR, PMIC_TOP_RST_CON0_CLR_ADDR, PMIC_TOP_RST_CON0_CLR_MASK, PMIC_TOP_RST_CON0_CLR_SHIFT},
    670. 

  670. 	{PMIC_RG_STRUP_LONG_PRESS_RST, PMIC_RG_STRUP_LONG_PRESS_RST_ADDR, PMIC_RG_STRUP_LONG_PRESS_RST_MASK, PMIC_RG_STRUP_LONG_PRESS_RST_SHIFT},
    671. 

  671. 	{PMIC_RG_BUCK_PROT_PMPP_RST, PMIC_RG_BUCK_PROT_PMPP_RST_ADDR, PMIC_RG_BUCK_PROT_PMPP_RST_MASK, PMIC_RG_BUCK_PROT_PMPP_RST_SHIFT},
    672. 

  672. 	{PMIC_RG_SPK_RST, PMIC_RG_SPK_RST_ADDR, PMIC_RG_SPK_RST_MASK, PMIC_RG_SPK_RST_SHIFT},
    673. 

  673. 	{PMIC_TOP_RST_CON1_RSV, PMIC_TOP_RST_CON1_RSV_ADDR, PMIC_TOP_RST_CON1_RSV_MASK, PMIC_TOP_RST_CON1_RSV_SHIFT},
    674. 

  674. 	{PMIC_TOP_RST_CON1_SET, PMIC_TOP_RST_CON1_SET_ADDR, PMIC_TOP_RST_CON1_SET_MASK, PMIC_TOP_RST_CON1_SET_SHIFT},
    675. 

  675. 	{PMIC_TOP_RST_CON1_CLR, PMIC_TOP_RST_CON1_CLR_ADDR, PMIC_TOP_RST_CON1_CLR_MASK, PMIC_TOP_RST_CON1_CLR_SHIFT},
    676. 

  676. 	{PMIC_RG_CHR_LDO_DET_MODE, PMIC_RG_CHR_LDO_DET_MODE_ADDR, PMIC_RG_CHR_LDO_DET_MODE_MASK, PMIC_RG_CHR_LDO_DET_MODE_SHIFT},
    677. 

  677. 	{PMIC_RG_CHR_LDO_DET_SW, PMIC_RG_CHR_LDO_DET_SW_ADDR, PMIC_RG_CHR_LDO_DET_SW_MASK, PMIC_RG_CHR_LDO_DET_SW_SHIFT},
    678. 

  678. 	{PMIC_RG_CHRWDT_FLAG_MODE, PMIC_RG_CHRWDT_FLAG_MODE_ADDR, PMIC_RG_CHRWDT_FLAG_MODE_MASK, PMIC_RG_CHRWDT_FLAG_MODE_SHIFT},
    679. 

  679. 	{PMIC_RG_CHRWDT_FLAG_SW, PMIC_RG_CHRWDT_FLAG_SW_ADDR, PMIC_RG_CHRWDT_FLAG_SW_MASK, PMIC_RG_CHRWDT_FLAG_SW_SHIFT},
    680. 

  680. 	{PMIC_TOP_RST_CON2_RSV, PMIC_TOP_RST_CON2_RSV_ADDR, PMIC_TOP_RST_CON2_RSV_MASK, PMIC_TOP_RST_CON2_RSV_SHIFT},
    681. 

  681. 	{PMIC_RG_WDTRSTB_EN, PMIC_RG_WDTRSTB_EN_ADDR, PMIC_RG_WDTRSTB_EN_MASK, PMIC_RG_WDTRSTB_EN_SHIFT},
    682. 

  682. 	{PMIC_RG_WDTRSTB_MODE, PMIC_RG_WDTRSTB_MODE_ADDR, PMIC_RG_WDTRSTB_MODE_MASK, PMIC_RG_WDTRSTB_MODE_SHIFT},
    683. 

  683. 	{PMIC_WDTRSTB_STATUS, PMIC_WDTRSTB_STATUS_ADDR, PMIC_WDTRSTB_STATUS_MASK, PMIC_WDTRSTB_STATUS_SHIFT},
    684. 

  684. 	{PMIC_WDTRSTB_STATUS_CLR, PMIC_WDTRSTB_STATUS_CLR_ADDR, PMIC_WDTRSTB_STATUS_CLR_MASK, PMIC_WDTRSTB_STATUS_CLR_SHIFT},
    685. 

  685. 	{PMIC_RG_WDTRSTB_FB_EN, PMIC_RG_WDTRSTB_FB_EN_ADDR, PMIC_RG_WDTRSTB_FB_EN_MASK, PMIC_RG_WDTRSTB_FB_EN_SHIFT},
    686. 

  686. 	{PMIC_RG_WDTRSTB_DEB, PMIC_RG_WDTRSTB_DEB_ADDR, PMIC_RG_WDTRSTB_DEB_MASK, PMIC_RG_WDTRSTB_DEB_SHIFT},
    687. 

  687. 	{PMIC_RG_HOMEKEY_RST_EN, PMIC_RG_HOMEKEY_RST_EN_ADDR, PMIC_RG_HOMEKEY_RST_EN_MASK, PMIC_RG_HOMEKEY_RST_EN_SHIFT},
    688. 

  688. 	{PMIC_RG_PWRKEY_RST_EN, PMIC_RG_PWRKEY_RST_EN_ADDR, PMIC_RG_PWRKEY_RST_EN_MASK, PMIC_RG_PWRKEY_RST_EN_SHIFT},
    689. 

  689. 	{PMIC_RG_PWRRST_TMR_DIS, PMIC_RG_PWRRST_TMR_DIS_ADDR, PMIC_RG_PWRRST_TMR_DIS_MASK, PMIC_RG_PWRRST_TMR_DIS_SHIFT},
    690. 

  690. 	{PMIC_RG_PWRKEY_RST_TD, PMIC_RG_PWRKEY_RST_TD_ADDR, PMIC_RG_PWRKEY_RST_TD_MASK, PMIC_RG_PWRKEY_RST_TD_SHIFT},
    691. 

  691. 	{PMIC_TOP_RST_MISC_RSV, PMIC_TOP_RST_MISC_RSV_ADDR, PMIC_TOP_RST_MISC_RSV_MASK, PMIC_TOP_RST_MISC_RSV_SHIFT},
    692. 

  692. 	{PMIC_TOP_RST_MISC_SET, PMIC_TOP_RST_MISC_SET_ADDR, PMIC_TOP_RST_MISC_SET_MASK, PMIC_TOP_RST_MISC_SET_SHIFT},
    693. 

  693. 	{PMIC_TOP_RST_MISC_CLR, PMIC_TOP_RST_MISC_CLR_ADDR, PMIC_TOP_RST_MISC_CLR_MASK, PMIC_TOP_RST_MISC_CLR_SHIFT},
    694. 

  694. 	{PMIC_VPWRIN_RSTB_STATUS, PMIC_VPWRIN_RSTB_STATUS_ADDR, PMIC_VPWRIN_RSTB_STATUS_MASK, PMIC_VPWRIN_RSTB_STATUS_SHIFT},
    695. 

  695. 	{PMIC_DDLO_RSTB_STATUS, PMIC_DDLO_RSTB_STATUS_ADDR, PMIC_DDLO_RSTB_STATUS_MASK, PMIC_DDLO_RSTB_STATUS_SHIFT},
    696. 

  696. 	{PMIC_UVLO_RSTB_STATUS, PMIC_UVLO_RSTB_STATUS_ADDR, PMIC_UVLO_RSTB_STATUS_MASK, PMIC_UVLO_RSTB_STATUS_SHIFT},
    697. 

  697. 	{PMIC_RTC_DDLO_RSTB_STATUS, PMIC_RTC_DDLO_RSTB_STATUS_ADDR, PMIC_RTC_DDLO_RSTB_STATUS_MASK, PMIC_RTC_DDLO_RSTB_STATUS_SHIFT},
    698. 

  698. 	{PMIC_CHRWDT_REG_RSTB_STATUS, PMIC_CHRWDT_REG_RSTB_STATUS_ADDR, PMIC_CHRWDT_REG_RSTB_STATUS_MASK, PMIC_CHRWDT_REG_RSTB_STATUS_SHIFT},
    699. 

  699. 	{PMIC_CHRDET_REG_RSTB_STATUS, PMIC_CHRDET_REG_RSTB_STATUS_ADDR, PMIC_CHRDET_REG_RSTB_STATUS_MASK, PMIC_CHRDET_REG_RSTB_STATUS_SHIFT},
    700. 

  700. 	{PMIC_TOP_RST_STATUS_RSV, PMIC_TOP_RST_STATUS_RSV_ADDR, PMIC_TOP_RST_STATUS_RSV_MASK, PMIC_TOP_RST_STATUS_RSV_SHIFT},
    701. 

  701. 	{PMIC_TOP_RST_STATUS_SET, PMIC_TOP_RST_STATUS_SET_ADDR, PMIC_TOP_RST_STATUS_SET_MASK, PMIC_TOP_RST_STATUS_SET_SHIFT},
    702. 

  702. 	{PMIC_TOP_RST_STATUS_CLR, PMIC_TOP_RST_STATUS_CLR_ADDR, PMIC_TOP_RST_STATUS_CLR_MASK, PMIC_TOP_RST_STATUS_CLR_SHIFT},
    703. 

  703. 	{PMIC_TOP_RST_RSV_CON0, PMIC_TOP_RST_RSV_CON0_ADDR, PMIC_TOP_RST_RSV_CON0_MASK, PMIC_TOP_RST_RSV_CON0_SHIFT},
    704. 

  704. 	{PMIC_TOP_RST_RSV_CON1, PMIC_TOP_RST_RSV_CON1_ADDR, PMIC_TOP_RST_RSV_CON1_MASK, PMIC_TOP_RST_RSV_CON1_SHIFT},
    705. 

  705. 	{PMIC_RG_INT_EN_PWRKEY, PMIC_RG_INT_EN_PWRKEY_ADDR, PMIC_RG_INT_EN_PWRKEY_MASK, PMIC_RG_INT_EN_PWRKEY_SHIFT},
    706. 

  706. 	{PMIC_RG_INT_EN_HOMEKEY, PMIC_RG_INT_EN_HOMEKEY_ADDR, PMIC_RG_INT_EN_HOMEKEY_MASK, PMIC_RG_INT_EN_HOMEKEY_SHIFT},
    707. 

  707. 	{PMIC_RG_INT_EN_PWRKEY_R, PMIC_RG_INT_EN_PWRKEY_R_ADDR, PMIC_RG_INT_EN_PWRKEY_R_MASK, PMIC_RG_INT_EN_PWRKEY_R_SHIFT},
    708. 

  708. 	{PMIC_RG_INT_EN_HOMEKEY_R, PMIC_RG_INT_EN_HOMEKEY_R_ADDR, PMIC_RG_INT_EN_HOMEKEY_R_MASK, PMIC_RG_INT_EN_HOMEKEY_R_SHIFT},
    709. 

  709. 	{PMIC_RG_INT_EN_THR_H, PMIC_RG_INT_EN_THR_H_ADDR, PMIC_RG_INT_EN_THR_H_MASK, PMIC_RG_INT_EN_THR_H_SHIFT},
    710. 

  710. 	{PMIC_RG_INT_EN_THR_L, PMIC_RG_INT_EN_THR_L_ADDR, PMIC_RG_INT_EN_THR_L_MASK, PMIC_RG_INT_EN_THR_L_SHIFT},
    711. 

  711. 	{PMIC_RG_INT_EN_BAT_H, PMIC_RG_INT_EN_BAT_H_ADDR, PMIC_RG_INT_EN_BAT_H_MASK, PMIC_RG_INT_EN_BAT_H_SHIFT},
    712. 

  712. 	{PMIC_RG_INT_EN_BAT_L, PMIC_RG_INT_EN_BAT_L_ADDR, PMIC_RG_INT_EN_BAT_L_MASK, PMIC_RG_INT_EN_BAT_L_SHIFT},
    713. 

  713. 	{PMIC_RG_INT_EN_RTC, PMIC_RG_INT_EN_RTC_ADDR, PMIC_RG_INT_EN_RTC_MASK, PMIC_RG_INT_EN_RTC_SHIFT},
    714. 

  714. 	{PMIC_RG_INT_EN_AUDIO, PMIC_RG_INT_EN_AUDIO_ADDR, PMIC_RG_INT_EN_AUDIO_MASK, PMIC_RG_INT_EN_AUDIO_SHIFT},
    715. 

  715. 	{PMIC_RG_INT_EN_ACCDET, PMIC_RG_INT_EN_ACCDET_ADDR, PMIC_RG_INT_EN_ACCDET_MASK, PMIC_RG_INT_EN_ACCDET_SHIFT},
    716. 

  716. 	{PMIC_RG_INT_EN_ACCDET_EINT, PMIC_RG_INT_EN_ACCDET_EINT_ADDR, PMIC_RG_INT_EN_ACCDET_EINT_MASK, PMIC_RG_INT_EN_ACCDET_EINT_SHIFT},
    717. 

  717. 	{PMIC_RG_INT_EN_ACCDET_NEGV, PMIC_RG_INT_EN_ACCDET_NEGV_ADDR, PMIC_RG_INT_EN_ACCDET_NEGV_MASK, PMIC_RG_INT_EN_ACCDET_NEGV_SHIFT},
    718. 

  718. 	{PMIC_RG_INT_EN_NI_LBAT_INT, PMIC_RG_INT_EN_NI_LBAT_INT_ADDR, PMIC_RG_INT_EN_NI_LBAT_INT_MASK, PMIC_RG_INT_EN_NI_LBAT_INT_SHIFT},
    719. 

  719. 	{PMIC_INT_CON0_SET, PMIC_INT_CON0_SET_ADDR, PMIC_INT_CON0_SET_MASK, PMIC_INT_CON0_SET_SHIFT},
    720. 

  720. 	{PMIC_INT_CON0_CLR, PMIC_INT_CON0_CLR_ADDR, PMIC_INT_CON0_CLR_MASK, PMIC_INT_CON0_CLR_SHIFT},
    721. 

  721. 	{PMIC_RG_INT_EN_VCORE_OC, PMIC_RG_INT_EN_VCORE_OC_ADDR, PMIC_RG_INT_EN_VCORE_OC_MASK, PMIC_RG_INT_EN_VCORE_OC_SHIFT},
    722. 

  722. 	{PMIC_RG_INT_EN_VPROC_OC, PMIC_RG_INT_EN_VPROC_OC_ADDR, PMIC_RG_INT_EN_VPROC_OC_MASK, PMIC_RG_INT_EN_VPROC_OC_SHIFT},
    723. 

  723. 	{PMIC_RG_INT_EN_VS1_OC, PMIC_RG_INT_EN_VS1_OC_ADDR, PMIC_RG_INT_EN_VS1_OC_MASK, PMIC_RG_INT_EN_VS1_OC_SHIFT},
    724. 

  724. 	{PMIC_RG_INT_EN_VPA_OC, PMIC_RG_INT_EN_VPA_OC_ADDR, PMIC_RG_INT_EN_VPA_OC_MASK, PMIC_RG_INT_EN_VPA_OC_SHIFT},
    725. 

  725. 	{PMIC_RG_INT_EN_SPKL_D, PMIC_RG_INT_EN_SPKL_D_ADDR, PMIC_RG_INT_EN_SPKL_D_MASK, PMIC_RG_INT_EN_SPKL_D_SHIFT},
    726. 

  726. 	{PMIC_RG_INT_EN_SPKL_AB, PMIC_RG_INT_EN_SPKL_AB_ADDR, PMIC_RG_INT_EN_SPKL_AB_MASK, PMIC_RG_INT_EN_SPKL_AB_SHIFT},
    727. 

  727. 	{PMIC_RG_INT_EN_LDO_OC, PMIC_RG_INT_EN_LDO_OC_ADDR, PMIC_RG_INT_EN_LDO_OC_MASK, PMIC_RG_INT_EN_LDO_OC_SHIFT},
    728. 

  728. 	{PMIC_INT_CON1_SET, PMIC_INT_CON1_SET_ADDR, PMIC_INT_CON1_SET_MASK, PMIC_INT_CON1_SET_SHIFT},
    729. 

  729. 	{PMIC_INT_CON1_CLR, PMIC_INT_CON1_CLR_ADDR, PMIC_INT_CON1_CLR_MASK, PMIC_INT_CON1_CLR_SHIFT},
    730. 

  730. 	{PMIC_RG_INT_EN_TYPE_C_L_MIN, PMIC_RG_INT_EN_TYPE_C_L_MIN_ADDR, PMIC_RG_INT_EN_TYPE_C_L_MIN_MASK, PMIC_RG_INT_EN_TYPE_C_L_MIN_SHIFT},
    731. 

  731. 	{PMIC_RG_INT_EN_TYPE_C_L_MAX, PMIC_RG_INT_EN_TYPE_C_L_MAX_ADDR, PMIC_RG_INT_EN_TYPE_C_L_MAX_MASK, PMIC_RG_INT_EN_TYPE_C_L_MAX_SHIFT},
    732. 

  732. 	{PMIC_RG_INT_EN_TYPE_C_H_MIN, PMIC_RG_INT_EN_TYPE_C_H_MIN_ADDR, PMIC_RG_INT_EN_TYPE_C_H_MIN_MASK, PMIC_RG_INT_EN_TYPE_C_H_MIN_SHIFT},
    733. 

  733. 	{PMIC_RG_INT_EN_TYPE_C_H_MAX, PMIC_RG_INT_EN_TYPE_C_H_MAX_ADDR, PMIC_RG_INT_EN_TYPE_C_H_MAX_MASK, PMIC_RG_INT_EN_TYPE_C_H_MAX_SHIFT},
    734. 

  734. 	{PMIC_RG_INT_EN_AUXADC_IMP, PMIC_RG_INT_EN_AUXADC_IMP_ADDR, PMIC_RG_INT_EN_AUXADC_IMP_MASK, PMIC_RG_INT_EN_AUXADC_IMP_SHIFT},
    735. 

  735. 	{PMIC_RG_INT_EN_NAG_C_DLTV, PMIC_RG_INT_EN_NAG_C_DLTV_ADDR, PMIC_RG_INT_EN_NAG_C_DLTV_MASK, PMIC_RG_INT_EN_NAG_C_DLTV_SHIFT},
    736. 

  736. 	{PMIC_RG_INT_EN_TYPE_C_CC_IRQ, PMIC_RG_INT_EN_TYPE_C_CC_IRQ_ADDR, PMIC_RG_INT_EN_TYPE_C_CC_IRQ_MASK, PMIC_RG_INT_EN_TYPE_C_CC_IRQ_SHIFT},
    737. 

  737. 	{PMIC_RG_INT_EN_CHRDET_EDGE, PMIC_RG_INT_EN_CHRDET_EDGE_ADDR, PMIC_RG_INT_EN_CHRDET_EDGE_MASK, PMIC_RG_INT_EN_CHRDET_EDGE_SHIFT},
    738. 

  738. 	{PMIC_RG_INT_EN_OV, PMIC_RG_INT_EN_OV_ADDR, PMIC_RG_INT_EN_OV_MASK, PMIC_RG_INT_EN_OV_SHIFT},
    739. 

  739. 	{PMIC_RG_INT_EN_BVALID_DET, PMIC_RG_INT_EN_BVALID_DET_ADDR, PMIC_RG_INT_EN_BVALID_DET_MASK, PMIC_RG_INT_EN_BVALID_DET_SHIFT},
    740. 

  740. 	{PMIC_RG_INT_EN_RGS_BATON_HV, PMIC_RG_INT_EN_RGS_BATON_HV_ADDR, PMIC_RG_INT_EN_RGS_BATON_HV_MASK, PMIC_RG_INT_EN_RGS_BATON_HV_SHIFT},
    741. 

  741. 	{PMIC_RG_INT_EN_VBATON_UNDET, PMIC_RG_INT_EN_VBATON_UNDET_ADDR, PMIC_RG_INT_EN_VBATON_UNDET_MASK, PMIC_RG_INT_EN_VBATON_UNDET_SHIFT},
    742. 

  742. 	{PMIC_RG_INT_EN_WATCHDOG, PMIC_RG_INT_EN_WATCHDOG_ADDR, PMIC_RG_INT_EN_WATCHDOG_MASK, PMIC_RG_INT_EN_WATCHDOG_SHIFT},
    743. 

  743. 	{PMIC_RG_INT_EN_PCHR_CM_VDEC, PMIC_RG_INT_EN_PCHR_CM_VDEC_ADDR, PMIC_RG_INT_EN_PCHR_CM_VDEC_MASK, PMIC_RG_INT_EN_PCHR_CM_VDEC_SHIFT},
    744. 

  744. 	{PMIC_RG_INT_EN_CHRDET, PMIC_RG_INT_EN_CHRDET_ADDR, PMIC_RG_INT_EN_CHRDET_MASK, PMIC_RG_INT_EN_CHRDET_SHIFT},
    745. 

  745. 	{PMIC_RG_INT_EN_PCHR_CM_VINC, PMIC_RG_INT_EN_PCHR_CM_VINC_ADDR, PMIC_RG_INT_EN_PCHR_CM_VINC_MASK, PMIC_RG_INT_EN_PCHR_CM_VINC_SHIFT},
    746. 

  746. 	{PMIC_INT_CON2_SET, PMIC_INT_CON2_SET_ADDR, PMIC_INT_CON2_SET_MASK, PMIC_INT_CON2_SET_SHIFT},
    747. 

  747. 	{PMIC_INT_CON2_CLR, PMIC_INT_CON2_CLR_ADDR, PMIC_INT_CON2_CLR_MASK, PMIC_INT_CON2_CLR_SHIFT},
    748. 

  748. 	{PMIC_RG_INT_EN_FG_BAT_H, PMIC_RG_INT_EN_FG_BAT_H_ADDR, PMIC_RG_INT_EN_FG_BAT_H_MASK, PMIC_RG_INT_EN_FG_BAT_H_SHIFT},
    749. 

  749. 	{PMIC_RG_INT_EN_FG_BAT_L, PMIC_RG_INT_EN_FG_BAT_L_ADDR, PMIC_RG_INT_EN_FG_BAT_L_MASK, PMIC_RG_INT_EN_FG_BAT_L_SHIFT},
    750. 

  750. 	{PMIC_RG_INT_EN_FG_CUR_H, PMIC_RG_INT_EN_FG_CUR_H_ADDR, PMIC_RG_INT_EN_FG_CUR_H_MASK, PMIC_RG_INT_EN_FG_CUR_H_SHIFT},
    751. 

  751. 	{PMIC_RG_INT_EN_FG_CUR_L, PMIC_RG_INT_EN_FG_CUR_L_ADDR, PMIC_RG_INT_EN_FG_CUR_L_MASK, PMIC_RG_INT_EN_FG_CUR_L_SHIFT},
    752. 

  752. 	{PMIC_RG_INT_EN_FG_ZCV, PMIC_RG_INT_EN_FG_ZCV_ADDR, PMIC_RG_INT_EN_FG_ZCV_MASK, PMIC_RG_INT_EN_FG_ZCV_SHIFT},
    753. 

  753. 	{PMIC_INT_CON3_SET, PMIC_INT_CON3_SET_ADDR, PMIC_INT_CON3_SET_MASK, PMIC_INT_CON3_SET_SHIFT},
    754. 

  754. 	{PMIC_INT_CON3_CLR, PMIC_INT_CON3_CLR_ADDR, PMIC_INT_CON3_CLR_MASK, PMIC_INT_CON3_CLR_SHIFT},
    755. 

  755. 	{PMIC_POLARITY, PMIC_POLARITY_ADDR, PMIC_POLARITY_MASK, PMIC_POLARITY_SHIFT},
    756. 

  756. 	{PMIC_RG_HOMEKEY_INT_SEL, PMIC_RG_HOMEKEY_INT_SEL_ADDR, PMIC_RG_HOMEKEY_INT_SEL_MASK, PMIC_RG_HOMEKEY_INT_SEL_SHIFT},
    757. 

  757. 	{PMIC_RG_PWRKEY_INT_SEL, PMIC_RG_PWRKEY_INT_SEL_ADDR, PMIC_RG_PWRKEY_INT_SEL_MASK, PMIC_RG_PWRKEY_INT_SEL_SHIFT},
    758. 

  758. 	{PMIC_RG_CHRDET_INT_SEL, PMIC_RG_CHRDET_INT_SEL_ADDR, PMIC_RG_CHRDET_INT_SEL_MASK, PMIC_RG_CHRDET_INT_SEL_SHIFT},
    759. 

  759. 	{PMIC_RG_PCHR_CM_VINC_POLARITY_RSV, PMIC_RG_PCHR_CM_VINC_POLARITY_RSV_ADDR, PMIC_RG_PCHR_CM_VINC_POLARITY_RSV_MASK, PMIC_RG_PCHR_CM_VINC_POLARITY_RSV_SHIFT},
    760. 

  760. 	{PMIC_RG_PCHR_CM_VDEC_POLARITY_RSV, PMIC_RG_PCHR_CM_VDEC_POLARITY_RSV_ADDR, PMIC_RG_PCHR_CM_VDEC_POLARITY_RSV_MASK, PMIC_RG_PCHR_CM_VDEC_POLARITY_RSV_SHIFT},
    761. 

  761. 	{PMIC_INT_MISC_CON_SET, PMIC_INT_MISC_CON_SET_ADDR, PMIC_INT_MISC_CON_SET_MASK, PMIC_INT_MISC_CON_SET_SHIFT},
    762. 

  762. 	{PMIC_INT_MISC_CON_CLR, PMIC_INT_MISC_CON_CLR_ADDR, PMIC_INT_MISC_CON_CLR_MASK, PMIC_INT_MISC_CON_CLR_SHIFT},
    763. 

  763. 	{PMIC_RG_INT_STATUS_PWRKEY, PMIC_RG_INT_STATUS_PWRKEY_ADDR, PMIC_RG_INT_STATUS_PWRKEY_MASK, PMIC_RG_INT_STATUS_PWRKEY_SHIFT},
    764. 

  764. 	{PMIC_RG_INT_STATUS_HOMEKEY, PMIC_RG_INT_STATUS_HOMEKEY_ADDR, PMIC_RG_INT_STATUS_HOMEKEY_MASK, PMIC_RG_INT_STATUS_HOMEKEY_SHIFT},
    765. 

  765. 	{PMIC_RG_INT_STATUS_PWRKEY_R, PMIC_RG_INT_STATUS_PWRKEY_R_ADDR, PMIC_RG_INT_STATUS_PWRKEY_R_MASK, PMIC_RG_INT_STATUS_PWRKEY_R_SHIFT},
    766. 

  766. 	{PMIC_RG_INT_STATUS_HOMEKEY_R, PMIC_RG_INT_STATUS_HOMEKEY_R_ADDR, PMIC_RG_INT_STATUS_HOMEKEY_R_MASK, PMIC_RG_INT_STATUS_HOMEKEY_R_SHIFT},
    767. 

  767. 	{PMIC_RG_INT_STATUS_THR_H, PMIC_RG_INT_STATUS_THR_H_ADDR, PMIC_RG_INT_STATUS_THR_H_MASK, PMIC_RG_INT_STATUS_THR_H_SHIFT},
    768. 

  768. 	{PMIC_RG_INT_STATUS_THR_L, PMIC_RG_INT_STATUS_THR_L_ADDR, PMIC_RG_INT_STATUS_THR_L_MASK, PMIC_RG_INT_STATUS_THR_L_SHIFT},
    769. 

  769. 	{PMIC_RG_INT_STATUS_BAT_H, PMIC_RG_INT_STATUS_BAT_H_ADDR, PMIC_RG_INT_STATUS_BAT_H_MASK, PMIC_RG_INT_STATUS_BAT_H_SHIFT},
    770. 

  770. 	{PMIC_RG_INT_STATUS_BAT_L, PMIC_RG_INT_STATUS_BAT_L_ADDR, PMIC_RG_INT_STATUS_BAT_L_MASK, PMIC_RG_INT_STATUS_BAT_L_SHIFT},
    771. 

  771. 	{PMIC_RG_INT_STATUS_RTC, PMIC_RG_INT_STATUS_RTC_ADDR, PMIC_RG_INT_STATUS_RTC_MASK, PMIC_RG_INT_STATUS_RTC_SHIFT},
    772. 

  772. 	{PMIC_RG_INT_STATUS_AUDIO, PMIC_RG_INT_STATUS_AUDIO_ADDR, PMIC_RG_INT_STATUS_AUDIO_MASK, PMIC_RG_INT_STATUS_AUDIO_SHIFT},
    773. 

  773. 	{PMIC_RG_INT_STATUS_ACCDET, PMIC_RG_INT_STATUS_ACCDET_ADDR, PMIC_RG_INT_STATUS_ACCDET_MASK, PMIC_RG_INT_STATUS_ACCDET_SHIFT},
    774. 

  774. 	{PMIC_RG_INT_STATUS_ACCDET_EINT, PMIC_RG_INT_STATUS_ACCDET_EINT_ADDR, PMIC_RG_INT_STATUS_ACCDET_EINT_MASK, PMIC_RG_INT_STATUS_ACCDET_EINT_SHIFT},
    775. 

  775. 	{PMIC_RG_INT_STATUS_ACCDET_NEGV, PMIC_RG_INT_STATUS_ACCDET_NEGV_ADDR, PMIC_RG_INT_STATUS_ACCDET_NEGV_MASK, PMIC_RG_INT_STATUS_ACCDET_NEGV_SHIFT},
    776. 

  776. 	{PMIC_RG_INT_STATUS_NI_LBAT_INT, PMIC_RG_INT_STATUS_NI_LBAT_INT_ADDR, PMIC_RG_INT_STATUS_NI_LBAT_INT_MASK, PMIC_RG_INT_STATUS_NI_LBAT_INT_SHIFT},
    777. 

  777. 	{PMIC_RG_INT_STATUS_VCORE_OC, PMIC_RG_INT_STATUS_VCORE_OC_ADDR, PMIC_RG_INT_STATUS_VCORE_OC_MASK, PMIC_RG_INT_STATUS_VCORE_OC_SHIFT},
    778. 

  778. 	{PMIC_RG_INT_STATUS_VPROC_OC, PMIC_RG_INT_STATUS_VPROC_OC_ADDR, PMIC_RG_INT_STATUS_VPROC_OC_MASK, PMIC_RG_INT_STATUS_VPROC_OC_SHIFT},
    779. 

  779. 	{PMIC_RG_INT_STATUS_VS1_OC, PMIC_RG_INT_STATUS_VS1_OC_ADDR, PMIC_RG_INT_STATUS_VS1_OC_MASK, PMIC_RG_INT_STATUS_VS1_OC_SHIFT},
    780. 

  780. 	{PMIC_RG_INT_STATUS_VPA_OC, PMIC_RG_INT_STATUS_VPA_OC_ADDR, PMIC_RG_INT_STATUS_VPA_OC_MASK, PMIC_RG_INT_STATUS_VPA_OC_SHIFT},
    781. 

  781. 	{PMIC_RG_INT_STATUS_SPKL_D, PMIC_RG_INT_STATUS_SPKL_D_ADDR, PMIC_RG_INT_STATUS_SPKL_D_MASK, PMIC_RG_INT_STATUS_SPKL_D_SHIFT},
    782. 

  782. 	{PMIC_RG_INT_STATUS_SPKL_AB, PMIC_RG_INT_STATUS_SPKL_AB_ADDR, PMIC_RG_INT_STATUS_SPKL_AB_MASK, PMIC_RG_INT_STATUS_SPKL_AB_SHIFT},
    783. 

  783. 	{PMIC_RG_INT_STATUS_LDO_OC, PMIC_RG_INT_STATUS_LDO_OC_ADDR, PMIC_RG_INT_STATUS_LDO_OC_MASK, PMIC_RG_INT_STATUS_LDO_OC_SHIFT},
    784. 

  784. 	{PMIC_RG_INT_STATUS_TYPE_C_L_MIN, PMIC_RG_INT_STATUS_TYPE_C_L_MIN_ADDR, PMIC_RG_INT_STATUS_TYPE_C_L_MIN_MASK, PMIC_RG_INT_STATUS_TYPE_C_L_MIN_SHIFT},
    785. 

  785. 	{PMIC_RG_INT_STATUS_TYPE_C_L_MAX, PMIC_RG_INT_STATUS_TYPE_C_L_MAX_ADDR, PMIC_RG_INT_STATUS_TYPE_C_L_MAX_MASK, PMIC_RG_INT_STATUS_TYPE_C_L_MAX_SHIFT},
    786. 

  786. 	{PMIC_RG_INT_STATUS_TYPE_C_H_MIN, PMIC_RG_INT_STATUS_TYPE_C_H_MIN_ADDR, PMIC_RG_INT_STATUS_TYPE_C_H_MIN_MASK, PMIC_RG_INT_STATUS_TYPE_C_H_MIN_SHIFT},
    787. 

  787. 	{PMIC_RG_INT_STATUS_TYPE_C_H_MAX, PMIC_RG_INT_STATUS_TYPE_C_H_MAX_ADDR, PMIC_RG_INT_STATUS_TYPE_C_H_MAX_MASK, PMIC_RG_INT_STATUS_TYPE_C_H_MAX_SHIFT},
    788. 

  788. 	{PMIC_RG_INT_STATUS_AUXADC_IMP, PMIC_RG_INT_STATUS_AUXADC_IMP_ADDR, PMIC_RG_INT_STATUS_AUXADC_IMP_MASK, PMIC_RG_INT_STATUS_AUXADC_IMP_SHIFT},
    789. 

  789. 	{PMIC_RG_INT_STATUS_NAG_C_DLTV, PMIC_RG_INT_STATUS_NAG_C_DLTV_ADDR, PMIC_RG_INT_STATUS_NAG_C_DLTV_MASK, PMIC_RG_INT_STATUS_NAG_C_DLTV_SHIFT},
    790. 

  790. 	{PMIC_RG_INT_STATUS_TYPE_C_CC_IRQ, PMIC_RG_INT_STATUS_TYPE_C_CC_IRQ_ADDR, PMIC_RG_INT_STATUS_TYPE_C_CC_IRQ_MASK, PMIC_RG_INT_STATUS_TYPE_C_CC_IRQ_SHIFT},
    791. 

  791. 	{PMIC_RG_INT_STATUS_CHRDET_EDGE, PMIC_RG_INT_STATUS_CHRDET_EDGE_ADDR, PMIC_RG_INT_STATUS_CHRDET_EDGE_MASK, PMIC_RG_INT_STATUS_CHRDET_EDGE_SHIFT},
    792. 

  792. 	{PMIC_RG_INT_STATUS_OV, PMIC_RG_INT_STATUS_OV_ADDR, PMIC_RG_INT_STATUS_OV_MASK, PMIC_RG_INT_STATUS_OV_SHIFT},
    793. 

  793. 	{PMIC_RG_INT_STATUS_BVALID_DET, PMIC_RG_INT_STATUS_BVALID_DET_ADDR, PMIC_RG_INT_STATUS_BVALID_DET_MASK, PMIC_RG_INT_STATUS_BVALID_DET_SHIFT},
    794. 

  794. 	{PMIC_RG_INT_STATUS_RGS_BATON_HV, PMIC_RG_INT_STATUS_RGS_BATON_HV_ADDR, PMIC_RG_INT_STATUS_RGS_BATON_HV_MASK, PMIC_RG_INT_STATUS_RGS_BATON_HV_SHIFT},
    795. 

  795. 	{PMIC_RG_INT_STATUS_VBATON_UNDET, PMIC_RG_INT_STATUS_VBATON_UNDET_ADDR, PMIC_RG_INT_STATUS_VBATON_UNDET_MASK, PMIC_RG_INT_STATUS_VBATON_UNDET_SHIFT},
    796. 

  796. 	{PMIC_RG_INT_STATUS_WATCHDOG, PMIC_RG_INT_STATUS_WATCHDOG_ADDR, PMIC_RG_INT_STATUS_WATCHDOG_MASK, PMIC_RG_INT_STATUS_WATCHDOG_SHIFT},
    797. 

  797. 	{PMIC_RG_INT_STATUS_PCHR_CM_VDEC, PMIC_RG_INT_STATUS_PCHR_CM_VDEC_ADDR, PMIC_RG_INT_STATUS_PCHR_CM_VDEC_MASK, PMIC_RG_INT_STATUS_PCHR_CM_VDEC_SHIFT},
    798. 

  798. 	{PMIC_RG_INT_STATUS_CHRDET, PMIC_RG_INT_STATUS_CHRDET_ADDR, PMIC_RG_INT_STATUS_CHRDET_MASK, PMIC_RG_INT_STATUS_CHRDET_SHIFT},
    799. 

  799. 	{PMIC_RG_INT_STATUS_PCHR_CM_VINC, PMIC_RG_INT_STATUS_PCHR_CM_VINC_ADDR, PMIC_RG_INT_STATUS_PCHR_CM_VINC_MASK, PMIC_RG_INT_STATUS_PCHR_CM_VINC_SHIFT},
    800. 

  800. 	{PMIC_RG_INT_STATUS_FG_BAT_H, PMIC_RG_INT_STATUS_FG_BAT_H_ADDR, PMIC_RG_INT_STATUS_FG_BAT_H_MASK, PMIC_RG_INT_STATUS_FG_BAT_H_SHIFT},
    801. 

  801. 	{PMIC_RG_INT_STATUS_FG_BAT_L, PMIC_RG_INT_STATUS_FG_BAT_L_ADDR, PMIC_RG_INT_STATUS_FG_BAT_L_MASK, PMIC_RG_INT_STATUS_FG_BAT_L_SHIFT},
    802. 

  802. 	{PMIC_RG_INT_STATUS_FG_CUR_H, PMIC_RG_INT_STATUS_FG_CUR_H_ADDR, PMIC_RG_INT_STATUS_FG_CUR_H_MASK, PMIC_RG_INT_STATUS_FG_CUR_H_SHIFT},
    803. 

  803. 	{PMIC_RG_INT_STATUS_FG_CUR_L, PMIC_RG_INT_STATUS_FG_CUR_L_ADDR, PMIC_RG_INT_STATUS_FG_CUR_L_MASK, PMIC_RG_INT_STATUS_FG_CUR_L_SHIFT},
    804. 

  804. 	{PMIC_RG_INT_STATUS_FG_ZCV, PMIC_RG_INT_STATUS_FG_ZCV_ADDR, PMIC_RG_INT_STATUS_FG_ZCV_MASK, PMIC_RG_INT_STATUS_FG_ZCV_SHIFT},
    805. 

  805. 	{PMIC_OC_GEAR_LDO, PMIC_OC_GEAR_LDO_ADDR, PMIC_OC_GEAR_LDO_MASK, PMIC_OC_GEAR_LDO_SHIFT},
    806. 

  806. 	{PMIC_SPK_EN_L, PMIC_SPK_EN_L_ADDR, PMIC_SPK_EN_L_MASK, PMIC_SPK_EN_L_SHIFT},
    807. 

  807. 	{PMIC_SPKMODE_L, PMIC_SPKMODE_L_ADDR, PMIC_SPKMODE_L_MASK, PMIC_SPKMODE_L_SHIFT},
    808. 

  808. 	{PMIC_SPK_TRIM_EN_L, PMIC_SPK_TRIM_EN_L_ADDR, PMIC_SPK_TRIM_EN_L_MASK, PMIC_SPK_TRIM_EN_L_SHIFT},
    809. 

  809. 	{PMIC_SPK_OC_SHDN_DL, PMIC_SPK_OC_SHDN_DL_ADDR, PMIC_SPK_OC_SHDN_DL_MASK, PMIC_SPK_OC_SHDN_DL_SHIFT},
    810. 

  810. 	{PMIC_SPK_THER_SHDN_L_EN, PMIC_SPK_THER_SHDN_L_EN_ADDR, PMIC_SPK_THER_SHDN_L_EN_MASK, PMIC_SPK_THER_SHDN_L_EN_SHIFT},
    811. 

  811. 	{PMIC_SPK_OUT_STAGE_SEL, PMIC_SPK_OUT_STAGE_SEL_ADDR, PMIC_SPK_OUT_STAGE_SEL_MASK, PMIC_SPK_OUT_STAGE_SEL_SHIFT},
    812. 

  812. 	{PMIC_RG_SPK_GAINL, PMIC_RG_SPK_GAINL_ADDR, PMIC_RG_SPK_GAINL_MASK, PMIC_RG_SPK_GAINL_SHIFT},
    813. 

  813. 	{PMIC_DA_SPK_OFFSET_L, PMIC_DA_SPK_OFFSET_L_ADDR, PMIC_DA_SPK_OFFSET_L_MASK, PMIC_DA_SPK_OFFSET_L_SHIFT},
    814. 

  814. 	{PMIC_DA_SPK_LEAD_DGLH_L, PMIC_DA_SPK_LEAD_DGLH_L_ADDR, PMIC_DA_SPK_LEAD_DGLH_L_MASK, PMIC_DA_SPK_LEAD_DGLH_L_SHIFT},
    815. 

  815. 	{PMIC_AD_NI_SPK_LEAD_L, PMIC_AD_NI_SPK_LEAD_L_ADDR, PMIC_AD_NI_SPK_LEAD_L_MASK, PMIC_AD_NI_SPK_LEAD_L_SHIFT},
    816. 

  816. 	{PMIC_SPK_OFFSET_L_OV, PMIC_SPK_OFFSET_L_OV_ADDR, PMIC_SPK_OFFSET_L_OV_MASK, PMIC_SPK_OFFSET_L_OV_SHIFT},
    817. 

  817. 	{PMIC_SPK_OFFSET_L_SW, PMIC_SPK_OFFSET_L_SW_ADDR, PMIC_SPK_OFFSET_L_SW_MASK, PMIC_SPK_OFFSET_L_SW_SHIFT},
    818. 

  818. 	{PMIC_SPK_LEAD_L_SW, PMIC_SPK_LEAD_L_SW_ADDR, PMIC_SPK_LEAD_L_SW_MASK, PMIC_SPK_LEAD_L_SW_SHIFT},
    819. 

  819. 	{PMIC_SPK_OFFSET_L_MODE, PMIC_SPK_OFFSET_L_MODE_ADDR, PMIC_SPK_OFFSET_L_MODE_MASK, PMIC_SPK_OFFSET_L_MODE_SHIFT},
    820. 

  820. 	{PMIC_SPK_TRIM_DONE_L, PMIC_SPK_TRIM_DONE_L_ADDR, PMIC_SPK_TRIM_DONE_L_MASK, PMIC_SPK_TRIM_DONE_L_SHIFT},
    821. 

  821. 	{PMIC_RG_SPK_INTG_RST_L, PMIC_RG_SPK_INTG_RST_L_ADDR, PMIC_RG_SPK_INTG_RST_L_MASK, PMIC_RG_SPK_INTG_RST_L_SHIFT},
    822. 

  822. 	{PMIC_RG_SPK_FORCE_EN_L, PMIC_RG_SPK_FORCE_EN_L_ADDR, PMIC_RG_SPK_FORCE_EN_L_MASK, PMIC_RG_SPK_FORCE_EN_L_SHIFT},
    823. 

  823. 	{PMIC_RG_SPK_SLEW_L, PMIC_RG_SPK_SLEW_L_ADDR, PMIC_RG_SPK_SLEW_L_MASK, PMIC_RG_SPK_SLEW_L_SHIFT},
    824. 

  824. 	{PMIC_RG_SPKAB_OBIAS_L, PMIC_RG_SPKAB_OBIAS_L_ADDR, PMIC_RG_SPKAB_OBIAS_L_MASK, PMIC_RG_SPKAB_OBIAS_L_SHIFT},
    825. 

  825. 	{PMIC_RG_SPKRCV_EN_L, PMIC_RG_SPKRCV_EN_L_ADDR, PMIC_RG_SPKRCV_EN_L_MASK, PMIC_RG_SPKRCV_EN_L_SHIFT},
    826. 

  826. 	{PMIC_RG_SPK_DRC_EN_L, PMIC_RG_SPK_DRC_EN_L_ADDR, PMIC_RG_SPK_DRC_EN_L_MASK, PMIC_RG_SPK_DRC_EN_L_SHIFT},
    827. 

  827. 	{PMIC_RG_SPK_TEST_EN_L, PMIC_RG_SPK_TEST_EN_L_ADDR, PMIC_RG_SPK_TEST_EN_L_MASK, PMIC_RG_SPK_TEST_EN_L_SHIFT},
    828. 

  828. 	{PMIC_RG_SPKAB_OC_EN_L, PMIC_RG_SPKAB_OC_EN_L_ADDR, PMIC_RG_SPKAB_OC_EN_L_MASK, PMIC_RG_SPKAB_OC_EN_L_SHIFT},
    829. 

  829. 	{PMIC_RG_SPK_OC_EN_L, PMIC_RG_SPK_OC_EN_L_ADDR, PMIC_RG_SPK_OC_EN_L_MASK, PMIC_RG_SPK_OC_EN_L_SHIFT},
    830. 

  830. 	{PMIC_SPK_EN_R, PMIC_SPK_EN_R_ADDR, PMIC_SPK_EN_R_MASK, PMIC_SPK_EN_R_SHIFT},
    831. 

  831. 	{PMIC_SPKMODE_R, PMIC_SPKMODE_R_ADDR, PMIC_SPKMODE_R_MASK, PMIC_SPKMODE_R_SHIFT},
    832. 

  832. 	{PMIC_SPK_TRIM_EN_R, PMIC_SPK_TRIM_EN_R_ADDR, PMIC_SPK_TRIM_EN_R_MASK, PMIC_SPK_TRIM_EN_R_SHIFT},
    833. 

  833. 	{PMIC_SPK_OC_SHDN_DR, PMIC_SPK_OC_SHDN_DR_ADDR, PMIC_SPK_OC_SHDN_DR_MASK, PMIC_SPK_OC_SHDN_DR_SHIFT},
    834. 

  834. 	{PMIC_SPK_THER_SHDN_R_EN, PMIC_SPK_THER_SHDN_R_EN_ADDR, PMIC_SPK_THER_SHDN_R_EN_MASK, PMIC_SPK_THER_SHDN_R_EN_SHIFT},
    835. 

  835. 	{PMIC_RG_SPK_GAINR, PMIC_RG_SPK_GAINR_ADDR, PMIC_RG_SPK_GAINR_MASK, PMIC_RG_SPK_GAINR_SHIFT},
    836. 

  836. 	{PMIC_DA_SPK_OFFSET_R, PMIC_DA_SPK_OFFSET_R_ADDR, PMIC_DA_SPK_OFFSET_R_MASK, PMIC_DA_SPK_OFFSET_R_SHIFT},
    837. 

  837. 	{PMIC_DA_SPK_LEAD_DGLH_R, PMIC_DA_SPK_LEAD_DGLH_R_ADDR, PMIC_DA_SPK_LEAD_DGLH_R_MASK, PMIC_DA_SPK_LEAD_DGLH_R_SHIFT},
    838. 

  838. 	{PMIC_NI_SPK_LEAD_R, PMIC_NI_SPK_LEAD_R_ADDR, PMIC_NI_SPK_LEAD_R_MASK, PMIC_NI_SPK_LEAD_R_SHIFT},
    839. 

  839. 	{PMIC_SPK_OFFSET_R_OV, PMIC_SPK_OFFSET_R_OV_ADDR, PMIC_SPK_OFFSET_R_OV_MASK, PMIC_SPK_OFFSET_R_OV_SHIFT},
    840. 

  840. 	{PMIC_SPK_OFFSET_R_SW, PMIC_SPK_OFFSET_R_SW_ADDR, PMIC_SPK_OFFSET_R_SW_MASK, PMIC_SPK_OFFSET_R_SW_SHIFT},
    841. 

  841. 	{PMIC_SPK_LEAD_R_SW, PMIC_SPK_LEAD_R_SW_ADDR, PMIC_SPK_LEAD_R_SW_MASK, PMIC_SPK_LEAD_R_SW_SHIFT},
    842. 

  842. 	{PMIC_SPK_OFFSET_R_MODE, PMIC_SPK_OFFSET_R_MODE_ADDR, PMIC_SPK_OFFSET_R_MODE_MASK, PMIC_SPK_OFFSET_R_MODE_SHIFT},
    843. 

  843. 	{PMIC_SPK_TRIM_DONE_R, PMIC_SPK_TRIM_DONE_R_ADDR, PMIC_SPK_TRIM_DONE_R_MASK, PMIC_SPK_TRIM_DONE_R_SHIFT},
    844. 

  844. 	{PMIC_RG_SPK_INTG_RST_R, PMIC_RG_SPK_INTG_RST_R_ADDR, PMIC_RG_SPK_INTG_RST_R_MASK, PMIC_RG_SPK_INTG_RST_R_SHIFT},
    845. 

  845. 	{PMIC_RG_SPK_FORCE_EN_R, PMIC_RG_SPK_FORCE_EN_R_ADDR, PMIC_RG_SPK_FORCE_EN_R_MASK, PMIC_RG_SPK_FORCE_EN_R_SHIFT},
    846. 

  846. 	{PMIC_RG_SPK_SLEW_R, PMIC_RG_SPK_SLEW_R_ADDR, PMIC_RG_SPK_SLEW_R_MASK, PMIC_RG_SPK_SLEW_R_SHIFT},
    847. 

  847. 	{PMIC_RG_SPKAB_OBIAS_R, PMIC_RG_SPKAB_OBIAS_R_ADDR, PMIC_RG_SPKAB_OBIAS_R_MASK, PMIC_RG_SPKAB_OBIAS_R_SHIFT},
    848. 

  848. 	{PMIC_RG_SPKRCV_EN_R, PMIC_RG_SPKRCV_EN_R_ADDR, PMIC_RG_SPKRCV_EN_R_MASK, PMIC_RG_SPKRCV_EN_R_SHIFT},
    849. 

  849. 	{PMIC_RG_SPK_DRC_EN_R, PMIC_RG_SPK_DRC_EN_R_ADDR, PMIC_RG_SPK_DRC_EN_R_MASK, PMIC_RG_SPK_DRC_EN_R_SHIFT},
    850. 

  850. 	{PMIC_RG_SPK_TEST_EN_R, PMIC_RG_SPK_TEST_EN_R_ADDR, PMIC_RG_SPK_TEST_EN_R_MASK, PMIC_RG_SPK_TEST_EN_R_SHIFT},
    851. 

  851. 	{PMIC_RG_SPKAB_OC_EN_R, PMIC_RG_SPKAB_OC_EN_R_ADDR, PMIC_RG_SPKAB_OC_EN_R_MASK, PMIC_RG_SPKAB_OC_EN_R_SHIFT},
    852. 

  852. 	{PMIC_RG_SPK_OC_EN_R, PMIC_RG_SPK_OC_EN_R_ADDR, PMIC_RG_SPK_OC_EN_R_MASK, PMIC_RG_SPK_OC_EN_R_SHIFT},
    853. 

  853. 	{PMIC_RG_SPKPGA_GAINR, PMIC_RG_SPKPGA_GAINR_ADDR, PMIC_RG_SPKPGA_GAINR_MASK, PMIC_RG_SPKPGA_GAINR_SHIFT},
    854. 

  854. 	{PMIC_SPK_TRIM_WND, PMIC_SPK_TRIM_WND_ADDR, PMIC_SPK_TRIM_WND_MASK, PMIC_SPK_TRIM_WND_SHIFT},
    855. 

  855. 	{PMIC_SPK_TRIM_THD, PMIC_SPK_TRIM_THD_ADDR, PMIC_SPK_TRIM_THD_MASK, PMIC_SPK_TRIM_THD_SHIFT},
    856. 

  856. 	{PMIC_SPK_OC_WND, PMIC_SPK_OC_WND_ADDR, PMIC_SPK_OC_WND_MASK, PMIC_SPK_OC_WND_SHIFT},
    857. 

  857. 	{PMIC_SPK_OC_THD, PMIC_SPK_OC_THD_ADDR, PMIC_SPK_OC_THD_MASK, PMIC_SPK_OC_THD_SHIFT},
    858. 

  858. 	{PMIC_SPK_D_OC_R_DEG, PMIC_SPK_D_OC_R_DEG_ADDR, PMIC_SPK_D_OC_R_DEG_MASK, PMIC_SPK_D_OC_R_DEG_SHIFT},
    859. 

  859. 	{PMIC_SPK_AB_OC_R_DEG, PMIC_SPK_AB_OC_R_DEG_ADDR, PMIC_SPK_AB_OC_R_DEG_MASK, PMIC_SPK_AB_OC_R_DEG_SHIFT},
    860. 

  860. 	{PMIC_SPK_D_OC_L_DEG, PMIC_SPK_D_OC_L_DEG_ADDR, PMIC_SPK_D_OC_L_DEG_MASK, PMIC_SPK_D_OC_L_DEG_SHIFT},
    861. 

  861. 	{PMIC_SPK_AB_OC_L_DEG, PMIC_SPK_AB_OC_L_DEG_ADDR, PMIC_SPK_AB_OC_L_DEG_MASK, PMIC_SPK_AB_OC_L_DEG_SHIFT},
    862. 

  862. 	{PMIC_SPK_TD1, PMIC_SPK_TD1_ADDR, PMIC_SPK_TD1_MASK, PMIC_SPK_TD1_SHIFT},
    863. 

  863. 	{PMIC_SPK_TD2, PMIC_SPK_TD2_ADDR, PMIC_SPK_TD2_MASK, PMIC_SPK_TD2_SHIFT},
    864. 

  864. 	{PMIC_SPK_TD3, PMIC_SPK_TD3_ADDR, PMIC_SPK_TD3_MASK, PMIC_SPK_TD3_SHIFT},
    865. 

  865. 	{PMIC_SPK_TRIM_DIV, PMIC_SPK_TRIM_DIV_ADDR, PMIC_SPK_TRIM_DIV_MASK, PMIC_SPK_TRIM_DIV_SHIFT},
    866. 

  866. 	{PMIC_RG_BTL_SET, PMIC_RG_BTL_SET_ADDR, PMIC_RG_BTL_SET_MASK, PMIC_RG_BTL_SET_SHIFT},
    867. 

  867. 	{PMIC_RG_SPK_IBIAS_SEL, PMIC_RG_SPK_IBIAS_SEL_ADDR, PMIC_RG_SPK_IBIAS_SEL_MASK, PMIC_RG_SPK_IBIAS_SEL_SHIFT},
    868. 

  868. 	{PMIC_RG_SPK_CCODE, PMIC_RG_SPK_CCODE_ADDR, PMIC_RG_SPK_CCODE_MASK, PMIC_RG_SPK_CCODE_SHIFT},
    869. 

  869. 	{PMIC_RG_SPK_EN_VIEW_VCM, PMIC_RG_SPK_EN_VIEW_VCM_ADDR, PMIC_RG_SPK_EN_VIEW_VCM_MASK, PMIC_RG_SPK_EN_VIEW_VCM_SHIFT},
    870. 

  870. 	{PMIC_RG_SPK_EN_VIEW_CLK, PMIC_RG_SPK_EN_VIEW_CLK_ADDR, PMIC_RG_SPK_EN_VIEW_CLK_MASK, PMIC_RG_SPK_EN_VIEW_CLK_SHIFT},
    871. 

  871. 	{PMIC_RG_SPK_VCM_SEL, PMIC_RG_SPK_VCM_SEL_ADDR, PMIC_RG_SPK_VCM_SEL_MASK, PMIC_RG_SPK_VCM_SEL_SHIFT},
    872. 

  872. 	{PMIC_RG_SPK_VCM_IBSEL, PMIC_RG_SPK_VCM_IBSEL_ADDR, PMIC_RG_SPK_VCM_IBSEL_MASK, PMIC_RG_SPK_VCM_IBSEL_SHIFT},
    873. 

  873. 	{PMIC_RG_SPK_FBRC_EN, PMIC_RG_SPK_FBRC_EN_ADDR, PMIC_RG_SPK_FBRC_EN_MASK, PMIC_RG_SPK_FBRC_EN_SHIFT},
    874. 

  874. 	{PMIC_RG_SPKAB_OVDRV, PMIC_RG_SPKAB_OVDRV_ADDR, PMIC_RG_SPKAB_OVDRV_MASK, PMIC_RG_SPKAB_OVDRV_SHIFT},
    875. 

  875. 	{PMIC_RG_SPK_OCTH_D, PMIC_RG_SPK_OCTH_D_ADDR, PMIC_RG_SPK_OCTH_D_MASK, PMIC_RG_SPK_OCTH_D_SHIFT},
    876. 

  876. 	{PMIC_RG_SPKPGA_GAINL, PMIC_RG_SPKPGA_GAINL_ADDR, PMIC_RG_SPKPGA_GAINL_MASK, PMIC_RG_SPKPGA_GAINL_SHIFT},
    877. 

  877. 	{PMIC_SPK_RSV0, PMIC_SPK_RSV0_ADDR, PMIC_SPK_RSV0_MASK, PMIC_SPK_RSV0_SHIFT},
    878. 

  878. 	{PMIC_SPK_VCM_FAST_EN, PMIC_SPK_VCM_FAST_EN_ADDR, PMIC_SPK_VCM_FAST_EN_MASK, PMIC_SPK_VCM_FAST_EN_SHIFT},
    879. 

  879. 	{PMIC_SPK_TEST_MODE0, PMIC_SPK_TEST_MODE0_ADDR, PMIC_SPK_TEST_MODE0_MASK, PMIC_SPK_TEST_MODE0_SHIFT},
    880. 

  880. 	{PMIC_SPK_TEST_MODE1, PMIC_SPK_TEST_MODE1_ADDR, PMIC_SPK_TEST_MODE1_MASK, PMIC_SPK_TEST_MODE1_SHIFT},
    881. 

  881. 	{PMIC_SPK_TD_WAIT, PMIC_SPK_TD_WAIT_ADDR, PMIC_SPK_TD_WAIT_MASK, PMIC_SPK_TD_WAIT_SHIFT},
    882. 

  882. 	{PMIC_SPK_TD_DONE, PMIC_SPK_TD_DONE_ADDR, PMIC_SPK_TD_DONE_MASK, PMIC_SPK_TD_DONE_SHIFT},
    883. 

  883. 	{PMIC_SPK_EN_MODE, PMIC_SPK_EN_MODE_ADDR, PMIC_SPK_EN_MODE_MASK, PMIC_SPK_EN_MODE_SHIFT},
    884. 

  884. 	{PMIC_SPK_VCM_FAST_SW, PMIC_SPK_VCM_FAST_SW_ADDR, PMIC_SPK_VCM_FAST_SW_MASK, PMIC_SPK_VCM_FAST_SW_SHIFT},
    885. 

  885. 	{PMIC_SPK_RST_R_SW, PMIC_SPK_RST_R_SW_ADDR, PMIC_SPK_RST_R_SW_MASK, PMIC_SPK_RST_R_SW_SHIFT},
    886. 

  886. 	{PMIC_SPK_RST_L_SW, PMIC_SPK_RST_L_SW_ADDR, PMIC_SPK_RST_L_SW_MASK, PMIC_SPK_RST_L_SW_SHIFT},
    887. 

  887. 	{PMIC_SPKMODE_R_SW, PMIC_SPKMODE_R_SW_ADDR, PMIC_SPKMODE_R_SW_MASK, PMIC_SPKMODE_R_SW_SHIFT},
    888. 

  888. 	{PMIC_SPKMODE_L_SW, PMIC_SPKMODE_L_SW_ADDR, PMIC_SPKMODE_L_SW_MASK, PMIC_SPKMODE_L_SW_SHIFT},
    889. 

  889. 	{PMIC_SPK_DEPOP_EN_R_SW, PMIC_SPK_DEPOP_EN_R_SW_ADDR, PMIC_SPK_DEPOP_EN_R_SW_MASK, PMIC_SPK_DEPOP_EN_R_SW_SHIFT},
    890. 

  890. 	{PMIC_SPK_DEPOP_EN_L_SW, PMIC_SPK_DEPOP_EN_L_SW_ADDR, PMIC_SPK_DEPOP_EN_L_SW_MASK, PMIC_SPK_DEPOP_EN_L_SW_SHIFT},
    891. 

  891. 	{PMIC_SPK_EN_R_SW, PMIC_SPK_EN_R_SW_ADDR, PMIC_SPK_EN_R_SW_MASK, PMIC_SPK_EN_R_SW_SHIFT},
    892. 

  892. 	{PMIC_SPK_EN_L_SW, PMIC_SPK_EN_L_SW_ADDR, PMIC_SPK_EN_L_SW_MASK, PMIC_SPK_EN_L_SW_SHIFT},
    893. 

  893. 	{PMIC_SPK_OUTSTG_EN_R_SW, PMIC_SPK_OUTSTG_EN_R_SW_ADDR, PMIC_SPK_OUTSTG_EN_R_SW_MASK, PMIC_SPK_OUTSTG_EN_R_SW_SHIFT},
    894. 

  894. 	{PMIC_SPK_OUTSTG_EN_L_SW, PMIC_SPK_OUTSTG_EN_L_SW_ADDR, PMIC_SPK_OUTSTG_EN_L_SW_MASK, PMIC_SPK_OUTSTG_EN_L_SW_SHIFT},
    895. 

  895. 	{PMIC_SPK_TRIM_EN_R_SW, PMIC_SPK_TRIM_EN_R_SW_ADDR, PMIC_SPK_TRIM_EN_R_SW_MASK, PMIC_SPK_TRIM_EN_R_SW_SHIFT},
    896. 

  896. 	{PMIC_SPK_TRIM_EN_L_SW, PMIC_SPK_TRIM_EN_L_SW_ADDR, PMIC_SPK_TRIM_EN_L_SW_MASK, PMIC_SPK_TRIM_EN_L_SW_SHIFT},
    897. 

  897. 	{PMIC_SPK_TRIM_STOP_R_SW, PMIC_SPK_TRIM_STOP_R_SW_ADDR, PMIC_SPK_TRIM_STOP_R_SW_MASK, PMIC_SPK_TRIM_STOP_R_SW_SHIFT},
    898. 

  898. 	{PMIC_SPK_TRIM_STOP_L_SW, PMIC_SPK_TRIM_STOP_L_SW_ADDR, PMIC_SPK_TRIM_STOP_L_SW_MASK, PMIC_SPK_TRIM_STOP_L_SW_SHIFT},
    899. 

  899. 	{PMIC_RG_SPK_ISENSE_TEST_EN, PMIC_RG_SPK_ISENSE_TEST_EN_ADDR, PMIC_RG_SPK_ISENSE_TEST_EN_MASK, PMIC_RG_SPK_ISENSE_TEST_EN_SHIFT},
    900. 

  900. 	{PMIC_RG_SPK_ISENSE_REFSEL, PMIC_RG_SPK_ISENSE_REFSEL_ADDR, PMIC_RG_SPK_ISENSE_REFSEL_MASK, PMIC_RG_SPK_ISENSE_REFSEL_SHIFT},
    901. 

  901. 	{PMIC_RG_SPK_ISENSE_GAINSEL, PMIC_RG_SPK_ISENSE_GAINSEL_ADDR, PMIC_RG_SPK_ISENSE_GAINSEL_MASK, PMIC_RG_SPK_ISENSE_GAINSEL_SHIFT},
    902. 

  902. 	{PMIC_RG_SPK_ISENSE_PDRESET, PMIC_RG_SPK_ISENSE_PDRESET_ADDR, PMIC_RG_SPK_ISENSE_PDRESET_MASK, PMIC_RG_SPK_ISENSE_PDRESET_SHIFT},
    903. 

  903. 	{PMIC_RG_SPK_ISENSE_EN, PMIC_RG_SPK_ISENSE_EN_ADDR, PMIC_RG_SPK_ISENSE_EN_MASK, PMIC_RG_SPK_ISENSE_EN_SHIFT},
    904. 

  904. 	{PMIC_RG_SPK_RSV1, PMIC_RG_SPK_RSV1_ADDR, PMIC_RG_SPK_RSV1_MASK, PMIC_RG_SPK_RSV1_SHIFT},
    905. 

  905. 	{PMIC_RG_SPK_RSV0, PMIC_RG_SPK_RSV0_ADDR, PMIC_RG_SPK_RSV0_MASK, PMIC_RG_SPK_RSV0_SHIFT},
    906. 

  906. 	{PMIC_RG_SPK_ABD_VOLSEN_GAIN, PMIC_RG_SPK_ABD_VOLSEN_GAIN_ADDR, PMIC_RG_SPK_ABD_VOLSEN_GAIN_MASK, PMIC_RG_SPK_ABD_VOLSEN_GAIN_SHIFT},
    907. 

  907. 	{PMIC_RG_SPK_ABD_VOLSEN_EN, PMIC_RG_SPK_ABD_VOLSEN_EN_ADDR, PMIC_RG_SPK_ABD_VOLSEN_EN_MASK, PMIC_RG_SPK_ABD_VOLSEN_EN_SHIFT},
    908. 

  908. 	{PMIC_RG_SPK_ABD_CURSEN_SEL, PMIC_RG_SPK_ABD_CURSEN_SEL_ADDR, PMIC_RG_SPK_ABD_CURSEN_SEL_MASK, PMIC_RG_SPK_ABD_CURSEN_SEL_SHIFT},
    909. 

  909. 	{PMIC_RG_SPK_RSV2, PMIC_RG_SPK_RSV2_ADDR, PMIC_RG_SPK_RSV2_MASK, PMIC_RG_SPK_RSV2_SHIFT},
    910. 

  910. 	{PMIC_RG_SPK_TRIM2, PMIC_RG_SPK_TRIM2_ADDR, PMIC_RG_SPK_TRIM2_MASK, PMIC_RG_SPK_TRIM2_SHIFT},
    911. 

  911. 	{PMIC_RG_SPK_TRIM1, PMIC_RG_SPK_TRIM1_ADDR, PMIC_RG_SPK_TRIM1_MASK, PMIC_RG_SPK_TRIM1_SHIFT},
    912. 

  912. 	{PMIC_RG_SPK_D_CURSEN_RSETSEL, PMIC_RG_SPK_D_CURSEN_RSETSEL_ADDR, PMIC_RG_SPK_D_CURSEN_RSETSEL_MASK, PMIC_RG_SPK_D_CURSEN_RSETSEL_SHIFT},
    913. 

  913. 	{PMIC_RG_SPK_D_CURSEN_GAIN, PMIC_RG_SPK_D_CURSEN_GAIN_ADDR, PMIC_RG_SPK_D_CURSEN_GAIN_MASK, PMIC_RG_SPK_D_CURSEN_GAIN_SHIFT},
    914. 

  914. 	{PMIC_RG_SPK_D_CURSEN_EN, PMIC_RG_SPK_D_CURSEN_EN_ADDR, PMIC_RG_SPK_D_CURSEN_EN_MASK, PMIC_RG_SPK_D_CURSEN_EN_SHIFT},
    915. 

  915. 	{PMIC_RG_SPK_AB_CURSEN_RSETSEL, PMIC_RG_SPK_AB_CURSEN_RSETSEL_ADDR, PMIC_RG_SPK_AB_CURSEN_RSETSEL_MASK, PMIC_RG_SPK_AB_CURSEN_RSETSEL_SHIFT},
    916. 

  916. 	{PMIC_RG_SPK_AB_CURSEN_GAIN, PMIC_RG_SPK_AB_CURSEN_GAIN_ADDR, PMIC_RG_SPK_AB_CURSEN_GAIN_MASK, PMIC_RG_SPK_AB_CURSEN_GAIN_SHIFT},
    917. 

  917. 	{PMIC_RG_SPK_AB_CURSEN_EN, PMIC_RG_SPK_AB_CURSEN_EN_ADDR, PMIC_RG_SPK_AB_CURSEN_EN_MASK, PMIC_RG_SPK_AB_CURSEN_EN_SHIFT},
    918. 

  918. 	{PMIC_RG_SPKPGA_GAIN, PMIC_RG_SPKPGA_GAIN_ADDR, PMIC_RG_SPKPGA_GAIN_MASK, PMIC_RG_SPKPGA_GAIN_SHIFT},
    919. 

  919. 	{PMIC_RG_SPK_RSV, PMIC_RG_SPK_RSV_ADDR, PMIC_RG_SPK_RSV_MASK, PMIC_RG_SPK_RSV_SHIFT},
    920. 

  920. 	{PMIC_RG_ISENSE_PD_RESET, PMIC_RG_ISENSE_PD_RESET_ADDR, PMIC_RG_ISENSE_PD_RESET_MASK, PMIC_RG_ISENSE_PD_RESET_SHIFT},
    921. 

  921. 	{PMIC_RG_AUDIVLPWRUP_VAUDP12, PMIC_RG_AUDIVLPWRUP_VAUDP12_ADDR, PMIC_RG_AUDIVLPWRUP_VAUDP12_MASK, PMIC_RG_AUDIVLPWRUP_VAUDP12_SHIFT},
    922. 

  922. 	{PMIC_RG_AUDIVLSTARTUP_VAUDP12, PMIC_RG_AUDIVLSTARTUP_VAUDP12_ADDR, PMIC_RG_AUDIVLSTARTUP_VAUDP12_MASK, PMIC_RG_AUDIVLSTARTUP_VAUDP12_SHIFT},
    923. 

  923. 	{PMIC_RG_AUDIVLMUXSEL_VAUDP12, PMIC_RG_AUDIVLMUXSEL_VAUDP12_ADDR, PMIC_RG_AUDIVLMUXSEL_VAUDP12_MASK, PMIC_RG_AUDIVLMUXSEL_VAUDP12_SHIFT},
    924. 

  924. 	{PMIC_RG_AUDIVLMUTE_VAUDP12, PMIC_RG_AUDIVLMUTE_VAUDP12_ADDR, PMIC_RG_AUDIVLMUTE_VAUDP12_MASK, PMIC_RG_AUDIVLMUTE_VAUDP12_SHIFT},
    925. 

  925. 	{PMIC_FQMTR_TCKSEL, PMIC_FQMTR_TCKSEL_ADDR, PMIC_FQMTR_TCKSEL_MASK, PMIC_FQMTR_TCKSEL_SHIFT},
    926. 

  926. 	{PMIC_FQMTR_BUSY, PMIC_FQMTR_BUSY_ADDR, PMIC_FQMTR_BUSY_MASK, PMIC_FQMTR_BUSY_SHIFT},
    927. 

  927. 	{PMIC_FQMTR_DCXO26M_EN, PMIC_FQMTR_DCXO26M_EN_ADDR, PMIC_FQMTR_DCXO26M_EN_MASK, PMIC_FQMTR_DCXO26M_EN_SHIFT},
    928. 

  928. 	{PMIC_FQMTR_EN, PMIC_FQMTR_EN_ADDR, PMIC_FQMTR_EN_MASK, PMIC_FQMTR_EN_SHIFT},
    929. 

  929. 	{PMIC_FQMTR_WINSET, PMIC_FQMTR_WINSET_ADDR, PMIC_FQMTR_WINSET_MASK, PMIC_FQMTR_WINSET_SHIFT},
    930. 

  930. 	{PMIC_FQMTR_DATA, PMIC_FQMTR_DATA_ADDR, PMIC_FQMTR_DATA_MASK, PMIC_FQMTR_DATA_SHIFT},
    931. 

  931. 	{PMIC_RG_TRIM_EN, PMIC_RG_TRIM_EN_ADDR, PMIC_RG_TRIM_EN_MASK, PMIC_RG_TRIM_EN_SHIFT},
    932. 

  932. 	{PMIC_RG_TRIM_SEL, PMIC_RG_TRIM_SEL_ADDR, PMIC_RG_TRIM_SEL_MASK, PMIC_RG_TRIM_SEL_SHIFT},
    933. 

  933. 	{PMIC_RG_ISINKS_RSV, PMIC_RG_ISINKS_RSV_ADDR, PMIC_RG_ISINKS_RSV_MASK, PMIC_RG_ISINKS_RSV_SHIFT},
    934. 

  934. 	{PMIC_RG_ISINK0_DOUBLE_EN, PMIC_RG_ISINK0_DOUBLE_EN_ADDR, PMIC_RG_ISINK0_DOUBLE_EN_MASK, PMIC_RG_ISINK0_DOUBLE_EN_SHIFT},
    935. 

  935. 	{PMIC_RG_ISINK1_DOUBLE_EN, PMIC_RG_ISINK1_DOUBLE_EN_ADDR, PMIC_RG_ISINK1_DOUBLE_EN_MASK, PMIC_RG_ISINK1_DOUBLE_EN_SHIFT},
    936. 

  936. 	{PMIC_RG_ISINK2_DOUBLE_EN, PMIC_RG_ISINK2_DOUBLE_EN_ADDR, PMIC_RG_ISINK2_DOUBLE_EN_MASK, PMIC_RG_ISINK2_DOUBLE_EN_SHIFT},
    937. 

  937. 	{PMIC_RG_ISINK3_DOUBLE_EN, PMIC_RG_ISINK3_DOUBLE_EN_ADDR, PMIC_RG_ISINK3_DOUBLE_EN_MASK, PMIC_RG_ISINK3_DOUBLE_EN_SHIFT},
    938. 

  938. 	{PMIC_ISINK_DIM0_FSEL, PMIC_ISINK_DIM0_FSEL_ADDR, PMIC_ISINK_DIM0_FSEL_MASK, PMIC_ISINK_DIM0_FSEL_SHIFT},
    939. 

  939. 	{PMIC_ISINK0_RSV1, PMIC_ISINK0_RSV1_ADDR, PMIC_ISINK0_RSV1_MASK, PMIC_ISINK0_RSV1_SHIFT},
    940. 

  940. 	{PMIC_ISINK0_RSV0, PMIC_ISINK0_RSV0_ADDR, PMIC_ISINK0_RSV0_MASK, PMIC_ISINK0_RSV0_SHIFT},
    941. 

  941. 	{PMIC_ISINK_DIM0_DUTY, PMIC_ISINK_DIM0_DUTY_ADDR, PMIC_ISINK_DIM0_DUTY_MASK, PMIC_ISINK_DIM0_DUTY_SHIFT},
    942. 

  942. 	{PMIC_ISINK_CH0_STEP, PMIC_ISINK_CH0_STEP_ADDR, PMIC_ISINK_CH0_STEP_MASK, PMIC_ISINK_CH0_STEP_SHIFT},
    943. 

  943. 	{PMIC_ISINK_BREATH0_TF2_SEL, PMIC_ISINK_BREATH0_TF2_SEL_ADDR, PMIC_ISINK_BREATH0_TF2_SEL_MASK, PMIC_ISINK_BREATH0_TF2_SEL_SHIFT},
    944. 

  944. 	{PMIC_ISINK_BREATH0_TF1_SEL, PMIC_ISINK_BREATH0_TF1_SEL_ADDR, PMIC_ISINK_BREATH0_TF1_SEL_MASK, PMIC_ISINK_BREATH0_TF1_SEL_SHIFT},
    945. 

  945. 	{PMIC_ISINK_BREATH0_TR2_SEL, PMIC_ISINK_BREATH0_TR2_SEL_ADDR, PMIC_ISINK_BREATH0_TR2_SEL_MASK, PMIC_ISINK_BREATH0_TR2_SEL_SHIFT},
    946. 

  946. 	{PMIC_ISINK_BREATH0_TR1_SEL, PMIC_ISINK_BREATH0_TR1_SEL_ADDR, PMIC_ISINK_BREATH0_TR1_SEL_MASK, PMIC_ISINK_BREATH0_TR1_SEL_SHIFT},
    947. 

  947. 	{PMIC_ISINK_BREATH0_TOFF_SEL, PMIC_ISINK_BREATH0_TOFF_SEL_ADDR, PMIC_ISINK_BREATH0_TOFF_SEL_MASK, PMIC_ISINK_BREATH0_TOFF_SEL_SHIFT},
    948. 

  948. 	{PMIC_ISINK_BREATH0_TON_SEL, PMIC_ISINK_BREATH0_TON_SEL_ADDR, PMIC_ISINK_BREATH0_TON_SEL_MASK, PMIC_ISINK_BREATH0_TON_SEL_SHIFT},
    949. 

  949. 	{PMIC_ISINK_DIM1_FSEL, PMIC_ISINK_DIM1_FSEL_ADDR, PMIC_ISINK_DIM1_FSEL_MASK, PMIC_ISINK_DIM1_FSEL_SHIFT},
    950. 

  950. 	{PMIC_ISINK1_RSV1, PMIC_ISINK1_RSV1_ADDR, PMIC_ISINK1_RSV1_MASK, PMIC_ISINK1_RSV1_SHIFT},
    951. 

  951. 	{PMIC_ISINK1_RSV0, PMIC_ISINK1_RSV0_ADDR, PMIC_ISINK1_RSV0_MASK, PMIC_ISINK1_RSV0_SHIFT},
    952. 

  952. 	{PMIC_ISINK_DIM1_DUTY, PMIC_ISINK_DIM1_DUTY_ADDR, PMIC_ISINK_DIM1_DUTY_MASK, PMIC_ISINK_DIM1_DUTY_SHIFT},
    953. 

  953. 	{PMIC_ISINK_CH1_STEP, PMIC_ISINK_CH1_STEP_ADDR, PMIC_ISINK_CH1_STEP_MASK, PMIC_ISINK_CH1_STEP_SHIFT},
    954. 

  954. 	{PMIC_ISINK_BREATH1_TF2_SEL, PMIC_ISINK_BREATH1_TF2_SEL_ADDR, PMIC_ISINK_BREATH1_TF2_SEL_MASK, PMIC_ISINK_BREATH1_TF2_SEL_SHIFT},
    955. 

  955. 	{PMIC_ISINK_BREATH1_TF1_SEL, PMIC_ISINK_BREATH1_TF1_SEL_ADDR, PMIC_ISINK_BREATH1_TF1_SEL_MASK, PMIC_ISINK_BREATH1_TF1_SEL_SHIFT},
    956. 

  956. 	{PMIC_ISINK_BREATH1_TR2_SEL, PMIC_ISINK_BREATH1_TR2_SEL_ADDR, PMIC_ISINK_BREATH1_TR2_SEL_MASK, PMIC_ISINK_BREATH1_TR2_SEL_SHIFT},
    957. 

  957. 	{PMIC_ISINK_BREATH1_TR1_SEL, PMIC_ISINK_BREATH1_TR1_SEL_ADDR, PMIC_ISINK_BREATH1_TR1_SEL_MASK, PMIC_ISINK_BREATH1_TR1_SEL_SHIFT},
    958. 

  958. 	{PMIC_ISINK_BREATH1_TOFF_SEL, PMIC_ISINK_BREATH1_TOFF_SEL_ADDR, PMIC_ISINK_BREATH1_TOFF_SEL_MASK, PMIC_ISINK_BREATH1_TOFF_SEL_SHIFT},
    959. 

  959. 	{PMIC_ISINK_BREATH1_TON_SEL, PMIC_ISINK_BREATH1_TON_SEL_ADDR, PMIC_ISINK_BREATH1_TON_SEL_MASK, PMIC_ISINK_BREATH1_TON_SEL_SHIFT},
    960. 

  960. 	{PMIC_AD_NI_ISINK3_STATUS, PMIC_AD_NI_ISINK3_STATUS_ADDR, PMIC_AD_NI_ISINK3_STATUS_MASK, PMIC_AD_NI_ISINK3_STATUS_SHIFT},
    961. 

  961. 	{PMIC_AD_NI_ISINK2_STATUS, PMIC_AD_NI_ISINK2_STATUS_ADDR, PMIC_AD_NI_ISINK2_STATUS_MASK, PMIC_AD_NI_ISINK2_STATUS_SHIFT},
    962. 

  962. 	{PMIC_AD_NI_ISINK1_STATUS, PMIC_AD_NI_ISINK1_STATUS_ADDR, PMIC_AD_NI_ISINK1_STATUS_MASK, PMIC_AD_NI_ISINK1_STATUS_SHIFT},
    963. 

  963. 	{PMIC_AD_NI_ISINK0_STATUS, PMIC_AD_NI_ISINK0_STATUS_ADDR, PMIC_AD_NI_ISINK0_STATUS_MASK, PMIC_AD_NI_ISINK0_STATUS_SHIFT},
    964. 

  964. 	{PMIC_ISINK_PHASE0_DLY_EN, PMIC_ISINK_PHASE0_DLY_EN_ADDR, PMIC_ISINK_PHASE0_DLY_EN_MASK, PMIC_ISINK_PHASE0_DLY_EN_SHIFT},
    965. 

  965. 	{PMIC_ISINK_PHASE1_DLY_EN, PMIC_ISINK_PHASE1_DLY_EN_ADDR, PMIC_ISINK_PHASE1_DLY_EN_MASK, PMIC_ISINK_PHASE1_DLY_EN_SHIFT},
    966. 

  966. 	{PMIC_ISINK_PHASE_DLY_TC, PMIC_ISINK_PHASE_DLY_TC_ADDR, PMIC_ISINK_PHASE_DLY_TC_MASK, PMIC_ISINK_PHASE_DLY_TC_SHIFT},
    967. 

  967. 	{PMIC_ISINK_CHOP0_SW, PMIC_ISINK_CHOP0_SW_ADDR, PMIC_ISINK_CHOP0_SW_MASK, PMIC_ISINK_CHOP0_SW_SHIFT},
    968. 

  968. 	{PMIC_ISINK_CHOP1_SW, PMIC_ISINK_CHOP1_SW_ADDR, PMIC_ISINK_CHOP1_SW_MASK, PMIC_ISINK_CHOP1_SW_SHIFT},
    969. 

  969. 	{PMIC_ISINK_SFSTR1_EN, PMIC_ISINK_SFSTR1_EN_ADDR, PMIC_ISINK_SFSTR1_EN_MASK, PMIC_ISINK_SFSTR1_EN_SHIFT},
    970. 

  970. 	{PMIC_ISINK_SFSTR1_TC, PMIC_ISINK_SFSTR1_TC_ADDR, PMIC_ISINK_SFSTR1_TC_MASK, PMIC_ISINK_SFSTR1_TC_SHIFT},
    971. 

  971. 	{PMIC_ISINK_SFSTR0_EN, PMIC_ISINK_SFSTR0_EN_ADDR, PMIC_ISINK_SFSTR0_EN_MASK, PMIC_ISINK_SFSTR0_EN_SHIFT},
    972. 

  972. 	{PMIC_ISINK_SFSTR0_TC, PMIC_ISINK_SFSTR0_TC_ADDR, PMIC_ISINK_SFSTR0_TC_MASK, PMIC_ISINK_SFSTR0_TC_SHIFT},
    973. 

  973. 	{PMIC_ISINK_CH0_EN, PMIC_ISINK_CH0_EN_ADDR, PMIC_ISINK_CH0_EN_MASK, PMIC_ISINK_CH0_EN_SHIFT},
    974. 

  974. 	{PMIC_ISINK_CH1_EN, PMIC_ISINK_CH1_EN_ADDR, PMIC_ISINK_CH1_EN_MASK, PMIC_ISINK_CH1_EN_SHIFT},
    975. 

  975. 	{PMIC_ISINK_CHOP0_EN, PMIC_ISINK_CHOP0_EN_ADDR, PMIC_ISINK_CHOP0_EN_MASK, PMIC_ISINK_CHOP0_EN_SHIFT},
    976. 

  976. 	{PMIC_ISINK_CHOP1_EN, PMIC_ISINK_CHOP1_EN_ADDR, PMIC_ISINK_CHOP1_EN_MASK, PMIC_ISINK_CHOP1_EN_SHIFT},
    977. 

  977. 	{PMIC_ISINK_CH0_BIAS_EN, PMIC_ISINK_CH0_BIAS_EN_ADDR, PMIC_ISINK_CH0_BIAS_EN_MASK, PMIC_ISINK_CH0_BIAS_EN_SHIFT},
    978. 

  978. 	{PMIC_ISINK_CH1_BIAS_EN, PMIC_ISINK_CH1_BIAS_EN_ADDR, PMIC_ISINK_CH1_BIAS_EN_MASK, PMIC_ISINK_CH1_BIAS_EN_SHIFT},
    979. 

  979. 	{PMIC_ISINK_RSV, PMIC_ISINK_RSV_ADDR, PMIC_ISINK_RSV_MASK, PMIC_ISINK_RSV_SHIFT},
    980. 

  980. 	{PMIC_ISINK_CH1_MODE, PMIC_ISINK_CH1_MODE_ADDR, PMIC_ISINK_CH1_MODE_MASK, PMIC_ISINK_CH1_MODE_SHIFT},
    981. 

  981. 	{PMIC_ISINK_CH0_MODE, PMIC_ISINK_CH0_MODE_ADDR, PMIC_ISINK_CH0_MODE_MASK, PMIC_ISINK_CH0_MODE_SHIFT},
    982. 

  982. 	{PMIC_DA_QI_ISINKS_CH3_STEP, PMIC_DA_QI_ISINKS_CH3_STEP_ADDR, PMIC_DA_QI_ISINKS_CH3_STEP_MASK, PMIC_DA_QI_ISINKS_CH3_STEP_SHIFT},
    983. 

  983. 	{PMIC_DA_QI_ISINKS_CH2_STEP, PMIC_DA_QI_ISINKS_CH2_STEP_ADDR, PMIC_DA_QI_ISINKS_CH2_STEP_MASK, PMIC_DA_QI_ISINKS_CH2_STEP_SHIFT},
    984. 

  984. 	{PMIC_DA_QI_ISINKS_CH1_STEP, PMIC_DA_QI_ISINKS_CH1_STEP_ADDR, PMIC_DA_QI_ISINKS_CH1_STEP_MASK, PMIC_DA_QI_ISINKS_CH1_STEP_SHIFT},
    985. 

  985. 	{PMIC_DA_QI_ISINKS_CH0_STEP, PMIC_DA_QI_ISINKS_CH0_STEP_ADDR, PMIC_DA_QI_ISINKS_CH0_STEP_MASK, PMIC_DA_QI_ISINKS_CH0_STEP_SHIFT},
    986. 

  986. 	{PMIC_ISINK2_RSV1, PMIC_ISINK2_RSV1_ADDR, PMIC_ISINK2_RSV1_MASK, PMIC_ISINK2_RSV1_SHIFT},
    987. 

  987. 	{PMIC_ISINK2_RSV0, PMIC_ISINK2_RSV0_ADDR, PMIC_ISINK2_RSV0_MASK, PMIC_ISINK2_RSV0_SHIFT},
    988. 

  988. 	{PMIC_ISINK_CH2_STEP, PMIC_ISINK_CH2_STEP_ADDR, PMIC_ISINK_CH2_STEP_MASK, PMIC_ISINK_CH2_STEP_SHIFT},
    989. 

  989. 	{PMIC_ISINK3_RSV1, PMIC_ISINK3_RSV1_ADDR, PMIC_ISINK3_RSV1_MASK, PMIC_ISINK3_RSV1_SHIFT},
    990. 

  990. 	{PMIC_ISINK3_RSV0, PMIC_ISINK3_RSV0_ADDR, PMIC_ISINK3_RSV0_MASK, PMIC_ISINK3_RSV0_SHIFT},
    991. 

  991. 	{PMIC_ISINK_CH3_STEP, PMIC_ISINK_CH3_STEP_ADDR, PMIC_ISINK_CH3_STEP_MASK, PMIC_ISINK_CH3_STEP_SHIFT},
    992. 

  992. 	{PMIC_ISINK_CHOP3_SW, PMIC_ISINK_CHOP3_SW_ADDR, PMIC_ISINK_CHOP3_SW_MASK, PMIC_ISINK_CHOP3_SW_SHIFT},
    993. 

  993. 	{PMIC_ISINK_CHOP2_SW, PMIC_ISINK_CHOP2_SW_ADDR, PMIC_ISINK_CHOP2_SW_MASK, PMIC_ISINK_CHOP2_SW_SHIFT},
    994. 

  994. 	{PMIC_ISINK_CH3_EN, PMIC_ISINK_CH3_EN_ADDR, PMIC_ISINK_CH3_EN_MASK, PMIC_ISINK_CH3_EN_SHIFT},
    995. 

  995. 	{PMIC_ISINK_CH2_EN, PMIC_ISINK_CH2_EN_ADDR, PMIC_ISINK_CH2_EN_MASK, PMIC_ISINK_CH2_EN_SHIFT},
    996. 

  996. 	{PMIC_ISINK_CHOP3_EN, PMIC_ISINK_CHOP3_EN_ADDR, PMIC_ISINK_CHOP3_EN_MASK, PMIC_ISINK_CHOP3_EN_SHIFT},
    997. 

  997. 	{PMIC_ISINK_CHOP2_EN, PMIC_ISINK_CHOP2_EN_ADDR, PMIC_ISINK_CHOP2_EN_MASK, PMIC_ISINK_CHOP2_EN_SHIFT},
    998. 

  998. 	{PMIC_ISINK_CH3_BIAS_EN, PMIC_ISINK_CH3_BIAS_EN_ADDR, PMIC_ISINK_CH3_BIAS_EN_MASK, PMIC_ISINK_CH3_BIAS_EN_SHIFT},
    999. 

  999. 	{PMIC_ISINK_CH2_BIAS_EN, PMIC_ISINK_CH2_BIAS_EN_ADDR, PMIC_ISINK_CH2_BIAS_EN_MASK, PMIC_ISINK_CH2_BIAS_EN_SHIFT},
    1000. 

  1000. 	{PMIC_CHRIND_DIM_FSEL, PMIC_CHRIND_DIM_FSEL_ADDR, PMIC_CHRIND_DIM_FSEL_MASK, PMIC_CHRIND_DIM_FSEL_SHIFT},
    1001. 

  1001. 	{PMIC_CHRIND_RSV1, PMIC_CHRIND_RSV1_ADDR, PMIC_CHRIND_RSV1_MASK, PMIC_CHRIND_RSV1_SHIFT},
    1002. 

  1002. 	{PMIC_CHRIND_RSV0, PMIC_CHRIND_RSV0_ADDR, PMIC_CHRIND_RSV0_MASK, PMIC_CHRIND_RSV0_SHIFT},
    1003. 

  1003. 	{PMIC_CHRIND_DIM_DUTY, PMIC_CHRIND_DIM_DUTY_ADDR, PMIC_CHRIND_DIM_DUTY_MASK, PMIC_CHRIND_DIM_DUTY_SHIFT},
    1004. 

  1004. 	{PMIC_CHRIND_STEP, PMIC_CHRIND_STEP_ADDR, PMIC_CHRIND_STEP_MASK, PMIC_CHRIND_STEP_SHIFT},
    1005. 

  1005. 	{PMIC_CHRIND_BREATH_TF2_SEL, PMIC_CHRIND_BREATH_TF2_SEL_ADDR, PMIC_CHRIND_BREATH_TF2_SEL_MASK, PMIC_CHRIND_BREATH_TF2_SEL_SHIFT},
    1006. 

  1006. 	{PMIC_CHRIND_BREATH_TF1_SEL, PMIC_CHRIND_BREATH_TF1_SEL_ADDR, PMIC_CHRIND_BREATH_TF1_SEL_MASK, PMIC_CHRIND_BREATH_TF1_SEL_SHIFT},
    1007. 

  1007. 	{PMIC_CHRIND_BREATH_TR2_SEL, PMIC_CHRIND_BREATH_TR2_SEL_ADDR, PMIC_CHRIND_BREATH_TR2_SEL_MASK, PMIC_CHRIND_BREATH_TR2_SEL_SHIFT},
    1008. 

  1008. 	{PMIC_CHRIND_BREATH_TR1_SEL, PMIC_CHRIND_BREATH_TR1_SEL_ADDR, PMIC_CHRIND_BREATH_TR1_SEL_MASK, PMIC_CHRIND_BREATH_TR1_SEL_SHIFT},
    1009. 

  1009. 	{PMIC_CHRIND_BREATH_TOFF_SEL, PMIC_CHRIND_BREATH_TOFF_SEL_ADDR, PMIC_CHRIND_BREATH_TOFF_SEL_MASK, PMIC_CHRIND_BREATH_TOFF_SEL_SHIFT},
    1010. 

  1010. 	{PMIC_CHRIND_BREATH_TON_SEL, PMIC_CHRIND_BREATH_TON_SEL_ADDR, PMIC_CHRIND_BREATH_TON_SEL_MASK, PMIC_CHRIND_BREATH_TON_SEL_SHIFT},
    1011. 

  1011. 	{PMIC_CHRIND_SFSTR_EN, PMIC_CHRIND_SFSTR_EN_ADDR, PMIC_CHRIND_SFSTR_EN_MASK, PMIC_CHRIND_SFSTR_EN_SHIFT},
    1012. 

  1012. 	{PMIC_CHRIND_SFSTR_TC, PMIC_CHRIND_SFSTR_TC_ADDR, PMIC_CHRIND_SFSTR_TC_MASK, PMIC_CHRIND_SFSTR_TC_SHIFT},
    1013. 

  1013. 	{PMIC_CHRIND_EN_SEL, PMIC_CHRIND_EN_SEL_ADDR, PMIC_CHRIND_EN_SEL_MASK, PMIC_CHRIND_EN_SEL_SHIFT},
    1014. 

  1014. 	{PMIC_CHRIND_EN, PMIC_CHRIND_EN_ADDR, PMIC_CHRIND_EN_MASK, PMIC_CHRIND_EN_SHIFT},
    1015. 

  1015. 	{PMIC_CHRIND_CHOP_EN, PMIC_CHRIND_CHOP_EN_ADDR, PMIC_CHRIND_CHOP_EN_MASK, PMIC_CHRIND_CHOP_EN_SHIFT},
    1016. 

  1016. 	{PMIC_CHRIND_MODE, PMIC_CHRIND_MODE_ADDR, PMIC_CHRIND_MODE_MASK, PMIC_CHRIND_MODE_SHIFT},
    1017. 

  1017. 	{PMIC_CHRIND_CHOP_SW, PMIC_CHRIND_CHOP_SW_ADDR, PMIC_CHRIND_CHOP_SW_MASK, PMIC_CHRIND_CHOP_SW_SHIFT},
    1018. 

  1018. 	{PMIC_CHRIND_BIAS_EN, PMIC_CHRIND_BIAS_EN_ADDR, PMIC_CHRIND_BIAS_EN_MASK, PMIC_CHRIND_BIAS_EN_SHIFT},
    1019. 

  1019. 	{PMIC_RG_SLP_RW_EN, PMIC_RG_SLP_RW_EN_ADDR, PMIC_RG_SLP_RW_EN_MASK, PMIC_RG_SLP_RW_EN_SHIFT},
    1020. 

  1020. 	{PMIC_RG_SPI_RSV, PMIC_RG_SPI_RSV_ADDR, PMIC_RG_SPI_RSV_MASK, PMIC_RG_SPI_RSV_SHIFT},
    1021. 

  1021. 	{PMIC_DEW_DIO_EN, PMIC_DEW_DIO_EN_ADDR, PMIC_DEW_DIO_EN_MASK, PMIC_DEW_DIO_EN_SHIFT},
    1022. 

  1022. 	{PMIC_DEW_READ_TEST, PMIC_DEW_READ_TEST_ADDR, PMIC_DEW_READ_TEST_MASK, PMIC_DEW_READ_TEST_SHIFT},
    1023. 

  1023. 	{PMIC_DEW_WRITE_TEST, PMIC_DEW_WRITE_TEST_ADDR, PMIC_DEW_WRITE_TEST_MASK, PMIC_DEW_WRITE_TEST_SHIFT},
    1024. 

  1024. 	{PMIC_DEW_CRC_SWRST, PMIC_DEW_CRC_SWRST_ADDR, PMIC_DEW_CRC_SWRST_MASK, PMIC_DEW_CRC_SWRST_SHIFT},
    1025. 

  1025. 	{PMIC_DEW_CRC_EN, PMIC_DEW_CRC_EN_ADDR, PMIC_DEW_CRC_EN_MASK, PMIC_DEW_CRC_EN_SHIFT},
    1026. 

  1026. 	{PMIC_DEW_CRC_VAL, PMIC_DEW_CRC_VAL_ADDR, PMIC_DEW_CRC_VAL_MASK, PMIC_DEW_CRC_VAL_SHIFT},
    1027. 

  1027. 	{PMIC_DEW_DBG_MON_SEL, PMIC_DEW_DBG_MON_SEL_ADDR, PMIC_DEW_DBG_MON_SEL_MASK, PMIC_DEW_DBG_MON_SEL_SHIFT},
    1028. 

  1028. 	{PMIC_DEW_CIPHER_KEY_SEL, PMIC_DEW_CIPHER_KEY_SEL_ADDR, PMIC_DEW_CIPHER_KEY_SEL_MASK, PMIC_DEW_CIPHER_KEY_SEL_SHIFT},
    1029. 

  1029. 	{PMIC_DEW_CIPHER_IV_SEL, PMIC_DEW_CIPHER_IV_SEL_ADDR, PMIC_DEW_CIPHER_IV_SEL_MASK, PMIC_DEW_CIPHER_IV_SEL_SHIFT},
    1030. 

  1030. 	{PMIC_DEW_CIPHER_EN, PMIC_DEW_CIPHER_EN_ADDR, PMIC_DEW_CIPHER_EN_MASK, PMIC_DEW_CIPHER_EN_SHIFT},
    1031. 

  1031. 	{PMIC_DEW_CIPHER_RDY, PMIC_DEW_CIPHER_RDY_ADDR, PMIC_DEW_CIPHER_RDY_MASK, PMIC_DEW_CIPHER_RDY_SHIFT},
    1032. 

  1032. 	{PMIC_DEW_CIPHER_MODE, PMIC_DEW_CIPHER_MODE_ADDR, PMIC_DEW_CIPHER_MODE_MASK, PMIC_DEW_CIPHER_MODE_SHIFT},
    1033. 

  1033. 	{PMIC_DEW_CIPHER_SWRST, PMIC_DEW_CIPHER_SWRST_ADDR, PMIC_DEW_CIPHER_SWRST_MASK, PMIC_DEW_CIPHER_SWRST_SHIFT},
    1034. 

  1034. 	{PMIC_DEW_RDDMY_NO, PMIC_DEW_RDDMY_NO_ADDR, PMIC_DEW_RDDMY_NO_MASK, PMIC_DEW_RDDMY_NO_SHIFT},
    1035. 

  1035. 	{PMIC_INT_TYPE_CON0, PMIC_INT_TYPE_CON0_ADDR, PMIC_INT_TYPE_CON0_MASK, PMIC_INT_TYPE_CON0_SHIFT},
    1036. 

  1036. 	{PMIC_INT_TYPE_CON0_SET, PMIC_INT_TYPE_CON0_SET_ADDR, PMIC_INT_TYPE_CON0_SET_MASK, PMIC_INT_TYPE_CON0_SET_SHIFT},
    1037. 

  1037. 	{PMIC_INT_TYPE_CON0_CLR, PMIC_INT_TYPE_CON0_CLR_ADDR, PMIC_INT_TYPE_CON0_CLR_MASK, PMIC_INT_TYPE_CON0_CLR_SHIFT},
    1038. 

  1038. 	{PMIC_INT_TYPE_CON1, PMIC_INT_TYPE_CON1_ADDR, PMIC_INT_TYPE_CON1_MASK, PMIC_INT_TYPE_CON1_SHIFT},
    1039. 

  1039. 	{PMIC_INT_TYPE_CON1_SET, PMIC_INT_TYPE_CON1_SET_ADDR, PMIC_INT_TYPE_CON1_SET_MASK, PMIC_INT_TYPE_CON1_SET_SHIFT},
    1040. 

  1040. 	{PMIC_INT_TYPE_CON1_CLR, PMIC_INT_TYPE_CON1_CLR_ADDR, PMIC_INT_TYPE_CON1_CLR_MASK, PMIC_INT_TYPE_CON1_CLR_SHIFT},
    1041. 

  1041. 	{PMIC_INT_TYPE_CON2, PMIC_INT_TYPE_CON2_ADDR, PMIC_INT_TYPE_CON2_MASK, PMIC_INT_TYPE_CON2_SHIFT},
    1042. 

  1042. 	{PMIC_INT_TYPE_CON2_SET, PMIC_INT_TYPE_CON2_SET_ADDR, PMIC_INT_TYPE_CON2_SET_MASK, PMIC_INT_TYPE_CON2_SET_SHIFT},
    1043. 

  1043. 	{PMIC_INT_TYPE_CON2_CLR, PMIC_INT_TYPE_CON2_CLR_ADDR, PMIC_INT_TYPE_CON2_CLR_MASK, PMIC_INT_TYPE_CON2_CLR_SHIFT},
    1044. 

  1044. 	{PMIC_INT_TYPE_CON3, PMIC_INT_TYPE_CON3_ADDR, PMIC_INT_TYPE_CON3_MASK, PMIC_INT_TYPE_CON3_SHIFT},
    1045. 

  1045. 	{PMIC_INT_TYPE_CON3_SET, PMIC_INT_TYPE_CON3_SET_ADDR, PMIC_INT_TYPE_CON3_SET_MASK, PMIC_INT_TYPE_CON3_SET_SHIFT},
    1046. 

  1046. 	{PMIC_INT_TYPE_CON3_CLR, PMIC_INT_TYPE_CON3_CLR_ADDR, PMIC_INT_TYPE_CON3_CLR_MASK, PMIC_INT_TYPE_CON3_CLR_SHIFT},
    1047. 

  1047. 	{PMIC_CPU_INT_STA, PMIC_CPU_INT_STA_ADDR, PMIC_CPU_INT_STA_MASK, PMIC_CPU_INT_STA_SHIFT},
    1048. 

  1048. 	{PMIC_MD32_INT_STA, PMIC_MD32_INT_STA_ADDR, PMIC_MD32_INT_STA_MASK, PMIC_MD32_INT_STA_SHIFT},
    1049. 

  1049. 	{PMIC_BUCK_LDO_FT_TESTMODE_EN, PMIC_BUCK_LDO_FT_TESTMODE_EN_ADDR, PMIC_BUCK_LDO_FT_TESTMODE_EN_MASK, PMIC_BUCK_LDO_FT_TESTMODE_EN_SHIFT},
    1050. 

  1050. 	{PMIC_EFUSE_VOSEL_LIMIT, PMIC_EFUSE_VOSEL_LIMIT_ADDR, PMIC_EFUSE_VOSEL_LIMIT_MASK, PMIC_EFUSE_VOSEL_LIMIT_SHIFT},
    1051. 

  1051. 	{PMIC_EFUSE_OC_EN_SEL, PMIC_EFUSE_OC_EN_SEL_ADDR, PMIC_EFUSE_OC_EN_SEL_MASK, PMIC_EFUSE_OC_EN_SEL_SHIFT},
    1052. 

  1052. 	{PMIC_EFUSE_OC_SDN_EN, PMIC_EFUSE_OC_SDN_EN_ADDR, PMIC_EFUSE_OC_SDN_EN_MASK, PMIC_EFUSE_OC_SDN_EN_SHIFT},
    1053. 

  1053. 	{PMIC_BUCK_FOR_LDO_OSC_SEL, PMIC_BUCK_FOR_LDO_OSC_SEL_ADDR, PMIC_BUCK_FOR_LDO_OSC_SEL_MASK, PMIC_BUCK_FOR_LDO_OSC_SEL_SHIFT},
    1054. 

  1054. 	{PMIC_BUCK_ALL_CON0_RSV0, PMIC_BUCK_ALL_CON0_RSV0_ADDR, PMIC_BUCK_ALL_CON0_RSV0_MASK, PMIC_BUCK_ALL_CON0_RSV0_SHIFT},
    1055. 

  1055. 	{PMIC_BUCK_BUCK_RSV, PMIC_BUCK_BUCK_RSV_ADDR, PMIC_BUCK_BUCK_RSV_MASK, PMIC_BUCK_BUCK_RSV_SHIFT},
    1056. 

  1056. 	{PMIC_BUCK_VCORE_VOSEL_CTRL_PROT, PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_ADDR, PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_MASK, PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_SHIFT},
    1057. 

  1057. 	{PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_EN, PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_EN_ADDR, PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_EN_MASK, PMIC_BUCK_VCORE_VOSEL_CTRL_PROT_EN_SHIFT},
    1058. 

  1058. 	{PMIC_BUCK_ALL_CON2_RSV0, PMIC_BUCK_ALL_CON2_RSV0_ADDR, PMIC_BUCK_ALL_CON2_RSV0_MASK, PMIC_BUCK_ALL_CON2_RSV0_SHIFT},
    1059. 

  1059. 	{PMIC_BUCK_VSLEEP_SRC0, PMIC_BUCK_VSLEEP_SRC0_ADDR, PMIC_BUCK_VSLEEP_SRC0_MASK, PMIC_BUCK_VSLEEP_SRC0_SHIFT},
    1060. 

  1060. 	{PMIC_BUCK_VSLEEP_SRC1, PMIC_BUCK_VSLEEP_SRC1_ADDR, PMIC_BUCK_VSLEEP_SRC1_MASK, PMIC_BUCK_VSLEEP_SRC1_SHIFT},
    1061. 

  1061. 	{PMIC_BUCK_R2R_SRC0, PMIC_BUCK_R2R_SRC0_ADDR, PMIC_BUCK_R2R_SRC0_MASK, PMIC_BUCK_R2R_SRC0_SHIFT},
    1062. 

  1062. 	{PMIC_BUCK_R2R_SRC1, PMIC_BUCK_R2R_SRC1_ADDR, PMIC_BUCK_R2R_SRC1_MASK, PMIC_BUCK_R2R_SRC1_SHIFT},
    1063. 

  1063. 	{PMIC_BUCK_BUCK_OSC_SEL_SRC0, PMIC_BUCK_BUCK_OSC_SEL_SRC0_ADDR, PMIC_BUCK_BUCK_OSC_SEL_SRC0_MASK, PMIC_BUCK_BUCK_OSC_SEL_SRC0_SHIFT},
    1064. 

  1064. 	{PMIC_BUCK_SRCLKEN_DLY_SRC1, PMIC_BUCK_SRCLKEN_DLY_SRC1_ADDR, PMIC_BUCK_SRCLKEN_DLY_SRC1_MASK, PMIC_BUCK_SRCLKEN_DLY_SRC1_SHIFT},
    1065. 

  1065. 	{PMIC_BUCK_VPA_VOSEL_DLC011, PMIC_BUCK_VPA_VOSEL_DLC011_ADDR, PMIC_BUCK_VPA_VOSEL_DLC011_MASK, PMIC_BUCK_VPA_VOSEL_DLC011_SHIFT},
    1066. 

  1066. 	{PMIC_BUCK_VPA_VOSEL_DLC111, PMIC_BUCK_VPA_VOSEL_DLC111_ADDR, PMIC_BUCK_VPA_VOSEL_DLC111_MASK, PMIC_BUCK_VPA_VOSEL_DLC111_SHIFT},
    1067. 

  1067. 	{PMIC_BUCK_VPA_DLC_MAP_EN, PMIC_BUCK_VPA_DLC_MAP_EN_ADDR, PMIC_BUCK_VPA_DLC_MAP_EN_MASK, PMIC_BUCK_VPA_DLC_MAP_EN_SHIFT},
    1068. 

  1068. 	{PMIC_BUCK_VPA_VOSEL_DLC001, PMIC_BUCK_VPA_VOSEL_DLC001_ADDR, PMIC_BUCK_VPA_VOSEL_DLC001_MASK, PMIC_BUCK_VPA_VOSEL_DLC001_SHIFT},
    1069. 

  1069. 	{PMIC_BUCK_VPA_DLC, PMIC_BUCK_VPA_DLC_ADDR, PMIC_BUCK_VPA_DLC_MASK, PMIC_BUCK_VPA_DLC_SHIFT},
    1070. 

  1070. 	{PMIC_DA_NI_VPA_DLC, PMIC_DA_NI_VPA_DLC_ADDR, PMIC_DA_NI_VPA_DLC_MASK, PMIC_DA_NI_VPA_DLC_SHIFT},
    1071. 

  1071. 	{PMIC_BUCK_VSRAM_PROC_TRACK_SLEEP_CTRL, PMIC_BUCK_VSRAM_PROC_TRACK_SLEEP_CTRL_ADDR, PMIC_BUCK_VSRAM_PROC_TRACK_SLEEP_CTRL_MASK, PMIC_BUCK_VSRAM_PROC_TRACK_SLEEP_CTRL_SHIFT},
    1072. 

  1072. 	{PMIC_BUCK_VSRAM_PROC_TRACK_ON_CTRL, PMIC_BUCK_VSRAM_PROC_TRACK_ON_CTRL_ADDR, PMIC_BUCK_VSRAM_PROC_TRACK_ON_CTRL_MASK, PMIC_BUCK_VSRAM_PROC_TRACK_ON_CTRL_SHIFT},
    1073. 

  1073. 	{PMIC_BUCK_VPROC_TRACK_ON_CTRL, PMIC_BUCK_VPROC_TRACK_ON_CTRL_ADDR, PMIC_BUCK_VPROC_TRACK_ON_CTRL_MASK, PMIC_BUCK_VPROC_TRACK_ON_CTRL_SHIFT},
    1074. 

  1074. 	{PMIC_BUCK_VSRAM_PROC_VOSEL_DELTA, PMIC_BUCK_VSRAM_PROC_VOSEL_DELTA_ADDR, PMIC_BUCK_VSRAM_PROC_VOSEL_DELTA_MASK, PMIC_BUCK_VSRAM_PROC_VOSEL_DELTA_SHIFT},
    1075. 

  1075. 	{PMIC_BUCK_VSRAM_PROC_VOSEL_OFFSET, PMIC_BUCK_VSRAM_PROC_VOSEL_OFFSET_ADDR, PMIC_BUCK_VSRAM_PROC_VOSEL_OFFSET_MASK, PMIC_BUCK_VSRAM_PROC_VOSEL_OFFSET_SHIFT},
    1076. 

  1076. 	{PMIC_BUCK_VSRAM_PROC_VOSEL_ON_LB, PMIC_BUCK_VSRAM_PROC_VOSEL_ON_LB_ADDR, PMIC_BUCK_VSRAM_PROC_VOSEL_ON_LB_MASK, PMIC_BUCK_VSRAM_PROC_VOSEL_ON_LB_SHIFT},
    1077. 

  1077. 	{PMIC_BUCK_VSRAM_PROC_VOSEL_ON_HB, PMIC_BUCK_VSRAM_PROC_VOSEL_ON_HB_ADDR, PMIC_BUCK_VSRAM_PROC_VOSEL_ON_HB_MASK, PMIC_BUCK_VSRAM_PROC_VOSEL_ON_HB_SHIFT},
    1078. 

  1078. 	{PMIC_BUCK_VSRAM_PROC_VOSEL_SLEEP_LB, PMIC_BUCK_VSRAM_PROC_VOSEL_SLEEP_LB_ADDR, PMIC_BUCK_VSRAM_PROC_VOSEL_SLEEP_LB_MASK, PMIC_BUCK_VSRAM_PROC_VOSEL_SLEEP_LB_SHIFT},
    1079. 

  1079. 	{PMIC_AD_QI_VCORE_OC_STATUS, PMIC_AD_QI_VCORE_OC_STATUS_ADDR, PMIC_AD_QI_VCORE_OC_STATUS_MASK, PMIC_AD_QI_VCORE_OC_STATUS_SHIFT},
    1080. 

  1080. 	{PMIC_AD_QI_VPROC_OC_STATUS, PMIC_AD_QI_VPROC_OC_STATUS_ADDR, PMIC_AD_QI_VPROC_OC_STATUS_MASK, PMIC_AD_QI_VPROC_OC_STATUS_SHIFT},
    1081. 

  1081. 	{PMIC_AD_QI_VS1_OC_STATUS, PMIC_AD_QI_VS1_OC_STATUS_ADDR, PMIC_AD_QI_VS1_OC_STATUS_MASK, PMIC_AD_QI_VS1_OC_STATUS_SHIFT},
    1082. 

  1082. 	{PMIC_AD_QI_VPA_OC_STATUS, PMIC_AD_QI_VPA_OC_STATUS_ADDR, PMIC_AD_QI_VPA_OC_STATUS_MASK, PMIC_AD_QI_VPA_OC_STATUS_SHIFT},
    1083. 

  1083. 	{PMIC_BUCK_ANA_STATUS, PMIC_BUCK_ANA_STATUS_ADDR, PMIC_BUCK_ANA_STATUS_MASK, PMIC_BUCK_ANA_STATUS_SHIFT},
    1084. 

  1084. 	{PMIC_AD_QI_VCORE_DIG_MON, PMIC_AD_QI_VCORE_DIG_MON_ADDR, PMIC_AD_QI_VCORE_DIG_MON_MASK, PMIC_AD_QI_VCORE_DIG_MON_SHIFT},
    1085. 

  1085. 	{PMIC_AD_QI_VPROC_DIG_MON, PMIC_AD_QI_VPROC_DIG_MON_ADDR, PMIC_AD_QI_VPROC_DIG_MON_MASK, PMIC_AD_QI_VPROC_DIG_MON_SHIFT},
    1086. 

  1086. 	{PMIC_AD_QI_VS1_DIG_MON, PMIC_AD_QI_VS1_DIG_MON_ADDR, PMIC_AD_QI_VS1_DIG_MON_MASK, PMIC_AD_QI_VS1_DIG_MON_SHIFT},
    1087. 

  1087. 	{PMIC_BUCK_VCORE_OC_STATUS, PMIC_BUCK_VCORE_OC_STATUS_ADDR, PMIC_BUCK_VCORE_OC_STATUS_MASK, PMIC_BUCK_VCORE_OC_STATUS_SHIFT},
    1088. 

  1088. 	{PMIC_BUCK_VCORE2_OC_STATUS, PMIC_BUCK_VCORE2_OC_STATUS_ADDR, PMIC_BUCK_VCORE2_OC_STATUS_MASK, PMIC_BUCK_VCORE2_OC_STATUS_SHIFT},
    1089. 

  1089. 	{PMIC_BUCK_VPROC_OC_STATUS, PMIC_BUCK_VPROC_OC_STATUS_ADDR, PMIC_BUCK_VPROC_OC_STATUS_MASK, PMIC_BUCK_VPROC_OC_STATUS_SHIFT},
    1090. 

  1090. 	{PMIC_BUCK_VS1_OC_STATUS, PMIC_BUCK_VS1_OC_STATUS_ADDR, PMIC_BUCK_VS1_OC_STATUS_MASK, PMIC_BUCK_VS1_OC_STATUS_SHIFT},
    1091. 

  1091. 	{PMIC_BUCK_VPA_OC_STATUS, PMIC_BUCK_VPA_OC_STATUS_ADDR, PMIC_BUCK_VPA_OC_STATUS_MASK, PMIC_BUCK_VPA_OC_STATUS_SHIFT},
    1092. 

  1092. 	{PMIC_BUCK_VCORE_OC_INT_EN, PMIC_BUCK_VCORE_OC_INT_EN_ADDR, PMIC_BUCK_VCORE_OC_INT_EN_MASK, PMIC_BUCK_VCORE_OC_INT_EN_SHIFT},
    1093. 

  1093. 	{PMIC_BUCK_VCORE2_OC_INT_EN, PMIC_BUCK_VCORE2_OC_INT_EN_ADDR, PMIC_BUCK_VCORE2_OC_INT_EN_MASK, PMIC_BUCK_VCORE2_OC_INT_EN_SHIFT},
    1094. 

  1094. 	{PMIC_BUCK_VPROC_OC_INT_EN, PMIC_BUCK_VPROC_OC_INT_EN_ADDR, PMIC_BUCK_VPROC_OC_INT_EN_MASK, PMIC_BUCK_VPROC_OC_INT_EN_SHIFT},
    1095. 

  1095. 	{PMIC_BUCK_VS1_OC_INT_EN, PMIC_BUCK_VS1_OC_INT_EN_ADDR, PMIC_BUCK_VS1_OC_INT_EN_MASK, PMIC_BUCK_VS1_OC_INT_EN_SHIFT},
    1096. 

  1096. 	{PMIC_BUCK_VPA_OC_INT_EN, PMIC_BUCK_VPA_OC_INT_EN_ADDR, PMIC_BUCK_VPA_OC_INT_EN_MASK, PMIC_BUCK_VPA_OC_INT_EN_SHIFT},
    1097. 

  1097. 	{PMIC_BUCK_VCORE_EN_OC_SDN_SEL, PMIC_BUCK_VCORE_EN_OC_SDN_SEL_ADDR, PMIC_BUCK_VCORE_EN_OC_SDN_SEL_MASK, PMIC_BUCK_VCORE_EN_OC_SDN_SEL_SHIFT},
    1098. 

  1098. 	{PMIC_BUCK_VCORE2_EN_OC_SDN_SEL, PMIC_BUCK_VCORE2_EN_OC_SDN_SEL_ADDR, PMIC_BUCK_VCORE2_EN_OC_SDN_SEL_MASK, PMIC_BUCK_VCORE2_EN_OC_SDN_SEL_SHIFT},
    1099. 

  1099. 	{PMIC_BUCK_VPROC_EN_OC_SDN_SEL, PMIC_BUCK_VPROC_EN_OC_SDN_SEL_ADDR, PMIC_BUCK_VPROC_EN_OC_SDN_SEL_MASK, PMIC_BUCK_VPROC_EN_OC_SDN_SEL_SHIFT},
    1100. 

  1100. 	{PMIC_BUCK_VS1_EN_OC_SDN_SEL, PMIC_BUCK_VS1_EN_OC_SDN_SEL_ADDR, PMIC_BUCK_VS1_EN_OC_SDN_SEL_MASK, PMIC_BUCK_VS1_EN_OC_SDN_SEL_SHIFT},
    1101. 

  1101. 	{PMIC_BUCK_VPA_EN_OC_SDN_SEL, PMIC_BUCK_VPA_EN_OC_SDN_SEL_ADDR, PMIC_BUCK_VPA_EN_OC_SDN_SEL_MASK, PMIC_BUCK_VPA_EN_OC_SDN_SEL_SHIFT},
    1102. 

  1102. 	{PMIC_BUCK_VCORE_OC_FLAG_CLR, PMIC_BUCK_VCORE_OC_FLAG_CLR_ADDR, PMIC_BUCK_VCORE_OC_FLAG_CLR_MASK, PMIC_BUCK_VCORE_OC_FLAG_CLR_SHIFT},
    1103. 

  1103. 	{PMIC_BUCK_VCORE2_OC_FLAG_CLR, PMIC_BUCK_VCORE2_OC_FLAG_CLR_ADDR, PMIC_BUCK_VCORE2_OC_FLAG_CLR_MASK, PMIC_BUCK_VCORE2_OC_FLAG_CLR_SHIFT},
    1104. 

  1104. 	{PMIC_BUCK_VPROC_OC_FLAG_CLR, PMIC_BUCK_VPROC_OC_FLAG_CLR_ADDR, PMIC_BUCK_VPROC_OC_FLAG_CLR_MASK, PMIC_BUCK_VPROC_OC_FLAG_CLR_SHIFT},
    1105. 

  1105. 	{PMIC_BUCK_VS1_OC_FLAG_CLR, PMIC_BUCK_VS1_OC_FLAG_CLR_ADDR, PMIC_BUCK_VS1_OC_FLAG_CLR_MASK, PMIC_BUCK_VS1_OC_FLAG_CLR_SHIFT},
    1106. 

  1106. 	{PMIC_BUCK_VPA_OC_FLAG_CLR, PMIC_BUCK_VPA_OC_FLAG_CLR_ADDR, PMIC_BUCK_VPA_OC_FLAG_CLR_MASK, PMIC_BUCK_VPA_OC_FLAG_CLR_SHIFT},
    1107. 

  1107. 	{PMIC_BUCK_VCORE_OC_FLAG_CLR_SEL, PMIC_BUCK_VCORE_OC_FLAG_CLR_SEL_ADDR, PMIC_BUCK_VCORE_OC_FLAG_CLR_SEL_MASK, PMIC_BUCK_VCORE_OC_FLAG_CLR_SEL_SHIFT},
    1108. 

  1108. 	{PMIC_BUCK_VCORE2_OC_FLAG_CLR_SEL, PMIC_BUCK_VCORE2_OC_FLAG_CLR_SEL_ADDR, PMIC_BUCK_VCORE2_OC_FLAG_CLR_SEL_MASK, PMIC_BUCK_VCORE2_OC_FLAG_CLR_SEL_SHIFT},
    1109. 

  1109. 	{PMIC_BUCK_VPROC_OC_FLAG_CLR_SEL, PMIC_BUCK_VPROC_OC_FLAG_CLR_SEL_ADDR, PMIC_BUCK_VPROC_OC_FLAG_CLR_SEL_MASK, PMIC_BUCK_VPROC_OC_FLAG_CLR_SEL_SHIFT},
    1110. 

  1110. 	{PMIC_BUCK_VS1_OC_FLAG_CLR_SEL, PMIC_BUCK_VS1_OC_FLAG_CLR_SEL_ADDR, PMIC_BUCK_VS1_OC_FLAG_CLR_SEL_MASK, PMIC_BUCK_VS1_OC_FLAG_CLR_SEL_SHIFT},
    1111. 

  1111. 	{PMIC_BUCK_VPA_OC_FLAG_CLR_SEL, PMIC_BUCK_VPA_OC_FLAG_CLR_SEL_ADDR, PMIC_BUCK_VPA_OC_FLAG_CLR_SEL_MASK, PMIC_BUCK_VPA_OC_FLAG_CLR_SEL_SHIFT},
    1112. 

  1112. 	{PMIC_BUCK_VCORE_OC_DEG_EN, PMIC_BUCK_VCORE_OC_DEG_EN_ADDR, PMIC_BUCK_VCORE_OC_DEG_EN_MASK, PMIC_BUCK_VCORE_OC_DEG_EN_SHIFT},
    1113. 

  1113. 	{PMIC_BUCK_VCORE_OC_WND, PMIC_BUCK_VCORE_OC_WND_ADDR, PMIC_BUCK_VCORE_OC_WND_MASK, PMIC_BUCK_VCORE_OC_WND_SHIFT},
    1114. 

  1114. 	{PMIC_BUCK_VCORE_OC_THD, PMIC_BUCK_VCORE_OC_THD_ADDR, PMIC_BUCK_VCORE_OC_THD_MASK, PMIC_BUCK_VCORE_OC_THD_SHIFT},
    1115. 

  1115. 	{PMIC_BUCK_VCORE2_OC_DEG_EN, PMIC_BUCK_VCORE2_OC_DEG_EN_ADDR, PMIC_BUCK_VCORE2_OC_DEG_EN_MASK, PMIC_BUCK_VCORE2_OC_DEG_EN_SHIFT},
    1116. 

  1116. 	{PMIC_BUCK_VCORE2_OC_WND, PMIC_BUCK_VCORE2_OC_WND_ADDR, PMIC_BUCK_VCORE2_OC_WND_MASK, PMIC_BUCK_VCORE2_OC_WND_SHIFT},
    1117. 

  1117. 	{PMIC_BUCK_VCORE2_OC_THD, PMIC_BUCK_VCORE2_OC_THD_ADDR, PMIC_BUCK_VCORE2_OC_THD_MASK, PMIC_BUCK_VCORE2_OC_THD_SHIFT},
    1118. 

  1118. 	{PMIC_BUCK_VPROC_OC_DEG_EN, PMIC_BUCK_VPROC_OC_DEG_EN_ADDR, PMIC_BUCK_VPROC_OC_DEG_EN_MASK, PMIC_BUCK_VPROC_OC_DEG_EN_SHIFT},
    1119. 

  1119. 	{PMIC_BUCK_VPROC_OC_WND, PMIC_BUCK_VPROC_OC_WND_ADDR, PMIC_BUCK_VPROC_OC_WND_MASK, PMIC_BUCK_VPROC_OC_WND_SHIFT},
    1120. 

  1120. 	{PMIC_BUCK_VPROC_OC_THD, PMIC_BUCK_VPROC_OC_THD_ADDR, PMIC_BUCK_VPROC_OC_THD_MASK, PMIC_BUCK_VPROC_OC_THD_SHIFT},
    1121. 

  1121. 	{PMIC_BUCK_VS1_OC_DEG_EN, PMIC_BUCK_VS1_OC_DEG_EN_ADDR, PMIC_BUCK_VS1_OC_DEG_EN_MASK, PMIC_BUCK_VS1_OC_DEG_EN_SHIFT},
    1122. 

  1122. 	{PMIC_BUCK_VS1_OC_WND, PMIC_BUCK_VS1_OC_WND_ADDR, PMIC_BUCK_VS1_OC_WND_MASK, PMIC_BUCK_VS1_OC_WND_SHIFT},
    1123. 

  1123. 	{PMIC_BUCK_VS1_OC_THD, PMIC_BUCK_VS1_OC_THD_ADDR, PMIC_BUCK_VS1_OC_THD_MASK, PMIC_BUCK_VS1_OC_THD_SHIFT},
    1124. 

  1124. 	{PMIC_BUCK_VPA_OC_DEG_EN, PMIC_BUCK_VPA_OC_DEG_EN_ADDR, PMIC_BUCK_VPA_OC_DEG_EN_MASK, PMIC_BUCK_VPA_OC_DEG_EN_SHIFT},
    1125. 

  1125. 	{PMIC_BUCK_VPA_OC_WND, PMIC_BUCK_VPA_OC_WND_ADDR, PMIC_BUCK_VPA_OC_WND_MASK, PMIC_BUCK_VPA_OC_WND_SHIFT},
    1126. 

  1126. 	{PMIC_BUCK_VPA_OC_THD, PMIC_BUCK_VPA_OC_THD_ADDR, PMIC_BUCK_VPA_OC_THD_MASK, PMIC_BUCK_VPA_OC_THD_SHIFT},
    1127. 

  1127. 	{PMIC_RG_SMPS_TESTMODE_B, PMIC_RG_SMPS_TESTMODE_B_ADDR, PMIC_RG_SMPS_TESTMODE_B_MASK, PMIC_RG_SMPS_TESTMODE_B_SHIFT},
    1128. 

  1128. 	{PMIC_RG_VSRAM_PROC_TRIMH, PMIC_RG_VSRAM_PROC_TRIMH_ADDR, PMIC_RG_VSRAM_PROC_TRIMH_MASK, PMIC_RG_VSRAM_PROC_TRIMH_SHIFT},
    1129. 

  1129. 	{PMIC_RG_VSRAM_PROC_TRIML, PMIC_RG_VSRAM_PROC_TRIML_ADDR, PMIC_RG_VSRAM_PROC_TRIML_MASK, PMIC_RG_VSRAM_PROC_TRIML_SHIFT},
    1130. 

  1130. 	{PMIC_RG_VPROC_TRIMH, PMIC_RG_VPROC_TRIMH_ADDR, PMIC_RG_VPROC_TRIMH_MASK, PMIC_RG_VPROC_TRIMH_SHIFT},
    1131. 

  1131. 	{PMIC_RG_VPROC_TRIML, PMIC_RG_VPROC_TRIML_ADDR, PMIC_RG_VPROC_TRIML_MASK, PMIC_RG_VPROC_TRIML_SHIFT},
    1132. 

  1132. 	{PMIC_RG_VCORE_TRIMH, PMIC_RG_VCORE_TRIMH_ADDR, PMIC_RG_VCORE_TRIMH_MASK, PMIC_RG_VCORE_TRIMH_SHIFT},
    1133. 

  1133. 	{PMIC_RG_VCORE_TRIML, PMIC_RG_VCORE_TRIML_ADDR, PMIC_RG_VCORE_TRIML_MASK, PMIC_RG_VCORE_TRIML_SHIFT},
    1134. 

  1134. 	{PMIC_RG_VCORE2_TRIMH, PMIC_RG_VCORE2_TRIMH_ADDR, PMIC_RG_VCORE2_TRIMH_MASK, PMIC_RG_VCORE2_TRIMH_SHIFT},
    1135. 

  1135. 	{PMIC_RG_VCORE2_TRIML, PMIC_RG_VCORE2_TRIML_ADDR, PMIC_RG_VCORE2_TRIML_MASK, PMIC_RG_VCORE2_TRIML_SHIFT},
    1136. 

  1136. 	{PMIC_RG_VS1_TRIMH, PMIC_RG_VS1_TRIMH_ADDR, PMIC_RG_VS1_TRIMH_MASK, PMIC_RG_VS1_TRIMH_SHIFT},
    1137. 

  1137. 	{PMIC_RG_VS1_TRIML, PMIC_RG_VS1_TRIML_ADDR, PMIC_RG_VS1_TRIML_MASK, PMIC_RG_VS1_TRIML_SHIFT},
    1138. 

  1138. 	{PMIC_RG_VPA_TRIMH, PMIC_RG_VPA_TRIMH_ADDR, PMIC_RG_VPA_TRIMH_MASK, PMIC_RG_VPA_TRIMH_SHIFT},
    1139. 

  1139. 	{PMIC_RG_VPA_TRIML, PMIC_RG_VPA_TRIML_ADDR, PMIC_RG_VPA_TRIML_MASK, PMIC_RG_VPA_TRIML_SHIFT},
    1140. 

  1140. 	{PMIC_RG_VPA_TRIM_REF, PMIC_RG_VPA_TRIM_REF_ADDR, PMIC_RG_VPA_TRIM_REF_MASK, PMIC_RG_VPA_TRIM_REF_SHIFT},
    1141. 

  1141. 	{PMIC_RG_VSRAM_PROC_VSLEEP, PMIC_RG_VSRAM_PROC_VSLEEP_ADDR, PMIC_RG_VSRAM_PROC_VSLEEP_MASK, PMIC_RG_VSRAM_PROC_VSLEEP_SHIFT},
    1142. 

  1142. 	{PMIC_RG_VPROC_VSLEEP, PMIC_RG_VPROC_VSLEEP_ADDR, PMIC_RG_VPROC_VSLEEP_MASK, PMIC_RG_VPROC_VSLEEP_SHIFT},
    1143. 

  1143. 	{PMIC_RG_VCORE_VSLEEP, PMIC_RG_VCORE_VSLEEP_ADDR, PMIC_RG_VCORE_VSLEEP_MASK, PMIC_RG_VCORE_VSLEEP_SHIFT},
    1144. 

  1144. 	{PMIC_RG_VCORE2_VSLEEP, PMIC_RG_VCORE2_VSLEEP_ADDR, PMIC_RG_VCORE2_VSLEEP_MASK, PMIC_RG_VCORE2_VSLEEP_SHIFT},
    1145. 

  1145. 	{PMIC_RG_VPA_BURSTH, PMIC_RG_VPA_BURSTH_ADDR, PMIC_RG_VPA_BURSTH_MASK, PMIC_RG_VPA_BURSTH_SHIFT},
    1146. 

  1146. 	{PMIC_RG_VPA_BURSTL, PMIC_RG_VPA_BURSTL_ADDR, PMIC_RG_VPA_BURSTL_MASK, PMIC_RG_VPA_BURSTL_SHIFT},
    1147. 

  1147. 	{PMIC_RG_DMY100MA_EN, PMIC_RG_DMY100MA_EN_ADDR, PMIC_RG_DMY100MA_EN_MASK, PMIC_RG_DMY100MA_EN_SHIFT},
    1148. 

  1148. 	{PMIC_RG_DMY100MA_SEL, PMIC_RG_DMY100MA_SEL_ADDR, PMIC_RG_DMY100MA_SEL_MASK, PMIC_RG_DMY100MA_SEL_SHIFT},
    1149. 

  1149. 	{PMIC_RG_VSRAM_PROC_VSLEEP_VOLTAGE, PMIC_RG_VSRAM_PROC_VSLEEP_VOLTAGE_ADDR, PMIC_RG_VSRAM_PROC_VSLEEP_VOLTAGE_MASK, PMIC_RG_VSRAM_PROC_VSLEEP_VOLTAGE_SHIFT},
    1150. 

  1150. 	{PMIC_RG_VPROC_VSLEEP_VOLTAGE, PMIC_RG_VPROC_VSLEEP_VOLTAGE_ADDR, PMIC_RG_VPROC_VSLEEP_VOLTAGE_MASK, PMIC_RG_VPROC_VSLEEP_VOLTAGE_SHIFT},
    1151. 

  1151. 	{PMIC_RG_VCORE_VSLEEP_VOLTAGE, PMIC_RG_VCORE_VSLEEP_VOLTAGE_ADDR, PMIC_RG_VCORE_VSLEEP_VOLTAGE_MASK, PMIC_RG_VCORE_VSLEEP_VOLTAGE_SHIFT},
    1152. 

  1152. 	{PMIC_RG_VCORE2_VSLEEP_VOLTAGE, PMIC_RG_VCORE2_VSLEEP_VOLTAGE_ADDR, PMIC_RG_VCORE2_VSLEEP_VOLTAGE_MASK, PMIC_RG_VCORE2_VSLEEP_VOLTAGE_SHIFT},
    1153. 

  1153. 	{PMIC_RG_VPA_RZSEL, PMIC_RG_VPA_RZSEL_ADDR, PMIC_RG_VPA_RZSEL_MASK, PMIC_RG_VPA_RZSEL_SHIFT},
    1154. 

  1154. 	{PMIC_RG_VPA_CC, PMIC_RG_VPA_CC_ADDR, PMIC_RG_VPA_CC_MASK, PMIC_RG_VPA_CC_SHIFT},
    1155. 

  1155. 	{PMIC_RG_VPA_CSR, PMIC_RG_VPA_CSR_ADDR, PMIC_RG_VPA_CSR_MASK, PMIC_RG_VPA_CSR_SHIFT},
    1156. 

  1156. 	{PMIC_RG_VPA_CSMIR, PMIC_RG_VPA_CSMIR_ADDR, PMIC_RG_VPA_CSMIR_MASK, PMIC_RG_VPA_CSMIR_SHIFT},
    1157. 

  1157. 	{PMIC_RG_VPA_CSL, PMIC_RG_VPA_CSL_ADDR, PMIC_RG_VPA_CSL_MASK, PMIC_RG_VPA_CSL_SHIFT},
    1158. 

  1158. 	{PMIC_RG_VPA_SLP, PMIC_RG_VPA_SLP_ADDR, PMIC_RG_VPA_SLP_MASK, PMIC_RG_VPA_SLP_SHIFT},
    1159. 

  1159. 	{PMIC_RG_VPA_ZX_OS_TRIM, PMIC_RG_VPA_ZX_OS_TRIM_ADDR, PMIC_RG_VPA_ZX_OS_TRIM_MASK, PMIC_RG_VPA_ZX_OS_TRIM_SHIFT},
    1160. 

  1160. 	{PMIC_RG_VPA_ZX_OS, PMIC_RG_VPA_ZX_OS_ADDR, PMIC_RG_VPA_ZX_OS_MASK, PMIC_RG_VPA_ZX_OS_SHIFT},
    1161. 

  1161. 	{PMIC_RG_VPA_HZP, PMIC_RG_VPA_HZP_ADDR, PMIC_RG_VPA_HZP_MASK, PMIC_RG_VPA_HZP_SHIFT},
    1162. 

  1162. 	{PMIC_RG_VPA_BWEX_GAT, PMIC_RG_VPA_BWEX_GAT_ADDR, PMIC_RG_VPA_BWEX_GAT_MASK, PMIC_RG_VPA_BWEX_GAT_SHIFT},
    1163. 

  1163. 	{PMIC_RG_VPA_MODESET, PMIC_RG_VPA_MODESET_ADDR, PMIC_RG_VPA_MODESET_MASK, PMIC_RG_VPA_MODESET_SHIFT},
    1164. 

  1164. 	{PMIC_RG_VPA_SLEW, PMIC_RG_VPA_SLEW_ADDR, PMIC_RG_VPA_SLEW_MASK, PMIC_RG_VPA_SLEW_SHIFT},
    1165. 

  1165. 	{PMIC_RG_VPA_SLEW_NMOS, PMIC_RG_VPA_SLEW_NMOS_ADDR, PMIC_RG_VPA_SLEW_NMOS_MASK, PMIC_RG_VPA_SLEW_NMOS_SHIFT},
    1166. 

  1166. 	{PMIC_RG_VPA_NDIS_EN, PMIC_RG_VPA_NDIS_EN_ADDR, PMIC_RG_VPA_NDIS_EN_MASK, PMIC_RG_VPA_NDIS_EN_SHIFT},
    1167. 

  1167. 	{PMIC_RG_VPA_MIN_ON, PMIC_RG_VPA_MIN_ON_ADDR, PMIC_RG_VPA_MIN_ON_MASK, PMIC_RG_VPA_MIN_ON_SHIFT},
    1168. 

  1168. 	{PMIC_RG_VPA_VBAT_DEL, PMIC_RG_VPA_VBAT_DEL_ADDR, PMIC_RG_VPA_VBAT_DEL_MASK, PMIC_RG_VPA_VBAT_DEL_SHIFT},
    1169. 

  1169. 	{PMIC_RG_VPA_RSV1, PMIC_RG_VPA_RSV1_ADDR, PMIC_RG_VPA_RSV1_MASK, PMIC_RG_VPA_RSV1_SHIFT},
    1170. 

  1170. 	{PMIC_RG_VPA_RSV2, PMIC_RG_VPA_RSV2_ADDR, PMIC_RG_VPA_RSV2_MASK, PMIC_RG_VPA_RSV2_SHIFT},
    1171. 

  1171. 	{PMIC_RGS_VPA_ZX_STATUS, PMIC_RGS_VPA_ZX_STATUS_ADDR, PMIC_RGS_VPA_ZX_STATUS_MASK, PMIC_RGS_VPA_ZX_STATUS_SHIFT},
    1172. 

  1172. 	{PMIC_RG_VCORE_MIN_OFF, PMIC_RG_VCORE_MIN_OFF_ADDR, PMIC_RG_VCORE_MIN_OFF_MASK, PMIC_RG_VCORE_MIN_OFF_SHIFT},
    1173. 

  1173. 	{PMIC_RG_VCORE_VRF18_SSTART_EN, PMIC_RG_VCORE_VRF18_SSTART_EN_ADDR, PMIC_RG_VCORE_VRF18_SSTART_EN_MASK, PMIC_RG_VCORE_VRF18_SSTART_EN_SHIFT},
    1174. 

  1174. 	{PMIC_RG_VCORE_1P35UP_SEL_EN, PMIC_RG_VCORE_1P35UP_SEL_EN_ADDR, PMIC_RG_VCORE_1P35UP_SEL_EN_MASK, PMIC_RG_VCORE_1P35UP_SEL_EN_SHIFT},
    1175. 

  1175. 	{PMIC_RG_VCORE_RZSEL, PMIC_RG_VCORE_RZSEL_ADDR, PMIC_RG_VCORE_RZSEL_MASK, PMIC_RG_VCORE_RZSEL_SHIFT},
    1176. 

  1176. 	{PMIC_RG_VCORE_CSR, PMIC_RG_VCORE_CSR_ADDR, PMIC_RG_VCORE_CSR_MASK, PMIC_RG_VCORE_CSR_SHIFT},
    1177. 

  1177. 	{PMIC_RG_VCORE_CSL, PMIC_RG_VCORE_CSL_ADDR, PMIC_RG_VCORE_CSL_MASK, PMIC_RG_VCORE_CSL_SHIFT},
    1178. 

  1178. 	{PMIC_RG_VCORE_SLP, PMIC_RG_VCORE_SLP_ADDR, PMIC_RG_VCORE_SLP_MASK, PMIC_RG_VCORE_SLP_SHIFT},
    1179. 

  1179. 	{PMIC_RG_VCORE_ZX_OS, PMIC_RG_VCORE_ZX_OS_ADDR, PMIC_RG_VCORE_ZX_OS_MASK, PMIC_RG_VCORE_ZX_OS_SHIFT},
    1180. 

  1180. 	{PMIC_RG_VCORE_ZXOS_TRIM, PMIC_RG_VCORE_ZXOS_TRIM_ADDR, PMIC_RG_VCORE_ZXOS_TRIM_MASK, PMIC_RG_VCORE_ZXOS_TRIM_SHIFT},
    1181. 

  1181. 	{PMIC_RG_VCORE_MODESET, PMIC_RG_VCORE_MODESET_ADDR, PMIC_RG_VCORE_MODESET_MASK, PMIC_RG_VCORE_MODESET_SHIFT},
    1182. 

  1182. 	{PMIC_RG_VCORE_NDIS_EN, PMIC_RG_VCORE_NDIS_EN_ADDR, PMIC_RG_VCORE_NDIS_EN_MASK, PMIC_RG_VCORE_NDIS_EN_SHIFT},
    1183. 

  1183. 	{PMIC_RG_VCORE_CSM_N, PMIC_RG_VCORE_CSM_N_ADDR, PMIC_RG_VCORE_CSM_N_MASK, PMIC_RG_VCORE_CSM_N_SHIFT},
    1184. 

  1184. 	{PMIC_RG_VCORE_CSM_P, PMIC_RG_VCORE_CSM_P_ADDR, PMIC_RG_VCORE_CSM_P_MASK, PMIC_RG_VCORE_CSM_P_SHIFT},
    1185. 

  1185. 	{PMIC_RG_VCORE_RSV, PMIC_RG_VCORE_RSV_ADDR, PMIC_RG_VCORE_RSV_MASK, PMIC_RG_VCORE_RSV_SHIFT},
    1186. 

  1186. 	{PMIC_RG_VCORE_PFM_RIP, PMIC_RG_VCORE_PFM_RIP_ADDR, PMIC_RG_VCORE_PFM_RIP_MASK, PMIC_RG_VCORE_PFM_RIP_SHIFT},
    1187. 

  1187. 	{PMIC_RG_VCORE_DTS_ENB, PMIC_RG_VCORE_DTS_ENB_ADDR, PMIC_RG_VCORE_DTS_ENB_MASK, PMIC_RG_VCORE_DTS_ENB_SHIFT},
    1188. 

  1188. 	{PMIC_RG_VCORE_AUTO_MODE, PMIC_RG_VCORE_AUTO_MODE_ADDR, PMIC_RG_VCORE_AUTO_MODE_MASK, PMIC_RG_VCORE_AUTO_MODE_SHIFT},
    1189. 

  1189. 	{PMIC_RG_VCORE_PWM_TRIG, PMIC_RG_VCORE_PWM_TRIG_ADDR, PMIC_RG_VCORE_PWM_TRIG_MASK, PMIC_RG_VCORE_PWM_TRIG_SHIFT},
    1190. 

  1190. 	{PMIC_RG_VCORE_TRAN_BST, PMIC_RG_VCORE_TRAN_BST_ADDR, PMIC_RG_VCORE_TRAN_BST_MASK, PMIC_RG_VCORE_TRAN_BST_SHIFT},
    1191. 

  1191. 	{PMIC_RGS_VCORE_ENPWM_STATUS, PMIC_RGS_VCORE_ENPWM_STATUS_ADDR, PMIC_RGS_VCORE_ENPWM_STATUS_MASK, PMIC_RGS_VCORE_ENPWM_STATUS_SHIFT},
    1192. 

  1192. 	{PMIC_RG_VPROC_MIN_OFF, PMIC_RG_VPROC_MIN_OFF_ADDR, PMIC_RG_VPROC_MIN_OFF_MASK, PMIC_RG_VPROC_MIN_OFF_SHIFT},
    1193. 

  1193. 	{PMIC_RG_VPROC_VRF18_SSTART_EN, PMIC_RG_VPROC_VRF18_SSTART_EN_ADDR, PMIC_RG_VPROC_VRF18_SSTART_EN_MASK, PMIC_RG_VPROC_VRF18_SSTART_EN_SHIFT},
    1194. 

  1194. 	{PMIC_RG_VPROC_1P35UP_SEL_EN, PMIC_RG_VPROC_1P35UP_SEL_EN_ADDR, PMIC_RG_VPROC_1P35UP_SEL_EN_MASK, PMIC_RG_VPROC_1P35UP_SEL_EN_SHIFT},
    1195. 

  1195. 	{PMIC_RG_VPROC_RZSEL, PMIC_RG_VPROC_RZSEL_ADDR, PMIC_RG_VPROC_RZSEL_MASK, PMIC_RG_VPROC_RZSEL_SHIFT},
    1196. 

  1196. 	{PMIC_RG_VPROC_CSR, PMIC_RG_VPROC_CSR_ADDR, PMIC_RG_VPROC_CSR_MASK, PMIC_RG_VPROC_CSR_SHIFT},
    1197. 

  1197. 	{PMIC_RG_VPROC_CSL, PMIC_RG_VPROC_CSL_ADDR, PMIC_RG_VPROC_CSL_MASK, PMIC_RG_VPROC_CSL_SHIFT},
    1198. 

  1198. 	{PMIC_RG_VPROC_SLP, PMIC_RG_VPROC_SLP_ADDR, PMIC_RG_VPROC_SLP_MASK, PMIC_RG_VPROC_SLP_SHIFT},
    1199. 

  1199. 	{PMIC_RG_VPROC_ZX_OS, PMIC_RG_VPROC_ZX_OS_ADDR, PMIC_RG_VPROC_ZX_OS_MASK, PMIC_RG_VPROC_ZX_OS_SHIFT},
    1200. 

  1200. 	{PMIC_RG_VPROC_ZXOS_TRIM, PMIC_RG_VPROC_ZXOS_TRIM_ADDR, PMIC_RG_VPROC_ZXOS_TRIM_MASK, PMIC_RG_VPROC_ZXOS_TRIM_SHIFT},
    1201. 

  1201. 	{PMIC_RG_VPROC_MODESET, PMIC_RG_VPROC_MODESET_ADDR, PMIC_RG_VPROC_MODESET_MASK, PMIC_RG_VPROC_MODESET_SHIFT},
    1202. 

  1202. 	{PMIC_RG_VPROC_NDIS_EN, PMIC_RG_VPROC_NDIS_EN_ADDR, PMIC_RG_VPROC_NDIS_EN_MASK, PMIC_RG_VPROC_NDIS_EN_SHIFT},
    1203. 

  1203. 	{PMIC_RG_VPROC_CSM_N, PMIC_RG_VPROC_CSM_N_ADDR, PMIC_RG_VPROC_CSM_N_MASK, PMIC_RG_VPROC_CSM_N_SHIFT},
    1204. 

  1204. 	{PMIC_RG_VPROC_CSM_P, PMIC_RG_VPROC_CSM_P_ADDR, PMIC_RG_VPROC_CSM_P_MASK, PMIC_RG_VPROC_CSM_P_SHIFT},
    1205. 

  1205. 	{PMIC_RG_VPROC_RSV, PMIC_RG_VPROC_RSV_ADDR, PMIC_RG_VPROC_RSV_MASK, PMIC_RG_VPROC_RSV_SHIFT},
    1206. 

  1206. 	{PMIC_RG_VPROC_PFM_RIP, PMIC_RG_VPROC_PFM_RIP_ADDR, PMIC_RG_VPROC_PFM_RIP_MASK, PMIC_RG_VPROC_PFM_RIP_SHIFT},
    1207. 

  1207. 	{PMIC_RG_VPROC_DTS_ENB, PMIC_RG_VPROC_DTS_ENB_ADDR, PMIC_RG_VPROC_DTS_ENB_MASK, PMIC_RG_VPROC_DTS_ENB_SHIFT},
    1208. 

  1208. 	{PMIC_RG_VPROC_BW_EXTEND, PMIC_RG_VPROC_BW_EXTEND_ADDR, PMIC_RG_VPROC_BW_EXTEND_MASK, PMIC_RG_VPROC_BW_EXTEND_SHIFT},
    1209. 

  1209. 	{PMIC_RG_VPROC_PWM_TRIG, PMIC_RG_VPROC_PWM_TRIG_ADDR, PMIC_RG_VPROC_PWM_TRIG_MASK, PMIC_RG_VPROC_PWM_TRIG_SHIFT},
    1210. 

  1210. 	{PMIC_RG_VPROC_TRAN_BST, PMIC_RG_VPROC_TRAN_BST_ADDR, PMIC_RG_VPROC_TRAN_BST_MASK, PMIC_RG_VPROC_TRAN_BST_SHIFT},
    1211. 

  1211. 	{PMIC_RGS_VPROC_ENPWM_STATUS, PMIC_RGS_VPROC_ENPWM_STATUS_ADDR, PMIC_RGS_VPROC_ENPWM_STATUS_MASK, PMIC_RGS_VPROC_ENPWM_STATUS_SHIFT},
    1212. 

  1212. 	{PMIC_RG_VS1_MIN_OFF, PMIC_RG_VS1_MIN_OFF_ADDR, PMIC_RG_VS1_MIN_OFF_MASK, PMIC_RG_VS1_MIN_OFF_SHIFT},
    1213. 

  1213. 	{PMIC_RG_VS1_NVT_BUFF_OFF_EN, PMIC_RG_VS1_NVT_BUFF_OFF_EN_ADDR, PMIC_RG_VS1_NVT_BUFF_OFF_EN_MASK, PMIC_RG_VS1_NVT_BUFF_OFF_EN_SHIFT},
    1214. 

  1214. 	{PMIC_RG_VS1_VRF18_SSTART_EN, PMIC_RG_VS1_VRF18_SSTART_EN_ADDR, PMIC_RG_VS1_VRF18_SSTART_EN_MASK, PMIC_RG_VS1_VRF18_SSTART_EN_SHIFT},
    1215. 

  1215. 	{PMIC_RG_VS1_1P35UP_SEL_EN, PMIC_RG_VS1_1P35UP_SEL_EN_ADDR, PMIC_RG_VS1_1P35UP_SEL_EN_MASK, PMIC_RG_VS1_1P35UP_SEL_EN_SHIFT},
    1216. 

  1216. 	{PMIC_RG_VS1_RZSEL, PMIC_RG_VS1_RZSEL_ADDR, PMIC_RG_VS1_RZSEL_MASK, PMIC_RG_VS1_RZSEL_SHIFT},
    1217. 

  1217. 	{PMIC_RG_VS1_CSR, PMIC_RG_VS1_CSR_ADDR, PMIC_RG_VS1_CSR_MASK, PMIC_RG_VS1_CSR_SHIFT},
    1218. 

  1218. 	{PMIC_RG_VS1_CSL, PMIC_RG_VS1_CSL_ADDR, PMIC_RG_VS1_CSL_MASK, PMIC_RG_VS1_CSL_SHIFT},
    1219. 

  1219. 	{PMIC_RG_VS1_SLP, PMIC_RG_VS1_SLP_ADDR, PMIC_RG_VS1_SLP_MASK, PMIC_RG_VS1_SLP_SHIFT},
    1220. 

  1220. 	{PMIC_RG_VS1_ZX_OS, PMIC_RG_VS1_ZX_OS_ADDR, PMIC_RG_VS1_ZX_OS_MASK, PMIC_RG_VS1_ZX_OS_SHIFT},
    1221. 

  1221. 	{PMIC_RG_VS1_NDIS_EN, PMIC_RG_VS1_NDIS_EN_ADDR, PMIC_RG_VS1_NDIS_EN_MASK, PMIC_RG_VS1_NDIS_EN_SHIFT},
    1222. 

  1222. 	{PMIC_RG_VS1_CSM_N, PMIC_RG_VS1_CSM_N_ADDR, PMIC_RG_VS1_CSM_N_MASK, PMIC_RG_VS1_CSM_N_SHIFT},
    1223. 

  1223. 	{PMIC_RG_VS1_CSM_P, PMIC_RG_VS1_CSM_P_ADDR, PMIC_RG_VS1_CSM_P_MASK, PMIC_RG_VS1_CSM_P_SHIFT},
    1224. 

  1224. 	{PMIC_RG_VS1_RSV, PMIC_RG_VS1_RSV_ADDR, PMIC_RG_VS1_RSV_MASK, PMIC_RG_VS1_RSV_SHIFT},
    1225. 

  1225. 	{PMIC_RG_VS1_ZXOS_TRIM, PMIC_RG_VS1_ZXOS_TRIM_ADDR, PMIC_RG_VS1_ZXOS_TRIM_MASK, PMIC_RG_VS1_ZXOS_TRIM_SHIFT},
    1226. 

  1226. 	{PMIC_RG_VS1_MODESET, PMIC_RG_VS1_MODESET_ADDR, PMIC_RG_VS1_MODESET_MASK, PMIC_RG_VS1_MODESET_SHIFT},
    1227. 

  1227. 	{PMIC_RG_VS1_PFM_RIP, PMIC_RG_VS1_PFM_RIP_ADDR, PMIC_RG_VS1_PFM_RIP_MASK, PMIC_RG_VS1_PFM_RIP_SHIFT},
    1228. 

  1228. 	{PMIC_RG_VS1_TRAN_BST, PMIC_RG_VS1_TRAN_BST_ADDR, PMIC_RG_VS1_TRAN_BST_MASK, PMIC_RG_VS1_TRAN_BST_SHIFT},
    1229. 

  1229. 	{PMIC_RG_VS1_DTS_ENB, PMIC_RG_VS1_DTS_ENB_ADDR, PMIC_RG_VS1_DTS_ENB_MASK, PMIC_RG_VS1_DTS_ENB_SHIFT},
    1230. 

  1230. 	{PMIC_RG_VS1_AUTO_MODE, PMIC_RG_VS1_AUTO_MODE_ADDR, PMIC_RG_VS1_AUTO_MODE_MASK, PMIC_RG_VS1_AUTO_MODE_SHIFT},
    1231. 

  1231. 	{PMIC_RG_VS1_PWM_TRIG, PMIC_RG_VS1_PWM_TRIG_ADDR, PMIC_RG_VS1_PWM_TRIG_MASK, PMIC_RG_VS1_PWM_TRIG_SHIFT},
    1232. 

  1232. 	{PMIC_RGS_VS1_ENPWM_STATUS, PMIC_RGS_VS1_ENPWM_STATUS_ADDR, PMIC_RGS_VS1_ENPWM_STATUS_MASK, PMIC_RGS_VS1_ENPWM_STATUS_SHIFT},
    1233. 

  1233. 	{PMIC_DA_QI_VCORE_BURST, PMIC_DA_QI_VCORE_BURST_ADDR, PMIC_DA_QI_VCORE_BURST_MASK, PMIC_DA_QI_VCORE_BURST_SHIFT},
    1234. 

  1234. 	{PMIC_DA_QI_VCORE2_BURST, PMIC_DA_QI_VCORE2_BURST_ADDR, PMIC_DA_QI_VCORE2_BURST_MASK, PMIC_DA_QI_VCORE2_BURST_SHIFT},
    1235. 

  1235. 	{PMIC_DA_QI_VS1_BURST, PMIC_DA_QI_VS1_BURST_ADDR, PMIC_DA_QI_VS1_BURST_MASK, PMIC_DA_QI_VS1_BURST_SHIFT},
    1236. 

  1236. 	{PMIC_DA_QI_VPROC_BURST, PMIC_DA_QI_VPROC_BURST_ADDR, PMIC_DA_QI_VPROC_BURST_MASK, PMIC_DA_QI_VPROC_BURST_SHIFT},
    1237. 

  1237. 	{PMIC_DA_QI_VCORE_DLC, PMIC_DA_QI_VCORE_DLC_ADDR, PMIC_DA_QI_VCORE_DLC_MASK, PMIC_DA_QI_VCORE_DLC_SHIFT},
    1238. 

  1238. 	{PMIC_DA_QI_VCORE_DLC_N, PMIC_DA_QI_VCORE_DLC_N_ADDR, PMIC_DA_QI_VCORE_DLC_N_MASK, PMIC_DA_QI_VCORE_DLC_N_SHIFT},
    1239. 

  1239. 	{PMIC_DA_QI_VCORE2_DLC, PMIC_DA_QI_VCORE2_DLC_ADDR, PMIC_DA_QI_VCORE2_DLC_MASK, PMIC_DA_QI_VCORE2_DLC_SHIFT},
    1240. 

  1240. 	{PMIC_DA_QI_VCORE2_DLC_N, PMIC_DA_QI_VCORE2_DLC_N_ADDR, PMIC_DA_QI_VCORE2_DLC_N_MASK, PMIC_DA_QI_VCORE2_DLC_N_SHIFT},
    1241. 

  1241. 	{PMIC_DA_QI_VS1_DLC, PMIC_DA_QI_VS1_DLC_ADDR, PMIC_DA_QI_VS1_DLC_MASK, PMIC_DA_QI_VS1_DLC_SHIFT},
    1242. 

  1242. 	{PMIC_DA_QI_VS1_DLC_N, PMIC_DA_QI_VS1_DLC_N_ADDR, PMIC_DA_QI_VS1_DLC_N_MASK, PMIC_DA_QI_VS1_DLC_N_SHIFT},
    1243. 

  1243. 	{PMIC_DA_QI_VPROC_DLC, PMIC_DA_QI_VPROC_DLC_ADDR, PMIC_DA_QI_VPROC_DLC_MASK, PMIC_DA_QI_VPROC_DLC_SHIFT},
    1244. 

  1244. 	{PMIC_DA_QI_VPROC_DLC_N, PMIC_DA_QI_VPROC_DLC_N_ADDR, PMIC_DA_QI_VPROC_DLC_N_MASK, PMIC_DA_QI_VPROC_DLC_N_SHIFT},
    1245. 

  1245. 	{PMIC_RG_VCORE2_MIN_OFF, PMIC_RG_VCORE2_MIN_OFF_ADDR, PMIC_RG_VCORE2_MIN_OFF_MASK, PMIC_RG_VCORE2_MIN_OFF_SHIFT},
    1246. 

  1246. 	{PMIC_RG_VCORE2_VRF18_SSTART_EN, PMIC_RG_VCORE2_VRF18_SSTART_EN_ADDR, PMIC_RG_VCORE2_VRF18_SSTART_EN_MASK, PMIC_RG_VCORE2_VRF18_SSTART_EN_SHIFT},
    1247. 

  1247. 	{PMIC_RG_VCORE2_1P35UP_SEL_EN, PMIC_RG_VCORE2_1P35UP_SEL_EN_ADDR, PMIC_RG_VCORE2_1P35UP_SEL_EN_MASK, PMIC_RG_VCORE2_1P35UP_SEL_EN_SHIFT},
    1248. 

  1248. 	{PMIC_RG_VCORE2_RZSEL, PMIC_RG_VCORE2_RZSEL_ADDR, PMIC_RG_VCORE2_RZSEL_MASK, PMIC_RG_VCORE2_RZSEL_SHIFT},
    1249. 

  1249. 	{PMIC_RG_VCORE2_CSR, PMIC_RG_VCORE2_CSR_ADDR, PMIC_RG_VCORE2_CSR_MASK, PMIC_RG_VCORE2_CSR_SHIFT},
    1250. 

  1250. 	{PMIC_RG_VCORE2_CSL, PMIC_RG_VCORE2_CSL_ADDR, PMIC_RG_VCORE2_CSL_MASK, PMIC_RG_VCORE2_CSL_SHIFT},
    1251. 

  1251. 	{PMIC_RG_VCORE2_SLP, PMIC_RG_VCORE2_SLP_ADDR, PMIC_RG_VCORE2_SLP_MASK, PMIC_RG_VCORE2_SLP_SHIFT},
    1252. 

  1252. 	{PMIC_RG_VCORE2_ZX_OS, PMIC_RG_VCORE2_ZX_OS_ADDR, PMIC_RG_VCORE2_ZX_OS_MASK, PMIC_RG_VCORE2_ZX_OS_SHIFT},
    1253. 

  1253. 	{PMIC_RG_VCORE2_ZXOS_TRIM, PMIC_RG_VCORE2_ZXOS_TRIM_ADDR, PMIC_RG_VCORE2_ZXOS_TRIM_MASK, PMIC_RG_VCORE2_ZXOS_TRIM_SHIFT},
    1254. 

  1254. 	{PMIC_RG_VCORE2_MODESET, PMIC_RG_VCORE2_MODESET_ADDR, PMIC_RG_VCORE2_MODESET_MASK, PMIC_RG_VCORE2_MODESET_SHIFT},
    1255. 

  1255. 	{PMIC_RG_VCORE2_NDIS_EN, PMIC_RG_VCORE2_NDIS_EN_ADDR, PMIC_RG_VCORE2_NDIS_EN_MASK, PMIC_RG_VCORE2_NDIS_EN_SHIFT},
    1256. 

  1256. 	{PMIC_RG_VCORE2_CSM_N, PMIC_RG_VCORE2_CSM_N_ADDR, PMIC_RG_VCORE2_CSM_N_MASK, PMIC_RG_VCORE2_CSM_N_SHIFT},
    1257. 

  1257. 	{PMIC_RG_VCORE2_CSM_P, PMIC_RG_VCORE2_CSM_P_ADDR, PMIC_RG_VCORE2_CSM_P_MASK, PMIC_RG_VCORE2_CSM_P_SHIFT},
    1258. 

  1258. 	{PMIC_RG_VCORE2_RSV, PMIC_RG_VCORE2_RSV_ADDR, PMIC_RG_VCORE2_RSV_MASK, PMIC_RG_VCORE2_RSV_SHIFT},
    1259. 

  1259. 	{PMIC_RG_VCORE2_PFM_RIP, PMIC_RG_VCORE2_PFM_RIP_ADDR, PMIC_RG_VCORE2_PFM_RIP_MASK, PMIC_RG_VCORE2_PFM_RIP_SHIFT},
    1260. 

  1260. 	{PMIC_RG_VCORE2_DTS_ENB, PMIC_RG_VCORE2_DTS_ENB_ADDR, PMIC_RG_VCORE2_DTS_ENB_MASK, PMIC_RG_VCORE2_DTS_ENB_SHIFT},
    1261. 

  1261. 	{PMIC_RG_VCORE2_AUTO_MODE, PMIC_RG_VCORE2_AUTO_MODE_ADDR, PMIC_RG_VCORE2_AUTO_MODE_MASK, PMIC_RG_VCORE2_AUTO_MODE_SHIFT},
    1262. 

  1262. 	{PMIC_RG_VCORE2_PWM_TRIG, PMIC_RG_VCORE2_PWM_TRIG_ADDR, PMIC_RG_VCORE2_PWM_TRIG_MASK, PMIC_RG_VCORE2_PWM_TRIG_SHIFT},
    1263. 

  1263. 	{PMIC_RG_VCORE2_TRAN_BST, PMIC_RG_VCORE2_TRAN_BST_ADDR, PMIC_RG_VCORE2_TRAN_BST_MASK, PMIC_RG_VCORE2_TRAN_BST_SHIFT},
    1264. 

  1264. 	{PMIC_RGS_VCORE2_ENPWM_STATUS, PMIC_RGS_VCORE2_ENPWM_STATUS_ADDR, PMIC_RGS_VCORE2_ENPWM_STATUS_MASK, PMIC_RGS_VCORE2_ENPWM_STATUS_SHIFT},
    1265. 

  1265. 	{PMIC_BUCK_VPROC_EN_CTRL, PMIC_BUCK_VPROC_EN_CTRL_ADDR, PMIC_BUCK_VPROC_EN_CTRL_MASK, PMIC_BUCK_VPROC_EN_CTRL_SHIFT},
    1266. 

  1266. 	{PMIC_BUCK_VPROC_VOSEL_CTRL, PMIC_BUCK_VPROC_VOSEL_CTRL_ADDR, PMIC_BUCK_VPROC_VOSEL_CTRL_MASK, PMIC_BUCK_VPROC_VOSEL_CTRL_SHIFT},
    1267. 

  1267. 	{PMIC_BUCK_VPROC_EN_SEL, PMIC_BUCK_VPROC_EN_SEL_ADDR, PMIC_BUCK_VPROC_EN_SEL_MASK, PMIC_BUCK_VPROC_EN_SEL_SHIFT},
    1268. 

  1268. 	{PMIC_BUCK_VPROC_VOSEL_SEL, PMIC_BUCK_VPROC_VOSEL_SEL_ADDR, PMIC_BUCK_VPROC_VOSEL_SEL_MASK, PMIC_BUCK_VPROC_VOSEL_SEL_SHIFT},
    1269. 

  1269. 	{PMIC_BUCK_VPROC_EN, PMIC_BUCK_VPROC_EN_ADDR, PMIC_BUCK_VPROC_EN_MASK, PMIC_BUCK_VPROC_EN_SHIFT},
    1270. 

  1270. 	{PMIC_BUCK_VPROC_STBTD, PMIC_BUCK_VPROC_STBTD_ADDR, PMIC_BUCK_VPROC_STBTD_MASK, PMIC_BUCK_VPROC_STBTD_SHIFT},
    1271. 

  1271. 	{PMIC_DA_VPROC_STB, PMIC_DA_VPROC_STB_ADDR, PMIC_DA_VPROC_STB_MASK, PMIC_DA_VPROC_STB_SHIFT},
    1272. 

  1272. 	{PMIC_DA_QI_VPROC_EN, PMIC_DA_QI_VPROC_EN_ADDR, PMIC_DA_QI_VPROC_EN_MASK, PMIC_DA_QI_VPROC_EN_SHIFT},
    1273. 

  1273. 	{PMIC_BUCK_VPROC_SFCHG_FRATE, PMIC_BUCK_VPROC_SFCHG_FRATE_ADDR, PMIC_BUCK_VPROC_SFCHG_FRATE_MASK, PMIC_BUCK_VPROC_SFCHG_FRATE_SHIFT},
    1274. 

  1274. 	{PMIC_BUCK_VPROC_SFCHG_FEN, PMIC_BUCK_VPROC_SFCHG_FEN_ADDR, PMIC_BUCK_VPROC_SFCHG_FEN_MASK, PMIC_BUCK_VPROC_SFCHG_FEN_SHIFT},
    1275. 

  1275. 	{PMIC_BUCK_VPROC_SFCHG_RRATE, PMIC_BUCK_VPROC_SFCHG_RRATE_ADDR, PMIC_BUCK_VPROC_SFCHG_RRATE_MASK, PMIC_BUCK_VPROC_SFCHG_RRATE_SHIFT},
    1276. 

  1276. 	{PMIC_BUCK_VPROC_SFCHG_REN, PMIC_BUCK_VPROC_SFCHG_REN_ADDR, PMIC_BUCK_VPROC_SFCHG_REN_MASK, PMIC_BUCK_VPROC_SFCHG_REN_SHIFT},
    1277. 

  1277. 	{PMIC_DA_NI_VPROC_VOSEL, PMIC_DA_NI_VPROC_VOSEL_ADDR, PMIC_DA_NI_VPROC_VOSEL_MASK, PMIC_DA_NI_VPROC_VOSEL_SHIFT},
    1278. 

  1278. 	{PMIC_BUCK_VPROC_VOSEL, PMIC_BUCK_VPROC_VOSEL_ADDR, PMIC_BUCK_VPROC_VOSEL_MASK, PMIC_BUCK_VPROC_VOSEL_SHIFT},
    1279. 

  1279. 	{PMIC_BUCK_VPROC_VOSEL_ON, PMIC_BUCK_VPROC_VOSEL_ON_ADDR, PMIC_BUCK_VPROC_VOSEL_ON_MASK, PMIC_BUCK_VPROC_VOSEL_ON_SHIFT},
    1280. 

  1280. 	{PMIC_BUCK_VPROC_VOSEL_SLEEP, PMIC_BUCK_VPROC_VOSEL_SLEEP_ADDR, PMIC_BUCK_VPROC_VOSEL_SLEEP_MASK, PMIC_BUCK_VPROC_VOSEL_SLEEP_SHIFT},
    1281. 

  1281. 	{PMIC_BUCK_VPROC_TRANS_TD, PMIC_BUCK_VPROC_TRANS_TD_ADDR, PMIC_BUCK_VPROC_TRANS_TD_MASK, PMIC_BUCK_VPROC_TRANS_TD_SHIFT},
    1282. 

  1282. 	{PMIC_BUCK_VPROC_TRANS_CTRL, PMIC_BUCK_VPROC_TRANS_CTRL_ADDR, PMIC_BUCK_VPROC_TRANS_CTRL_MASK, PMIC_BUCK_VPROC_TRANS_CTRL_SHIFT},
    1283. 

  1283. 	{PMIC_BUCK_VPROC_TRANS_ONCE, PMIC_BUCK_VPROC_TRANS_ONCE_ADDR, PMIC_BUCK_VPROC_TRANS_ONCE_MASK, PMIC_BUCK_VPROC_TRANS_ONCE_SHIFT},
    1284. 

  1284. 	{PMIC_DA_QI_VPROC_DVS_EN, PMIC_DA_QI_VPROC_DVS_EN_ADDR, PMIC_DA_QI_VPROC_DVS_EN_MASK, PMIC_DA_QI_VPROC_DVS_EN_SHIFT},
    1285. 

  1285. 	{PMIC_BUCK_VPROC_VSLEEP_EN, PMIC_BUCK_VPROC_VSLEEP_EN_ADDR, PMIC_BUCK_VPROC_VSLEEP_EN_MASK, PMIC_BUCK_VPROC_VSLEEP_EN_SHIFT},
    1286. 

  1286. 	{PMIC_BUCK_VPROC_R2R_PDN, PMIC_BUCK_VPROC_R2R_PDN_ADDR, PMIC_BUCK_VPROC_R2R_PDN_MASK, PMIC_BUCK_VPROC_R2R_PDN_SHIFT},
    1287. 

  1287. 	{PMIC_BUCK_VPROC_VSLEEP_SEL, PMIC_BUCK_VPROC_VSLEEP_SEL_ADDR, PMIC_BUCK_VPROC_VSLEEP_SEL_MASK, PMIC_BUCK_VPROC_VSLEEP_SEL_SHIFT},
    1288. 

  1288. 	{PMIC_DA_NI_VPROC_R2R_PDN, PMIC_DA_NI_VPROC_R2R_PDN_ADDR, PMIC_DA_NI_VPROC_R2R_PDN_MASK, PMIC_DA_NI_VPROC_R2R_PDN_SHIFT},
    1289. 

  1289. 	{PMIC_DA_NI_VPROC_VSLEEP_SEL, PMIC_DA_NI_VPROC_VSLEEP_SEL_ADDR, PMIC_DA_NI_VPROC_VSLEEP_SEL_MASK, PMIC_DA_NI_VPROC_VSLEEP_SEL_SHIFT},
    1290. 

  1290. 	{PMIC_BUCK_VS1_EN_CTRL, PMIC_BUCK_VS1_EN_CTRL_ADDR, PMIC_BUCK_VS1_EN_CTRL_MASK, PMIC_BUCK_VS1_EN_CTRL_SHIFT},
    1291. 

  1291. 	{PMIC_BUCK_VS1_VOSEL_CTRL, PMIC_BUCK_VS1_VOSEL_CTRL_ADDR, PMIC_BUCK_VS1_VOSEL_CTRL_MASK, PMIC_BUCK_VS1_VOSEL_CTRL_SHIFT},
    1292. 

  1292. 	{PMIC_BUCK_VS1_VOSEL_CTRL_0, PMIC_BUCK_VS1_VOSEL_CTRL_0_ADDR, PMIC_BUCK_VS1_VOSEL_CTRL_0_MASK, PMIC_BUCK_VS1_VOSEL_CTRL_0_SHIFT},
    1293. 

  1293. 	{PMIC_BUCK_VS1_VOSEL_CTRL_1, PMIC_BUCK_VS1_VOSEL_CTRL_1_ADDR, PMIC_BUCK_VS1_VOSEL_CTRL_1_MASK, PMIC_BUCK_VS1_VOSEL_CTRL_1_SHIFT},
    1294. 

  1294. 	{PMIC_BUCK_VS1_VOSEL_CTRL_2, PMIC_BUCK_VS1_VOSEL_CTRL_2_ADDR, PMIC_BUCK_VS1_VOSEL_CTRL_2_MASK, PMIC_BUCK_VS1_VOSEL_CTRL_2_SHIFT},
    1295. 

  1295. 	{PMIC_BUCK_VS1_MODESET_0, PMIC_BUCK_VS1_MODESET_0_ADDR, PMIC_BUCK_VS1_MODESET_0_MASK, PMIC_BUCK_VS1_MODESET_0_SHIFT},
    1296. 

  1296. 	{PMIC_BUCK_VS1_MODESET_1, PMIC_BUCK_VS1_MODESET_1_ADDR, PMIC_BUCK_VS1_MODESET_1_MASK, PMIC_BUCK_VS1_MODESET_1_SHIFT},
    1297. 

  1297. 	{PMIC_BUCK_VS1_MODESET_2, PMIC_BUCK_VS1_MODESET_2_ADDR, PMIC_BUCK_VS1_MODESET_2_MASK, PMIC_BUCK_VS1_MODESET_2_SHIFT},
    1298. 

  1298. 	{PMIC_DA_VS1_MODESET, PMIC_DA_VS1_MODESET_ADDR, PMIC_DA_VS1_MODESET_MASK, PMIC_DA_VS1_MODESET_SHIFT},
    1299. 

  1299. 	{PMIC_BUCK_VS1_VOSEL_CTRL_INV, PMIC_BUCK_VS1_VOSEL_CTRL_INV_ADDR, PMIC_BUCK_VS1_VOSEL_CTRL_INV_MASK, PMIC_BUCK_VS1_VOSEL_CTRL_INV_SHIFT},
    1300. 

  1300. 	{PMIC_BUCK_VS1_HWM_CON0_SET, PMIC_BUCK_VS1_HWM_CON0_SET_ADDR, PMIC_BUCK_VS1_HWM_CON0_SET_MASK, PMIC_BUCK_VS1_HWM_CON0_SET_SHIFT},
    1301. 

  1301. 	{PMIC_BUCK_VS1_HWM_CON0_CLR, PMIC_BUCK_VS1_HWM_CON0_CLR_ADDR, PMIC_BUCK_VS1_HWM_CON0_CLR_MASK, PMIC_BUCK_VS1_HWM_CON0_CLR_SHIFT},
    1302. 

  1302. 	{PMIC_BUCK_VS1_EN_SEL, PMIC_BUCK_VS1_EN_SEL_ADDR, PMIC_BUCK_VS1_EN_SEL_MASK, PMIC_BUCK_VS1_EN_SEL_SHIFT},
    1303. 

  1303. 	{PMIC_BUCK_VS1_VOSEL_SEL, PMIC_BUCK_VS1_VOSEL_SEL_ADDR, PMIC_BUCK_VS1_VOSEL_SEL_MASK, PMIC_BUCK_VS1_VOSEL_SEL_SHIFT},
    1304. 

  1304. 	{PMIC_BUCK_VS1_EN, PMIC_BUCK_VS1_EN_ADDR, PMIC_BUCK_VS1_EN_MASK, PMIC_BUCK_VS1_EN_SHIFT},
    1305. 

  1305. 	{PMIC_BUCK_VS1_STBTD, PMIC_BUCK_VS1_STBTD_ADDR, PMIC_BUCK_VS1_STBTD_MASK, PMIC_BUCK_VS1_STBTD_SHIFT},
    1306. 

  1306. 	{PMIC_DA_VS1_STB, PMIC_DA_VS1_STB_ADDR, PMIC_DA_VS1_STB_MASK, PMIC_DA_VS1_STB_SHIFT},
    1307. 

  1307. 	{PMIC_DA_QI_VS1_EN, PMIC_DA_QI_VS1_EN_ADDR, PMIC_DA_QI_VS1_EN_MASK, PMIC_DA_QI_VS1_EN_SHIFT},
    1308. 

  1308. 	{PMIC_BUCK_VS1_SFCHG_FRATE, PMIC_BUCK_VS1_SFCHG_FRATE_ADDR, PMIC_BUCK_VS1_SFCHG_FRATE_MASK, PMIC_BUCK_VS1_SFCHG_FRATE_SHIFT},
    1309. 

  1309. 	{PMIC_BUCK_VS1_SFCHG_FEN, PMIC_BUCK_VS1_SFCHG_FEN_ADDR, PMIC_BUCK_VS1_SFCHG_FEN_MASK, PMIC_BUCK_VS1_SFCHG_FEN_SHIFT},
    1310. 

  1310. 	{PMIC_BUCK_VS1_SFCHG_RRATE, PMIC_BUCK_VS1_SFCHG_RRATE_ADDR, PMIC_BUCK_VS1_SFCHG_RRATE_MASK, PMIC_BUCK_VS1_SFCHG_RRATE_SHIFT},
    1311. 

  1311. 	{PMIC_BUCK_VS1_SFCHG_REN, PMIC_BUCK_VS1_SFCHG_REN_ADDR, PMIC_BUCK_VS1_SFCHG_REN_MASK, PMIC_BUCK_VS1_SFCHG_REN_SHIFT},
    1312. 

  1312. 	{PMIC_DA_NI_VS1_VOSEL, PMIC_DA_NI_VS1_VOSEL_ADDR, PMIC_DA_NI_VS1_VOSEL_MASK, PMIC_DA_NI_VS1_VOSEL_SHIFT},
    1313. 

  1313. 	{PMIC_BUCK_VS1_VOSEL, PMIC_BUCK_VS1_VOSEL_ADDR, PMIC_BUCK_VS1_VOSEL_MASK, PMIC_BUCK_VS1_VOSEL_SHIFT},
    1314. 

  1314. 	{PMIC_BUCK_VS1_VOSEL_ON, PMIC_BUCK_VS1_VOSEL_ON_ADDR, PMIC_BUCK_VS1_VOSEL_ON_MASK, PMIC_BUCK_VS1_VOSEL_ON_SHIFT},
    1315. 

  1315. 	{PMIC_BUCK_VS1_VOSEL_SLEEP, PMIC_BUCK_VS1_VOSEL_SLEEP_ADDR, PMIC_BUCK_VS1_VOSEL_SLEEP_MASK, PMIC_BUCK_VS1_VOSEL_SLEEP_SHIFT},
    1316. 

  1316. 	{PMIC_BUCK_VS1_TRANS_TD, PMIC_BUCK_VS1_TRANS_TD_ADDR, PMIC_BUCK_VS1_TRANS_TD_MASK, PMIC_BUCK_VS1_TRANS_TD_SHIFT},
    1317. 

  1317. 	{PMIC_BUCK_VS1_TRANS_CTRL, PMIC_BUCK_VS1_TRANS_CTRL_ADDR, PMIC_BUCK_VS1_TRANS_CTRL_MASK, PMIC_BUCK_VS1_TRANS_CTRL_SHIFT},
    1318. 

  1318. 	{PMIC_BUCK_VS1_TRANS_ONCE, PMIC_BUCK_VS1_TRANS_ONCE_ADDR, PMIC_BUCK_VS1_TRANS_ONCE_MASK, PMIC_BUCK_VS1_TRANS_ONCE_SHIFT},
    1319. 

  1319. 	{PMIC_DA_QI_VS1_DVS_EN, PMIC_DA_QI_VS1_DVS_EN_ADDR, PMIC_DA_QI_VS1_DVS_EN_MASK, PMIC_DA_QI_VS1_DVS_EN_SHIFT},
    1320. 

  1320. 	{PMIC_BUCK_VS1_VSLEEP_EN, PMIC_BUCK_VS1_VSLEEP_EN_ADDR, PMIC_BUCK_VS1_VSLEEP_EN_MASK, PMIC_BUCK_VS1_VSLEEP_EN_SHIFT},
    1321. 

  1321. 	{PMIC_BUCK_VS1_R2R_PDN, PMIC_BUCK_VS1_R2R_PDN_ADDR, PMIC_BUCK_VS1_R2R_PDN_MASK, PMIC_BUCK_VS1_R2R_PDN_SHIFT},
    1322. 

  1322. 	{PMIC_BUCK_VS1_VSLEEP_SEL, PMIC_BUCK_VS1_VSLEEP_SEL_ADDR, PMIC_BUCK_VS1_VSLEEP_SEL_MASK, PMIC_BUCK_VS1_VSLEEP_SEL_SHIFT},
    1323. 

  1323. 	{PMIC_DA_NI_VS1_R2R_PDN, PMIC_DA_NI_VS1_R2R_PDN_ADDR, PMIC_DA_NI_VS1_R2R_PDN_MASK, PMIC_DA_NI_VS1_R2R_PDN_SHIFT},
    1324. 

  1324. 	{PMIC_DA_NI_VS1_VSLEEP_SEL, PMIC_DA_NI_VS1_VSLEEP_SEL_ADDR, PMIC_DA_NI_VS1_VSLEEP_SEL_MASK, PMIC_DA_NI_VS1_VSLEEP_SEL_SHIFT},
    1325. 

  1325. 	{PMIC_BUCK_VCORE_EN_CTRL, PMIC_BUCK_VCORE_EN_CTRL_ADDR, PMIC_BUCK_VCORE_EN_CTRL_MASK, PMIC_BUCK_VCORE_EN_CTRL_SHIFT},
    1326. 

  1326. 	{PMIC_BUCK_VCORE_VOSEL_CTRL, PMIC_BUCK_VCORE_VOSEL_CTRL_ADDR, PMIC_BUCK_VCORE_VOSEL_CTRL_MASK, PMIC_BUCK_VCORE_VOSEL_CTRL_SHIFT},
    1327. 

  1327. 	{PMIC_BUCK_VCORE_EN_SEL, PMIC_BUCK_VCORE_EN_SEL_ADDR, PMIC_BUCK_VCORE_EN_SEL_MASK, PMIC_BUCK_VCORE_EN_SEL_SHIFT},
    1328. 

  1328. 	{PMIC_BUCK_VCORE_VOSEL_SEL, PMIC_BUCK_VCORE_VOSEL_SEL_ADDR, PMIC_BUCK_VCORE_VOSEL_SEL_MASK, PMIC_BUCK_VCORE_VOSEL_SEL_SHIFT},
    1329. 

  1329. 	{PMIC_BUCK_VCORE_EN, PMIC_BUCK_VCORE_EN_ADDR, PMIC_BUCK_VCORE_EN_MASK, PMIC_BUCK_VCORE_EN_SHIFT},
    1330. 

  1330. 	{PMIC_BUCK_VCORE_STBTD, PMIC_BUCK_VCORE_STBTD_ADDR, PMIC_BUCK_VCORE_STBTD_MASK, PMIC_BUCK_VCORE_STBTD_SHIFT},
    1331. 

  1331. 	{PMIC_DA_VCORE_STB, PMIC_DA_VCORE_STB_ADDR, PMIC_DA_VCORE_STB_MASK, PMIC_DA_VCORE_STB_SHIFT},
    1332. 

  1332. 	{PMIC_DA_QI_VCORE_EN, PMIC_DA_QI_VCORE_EN_ADDR, PMIC_DA_QI_VCORE_EN_MASK, PMIC_DA_QI_VCORE_EN_SHIFT},
    1333. 

  1333. 	{PMIC_BUCK_VCORE_SFCHG_FRATE, PMIC_BUCK_VCORE_SFCHG_FRATE_ADDR, PMIC_BUCK_VCORE_SFCHG_FRATE_MASK, PMIC_BUCK_VCORE_SFCHG_FRATE_SHIFT},
    1334. 

  1334. 	{PMIC_BUCK_VCORE_SFCHG_FEN, PMIC_BUCK_VCORE_SFCHG_FEN_ADDR, PMIC_BUCK_VCORE_SFCHG_FEN_MASK, PMIC_BUCK_VCORE_SFCHG_FEN_SHIFT},
    1335. 

  1335. 	{PMIC_BUCK_VCORE_SFCHG_RRATE, PMIC_BUCK_VCORE_SFCHG_RRATE_ADDR, PMIC_BUCK_VCORE_SFCHG_RRATE_MASK, PMIC_BUCK_VCORE_SFCHG_RRATE_SHIFT},
    1336. 

  1336. 	{PMIC_BUCK_VCORE_SFCHG_REN, PMIC_BUCK_VCORE_SFCHG_REN_ADDR, PMIC_BUCK_VCORE_SFCHG_REN_MASK, PMIC_BUCK_VCORE_SFCHG_REN_SHIFT},
    1337. 

  1337. 	{PMIC_DA_NI_VCORE_VOSEL, PMIC_DA_NI_VCORE_VOSEL_ADDR, PMIC_DA_NI_VCORE_VOSEL_MASK, PMIC_DA_NI_VCORE_VOSEL_SHIFT},
    1338. 

  1338. 	{PMIC_BUCK_VCORE_VOSEL, PMIC_BUCK_VCORE_VOSEL_ADDR, PMIC_BUCK_VCORE_VOSEL_MASK, PMIC_BUCK_VCORE_VOSEL_SHIFT},
    1339. 

  1339. 	{PMIC_BUCK_VCORE_VOSEL_ON, PMIC_BUCK_VCORE_VOSEL_ON_ADDR, PMIC_BUCK_VCORE_VOSEL_ON_MASK, PMIC_BUCK_VCORE_VOSEL_ON_SHIFT},
    1340. 

  1340. 	{PMIC_BUCK_VCORE_VOSEL_SLEEP, PMIC_BUCK_VCORE_VOSEL_SLEEP_ADDR, PMIC_BUCK_VCORE_VOSEL_SLEEP_MASK, PMIC_BUCK_VCORE_VOSEL_SLEEP_SHIFT},
    1341. 

  1341. 	{PMIC_BUCK_VCORE_TRANS_TD, PMIC_BUCK_VCORE_TRANS_TD_ADDR, PMIC_BUCK_VCORE_TRANS_TD_MASK, PMIC_BUCK_VCORE_TRANS_TD_SHIFT},
    1342. 

  1342. 	{PMIC_BUCK_VCORE_TRANS_CTRL, PMIC_BUCK_VCORE_TRANS_CTRL_ADDR, PMIC_BUCK_VCORE_TRANS_CTRL_MASK, PMIC_BUCK_VCORE_TRANS_CTRL_SHIFT},
    1343. 

  1343. 	{PMIC_BUCK_VCORE_TRANS_ONCE, PMIC_BUCK_VCORE_TRANS_ONCE_ADDR, PMIC_BUCK_VCORE_TRANS_ONCE_MASK, PMIC_BUCK_VCORE_TRANS_ONCE_SHIFT},
    1344. 

  1344. 	{PMIC_DA_QI_VCORE_DVS_EN, PMIC_DA_QI_VCORE_DVS_EN_ADDR, PMIC_DA_QI_VCORE_DVS_EN_MASK, PMIC_DA_QI_VCORE_DVS_EN_SHIFT},
    1345. 

  1345. 	{PMIC_BUCK_VCORE_VSLEEP_EN, PMIC_BUCK_VCORE_VSLEEP_EN_ADDR, PMIC_BUCK_VCORE_VSLEEP_EN_MASK, PMIC_BUCK_VCORE_VSLEEP_EN_SHIFT},
    1346. 

  1346. 	{PMIC_BUCK_VCORE_R2R_PDN, PMIC_BUCK_VCORE_R2R_PDN_ADDR, PMIC_BUCK_VCORE_R2R_PDN_MASK, PMIC_BUCK_VCORE_R2R_PDN_SHIFT},
    1347. 

  1347. 	{PMIC_BUCK_VCORE_VSLEEP_SEL, PMIC_BUCK_VCORE_VSLEEP_SEL_ADDR, PMIC_BUCK_VCORE_VSLEEP_SEL_MASK, PMIC_BUCK_VCORE_VSLEEP_SEL_SHIFT},
    1348. 

  1348. 	{PMIC_DA_NI_VCORE_R2R_PDN, PMIC_DA_NI_VCORE_R2R_PDN_ADDR, PMIC_DA_NI_VCORE_R2R_PDN_MASK, PMIC_DA_NI_VCORE_R2R_PDN_SHIFT},
    1349. 

  1349. 	{PMIC_DA_NI_VCORE_VSLEEP_SEL, PMIC_DA_NI_VCORE_VSLEEP_SEL_ADDR, PMIC_DA_NI_VCORE_VSLEEP_SEL_MASK, PMIC_DA_NI_VCORE_VSLEEP_SEL_SHIFT},
    1350. 

  1350. 	{PMIC_BUCK_VCORE2_EN_CTRL, PMIC_BUCK_VCORE2_EN_CTRL_ADDR, PMIC_BUCK_VCORE2_EN_CTRL_MASK, PMIC_BUCK_VCORE2_EN_CTRL_SHIFT},
    1351. 

  1351. 	{PMIC_BUCK_VCORE2_VOSEL_CTRL, PMIC_BUCK_VCORE2_VOSEL_CTRL_ADDR, PMIC_BUCK_VCORE2_VOSEL_CTRL_MASK, PMIC_BUCK_VCORE2_VOSEL_CTRL_SHIFT},
    1352. 

  1352. 	{PMIC_BUCK_VCORE2_EN_SEL, PMIC_BUCK_VCORE2_EN_SEL_ADDR, PMIC_BUCK_VCORE2_EN_SEL_MASK, PMIC_BUCK_VCORE2_EN_SEL_SHIFT},
    1353. 

  1353. 	{PMIC_BUCK_VCORE2_VOSEL_SEL, PMIC_BUCK_VCORE2_VOSEL_SEL_ADDR, PMIC_BUCK_VCORE2_VOSEL_SEL_MASK, PMIC_BUCK_VCORE2_VOSEL_SEL_SHIFT},
    1354. 

  1354. 	{PMIC_BUCK_VCORE2_EN, PMIC_BUCK_VCORE2_EN_ADDR, PMIC_BUCK_VCORE2_EN_MASK, PMIC_BUCK_VCORE2_EN_SHIFT},
    1355. 

  1355. 	{PMIC_BUCK_VCORE2_STBTD, PMIC_BUCK_VCORE2_STBTD_ADDR, PMIC_BUCK_VCORE2_STBTD_MASK, PMIC_BUCK_VCORE2_STBTD_SHIFT},
    1356. 

  1356. 	{PMIC_DA_VCORE2_STB, PMIC_DA_VCORE2_STB_ADDR, PMIC_DA_VCORE2_STB_MASK, PMIC_DA_VCORE2_STB_SHIFT},
    1357. 

  1357. 	{PMIC_DA_QI_VCORE2_EN, PMIC_DA_QI_VCORE2_EN_ADDR, PMIC_DA_QI_VCORE2_EN_MASK, PMIC_DA_QI_VCORE2_EN_SHIFT},
    1358. 

  1358. 	{PMIC_BUCK_VCORE2_SFCHG_FRATE, PMIC_BUCK_VCORE2_SFCHG_FRATE_ADDR, PMIC_BUCK_VCORE2_SFCHG_FRATE_MASK, PMIC_BUCK_VCORE2_SFCHG_FRATE_SHIFT},
    1359. 

  1359. 	{PMIC_BUCK_VCORE2_SFCHG_FEN, PMIC_BUCK_VCORE2_SFCHG_FEN_ADDR, PMIC_BUCK_VCORE2_SFCHG_FEN_MASK, PMIC_BUCK_VCORE2_SFCHG_FEN_SHIFT},
    1360. 

  1360. 	{PMIC_BUCK_VCORE2_SFCHG_RRATE, PMIC_BUCK_VCORE2_SFCHG_RRATE_ADDR, PMIC_BUCK_VCORE2_SFCHG_RRATE_MASK, PMIC_BUCK_VCORE2_SFCHG_RRATE_SHIFT},
    1361. 

  1361. 	{PMIC_BUCK_VCORE2_SFCHG_REN, PMIC_BUCK_VCORE2_SFCHG_REN_ADDR, PMIC_BUCK_VCORE2_SFCHG_REN_MASK, PMIC_BUCK_VCORE2_SFCHG_REN_SHIFT},
    1362. 

  1362. 	{PMIC_DA_NI_VCORE2_VOSEL, PMIC_DA_NI_VCORE2_VOSEL_ADDR, PMIC_DA_NI_VCORE2_VOSEL_MASK, PMIC_DA_NI_VCORE2_VOSEL_SHIFT},
    1363. 

  1363. 	{PMIC_BUCK_VCORE2_VOSEL, PMIC_BUCK_VCORE2_VOSEL_ADDR, PMIC_BUCK_VCORE2_VOSEL_MASK, PMIC_BUCK_VCORE2_VOSEL_SHIFT},
    1364. 

  1364. 	{PMIC_BUCK_VCORE2_VOSEL_ON, PMIC_BUCK_VCORE2_VOSEL_ON_ADDR, PMIC_BUCK_VCORE2_VOSEL_ON_MASK, PMIC_BUCK_VCORE2_VOSEL_ON_SHIFT},
    1365. 

  1365. 	{PMIC_BUCK_VCORE2_VOSEL_SLEEP, PMIC_BUCK_VCORE2_VOSEL_SLEEP_ADDR, PMIC_BUCK_VCORE2_VOSEL_SLEEP_MASK, PMIC_BUCK_VCORE2_VOSEL_SLEEP_SHIFT},
    1366. 

  1366. 	{PMIC_BUCK_VCORE2_TRANS_TD, PMIC_BUCK_VCORE2_TRANS_TD_ADDR, PMIC_BUCK_VCORE2_TRANS_TD_MASK, PMIC_BUCK_VCORE2_TRANS_TD_SHIFT},
    1367. 

  1367. 	{PMIC_BUCK_VCORE2_TRANS_CTRL, PMIC_BUCK_VCORE2_TRANS_CTRL_ADDR, PMIC_BUCK_VCORE2_TRANS_CTRL_MASK, PMIC_BUCK_VCORE2_TRANS_CTRL_SHIFT},
    1368. 

  1368. 	{PMIC_BUCK_VCORE2_TRANS_ONCE, PMIC_BUCK_VCORE2_TRANS_ONCE_ADDR, PMIC_BUCK_VCORE2_TRANS_ONCE_MASK, PMIC_BUCK_VCORE2_TRANS_ONCE_SHIFT},
    1369. 

  1369. 	{PMIC_DA_QI_VCORE2_DVS_EN, PMIC_DA_QI_VCORE2_DVS_EN_ADDR, PMIC_DA_QI_VCORE2_DVS_EN_MASK, PMIC_DA_QI_VCORE2_DVS_EN_SHIFT},
    1370. 

  1370. 	{PMIC_BUCK_VCORE2_VSLEEP_EN, PMIC_BUCK_VCORE2_VSLEEP_EN_ADDR, PMIC_BUCK_VCORE2_VSLEEP_EN_MASK, PMIC_BUCK_VCORE2_VSLEEP_EN_SHIFT},
    1371. 

  1371. 	{PMIC_BUCK_VCORE2_R2R_PDN, PMIC_BUCK_VCORE2_R2R_PDN_ADDR, PMIC_BUCK_VCORE2_R2R_PDN_MASK, PMIC_BUCK_VCORE2_R2R_PDN_SHIFT},
    1372. 

  1372. 	{PMIC_BUCK_VCORE2_VSLEEP_SEL, PMIC_BUCK_VCORE2_VSLEEP_SEL_ADDR, PMIC_BUCK_VCORE2_VSLEEP_SEL_MASK, PMIC_BUCK_VCORE2_VSLEEP_SEL_SHIFT},
    1373. 

  1373. 	{PMIC_DA_NI_VCORE2_R2R_PDN, PMIC_DA_NI_VCORE2_R2R_PDN_ADDR, PMIC_DA_NI_VCORE2_R2R_PDN_MASK, PMIC_DA_NI_VCORE2_R2R_PDN_SHIFT},
    1374. 

  1374. 	{PMIC_DA_NI_VCORE2_VSLEEP_SEL, PMIC_DA_NI_VCORE2_VSLEEP_SEL_ADDR, PMIC_DA_NI_VCORE2_VSLEEP_SEL_MASK, PMIC_DA_NI_VCORE2_VSLEEP_SEL_SHIFT},
    1375. 

  1375. 	{PMIC_BUCK_VPA_EN, PMIC_BUCK_VPA_EN_ADDR, PMIC_BUCK_VPA_EN_MASK, PMIC_BUCK_VPA_EN_SHIFT},
    1376. 

  1376. 	{PMIC_BUCK_VPA_STBTD, PMIC_BUCK_VPA_STBTD_ADDR, PMIC_BUCK_VPA_STBTD_MASK, PMIC_BUCK_VPA_STBTD_SHIFT},
    1377. 

  1377. 	{PMIC_DA_VPA_STB, PMIC_DA_VPA_STB_ADDR, PMIC_DA_VPA_STB_MASK, PMIC_DA_VPA_STB_SHIFT},
    1378. 

  1378. 	{PMIC_DA_QI_VPA_EN, PMIC_DA_QI_VPA_EN_ADDR, PMIC_DA_QI_VPA_EN_MASK, PMIC_DA_QI_VPA_EN_SHIFT},
    1379. 

  1379. 	{PMIC_BUCK_VPA_SFCHG_FRATE, PMIC_BUCK_VPA_SFCHG_FRATE_ADDR, PMIC_BUCK_VPA_SFCHG_FRATE_MASK, PMIC_BUCK_VPA_SFCHG_FRATE_SHIFT},
    1380. 

  1380. 	{PMIC_BUCK_VPA_SFCHG_FEN, PMIC_BUCK_VPA_SFCHG_FEN_ADDR, PMIC_BUCK_VPA_SFCHG_FEN_MASK, PMIC_BUCK_VPA_SFCHG_FEN_SHIFT},
    1381. 

  1381. 	{PMIC_BUCK_VPA_SFCHG_RRATE, PMIC_BUCK_VPA_SFCHG_RRATE_ADDR, PMIC_BUCK_VPA_SFCHG_RRATE_MASK, PMIC_BUCK_VPA_SFCHG_RRATE_SHIFT},
    1382. 

  1382. 	{PMIC_BUCK_VPA_SFCHG_REN, PMIC_BUCK_VPA_SFCHG_REN_ADDR, PMIC_BUCK_VPA_SFCHG_REN_MASK, PMIC_BUCK_VPA_SFCHG_REN_SHIFT},
    1383. 

  1383. 	{PMIC_DA_NI_VPA_VOSEL, PMIC_DA_NI_VPA_VOSEL_ADDR, PMIC_DA_NI_VPA_VOSEL_MASK, PMIC_DA_NI_VPA_VOSEL_SHIFT},
    1384. 

  1384. 	{PMIC_BUCK_VPA_VOSEL, PMIC_BUCK_VPA_VOSEL_ADDR, PMIC_BUCK_VPA_VOSEL_MASK, PMIC_BUCK_VPA_VOSEL_SHIFT},
    1385. 

  1385. 	{PMIC_BUCK_VPA_TRANS_TD, PMIC_BUCK_VPA_TRANS_TD_ADDR, PMIC_BUCK_VPA_TRANS_TD_MASK, PMIC_BUCK_VPA_TRANS_TD_SHIFT},
    1386. 

  1386. 	{PMIC_BUCK_VPA_TRANS_CTRL, PMIC_BUCK_VPA_TRANS_CTRL_ADDR, PMIC_BUCK_VPA_TRANS_CTRL_MASK, PMIC_BUCK_VPA_TRANS_CTRL_SHIFT},
    1387. 

  1387. 	{PMIC_BUCK_VPA_TRANS_ONCE, PMIC_BUCK_VPA_TRANS_ONCE_ADDR, PMIC_BUCK_VPA_TRANS_ONCE_MASK, PMIC_BUCK_VPA_TRANS_ONCE_SHIFT},
    1388. 

  1388. 	{PMIC_DA_NI_VPA_DVS_TRANST, PMIC_DA_NI_VPA_DVS_TRANST_ADDR, PMIC_DA_NI_VPA_DVS_TRANST_MASK, PMIC_DA_NI_VPA_DVS_TRANST_SHIFT},
    1389. 

  1389. 	{PMIC_BUCK_VPA_DVS_BW_TD, PMIC_BUCK_VPA_DVS_BW_TD_ADDR, PMIC_BUCK_VPA_DVS_BW_TD_MASK, PMIC_BUCK_VPA_DVS_BW_TD_SHIFT},
    1390. 

  1390. 	{PMIC_BUCK_VPA_DVS_BW_CTRL, PMIC_BUCK_VPA_DVS_BW_CTRL_ADDR, PMIC_BUCK_VPA_DVS_BW_CTRL_MASK, PMIC_BUCK_VPA_DVS_BW_CTRL_SHIFT},
    1391. 

  1391. 	{PMIC_BUCK_VPA_DVS_BW_ONCE, PMIC_BUCK_VPA_DVS_BW_ONCE_ADDR, PMIC_BUCK_VPA_DVS_BW_ONCE_MASK, PMIC_BUCK_VPA_DVS_BW_ONCE_SHIFT},
    1392. 

  1392. 	{PMIC_DA_NI_VPA_DVS_BW, PMIC_DA_NI_VPA_DVS_BW_ADDR, PMIC_DA_NI_VPA_DVS_BW_MASK, PMIC_DA_NI_VPA_DVS_BW_SHIFT},
    1393. 

  1393. 	{PMIC_BUCK_K_RST_DONE, PMIC_BUCK_K_RST_DONE_ADDR, PMIC_BUCK_K_RST_DONE_MASK, PMIC_BUCK_K_RST_DONE_SHIFT},
    1394. 

  1394. 	{PMIC_BUCK_K_MAP_SEL, PMIC_BUCK_K_MAP_SEL_ADDR, PMIC_BUCK_K_MAP_SEL_MASK, PMIC_BUCK_K_MAP_SEL_SHIFT},
    1395. 

  1395. 	{PMIC_BUCK_K_ONCE_EN, PMIC_BUCK_K_ONCE_EN_ADDR, PMIC_BUCK_K_ONCE_EN_MASK, PMIC_BUCK_K_ONCE_EN_SHIFT},
    1396. 

  1396. 	{PMIC_BUCK_K_ONCE, PMIC_BUCK_K_ONCE_ADDR, PMIC_BUCK_K_ONCE_MASK, PMIC_BUCK_K_ONCE_SHIFT},
    1397. 

  1397. 	{PMIC_BUCK_K_START_MANUAL, PMIC_BUCK_K_START_MANUAL_ADDR, PMIC_BUCK_K_START_MANUAL_MASK, PMIC_BUCK_K_START_MANUAL_SHIFT},
    1398. 

  1398. 	{PMIC_BUCK_K_SRC_SEL, PMIC_BUCK_K_SRC_SEL_ADDR, PMIC_BUCK_K_SRC_SEL_MASK, PMIC_BUCK_K_SRC_SEL_SHIFT},
    1399. 

  1399. 	{PMIC_BUCK_K_AUTO_EN, PMIC_BUCK_K_AUTO_EN_ADDR, PMIC_BUCK_K_AUTO_EN_MASK, PMIC_BUCK_K_AUTO_EN_SHIFT},
    1400. 

  1400. 	{PMIC_BUCK_K_INV, PMIC_BUCK_K_INV_ADDR, PMIC_BUCK_K_INV_MASK, PMIC_BUCK_K_INV_SHIFT},
    1401. 

  1401. 	{PMIC_BUCK_K_CONTROL_SMPS, PMIC_BUCK_K_CONTROL_SMPS_ADDR, PMIC_BUCK_K_CONTROL_SMPS_MASK, PMIC_BUCK_K_CONTROL_SMPS_SHIFT},
    1402. 

  1402. 	{PMIC_K_RESULT, PMIC_K_RESULT_ADDR, PMIC_K_RESULT_MASK, PMIC_K_RESULT_SHIFT},
    1403. 

  1403. 	{PMIC_K_DONE, PMIC_K_DONE_ADDR, PMIC_K_DONE_MASK, PMIC_K_DONE_SHIFT},
    1404. 

  1404. 	{PMIC_K_CONTROL, PMIC_K_CONTROL_ADDR, PMIC_K_CONTROL_MASK, PMIC_K_CONTROL_SHIFT},
    1405. 

  1405. 	{PMIC_DA_QI_SMPS_OSC_CAL, PMIC_DA_QI_SMPS_OSC_CAL_ADDR, PMIC_DA_QI_SMPS_OSC_CAL_MASK, PMIC_DA_QI_SMPS_OSC_CAL_SHIFT},
    1406. 

  1406. 	{PMIC_BUCK_K_BUCK_CK_CNT, PMIC_BUCK_K_BUCK_CK_CNT_ADDR, PMIC_BUCK_K_BUCK_CK_CNT_MASK, PMIC_BUCK_K_BUCK_CK_CNT_SHIFT},
    1407. 

  1407. 	{PMIC_WDTDBG_CLR, PMIC_WDTDBG_CLR_ADDR, PMIC_WDTDBG_CLR_MASK, PMIC_WDTDBG_CLR_SHIFT},
    1408. 

  1408. 	{PMIC_WDTDBG_CON0_RSV0, PMIC_WDTDBG_CON0_RSV0_ADDR, PMIC_WDTDBG_CON0_RSV0_MASK, PMIC_WDTDBG_CON0_RSV0_SHIFT},
    1409. 

  1409. 	{PMIC_VPROC_VOSEL_WDTDBG, PMIC_VPROC_VOSEL_WDTDBG_ADDR, PMIC_VPROC_VOSEL_WDTDBG_MASK, PMIC_VPROC_VOSEL_WDTDBG_SHIFT},
    1410. 

  1410. 	{PMIC_VCORE_VOSEL_WDTDBG, PMIC_VCORE_VOSEL_WDTDBG_ADDR, PMIC_VCORE_VOSEL_WDTDBG_MASK, PMIC_VCORE_VOSEL_WDTDBG_SHIFT},
    1411. 

  1411. 	{PMIC_VPA_VOSEL_WDTDBG, PMIC_VPA_VOSEL_WDTDBG_ADDR, PMIC_VPA_VOSEL_WDTDBG_MASK, PMIC_VPA_VOSEL_WDTDBG_SHIFT},
    1412. 

  1412. 	{PMIC_VS1_VOSEL_WDTDBG, PMIC_VS1_VOSEL_WDTDBG_ADDR, PMIC_VS1_VOSEL_WDTDBG_MASK, PMIC_VS1_VOSEL_WDTDBG_SHIFT},
    1413. 

  1413. 	{PMIC_VSRAM_PROC_VOSEL_WDTDBG, PMIC_VSRAM_PROC_VOSEL_WDTDBG_ADDR, PMIC_VSRAM_PROC_VOSEL_WDTDBG_MASK, PMIC_VSRAM_PROC_VOSEL_WDTDBG_SHIFT},
    1414. 

  1414. 	{PMIC_RG_AUDZCDENABLE, PMIC_RG_AUDZCDENABLE_ADDR, PMIC_RG_AUDZCDENABLE_MASK, PMIC_RG_AUDZCDENABLE_SHIFT},
    1415. 

  1415. 	{PMIC_RG_AUDZCDGAINSTEPTIME, PMIC_RG_AUDZCDGAINSTEPTIME_ADDR, PMIC_RG_AUDZCDGAINSTEPTIME_MASK, PMIC_RG_AUDZCDGAINSTEPTIME_SHIFT},
    1416. 

  1416. 	{PMIC_RG_AUDZCDGAINSTEPSIZE, PMIC_RG_AUDZCDGAINSTEPSIZE_ADDR, PMIC_RG_AUDZCDGAINSTEPSIZE_MASK, PMIC_RG_AUDZCDGAINSTEPSIZE_SHIFT},
    1417. 

  1417. 	{PMIC_RG_AUDZCDTIMEOUTMODESEL, PMIC_RG_AUDZCDTIMEOUTMODESEL_ADDR, PMIC_RG_AUDZCDTIMEOUTMODESEL_MASK, PMIC_RG_AUDZCDTIMEOUTMODESEL_SHIFT},
    1418. 

  1418. 	{PMIC_RG_AUDZCDCLKSEL_VAUDP15, PMIC_RG_AUDZCDCLKSEL_VAUDP15_ADDR, PMIC_RG_AUDZCDCLKSEL_VAUDP15_MASK, PMIC_RG_AUDZCDCLKSEL_VAUDP15_SHIFT},
    1419. 

  1419. 	{PMIC_RG_AUDZCDMUXSEL_VAUDP15, PMIC_RG_AUDZCDMUXSEL_VAUDP15_ADDR, PMIC_RG_AUDZCDMUXSEL_VAUDP15_MASK, PMIC_RG_AUDZCDMUXSEL_VAUDP15_SHIFT},
    1420. 

  1420. 	{PMIC_RG_AUDLOLGAIN, PMIC_RG_AUDLOLGAIN_ADDR, PMIC_RG_AUDLOLGAIN_MASK, PMIC_RG_AUDLOLGAIN_SHIFT},
    1421. 

  1421. 	{PMIC_RG_AUDLORGAIN, PMIC_RG_AUDLORGAIN_ADDR, PMIC_RG_AUDLORGAIN_MASK, PMIC_RG_AUDLORGAIN_SHIFT},
    1422. 

  1422. 	{PMIC_RG_AUDHPLGAIN, PMIC_RG_AUDHPLGAIN_ADDR, PMIC_RG_AUDHPLGAIN_MASK, PMIC_RG_AUDHPLGAIN_SHIFT},
    1423. 

  1423. 	{PMIC_RG_AUDHPRGAIN, PMIC_RG_AUDHPRGAIN_ADDR, PMIC_RG_AUDHPRGAIN_MASK, PMIC_RG_AUDHPRGAIN_SHIFT},
    1424. 

  1424. 	{PMIC_RG_AUDHSGAIN, PMIC_RG_AUDHSGAIN_ADDR, PMIC_RG_AUDHSGAIN_MASK, PMIC_RG_AUDHSGAIN_SHIFT},
    1425. 

  1425. 	{PMIC_RG_AUDIVLGAIN, PMIC_RG_AUDIVLGAIN_ADDR, PMIC_RG_AUDIVLGAIN_MASK, PMIC_RG_AUDIVLGAIN_SHIFT},
    1426. 

  1426. 	{PMIC_RG_AUDIVRGAIN, PMIC_RG_AUDIVRGAIN_ADDR, PMIC_RG_AUDIVRGAIN_MASK, PMIC_RG_AUDIVRGAIN_SHIFT},
    1427. 

  1427. 	{PMIC_RG_AUDINTGAIN1, PMIC_RG_AUDINTGAIN1_ADDR, PMIC_RG_AUDINTGAIN1_MASK, PMIC_RG_AUDINTGAIN1_SHIFT},
    1428. 

  1428. 	{PMIC_RG_AUDINTGAIN2, PMIC_RG_AUDINTGAIN2_ADDR, PMIC_RG_AUDINTGAIN2_MASK, PMIC_RG_AUDINTGAIN2_SHIFT},
    1429. 

  1429. 	{PMIC_LDO_LDO_RSV1, PMIC_LDO_LDO_RSV1_ADDR, PMIC_LDO_LDO_RSV1_MASK, PMIC_LDO_LDO_RSV1_SHIFT},
    1430. 

  1430. 	{PMIC_LDO_LDO_RSV0, PMIC_LDO_LDO_RSV0_ADDR, PMIC_LDO_LDO_RSV0_MASK, PMIC_LDO_LDO_RSV0_SHIFT},
    1431. 

  1431. 	{PMIC_LDO_LDO_RSV1_RO, PMIC_LDO_LDO_RSV1_RO_ADDR, PMIC_LDO_LDO_RSV1_RO_MASK, PMIC_LDO_LDO_RSV1_RO_SHIFT},
    1432. 

  1432. 	{PMIC_LDO_LDO_RSV2, PMIC_LDO_LDO_RSV2_ADDR, PMIC_LDO_LDO_RSV2_MASK, PMIC_LDO_LDO_RSV2_SHIFT},
    1433. 

  1433. 	{PMIC_LDO_VAUX18_AUXADC_PWDB_EN, PMIC_LDO_VAUX18_AUXADC_PWDB_EN_ADDR, PMIC_LDO_VAUX18_AUXADC_PWDB_EN_MASK, PMIC_LDO_VAUX18_AUXADC_PWDB_EN_SHIFT},
    1434. 

  1434. 	{PMIC_LDO_VIBR_THER_SDN_EN, PMIC_LDO_VIBR_THER_SDN_EN_ADDR, PMIC_LDO_VIBR_THER_SDN_EN_MASK, PMIC_LDO_VIBR_THER_SDN_EN_SHIFT},
    1435. 

  1435. 	{PMIC_LDO_TOP_CON0_RSV, PMIC_LDO_TOP_CON0_RSV_ADDR, PMIC_LDO_TOP_CON0_RSV_MASK, PMIC_LDO_TOP_CON0_RSV_SHIFT},
    1436. 

  1436. 	{PMIC_LDO_VTCXO24_SWITCH, PMIC_LDO_VTCXO24_SWITCH_ADDR, PMIC_LDO_VTCXO24_SWITCH_MASK, PMIC_LDO_VTCXO24_SWITCH_SHIFT},
    1437. 

  1437. 	{PMIC_LDO_VXO22_SWITCH, PMIC_LDO_VXO22_SWITCH_ADDR, PMIC_LDO_VXO22_SWITCH_MASK, PMIC_LDO_VXO22_SWITCH_SHIFT},
    1438. 

  1438. 	{PMIC_LDO_DEGTD_SEL, PMIC_LDO_DEGTD_SEL_ADDR, PMIC_LDO_DEGTD_SEL_MASK, PMIC_LDO_DEGTD_SEL_SHIFT},
    1439. 

  1439. 	{PMIC_LDO_VRTC_EN, PMIC_LDO_VRTC_EN_ADDR, PMIC_LDO_VRTC_EN_MASK, PMIC_LDO_VRTC_EN_SHIFT},
    1440. 

  1440. 	{PMIC_DA_QI_VRTC_EN, PMIC_DA_QI_VRTC_EN_ADDR, PMIC_DA_QI_VRTC_EN_MASK, PMIC_DA_QI_VRTC_EN_SHIFT},
    1441. 

  1441. 	{PMIC_LDO_VCN33_EN_BT, PMIC_LDO_VCN33_EN_BT_ADDR, PMIC_LDO_VCN33_EN_BT_MASK, PMIC_LDO_VCN33_EN_BT_SHIFT},
    1442. 

  1442. 	{PMIC_LDO_VCN33_EN_CTRL_BT, PMIC_LDO_VCN33_EN_CTRL_BT_ADDR, PMIC_LDO_VCN33_EN_CTRL_BT_MASK, PMIC_LDO_VCN33_EN_CTRL_BT_SHIFT},
    1443. 

  1443. 	{PMIC_LDO_VCN33_EN_SEL_BT, PMIC_LDO_VCN33_EN_SEL_BT_ADDR, PMIC_LDO_VCN33_EN_SEL_BT_MASK, PMIC_LDO_VCN33_EN_SEL_BT_SHIFT},
    1444. 

  1444. 	{PMIC_LDO_VCN33_EN_WIFI, PMIC_LDO_VCN33_EN_WIFI_ADDR, PMIC_LDO_VCN33_EN_WIFI_MASK, PMIC_LDO_VCN33_EN_WIFI_SHIFT},
    1445. 

  1445. 	{PMIC_LDO_VCN33_EN_CTRL_WIFI, PMIC_LDO_VCN33_EN_CTRL_WIFI_ADDR, PMIC_LDO_VCN33_EN_CTRL_WIFI_MASK, PMIC_LDO_VCN33_EN_CTRL_WIFI_SHIFT},
    1446. 

  1446. 	{PMIC_LDO_VCN33_EN_SEL_WIFI, PMIC_LDO_VCN33_EN_SEL_WIFI_ADDR, PMIC_LDO_VCN33_EN_SEL_WIFI_MASK, PMIC_LDO_VCN33_EN_SEL_WIFI_SHIFT},
    1447. 

  1447. 	{PMIC_LDO_VCN33_LP_MODE, PMIC_LDO_VCN33_LP_MODE_ADDR, PMIC_LDO_VCN33_LP_MODE_MASK, PMIC_LDO_VCN33_LP_MODE_SHIFT},
    1448. 

  1448. 	{PMIC_LDO_VCN33_LP_CTRL, PMIC_LDO_VCN33_LP_CTRL_ADDR, PMIC_LDO_VCN33_LP_CTRL_MASK, PMIC_LDO_VCN33_LP_CTRL_SHIFT},
    1449. 

  1449. 	{PMIC_LDO_VCN33_LP_SEL, PMIC_LDO_VCN33_LP_SEL_ADDR, PMIC_LDO_VCN33_LP_SEL_MASK, PMIC_LDO_VCN33_LP_SEL_SHIFT},
    1450. 

  1450. 	{PMIC_DA_QI_VCN33_MODE, PMIC_DA_QI_VCN33_MODE_ADDR, PMIC_DA_QI_VCN33_MODE_MASK, PMIC_DA_QI_VCN33_MODE_SHIFT},
    1451. 

  1451. 	{PMIC_LDO_VCN33_STBTD, PMIC_LDO_VCN33_STBTD_ADDR, PMIC_LDO_VCN33_STBTD_MASK, PMIC_LDO_VCN33_STBTD_SHIFT},
    1452. 

  1452. 	{PMIC_DA_QI_VCN33_STB, PMIC_DA_QI_VCN33_STB_ADDR, PMIC_DA_QI_VCN33_STB_MASK, PMIC_DA_QI_VCN33_STB_SHIFT},
    1453. 

  1453. 	{PMIC_DA_QI_VCN33_EN, PMIC_DA_QI_VCN33_EN_ADDR, PMIC_DA_QI_VCN33_EN_MASK, PMIC_DA_QI_VCN33_EN_SHIFT},
    1454. 

  1454. 	{PMIC_LDO_VCN33_OCFB_EN, PMIC_LDO_VCN33_OCFB_EN_ADDR, PMIC_LDO_VCN33_OCFB_EN_MASK, PMIC_LDO_VCN33_OCFB_EN_SHIFT},
    1455. 

  1455. 	{PMIC_DA_QI_VCN33_OCFB_EN, PMIC_DA_QI_VCN33_OCFB_EN_ADDR, PMIC_DA_QI_VCN33_OCFB_EN_MASK, PMIC_DA_QI_VCN33_OCFB_EN_SHIFT},
    1456. 

  1456. 	{PMIC_LDO_VLDO28_EN_0, PMIC_LDO_VLDO28_EN_0_ADDR, PMIC_LDO_VLDO28_EN_0_MASK, PMIC_LDO_VLDO28_EN_0_SHIFT},
    1457. 

  1457. 	{PMIC_LDO_VLDO28_EN_1, PMIC_LDO_VLDO28_EN_1_ADDR, PMIC_LDO_VLDO28_EN_1_MASK, PMIC_LDO_VLDO28_EN_1_SHIFT},
    1458. 

  1458. 	{PMIC_LDO_VLDO28_LP_MODE, PMIC_LDO_VLDO28_LP_MODE_ADDR, PMIC_LDO_VLDO28_LP_MODE_MASK, PMIC_LDO_VLDO28_LP_MODE_SHIFT},
    1459. 

  1459. 	{PMIC_LDO_VLDO28_LP_CTRL, PMIC_LDO_VLDO28_LP_CTRL_ADDR, PMIC_LDO_VLDO28_LP_CTRL_MASK, PMIC_LDO_VLDO28_LP_CTRL_SHIFT},
    1460. 

  1460. 	{PMIC_LDO_VLDO28_LP_SEL, PMIC_LDO_VLDO28_LP_SEL_ADDR, PMIC_LDO_VLDO28_LP_SEL_MASK, PMIC_LDO_VLDO28_LP_SEL_SHIFT},
    1461. 

  1461. 	{PMIC_DA_QI_VLDO28_MODE, PMIC_DA_QI_VLDO28_MODE_ADDR, PMIC_DA_QI_VLDO28_MODE_MASK, PMIC_DA_QI_VLDO28_MODE_SHIFT},
    1462. 

  1462. 	{PMIC_LDO_VLDO28_STBTD, PMIC_LDO_VLDO28_STBTD_ADDR, PMIC_LDO_VLDO28_STBTD_MASK, PMIC_LDO_VLDO28_STBTD_SHIFT},
    1463. 

  1463. 	{PMIC_DA_QI_VLDO28_STB, PMIC_DA_QI_VLDO28_STB_ADDR, PMIC_DA_QI_VLDO28_STB_MASK, PMIC_DA_QI_VLDO28_STB_SHIFT},
    1464. 

  1464. 	{PMIC_DA_QI_VLDO28_EN, PMIC_DA_QI_VLDO28_EN_ADDR, PMIC_DA_QI_VLDO28_EN_MASK, PMIC_DA_QI_VLDO28_EN_SHIFT},
    1465. 

  1465. 	{PMIC_LDO_VLDO28_OCFB_EN, PMIC_LDO_VLDO28_OCFB_EN_ADDR, PMIC_LDO_VLDO28_OCFB_EN_MASK, PMIC_LDO_VLDO28_OCFB_EN_SHIFT},
    1466. 

  1466. 	{PMIC_DA_QI_VLDO28_OCFB_EN, PMIC_DA_QI_VLDO28_OCFB_EN_ADDR, PMIC_DA_QI_VLDO28_OCFB_EN_MASK, PMIC_DA_QI_VLDO28_OCFB_EN_SHIFT},
    1467. 

  1467. 	{PMIC_LDO_VLDO28_FAST_TRAN_DL_EN, PMIC_LDO_VLDO28_FAST_TRAN_DL_EN_ADDR, PMIC_LDO_VLDO28_FAST_TRAN_DL_EN_MASK, PMIC_LDO_VLDO28_FAST_TRAN_DL_EN_SHIFT},
    1468. 

  1468. 	{PMIC_LDO_VLDO28_FAST_TRAN_DL_CTRL, PMIC_LDO_VLDO28_FAST_TRAN_DL_CTRL_ADDR, PMIC_LDO_VLDO28_FAST_TRAN_DL_CTRL_MASK, PMIC_LDO_VLDO28_FAST_TRAN_DL_CTRL_SHIFT},
    1469. 

  1469. 	{PMIC_LDO_VLDO28_FAST_TRAN_DL_SRCLKEN_SEL, PMIC_LDO_VLDO28_FAST_TRAN_DL_SRCLKEN_SEL_ADDR, PMIC_LDO_VLDO28_FAST_TRAN_DL_SRCLKEN_SEL_MASK, PMIC_LDO_VLDO28_FAST_TRAN_DL_SRCLKEN_SEL_SHIFT},
    1470. 

  1470. 	{PMIC_DA_QI_VLDO28_FAST_TRAN_DL_EN, PMIC_DA_QI_VLDO28_FAST_TRAN_DL_EN_ADDR, PMIC_DA_QI_VLDO28_FAST_TRAN_DL_EN_MASK, PMIC_DA_QI_VLDO28_FAST_TRAN_DL_EN_SHIFT},
    1471. 

  1471. 	{PMIC_LDO_VLDO28_FAST_TRAN_CL_EN, PMIC_LDO_VLDO28_FAST_TRAN_CL_EN_ADDR, PMIC_LDO_VLDO28_FAST_TRAN_CL_EN_MASK, PMIC_LDO_VLDO28_FAST_TRAN_CL_EN_SHIFT},
    1472. 

  1472. 	{PMIC_LDO_VLDO28_FAST_TRAN_CL_CTRL, PMIC_LDO_VLDO28_FAST_TRAN_CL_CTRL_ADDR, PMIC_LDO_VLDO28_FAST_TRAN_CL_CTRL_MASK, PMIC_LDO_VLDO28_FAST_TRAN_CL_CTRL_SHIFT},
    1473. 

  1473. 	{PMIC_LDO_VLDO28_FAST_TRAN_CL_SRCLKEN_SEL, PMIC_LDO_VLDO28_FAST_TRAN_CL_SRCLKEN_SEL_ADDR, PMIC_LDO_VLDO28_FAST_TRAN_CL_SRCLKEN_SEL_MASK, PMIC_LDO_VLDO28_FAST_TRAN_CL_SRCLKEN_SEL_SHIFT},
    1474. 

  1474. 	{PMIC_DA_QI_VLDO28_FAST_TRAN_CL_EN, PMIC_DA_QI_VLDO28_FAST_TRAN_CL_EN_ADDR, PMIC_DA_QI_VLDO28_FAST_TRAN_CL_EN_MASK, PMIC_DA_QI_VLDO28_FAST_TRAN_CL_EN_SHIFT},
    1475. 

  1475. 	{PMIC_LDO_VSRAM_PROC_VOSEL_CTRL, PMIC_LDO_VSRAM_PROC_VOSEL_CTRL_ADDR, PMIC_LDO_VSRAM_PROC_VOSEL_CTRL_MASK, PMIC_LDO_VSRAM_PROC_VOSEL_CTRL_SHIFT},
    1476. 

  1476. 	{PMIC_LDO_VSRAM_PROC_VOSEL_SEL, PMIC_LDO_VSRAM_PROC_VOSEL_SEL_ADDR, PMIC_LDO_VSRAM_PROC_VOSEL_SEL_MASK, PMIC_LDO_VSRAM_PROC_VOSEL_SEL_SHIFT},
    1477. 

  1477. 	{PMIC_LDO_VSRAM_PROC_SFCHG_FRATE, PMIC_LDO_VSRAM_PROC_SFCHG_FRATE_ADDR, PMIC_LDO_VSRAM_PROC_SFCHG_FRATE_MASK, PMIC_LDO_VSRAM_PROC_SFCHG_FRATE_SHIFT},
    1478. 

  1478. 	{PMIC_LDO_VSRAM_PROC_SFCHG_FEN, PMIC_LDO_VSRAM_PROC_SFCHG_FEN_ADDR, PMIC_LDO_VSRAM_PROC_SFCHG_FEN_MASK, PMIC_LDO_VSRAM_PROC_SFCHG_FEN_SHIFT},
    1479. 

  1479. 	{PMIC_LDO_VSRAM_PROC_SFCHG_RRATE, PMIC_LDO_VSRAM_PROC_SFCHG_RRATE_ADDR, PMIC_LDO_VSRAM_PROC_SFCHG_RRATE_MASK, PMIC_LDO_VSRAM_PROC_SFCHG_RRATE_SHIFT},
    1480. 

  1480. 	{PMIC_LDO_VSRAM_PROC_SFCHG_REN, PMIC_LDO_VSRAM_PROC_SFCHG_REN_ADDR, PMIC_LDO_VSRAM_PROC_SFCHG_REN_MASK, PMIC_LDO_VSRAM_PROC_SFCHG_REN_SHIFT},
    1481. 

  1481. 	{PMIC_DA_NI_VSRAM_PROC_VOSEL, PMIC_DA_NI_VSRAM_PROC_VOSEL_ADDR, PMIC_DA_NI_VSRAM_PROC_VOSEL_MASK, PMIC_DA_NI_VSRAM_PROC_VOSEL_SHIFT},
    1482. 

  1482. 	{PMIC_LDO_VSRAM_PROC_VOSEL, PMIC_LDO_VSRAM_PROC_VOSEL_ADDR, PMIC_LDO_VSRAM_PROC_VOSEL_MASK, PMIC_LDO_VSRAM_PROC_VOSEL_SHIFT},
    1483. 

  1483. 	{PMIC_LDO_VSRAM_PROC_VOSEL_ON, PMIC_LDO_VSRAM_PROC_VOSEL_ON_ADDR, PMIC_LDO_VSRAM_PROC_VOSEL_ON_MASK, PMIC_LDO_VSRAM_PROC_VOSEL_ON_SHIFT},
    1484. 

  1484. 	{PMIC_LDO_VSRAM_PROC_VOSEL_SLEEP, PMIC_LDO_VSRAM_PROC_VOSEL_SLEEP_ADDR, PMIC_LDO_VSRAM_PROC_VOSEL_SLEEP_MASK, PMIC_LDO_VSRAM_PROC_VOSEL_SLEEP_SHIFT},
    1485. 

  1485. 	{PMIC_LDO_VSRAM_PROC_TRANS_TD, PMIC_LDO_VSRAM_PROC_TRANS_TD_ADDR, PMIC_LDO_VSRAM_PROC_TRANS_TD_MASK, PMIC_LDO_VSRAM_PROC_TRANS_TD_SHIFT},
    1486. 

  1486. 	{PMIC_LDO_VSRAM_PROC_TRANS_CTRL, PMIC_LDO_VSRAM_PROC_TRANS_CTRL_ADDR, PMIC_LDO_VSRAM_PROC_TRANS_CTRL_MASK, PMIC_LDO_VSRAM_PROC_TRANS_CTRL_SHIFT},
    1487. 

  1487. 	{PMIC_LDO_VSRAM_PROC_TRANS_ONCE, PMIC_LDO_VSRAM_PROC_TRANS_ONCE_ADDR, PMIC_LDO_VSRAM_PROC_TRANS_ONCE_MASK, PMIC_LDO_VSRAM_PROC_TRANS_ONCE_SHIFT},
    1488. 

  1488. 	{PMIC_DA_QI_VSRAM_PROC_DVS_EN, PMIC_DA_QI_VSRAM_PROC_DVS_EN_ADDR, PMIC_DA_QI_VSRAM_PROC_DVS_EN_MASK, PMIC_DA_QI_VSRAM_PROC_DVS_EN_SHIFT},
    1489. 

  1489. 	{PMIC_LDO_VSRAM_PROC_VSLEEP_EN, PMIC_LDO_VSRAM_PROC_VSLEEP_EN_ADDR, PMIC_LDO_VSRAM_PROC_VSLEEP_EN_MASK, PMIC_LDO_VSRAM_PROC_VSLEEP_EN_SHIFT},
    1490. 

  1490. 	{PMIC_LDO_VSRAM_PROC_R2R_PDN, PMIC_LDO_VSRAM_PROC_R2R_PDN_ADDR, PMIC_LDO_VSRAM_PROC_R2R_PDN_MASK, PMIC_LDO_VSRAM_PROC_R2R_PDN_SHIFT},
    1491. 

  1491. 	{PMIC_LDO_VSRAM_PROC_VSLEEP_SEL, PMIC_LDO_VSRAM_PROC_VSLEEP_SEL_ADDR, PMIC_LDO_VSRAM_PROC_VSLEEP_SEL_MASK, PMIC_LDO_VSRAM_PROC_VSLEEP_SEL_SHIFT},
    1492. 

  1492. 	{PMIC_DA_NI_VSRAM_PROC_R2R_PDN, PMIC_DA_NI_VSRAM_PROC_R2R_PDN_ADDR, PMIC_DA_NI_VSRAM_PROC_R2R_PDN_MASK, PMIC_DA_NI_VSRAM_PROC_R2R_PDN_SHIFT},
    1493. 

  1493. 	{PMIC_DA_NI_VSRAM_PROC_VSLEEP_SEL, PMIC_DA_NI_VSRAM_PROC_VSLEEP_SEL_ADDR, PMIC_DA_NI_VSRAM_PROC_VSLEEP_SEL_MASK, PMIC_DA_NI_VSRAM_PROC_VSLEEP_SEL_SHIFT},
    1494. 

  1494. 	{PMIC_LDO_BATON_HT_EN, PMIC_LDO_BATON_HT_EN_ADDR, PMIC_LDO_BATON_HT_EN_MASK, PMIC_LDO_BATON_HT_EN_SHIFT},
    1495. 

  1495. 	{PMIC_LDO_BATON_HT_EN_DLY_TIME, PMIC_LDO_BATON_HT_EN_DLY_TIME_ADDR, PMIC_LDO_BATON_HT_EN_DLY_TIME_MASK, PMIC_LDO_BATON_HT_EN_DLY_TIME_SHIFT},
    1496. 

  1496. 	{PMIC_DA_QI_BATON_HT_EN, PMIC_DA_QI_BATON_HT_EN_ADDR, PMIC_DA_QI_BATON_HT_EN_MASK, PMIC_DA_QI_BATON_HT_EN_SHIFT},
    1497. 

  1497. 	{PMIC_LDO_TREF_EN, PMIC_LDO_TREF_EN_ADDR, PMIC_LDO_TREF_EN_MASK, PMIC_LDO_TREF_EN_SHIFT},
    1498. 

  1498. 	{PMIC_LDO_TREF_EN_CTRL, PMIC_LDO_TREF_EN_CTRL_ADDR, PMIC_LDO_TREF_EN_CTRL_MASK, PMIC_LDO_TREF_EN_CTRL_SHIFT},
    1499. 

  1499. 	{PMIC_LDO_TREF_EN_SEL, PMIC_LDO_TREF_EN_SEL_ADDR, PMIC_LDO_TREF_EN_SEL_MASK, PMIC_LDO_TREF_EN_SEL_SHIFT},
    1500. 

  1500. 	{PMIC_DA_QI_TREF_EN, PMIC_DA_QI_TREF_EN_ADDR, PMIC_DA_QI_TREF_EN_MASK, PMIC_DA_QI_TREF_EN_SHIFT},
    1501. 

  1501. 	{PMIC_LDO_VTCXO28_LP_MODE, PMIC_LDO_VTCXO28_LP_MODE_ADDR, PMIC_LDO_VTCXO28_LP_MODE_MASK, PMIC_LDO_VTCXO28_LP_MODE_SHIFT},
    1502. 

  1502. 	{PMIC_LDO_VTCXO28_EN, PMIC_LDO_VTCXO28_EN_ADDR, PMIC_LDO_VTCXO28_EN_MASK, PMIC_LDO_VTCXO28_EN_SHIFT},
    1503. 

  1503. 	{PMIC_LDO_VTCXO28_LP_CTRL, PMIC_LDO_VTCXO28_LP_CTRL_ADDR, PMIC_LDO_VTCXO28_LP_CTRL_MASK, PMIC_LDO_VTCXO28_LP_CTRL_SHIFT},
    1504. 

  1504. 	{PMIC_LDO_VTCXO28_EN_CTRL, PMIC_LDO_VTCXO28_EN_CTRL_ADDR, PMIC_LDO_VTCXO28_EN_CTRL_MASK, PMIC_LDO_VTCXO28_EN_CTRL_SHIFT},
    1505. 

  1505. 	{PMIC_LDO_VTCXO28_LP_SEL, PMIC_LDO_VTCXO28_LP_SEL_ADDR, PMIC_LDO_VTCXO28_LP_SEL_MASK, PMIC_LDO_VTCXO28_LP_SEL_SHIFT},
    1506. 

  1506. 	{PMIC_DA_QI_VTCXO28_MODE, PMIC_DA_QI_VTCXO28_MODE_ADDR, PMIC_DA_QI_VTCXO28_MODE_MASK, PMIC_DA_QI_VTCXO28_MODE_SHIFT},
    1507. 

  1507. 	{PMIC_LDO_VTCXO28_STBTD, PMIC_LDO_VTCXO28_STBTD_ADDR, PMIC_LDO_VTCXO28_STBTD_MASK, PMIC_LDO_VTCXO28_STBTD_SHIFT},
    1508. 

  1508. 	{PMIC_LDO_VTCXO28_EN_SEL, PMIC_LDO_VTCXO28_EN_SEL_ADDR, PMIC_LDO_VTCXO28_EN_SEL_MASK, PMIC_LDO_VTCXO28_EN_SEL_SHIFT},
    1509. 

  1509. 	{PMIC_DA_QI_VTCXO28_STB, PMIC_DA_QI_VTCXO28_STB_ADDR, PMIC_DA_QI_VTCXO28_STB_MASK, PMIC_DA_QI_VTCXO28_STB_SHIFT},
    1510. 

  1510. 	{PMIC_DA_QI_VTCXO28_EN, PMIC_DA_QI_VTCXO28_EN_ADDR, PMIC_DA_QI_VTCXO28_EN_MASK, PMIC_DA_QI_VTCXO28_EN_SHIFT},
    1511. 

  1511. 	{PMIC_LDO_VTCXO28_OCFB_EN, PMIC_LDO_VTCXO28_OCFB_EN_ADDR, PMIC_LDO_VTCXO28_OCFB_EN_MASK, PMIC_LDO_VTCXO28_OCFB_EN_SHIFT},
    1512. 

  1512. 	{PMIC_DA_QI_VTCXO28_OCFB_EN, PMIC_DA_QI_VTCXO28_OCFB_EN_ADDR, PMIC_DA_QI_VTCXO28_OCFB_EN_MASK, PMIC_DA_QI_VTCXO28_OCFB_EN_SHIFT},
    1513. 

  1513. 	{PMIC_LDO_VTCXO24_LP_MODE, PMIC_LDO_VTCXO24_LP_MODE_ADDR, PMIC_LDO_VTCXO24_LP_MODE_MASK, PMIC_LDO_VTCXO24_LP_MODE_SHIFT},
    1514. 

  1514. 	{PMIC_LDO_VTCXO24_EN, PMIC_LDO_VTCXO24_EN_ADDR, PMIC_LDO_VTCXO24_EN_MASK, PMIC_LDO_VTCXO24_EN_SHIFT},
    1515. 

  1515. 	{PMIC_LDO_VTCXO24_LP_CTRL, PMIC_LDO_VTCXO24_LP_CTRL_ADDR, PMIC_LDO_VTCXO24_LP_CTRL_MASK, PMIC_LDO_VTCXO24_LP_CTRL_SHIFT},
    1516. 

  1516. 	{PMIC_LDO_VTCXO24_EN_CTRL, PMIC_LDO_VTCXO24_EN_CTRL_ADDR, PMIC_LDO_VTCXO24_EN_CTRL_MASK, PMIC_LDO_VTCXO24_EN_CTRL_SHIFT},
    1517. 

  1517. 	{PMIC_LDO_VTCXO24_LP_SEL, PMIC_LDO_VTCXO24_LP_SEL_ADDR, PMIC_LDO_VTCXO24_LP_SEL_MASK, PMIC_LDO_VTCXO24_LP_SEL_SHIFT},
    1518. 

  1518. 	{PMIC_DA_QI_VTCXO24_MODE, PMIC_DA_QI_VTCXO24_MODE_ADDR, PMIC_DA_QI_VTCXO24_MODE_MASK, PMIC_DA_QI_VTCXO24_MODE_SHIFT},
    1519. 

  1519. 	{PMIC_LDO_VTCXO24_STBTD, PMIC_LDO_VTCXO24_STBTD_ADDR, PMIC_LDO_VTCXO24_STBTD_MASK, PMIC_LDO_VTCXO24_STBTD_SHIFT},
    1520. 

  1520. 	{PMIC_LDO_VTCXO24_EN_SEL, PMIC_LDO_VTCXO24_EN_SEL_ADDR, PMIC_LDO_VTCXO24_EN_SEL_MASK, PMIC_LDO_VTCXO24_EN_SEL_SHIFT},
    1521. 

  1521. 	{PMIC_DA_QI_VTCXO24_STB, PMIC_DA_QI_VTCXO24_STB_ADDR, PMIC_DA_QI_VTCXO24_STB_MASK, PMIC_DA_QI_VTCXO24_STB_SHIFT},
    1522. 

  1522. 	{PMIC_DA_QI_VTCXO24_EN, PMIC_DA_QI_VTCXO24_EN_ADDR, PMIC_DA_QI_VTCXO24_EN_MASK, PMIC_DA_QI_VTCXO24_EN_SHIFT},
    1523. 

  1523. 	{PMIC_LDO_VTCXO24_OCFB_EN, PMIC_LDO_VTCXO24_OCFB_EN_ADDR, PMIC_LDO_VTCXO24_OCFB_EN_MASK, PMIC_LDO_VTCXO24_OCFB_EN_SHIFT},
    1524. 

  1524. 	{PMIC_DA_QI_VTCXO24_OCFB_EN, PMIC_DA_QI_VTCXO24_OCFB_EN_ADDR, PMIC_DA_QI_VTCXO24_OCFB_EN_MASK, PMIC_DA_QI_VTCXO24_OCFB_EN_SHIFT},
    1525. 

  1525. 	{PMIC_LDO_VXO22_LP_MODE, PMIC_LDO_VXO22_LP_MODE_ADDR, PMIC_LDO_VXO22_LP_MODE_MASK, PMIC_LDO_VXO22_LP_MODE_SHIFT},
    1526. 

  1526. 	{PMIC_LDO_VXO22_EN, PMIC_LDO_VXO22_EN_ADDR, PMIC_LDO_VXO22_EN_MASK, PMIC_LDO_VXO22_EN_SHIFT},
    1527. 

  1527. 	{PMIC_LDO_VXO22_LP_CTRL, PMIC_LDO_VXO22_LP_CTRL_ADDR, PMIC_LDO_VXO22_LP_CTRL_MASK, PMIC_LDO_VXO22_LP_CTRL_SHIFT},
    1528. 

  1528. 	{PMIC_LDO_VXO22_EN_CTRL, PMIC_LDO_VXO22_EN_CTRL_ADDR, PMIC_LDO_VXO22_EN_CTRL_MASK, PMIC_LDO_VXO22_EN_CTRL_SHIFT},
    1529. 

  1529. 	{PMIC_LDO_VXO22_LP_SEL, PMIC_LDO_VXO22_LP_SEL_ADDR, PMIC_LDO_VXO22_LP_SEL_MASK, PMIC_LDO_VXO22_LP_SEL_SHIFT},
    1530. 

  1530. 	{PMIC_DA_QI_VXO22_MODE, PMIC_DA_QI_VXO22_MODE_ADDR, PMIC_DA_QI_VXO22_MODE_MASK, PMIC_DA_QI_VXO22_MODE_SHIFT},
    1531. 

  1531. 	{PMIC_LDO_VXO22_STBTD, PMIC_LDO_VXO22_STBTD_ADDR, PMIC_LDO_VXO22_STBTD_MASK, PMIC_LDO_VXO22_STBTD_SHIFT},
    1532. 

  1532. 	{PMIC_LDO_VXO22_EN_SEL, PMIC_LDO_VXO22_EN_SEL_ADDR, PMIC_LDO_VXO22_EN_SEL_MASK, PMIC_LDO_VXO22_EN_SEL_SHIFT},
    1533. 

  1533. 	{PMIC_DA_QI_VXO22_STB, PMIC_DA_QI_VXO22_STB_ADDR, PMIC_DA_QI_VXO22_STB_MASK, PMIC_DA_QI_VXO22_STB_SHIFT},
    1534. 

  1534. 	{PMIC_DA_QI_VXO22_EN, PMIC_DA_QI_VXO22_EN_ADDR, PMIC_DA_QI_VXO22_EN_MASK, PMIC_DA_QI_VXO22_EN_SHIFT},
    1535. 

  1535. 	{PMIC_LDO_VXO22_OCFB_EN, PMIC_LDO_VXO22_OCFB_EN_ADDR, PMIC_LDO_VXO22_OCFB_EN_MASK, PMIC_LDO_VXO22_OCFB_EN_SHIFT},
    1536. 

  1536. 	{PMIC_DA_QI_VXO22_OCFB_EN, PMIC_DA_QI_VXO22_OCFB_EN_ADDR, PMIC_DA_QI_VXO22_OCFB_EN_MASK, PMIC_DA_QI_VXO22_OCFB_EN_SHIFT},
    1537. 

  1537. 	{PMIC_LDO_VRF18_LP_MODE, PMIC_LDO_VRF18_LP_MODE_ADDR, PMIC_LDO_VRF18_LP_MODE_MASK, PMIC_LDO_VRF18_LP_MODE_SHIFT},
    1538. 

  1538. 	{PMIC_LDO_VRF18_EN, PMIC_LDO_VRF18_EN_ADDR, PMIC_LDO_VRF18_EN_MASK, PMIC_LDO_VRF18_EN_SHIFT},
    1539. 

  1539. 	{PMIC_LDO_VRF18_LP_CTRL, PMIC_LDO_VRF18_LP_CTRL_ADDR, PMIC_LDO_VRF18_LP_CTRL_MASK, PMIC_LDO_VRF18_LP_CTRL_SHIFT},
    1540. 

  1540. 	{PMIC_LDO_VRF18_EN_CTRL, PMIC_LDO_VRF18_EN_CTRL_ADDR, PMIC_LDO_VRF18_EN_CTRL_MASK, PMIC_LDO_VRF18_EN_CTRL_SHIFT},
    1541. 

  1541. 	{PMIC_LDO_VRF18_LP_SEL, PMIC_LDO_VRF18_LP_SEL_ADDR, PMIC_LDO_VRF18_LP_SEL_MASK, PMIC_LDO_VRF18_LP_SEL_SHIFT},
    1542. 

  1542. 	{PMIC_DA_QI_VRF18_MODE, PMIC_DA_QI_VRF18_MODE_ADDR, PMIC_DA_QI_VRF18_MODE_MASK, PMIC_DA_QI_VRF18_MODE_SHIFT},
    1543. 

  1543. 	{PMIC_LDO_VRF18_STBTD, PMIC_LDO_VRF18_STBTD_ADDR, PMIC_LDO_VRF18_STBTD_MASK, PMIC_LDO_VRF18_STBTD_SHIFT},
    1544. 

  1544. 	{PMIC_LDO_VRF18_EN_SEL, PMIC_LDO_VRF18_EN_SEL_ADDR, PMIC_LDO_VRF18_EN_SEL_MASK, PMIC_LDO_VRF18_EN_SEL_SHIFT},
    1545. 

  1545. 	{PMIC_DA_QI_VRF18_STB, PMIC_DA_QI_VRF18_STB_ADDR, PMIC_DA_QI_VRF18_STB_MASK, PMIC_DA_QI_VRF18_STB_SHIFT},
    1546. 

  1546. 	{PMIC_DA_QI_VRF18_EN, PMIC_DA_QI_VRF18_EN_ADDR, PMIC_DA_QI_VRF18_EN_MASK, PMIC_DA_QI_VRF18_EN_SHIFT},
    1547. 

  1547. 	{PMIC_LDO_VRF18_OCFB_EN, PMIC_LDO_VRF18_OCFB_EN_ADDR, PMIC_LDO_VRF18_OCFB_EN_MASK, PMIC_LDO_VRF18_OCFB_EN_SHIFT},
    1548. 

  1548. 	{PMIC_DA_QI_VRF18_OCFB_EN, PMIC_DA_QI_VRF18_OCFB_EN_ADDR, PMIC_DA_QI_VRF18_OCFB_EN_MASK, PMIC_DA_QI_VRF18_OCFB_EN_SHIFT},
    1549. 

  1549. 	{PMIC_LDO_VRF12_LP_MODE, PMIC_LDO_VRF12_LP_MODE_ADDR, PMIC_LDO_VRF12_LP_MODE_MASK, PMIC_LDO_VRF12_LP_MODE_SHIFT},
    1550. 

  1550. 	{PMIC_LDO_VRF12_EN, PMIC_LDO_VRF12_EN_ADDR, PMIC_LDO_VRF12_EN_MASK, PMIC_LDO_VRF12_EN_SHIFT},
    1551. 

  1551. 	{PMIC_LDO_VRF12_LP_CTRL, PMIC_LDO_VRF12_LP_CTRL_ADDR, PMIC_LDO_VRF12_LP_CTRL_MASK, PMIC_LDO_VRF12_LP_CTRL_SHIFT},
    1552. 

  1552. 	{PMIC_LDO_VRF12_EN_CTRL, PMIC_LDO_VRF12_EN_CTRL_ADDR, PMIC_LDO_VRF12_EN_CTRL_MASK, PMIC_LDO_VRF12_EN_CTRL_SHIFT},
    1553. 

  1553. 	{PMIC_LDO_VRF12_LP_SEL, PMIC_LDO_VRF12_LP_SEL_ADDR, PMIC_LDO_VRF12_LP_SEL_MASK, PMIC_LDO_VRF12_LP_SEL_SHIFT},
    1554. 

  1554. 	{PMIC_DA_QI_VRF12_MODE, PMIC_DA_QI_VRF12_MODE_ADDR, PMIC_DA_QI_VRF12_MODE_MASK, PMIC_DA_QI_VRF12_MODE_SHIFT},
    1555. 

  1555. 	{PMIC_LDO_VRF12_STBTD, PMIC_LDO_VRF12_STBTD_ADDR, PMIC_LDO_VRF12_STBTD_MASK, PMIC_LDO_VRF12_STBTD_SHIFT},
    1556. 

  1556. 	{PMIC_LDO_VRF12_EN_SEL, PMIC_LDO_VRF12_EN_SEL_ADDR, PMIC_LDO_VRF12_EN_SEL_MASK, PMIC_LDO_VRF12_EN_SEL_SHIFT},
    1557. 

  1557. 	{PMIC_DA_QI_VRF12_STB, PMIC_DA_QI_VRF12_STB_ADDR, PMIC_DA_QI_VRF12_STB_MASK, PMIC_DA_QI_VRF12_STB_SHIFT},
    1558. 

  1558. 	{PMIC_DA_QI_VRF12_EN, PMIC_DA_QI_VRF12_EN_ADDR, PMIC_DA_QI_VRF12_EN_MASK, PMIC_DA_QI_VRF12_EN_SHIFT},
    1559. 

  1559. 	{PMIC_LDO_VRF12_OCFB_EN, PMIC_LDO_VRF12_OCFB_EN_ADDR, PMIC_LDO_VRF12_OCFB_EN_MASK, PMIC_LDO_VRF12_OCFB_EN_SHIFT},
    1560. 

  1560. 	{PMIC_DA_QI_VRF12_OCFB_EN, PMIC_DA_QI_VRF12_OCFB_EN_ADDR, PMIC_DA_QI_VRF12_OCFB_EN_MASK, PMIC_DA_QI_VRF12_OCFB_EN_SHIFT},
    1561. 

  1561. 	{PMIC_LDO_VRF12_FAST_TRAN_DL_EN, PMIC_LDO_VRF12_FAST_TRAN_DL_EN_ADDR, PMIC_LDO_VRF12_FAST_TRAN_DL_EN_MASK, PMIC_LDO_VRF12_FAST_TRAN_DL_EN_SHIFT},
    1562. 

  1562. 	{PMIC_LDO_VRF12_FAST_TRAN_DL_CTRL, PMIC_LDO_VRF12_FAST_TRAN_DL_CTRL_ADDR, PMIC_LDO_VRF12_FAST_TRAN_DL_CTRL_MASK, PMIC_LDO_VRF12_FAST_TRAN_DL_CTRL_SHIFT},
    1563. 

  1563. 	{PMIC_LDO_VRF12_FAST_TRAN_DL_SRCLKEN_SEL, PMIC_LDO_VRF12_FAST_TRAN_DL_SRCLKEN_SEL_ADDR, PMIC_LDO_VRF12_FAST_TRAN_DL_SRCLKEN_SEL_MASK, PMIC_LDO_VRF12_FAST_TRAN_DL_SRCLKEN_SEL_SHIFT},
    1564. 

  1564. 	{PMIC_DA_QI_VRF12_FAST_TRAN_DL_EN, PMIC_DA_QI_VRF12_FAST_TRAN_DL_EN_ADDR, PMIC_DA_QI_VRF12_FAST_TRAN_DL_EN_MASK, PMIC_DA_QI_VRF12_FAST_TRAN_DL_EN_SHIFT},
    1565. 

  1565. 	{PMIC_LDO_VRF12_FAST_TRAN_CL_EN, PMIC_LDO_VRF12_FAST_TRAN_CL_EN_ADDR, PMIC_LDO_VRF12_FAST_TRAN_CL_EN_MASK, PMIC_LDO_VRF12_FAST_TRAN_CL_EN_SHIFT},
    1566. 

  1566. 	{PMIC_LDO_VRF12_FAST_TRAN_CL_CTRL, PMIC_LDO_VRF12_FAST_TRAN_CL_CTRL_ADDR, PMIC_LDO_VRF12_FAST_TRAN_CL_CTRL_MASK, PMIC_LDO_VRF12_FAST_TRAN_CL_CTRL_SHIFT},
    1567. 

  1567. 	{PMIC_LDO_VRF12_FAST_TRAN_CL_SRCLKEN_SEL, PMIC_LDO_VRF12_FAST_TRAN_CL_SRCLKEN_SEL_ADDR, PMIC_LDO_VRF12_FAST_TRAN_CL_SRCLKEN_SEL_MASK, PMIC_LDO_VRF12_FAST_TRAN_CL_SRCLKEN_SEL_SHIFT},
    1568. 

  1568. 	{PMIC_DA_QI_VRF12_FAST_TRAN_CL_EN, PMIC_DA_QI_VRF12_FAST_TRAN_CL_EN_ADDR, PMIC_DA_QI_VRF12_FAST_TRAN_CL_EN_MASK, PMIC_DA_QI_VRF12_FAST_TRAN_CL_EN_SHIFT},
    1569. 

  1569. 	{PMIC_LDO_VCN28_LP_MODE, PMIC_LDO_VCN28_LP_MODE_ADDR, PMIC_LDO_VCN28_LP_MODE_MASK, PMIC_LDO_VCN28_LP_MODE_SHIFT},
    1570. 

  1570. 	{PMIC_LDO_VCN28_EN, PMIC_LDO_VCN28_EN_ADDR, PMIC_LDO_VCN28_EN_MASK, PMIC_LDO_VCN28_EN_SHIFT},
    1571. 

  1571. 	{PMIC_LDO_VCN28_LP_CTRL, PMIC_LDO_VCN28_LP_CTRL_ADDR, PMIC_LDO_VCN28_LP_CTRL_MASK, PMIC_LDO_VCN28_LP_CTRL_SHIFT},
    1572. 

  1572. 	{PMIC_LDO_VCN28_EN_CTRL, PMIC_LDO_VCN28_EN_CTRL_ADDR, PMIC_LDO_VCN28_EN_CTRL_MASK, PMIC_LDO_VCN28_EN_CTRL_SHIFT},
    1573. 

  1573. 	{PMIC_LDO_VCN28_LP_SEL, PMIC_LDO_VCN28_LP_SEL_ADDR, PMIC_LDO_VCN28_LP_SEL_MASK, PMIC_LDO_VCN28_LP_SEL_SHIFT},
    1574. 

  1574. 	{PMIC_DA_QI_VCN28_MODE, PMIC_DA_QI_VCN28_MODE_ADDR, PMIC_DA_QI_VCN28_MODE_MASK, PMIC_DA_QI_VCN28_MODE_SHIFT},
    1575. 

  1575. 	{PMIC_LDO_VCN28_STBTD, PMIC_LDO_VCN28_STBTD_ADDR, PMIC_LDO_VCN28_STBTD_MASK, PMIC_LDO_VCN28_STBTD_SHIFT},
    1576. 

  1576. 	{PMIC_LDO_VCN28_EN_SEL, PMIC_LDO_VCN28_EN_SEL_ADDR, PMIC_LDO_VCN28_EN_SEL_MASK, PMIC_LDO_VCN28_EN_SEL_SHIFT},
    1577. 

  1577. 	{PMIC_DA_QI_VCN28_STB, PMIC_DA_QI_VCN28_STB_ADDR, PMIC_DA_QI_VCN28_STB_MASK, PMIC_DA_QI_VCN28_STB_SHIFT},
    1578. 

  1578. 	{PMIC_DA_QI_VCN28_EN, PMIC_DA_QI_VCN28_EN_ADDR, PMIC_DA_QI_VCN28_EN_MASK, PMIC_DA_QI_VCN28_EN_SHIFT},
    1579. 

  1579. 	{PMIC_LDO_VCN28_OCFB_EN, PMIC_LDO_VCN28_OCFB_EN_ADDR, PMIC_LDO_VCN28_OCFB_EN_MASK, PMIC_LDO_VCN28_OCFB_EN_SHIFT},
    1580. 

  1580. 	{PMIC_DA_QI_VCN28_OCFB_EN, PMIC_DA_QI_VCN28_OCFB_EN_ADDR, PMIC_DA_QI_VCN28_OCFB_EN_MASK, PMIC_DA_QI_VCN28_OCFB_EN_SHIFT},
    1581. 

  1581. 	{PMIC_LDO_VCN18_LP_MODE, PMIC_LDO_VCN18_LP_MODE_ADDR, PMIC_LDO_VCN18_LP_MODE_MASK, PMIC_LDO_VCN18_LP_MODE_SHIFT},
    1582. 

  1582. 	{PMIC_LDO_VCN18_EN, PMIC_LDO_VCN18_EN_ADDR, PMIC_LDO_VCN18_EN_MASK, PMIC_LDO_VCN18_EN_SHIFT},
    1583. 

  1583. 	{PMIC_LDO_VCN18_LP_CTRL, PMIC_LDO_VCN18_LP_CTRL_ADDR, PMIC_LDO_VCN18_LP_CTRL_MASK, PMIC_LDO_VCN18_LP_CTRL_SHIFT},
    1584. 

  1584. 	{PMIC_LDO_VCN18_EN_CTRL, PMIC_LDO_VCN18_EN_CTRL_ADDR, PMIC_LDO_VCN18_EN_CTRL_MASK, PMIC_LDO_VCN18_EN_CTRL_SHIFT},
    1585. 

  1585. 	{PMIC_LDO_VCN18_LP_SEL, PMIC_LDO_VCN18_LP_SEL_ADDR, PMIC_LDO_VCN18_LP_SEL_MASK, PMIC_LDO_VCN18_LP_SEL_SHIFT},
    1586. 

  1586. 	{PMIC_DA_QI_VCN18_MODE, PMIC_DA_QI_VCN18_MODE_ADDR, PMIC_DA_QI_VCN18_MODE_MASK, PMIC_DA_QI_VCN18_MODE_SHIFT},
    1587. 

  1587. 	{PMIC_LDO_VCN18_STBTD, PMIC_LDO_VCN18_STBTD_ADDR, PMIC_LDO_VCN18_STBTD_MASK, PMIC_LDO_VCN18_STBTD_SHIFT},
    1588. 

  1588. 	{PMIC_LDO_VCN18_EN_SEL, PMIC_LDO_VCN18_EN_SEL_ADDR, PMIC_LDO_VCN18_EN_SEL_MASK, PMIC_LDO_VCN18_EN_SEL_SHIFT},
    1589. 

  1589. 	{PMIC_DA_QI_VCN18_STB, PMIC_DA_QI_VCN18_STB_ADDR, PMIC_DA_QI_VCN18_STB_MASK, PMIC_DA_QI_VCN18_STB_SHIFT},
    1590. 

  1590. 	{PMIC_DA_QI_VCN18_EN, PMIC_DA_QI_VCN18_EN_ADDR, PMIC_DA_QI_VCN18_EN_MASK, PMIC_DA_QI_VCN18_EN_SHIFT},
    1591. 

  1591. 	{PMIC_LDO_VCN18_OCFB_EN, PMIC_LDO_VCN18_OCFB_EN_ADDR, PMIC_LDO_VCN18_OCFB_EN_MASK, PMIC_LDO_VCN18_OCFB_EN_SHIFT},
    1592. 

  1592. 	{PMIC_DA_QI_VCN18_OCFB_EN, PMIC_DA_QI_VCN18_OCFB_EN_ADDR, PMIC_DA_QI_VCN18_OCFB_EN_MASK, PMIC_DA_QI_VCN18_OCFB_EN_SHIFT},
    1593. 

  1593. 	{PMIC_LDO_VCAMA_LP_MODE, PMIC_LDO_VCAMA_LP_MODE_ADDR, PMIC_LDO_VCAMA_LP_MODE_MASK, PMIC_LDO_VCAMA_LP_MODE_SHIFT},
    1594. 

  1594. 	{PMIC_LDO_VCAMA_EN, PMIC_LDO_VCAMA_EN_ADDR, PMIC_LDO_VCAMA_EN_MASK, PMIC_LDO_VCAMA_EN_SHIFT},
    1595. 

  1595. 	{PMIC_DA_QI_VCAMA_MODE, PMIC_DA_QI_VCAMA_MODE_ADDR, PMIC_DA_QI_VCAMA_MODE_MASK, PMIC_DA_QI_VCAMA_MODE_SHIFT},
    1596. 

  1596. 	{PMIC_LDO_VCAMA_STBTD, PMIC_LDO_VCAMA_STBTD_ADDR, PMIC_LDO_VCAMA_STBTD_MASK, PMIC_LDO_VCAMA_STBTD_SHIFT},
    1597. 

  1597. 	{PMIC_DA_QI_VCAMA_STB, PMIC_DA_QI_VCAMA_STB_ADDR, PMIC_DA_QI_VCAMA_STB_MASK, PMIC_DA_QI_VCAMA_STB_SHIFT},
    1598. 

  1598. 	{PMIC_DA_QI_VCAMA_EN, PMIC_DA_QI_VCAMA_EN_ADDR, PMIC_DA_QI_VCAMA_EN_MASK, PMIC_DA_QI_VCAMA_EN_SHIFT},
    1599. 

  1599. 	{PMIC_LDO_VCAMA_OCFB_EN, PMIC_LDO_VCAMA_OCFB_EN_ADDR, PMIC_LDO_VCAMA_OCFB_EN_MASK, PMIC_LDO_VCAMA_OCFB_EN_SHIFT},
    1600. 

  1600. 	{PMIC_DA_QI_VCAMA_OCFB_EN, PMIC_DA_QI_VCAMA_OCFB_EN_ADDR, PMIC_DA_QI_VCAMA_OCFB_EN_MASK, PMIC_DA_QI_VCAMA_OCFB_EN_SHIFT},
    1601. 

  1601. 	{PMIC_LDO_VCAMIO_LP_MODE, PMIC_LDO_VCAMIO_LP_MODE_ADDR, PMIC_LDO_VCAMIO_LP_MODE_MASK, PMIC_LDO_VCAMIO_LP_MODE_SHIFT},
    1602. 

  1602. 	{PMIC_LDO_VCAMIO_EN, PMIC_LDO_VCAMIO_EN_ADDR, PMIC_LDO_VCAMIO_EN_MASK, PMIC_LDO_VCAMIO_EN_SHIFT},
    1603. 

  1603. 	{PMIC_DA_QI_VCAMIO_MODE, PMIC_DA_QI_VCAMIO_MODE_ADDR, PMIC_DA_QI_VCAMIO_MODE_MASK, PMIC_DA_QI_VCAMIO_MODE_SHIFT},
    1604. 

  1604. 	{PMIC_LDO_VCAMIO_STBTD, PMIC_LDO_VCAMIO_STBTD_ADDR, PMIC_LDO_VCAMIO_STBTD_MASK, PMIC_LDO_VCAMIO_STBTD_SHIFT},
    1605. 

  1605. 	{PMIC_DA_QI_VCAMIO_STB, PMIC_DA_QI_VCAMIO_STB_ADDR, PMIC_DA_QI_VCAMIO_STB_MASK, PMIC_DA_QI_VCAMIO_STB_SHIFT},
    1606. 

  1606. 	{PMIC_DA_QI_VCAMIO_EN, PMIC_DA_QI_VCAMIO_EN_ADDR, PMIC_DA_QI_VCAMIO_EN_MASK, PMIC_DA_QI_VCAMIO_EN_SHIFT},
    1607. 

  1607. 	{PMIC_LDO_VCAMIO_OCFB_EN, PMIC_LDO_VCAMIO_OCFB_EN_ADDR, PMIC_LDO_VCAMIO_OCFB_EN_MASK, PMIC_LDO_VCAMIO_OCFB_EN_SHIFT},
    1608. 

  1608. 	{PMIC_DA_QI_VCAMIO_OCFB_EN, PMIC_DA_QI_VCAMIO_OCFB_EN_ADDR, PMIC_DA_QI_VCAMIO_OCFB_EN_MASK, PMIC_DA_QI_VCAMIO_OCFB_EN_SHIFT},
    1609. 

  1609. 	{PMIC_LDO_VCAMD_LP_MODE, PMIC_LDO_VCAMD_LP_MODE_ADDR, PMIC_LDO_VCAMD_LP_MODE_MASK, PMIC_LDO_VCAMD_LP_MODE_SHIFT},
    1610. 

  1610. 	{PMIC_LDO_VCAMD_EN, PMIC_LDO_VCAMD_EN_ADDR, PMIC_LDO_VCAMD_EN_MASK, PMIC_LDO_VCAMD_EN_SHIFT},
    1611. 

  1611. 	{PMIC_DA_QI_VCAMD_MODE, PMIC_DA_QI_VCAMD_MODE_ADDR, PMIC_DA_QI_VCAMD_MODE_MASK, PMIC_DA_QI_VCAMD_MODE_SHIFT},
    1612. 

  1612. 	{PMIC_LDO_VCAMD_STBTD, PMIC_LDO_VCAMD_STBTD_ADDR, PMIC_LDO_VCAMD_STBTD_MASK, PMIC_LDO_VCAMD_STBTD_SHIFT},
    1613. 

  1613. 	{PMIC_DA_QI_VCAMD_STB, PMIC_DA_QI_VCAMD_STB_ADDR, PMIC_DA_QI_VCAMD_STB_MASK, PMIC_DA_QI_VCAMD_STB_SHIFT},
    1614. 

  1614. 	{PMIC_DA_QI_VCAMD_EN, PMIC_DA_QI_VCAMD_EN_ADDR, PMIC_DA_QI_VCAMD_EN_MASK, PMIC_DA_QI_VCAMD_EN_SHIFT},
    1615. 

  1615. 	{PMIC_LDO_VCAMD_OCFB_EN, PMIC_LDO_VCAMD_OCFB_EN_ADDR, PMIC_LDO_VCAMD_OCFB_EN_MASK, PMIC_LDO_VCAMD_OCFB_EN_SHIFT},
    1616. 

  1616. 	{PMIC_DA_QI_VCAMD_OCFB_EN, PMIC_DA_QI_VCAMD_OCFB_EN_ADDR, PMIC_DA_QI_VCAMD_OCFB_EN_MASK, PMIC_DA_QI_VCAMD_OCFB_EN_SHIFT},
    1617. 

  1617. 	{PMIC_LDO_VAUX18_LP_MODE, PMIC_LDO_VAUX18_LP_MODE_ADDR, PMIC_LDO_VAUX18_LP_MODE_MASK, PMIC_LDO_VAUX18_LP_MODE_SHIFT},
    1618. 

  1618. 	{PMIC_LDO_VAUX18_EN, PMIC_LDO_VAUX18_EN_ADDR, PMIC_LDO_VAUX18_EN_MASK, PMIC_LDO_VAUX18_EN_SHIFT},
    1619. 

  1619. 	{PMIC_LDO_VAUX18_LP_CTRL, PMIC_LDO_VAUX18_LP_CTRL_ADDR, PMIC_LDO_VAUX18_LP_CTRL_MASK, PMIC_LDO_VAUX18_LP_CTRL_SHIFT},
    1620. 

  1620. 	{PMIC_LDO_VAUX18_EN_CTRL, PMIC_LDO_VAUX18_EN_CTRL_ADDR, PMIC_LDO_VAUX18_EN_CTRL_MASK, PMIC_LDO_VAUX18_EN_CTRL_SHIFT},
    1621. 

  1621. 	{PMIC_LDO_VAUX18_LP_SEL, PMIC_LDO_VAUX18_LP_SEL_ADDR, PMIC_LDO_VAUX18_LP_SEL_MASK, PMIC_LDO_VAUX18_LP_SEL_SHIFT},
    1622. 

  1622. 	{PMIC_DA_QI_VAUX18_MODE, PMIC_DA_QI_VAUX18_MODE_ADDR, PMIC_DA_QI_VAUX18_MODE_MASK, PMIC_DA_QI_VAUX18_MODE_SHIFT},
    1623. 

  1623. 	{PMIC_LDO_VAUX18_STBTD, PMIC_LDO_VAUX18_STBTD_ADDR, PMIC_LDO_VAUX18_STBTD_MASK, PMIC_LDO_VAUX18_STBTD_SHIFT},
    1624. 

  1624. 	{PMIC_LDO_VAUX18_EN_SEL, PMIC_LDO_VAUX18_EN_SEL_ADDR, PMIC_LDO_VAUX18_EN_SEL_MASK, PMIC_LDO_VAUX18_EN_SEL_SHIFT},
    1625. 

  1625. 	{PMIC_DA_QI_VAUX18_STB, PMIC_DA_QI_VAUX18_STB_ADDR, PMIC_DA_QI_VAUX18_STB_MASK, PMIC_DA_QI_VAUX18_STB_SHIFT},
    1626. 

  1626. 	{PMIC_DA_QI_VAUX18_EN, PMIC_DA_QI_VAUX18_EN_ADDR, PMIC_DA_QI_VAUX18_EN_MASK, PMIC_DA_QI_VAUX18_EN_SHIFT},
    1627. 

  1627. 	{PMIC_LDO_VAUX18_OCFB_EN, PMIC_LDO_VAUX18_OCFB_EN_ADDR, PMIC_LDO_VAUX18_OCFB_EN_MASK, PMIC_LDO_VAUX18_OCFB_EN_SHIFT},
    1628. 

  1628. 	{PMIC_DA_QI_VAUX18_OCFB_EN, PMIC_DA_QI_VAUX18_OCFB_EN_ADDR, PMIC_DA_QI_VAUX18_OCFB_EN_MASK, PMIC_DA_QI_VAUX18_OCFB_EN_SHIFT},
    1629. 

  1629. 	{PMIC_LDO_VAUD28_LP_MODE, PMIC_LDO_VAUD28_LP_MODE_ADDR, PMIC_LDO_VAUD28_LP_MODE_MASK, PMIC_LDO_VAUD28_LP_MODE_SHIFT},
    1630. 

  1630. 	{PMIC_LDO_VAUD28_EN, PMIC_LDO_VAUD28_EN_ADDR, PMIC_LDO_VAUD28_EN_MASK, PMIC_LDO_VAUD28_EN_SHIFT},
    1631. 

  1631. 	{PMIC_LDO_VAUD28_LP_CTRL, PMIC_LDO_VAUD28_LP_CTRL_ADDR, PMIC_LDO_VAUD28_LP_CTRL_MASK, PMIC_LDO_VAUD28_LP_CTRL_SHIFT},
    1632. 

  1632. 	{PMIC_LDO_VAUD28_EN_CTRL, PMIC_LDO_VAUD28_EN_CTRL_ADDR, PMIC_LDO_VAUD28_EN_CTRL_MASK, PMIC_LDO_VAUD28_EN_CTRL_SHIFT},
    1633. 

  1633. 	{PMIC_LDO_VAUD28_LP_SEL, PMIC_LDO_VAUD28_LP_SEL_ADDR, PMIC_LDO_VAUD28_LP_SEL_MASK, PMIC_LDO_VAUD28_LP_SEL_SHIFT},
    1634. 

  1634. 	{PMIC_DA_QI_VAUD28_MODE, PMIC_DA_QI_VAUD28_MODE_ADDR, PMIC_DA_QI_VAUD28_MODE_MASK, PMIC_DA_QI_VAUD28_MODE_SHIFT},
    1635. 

  1635. 	{PMIC_LDO_VAUD28_STBTD, PMIC_LDO_VAUD28_STBTD_ADDR, PMIC_LDO_VAUD28_STBTD_MASK, PMIC_LDO_VAUD28_STBTD_SHIFT},
    1636. 

  1636. 	{PMIC_LDO_VAUD28_EN_SEL, PMIC_LDO_VAUD28_EN_SEL_ADDR, PMIC_LDO_VAUD28_EN_SEL_MASK, PMIC_LDO_VAUD28_EN_SEL_SHIFT},
    1637. 

  1637. 	{PMIC_DA_QI_VAUD28_STB, PMIC_DA_QI_VAUD28_STB_ADDR, PMIC_DA_QI_VAUD28_STB_MASK, PMIC_DA_QI_VAUD28_STB_SHIFT},
    1638. 

  1638. 	{PMIC_DA_QI_VAUD28_EN, PMIC_DA_QI_VAUD28_EN_ADDR, PMIC_DA_QI_VAUD28_EN_MASK, PMIC_DA_QI_VAUD28_EN_SHIFT},
    1639. 

  1639. 	{PMIC_LDO_VAUD28_OCFB_EN, PMIC_LDO_VAUD28_OCFB_EN_ADDR, PMIC_LDO_VAUD28_OCFB_EN_MASK, PMIC_LDO_VAUD28_OCFB_EN_SHIFT},
    1640. 

  1640. 	{PMIC_DA_QI_VAUD28_OCFB_EN, PMIC_DA_QI_VAUD28_OCFB_EN_ADDR, PMIC_DA_QI_VAUD28_OCFB_EN_MASK, PMIC_DA_QI_VAUD28_OCFB_EN_SHIFT},
    1641. 

  1641. 	{PMIC_LDO_VSRAM_PROC_LP_MODE, PMIC_LDO_VSRAM_PROC_LP_MODE_ADDR, PMIC_LDO_VSRAM_PROC_LP_MODE_MASK, PMIC_LDO_VSRAM_PROC_LP_MODE_SHIFT},
    1642. 

  1642. 	{PMIC_LDO_VSRAM_PROC_EN, PMIC_LDO_VSRAM_PROC_EN_ADDR, PMIC_LDO_VSRAM_PROC_EN_MASK, PMIC_LDO_VSRAM_PROC_EN_SHIFT},
    1643. 

  1643. 	{PMIC_LDO_VSRAM_PROC_LP_CTRL, PMIC_LDO_VSRAM_PROC_LP_CTRL_ADDR, PMIC_LDO_VSRAM_PROC_LP_CTRL_MASK, PMIC_LDO_VSRAM_PROC_LP_CTRL_SHIFT},
    1644. 

  1644. 	{PMIC_LDO_VSRAM_PROC_EN_CTRL, PMIC_LDO_VSRAM_PROC_EN_CTRL_ADDR, PMIC_LDO_VSRAM_PROC_EN_CTRL_MASK, PMIC_LDO_VSRAM_PROC_EN_CTRL_SHIFT},
    1645. 

  1645. 	{PMIC_LDO_VSRAM_PROC_LP_SEL, PMIC_LDO_VSRAM_PROC_LP_SEL_ADDR, PMIC_LDO_VSRAM_PROC_LP_SEL_MASK, PMIC_LDO_VSRAM_PROC_LP_SEL_SHIFT},
    1646. 

  1646. 	{PMIC_DA_QI_VSRAM_PROC_MODE, PMIC_DA_QI_VSRAM_PROC_MODE_ADDR, PMIC_DA_QI_VSRAM_PROC_MODE_MASK, PMIC_DA_QI_VSRAM_PROC_MODE_SHIFT},
    1647. 

  1647. 	{PMIC_LDO_VSRAM_PROC_STBTD, PMIC_LDO_VSRAM_PROC_STBTD_ADDR, PMIC_LDO_VSRAM_PROC_STBTD_MASK, PMIC_LDO_VSRAM_PROC_STBTD_SHIFT},
    1648. 

  1648. 	{PMIC_LDO_VSRAM_PROC_EN_SEL, PMIC_LDO_VSRAM_PROC_EN_SEL_ADDR, PMIC_LDO_VSRAM_PROC_EN_SEL_MASK, PMIC_LDO_VSRAM_PROC_EN_SEL_SHIFT},
    1649. 

  1649. 	{PMIC_DA_QI_VSRAM_PROC_STB, PMIC_DA_QI_VSRAM_PROC_STB_ADDR, PMIC_DA_QI_VSRAM_PROC_STB_MASK, PMIC_DA_QI_VSRAM_PROC_STB_SHIFT},
    1650. 

  1650. 	{PMIC_DA_QI_VSRAM_PROC_EN, PMIC_DA_QI_VSRAM_PROC_EN_ADDR, PMIC_DA_QI_VSRAM_PROC_EN_MASK, PMIC_DA_QI_VSRAM_PROC_EN_SHIFT},
    1651. 

  1651. 	{PMIC_LDO_VSRAM_PROC_OCFB_EN, PMIC_LDO_VSRAM_PROC_OCFB_EN_ADDR, PMIC_LDO_VSRAM_PROC_OCFB_EN_MASK, PMIC_LDO_VSRAM_PROC_OCFB_EN_SHIFT},
    1652. 

  1652. 	{PMIC_DA_QI_VSRAM_PROC_OCFB_EN, PMIC_DA_QI_VSRAM_PROC_OCFB_EN_ADDR, PMIC_DA_QI_VSRAM_PROC_OCFB_EN_MASK, PMIC_DA_QI_VSRAM_PROC_OCFB_EN_SHIFT},
    1653. 

  1653. 	{PMIC_LDO_VDRAM_LP_MODE, PMIC_LDO_VDRAM_LP_MODE_ADDR, PMIC_LDO_VDRAM_LP_MODE_MASK, PMIC_LDO_VDRAM_LP_MODE_SHIFT},
    1654. 

  1654. 	{PMIC_LDO_VDRAM_EN, PMIC_LDO_VDRAM_EN_ADDR, PMIC_LDO_VDRAM_EN_MASK, PMIC_LDO_VDRAM_EN_SHIFT},
    1655. 

  1655. 	{PMIC_LDO_VDRAM_LP_CTRL, PMIC_LDO_VDRAM_LP_CTRL_ADDR, PMIC_LDO_VDRAM_LP_CTRL_MASK, PMIC_LDO_VDRAM_LP_CTRL_SHIFT},
    1656. 

  1656. 	{PMIC_LDO_VDRAM_LP_SEL, PMIC_LDO_VDRAM_LP_SEL_ADDR, PMIC_LDO_VDRAM_LP_SEL_MASK, PMIC_LDO_VDRAM_LP_SEL_SHIFT},
    1657. 

  1657. 	{PMIC_DA_QI_VDRAM_MODE, PMIC_DA_QI_VDRAM_MODE_ADDR, PMIC_DA_QI_VDRAM_MODE_MASK, PMIC_DA_QI_VDRAM_MODE_SHIFT},
    1658. 

  1658. 	{PMIC_LDO_VDRAM_STBTD, PMIC_LDO_VDRAM_STBTD_ADDR, PMIC_LDO_VDRAM_STBTD_MASK, PMIC_LDO_VDRAM_STBTD_SHIFT},
    1659. 

  1659. 	{PMIC_DA_QI_VDRAM_STB, PMIC_DA_QI_VDRAM_STB_ADDR, PMIC_DA_QI_VDRAM_STB_MASK, PMIC_DA_QI_VDRAM_STB_SHIFT},
    1660. 

  1660. 	{PMIC_DA_QI_VDRAM_EN, PMIC_DA_QI_VDRAM_EN_ADDR, PMIC_DA_QI_VDRAM_EN_MASK, PMIC_DA_QI_VDRAM_EN_SHIFT},
    1661. 

  1661. 	{PMIC_LDO_VDRAM_OCFB_EN, PMIC_LDO_VDRAM_OCFB_EN_ADDR, PMIC_LDO_VDRAM_OCFB_EN_MASK, PMIC_LDO_VDRAM_OCFB_EN_SHIFT},
    1662. 

  1662. 	{PMIC_DA_QI_VDRAM_OCFB_EN, PMIC_DA_QI_VDRAM_OCFB_EN_ADDR, PMIC_DA_QI_VDRAM_OCFB_EN_MASK, PMIC_DA_QI_VDRAM_OCFB_EN_SHIFT},
    1663. 

  1663. 	{PMIC_LDO_VDRAM_FAST_TRAN_DL_EN, PMIC_LDO_VDRAM_FAST_TRAN_DL_EN_ADDR, PMIC_LDO_VDRAM_FAST_TRAN_DL_EN_MASK, PMIC_LDO_VDRAM_FAST_TRAN_DL_EN_SHIFT},
    1664. 

  1664. 	{PMIC_LDO_VDRAM_FAST_TRAN_DL_CTRL, PMIC_LDO_VDRAM_FAST_TRAN_DL_CTRL_ADDR, PMIC_LDO_VDRAM_FAST_TRAN_DL_CTRL_MASK, PMIC_LDO_VDRAM_FAST_TRAN_DL_CTRL_SHIFT},
    1665. 

  1665. 	{PMIC_LDO_VDRAM_FAST_TRAN_DL_SRCLKEN_SEL, PMIC_LDO_VDRAM_FAST_TRAN_DL_SRCLKEN_SEL_ADDR, PMIC_LDO_VDRAM_FAST_TRAN_DL_SRCLKEN_SEL_MASK, PMIC_LDO_VDRAM_FAST_TRAN_DL_SRCLKEN_SEL_SHIFT},
    1666. 

  1666. 	{PMIC_DA_QI_VDRAM_FAST_TRAN_DL_EN, PMIC_DA_QI_VDRAM_FAST_TRAN_DL_EN_ADDR, PMIC_DA_QI_VDRAM_FAST_TRAN_DL_EN_MASK, PMIC_DA_QI_VDRAM_FAST_TRAN_DL_EN_SHIFT},
    1667. 

  1667. 	{PMIC_LDO_VDRAM_FAST_TRAN_CL_EN, PMIC_LDO_VDRAM_FAST_TRAN_CL_EN_ADDR, PMIC_LDO_VDRAM_FAST_TRAN_CL_EN_MASK, PMIC_LDO_VDRAM_FAST_TRAN_CL_EN_SHIFT},
    1668. 

  1668. 	{PMIC_LDO_VDRAM_FAST_TRAN_CL_CTRL, PMIC_LDO_VDRAM_FAST_TRAN_CL_CTRL_ADDR, PMIC_LDO_VDRAM_FAST_TRAN_CL_CTRL_MASK, PMIC_LDO_VDRAM_FAST_TRAN_CL_CTRL_SHIFT},
    1669. 

  1669. 	{PMIC_LDO_VDRAM_FAST_TRAN_CL_SRCLKEN_SEL, PMIC_LDO_VDRAM_FAST_TRAN_CL_SRCLKEN_SEL_ADDR, PMIC_LDO_VDRAM_FAST_TRAN_CL_SRCLKEN_SEL_MASK, PMIC_LDO_VDRAM_FAST_TRAN_CL_SRCLKEN_SEL_SHIFT},
    1670. 

  1670. 	{PMIC_DA_QI_VDRAM_FAST_TRAN_CL_EN, PMIC_DA_QI_VDRAM_FAST_TRAN_CL_EN_ADDR, PMIC_DA_QI_VDRAM_FAST_TRAN_CL_EN_MASK, PMIC_DA_QI_VDRAM_FAST_TRAN_CL_EN_SHIFT},
    1671. 

  1671. 	{PMIC_LDO_VSIM1_LP_MODE, PMIC_LDO_VSIM1_LP_MODE_ADDR, PMIC_LDO_VSIM1_LP_MODE_MASK, PMIC_LDO_VSIM1_LP_MODE_SHIFT},
    1672. 

  1672. 	{PMIC_LDO_VSIM1_EN, PMIC_LDO_VSIM1_EN_ADDR, PMIC_LDO_VSIM1_EN_MASK, PMIC_LDO_VSIM1_EN_SHIFT},
    1673. 

  1673. 	{PMIC_LDO_VSIM1_LP_CTRL, PMIC_LDO_VSIM1_LP_CTRL_ADDR, PMIC_LDO_VSIM1_LP_CTRL_MASK, PMIC_LDO_VSIM1_LP_CTRL_SHIFT},
    1674. 

  1674. 	{PMIC_LDO_VSIM1_LP_SEL, PMIC_LDO_VSIM1_LP_SEL_ADDR, PMIC_LDO_VSIM1_LP_SEL_MASK, PMIC_LDO_VSIM1_LP_SEL_SHIFT},
    1675. 

  1675. 	{PMIC_DA_QI_VSIM1_MODE, PMIC_DA_QI_VSIM1_MODE_ADDR, PMIC_DA_QI_VSIM1_MODE_MASK, PMIC_DA_QI_VSIM1_MODE_SHIFT},
    1676. 

  1676. 	{PMIC_LDO_VSIM1_STBTD, PMIC_LDO_VSIM1_STBTD_ADDR, PMIC_LDO_VSIM1_STBTD_MASK, PMIC_LDO_VSIM1_STBTD_SHIFT},
    1677. 

  1677. 	{PMIC_DA_QI_VSIM1_STB, PMIC_DA_QI_VSIM1_STB_ADDR, PMIC_DA_QI_VSIM1_STB_MASK, PMIC_DA_QI_VSIM1_STB_SHIFT},
    1678. 

  1678. 	{PMIC_DA_QI_VSIM1_EN, PMIC_DA_QI_VSIM1_EN_ADDR, PMIC_DA_QI_VSIM1_EN_MASK, PMIC_DA_QI_VSIM1_EN_SHIFT},
    1679. 

  1679. 	{PMIC_LDO_VSIM1_OCFB_EN, PMIC_LDO_VSIM1_OCFB_EN_ADDR, PMIC_LDO_VSIM1_OCFB_EN_MASK, PMIC_LDO_VSIM1_OCFB_EN_SHIFT},
    1680. 

  1680. 	{PMIC_DA_QI_VSIM1_OCFB_EN, PMIC_DA_QI_VSIM1_OCFB_EN_ADDR, PMIC_DA_QI_VSIM1_OCFB_EN_MASK, PMIC_DA_QI_VSIM1_OCFB_EN_SHIFT},
    1681. 

  1681. 	{PMIC_LDO_VSIM2_LP_MODE, PMIC_LDO_VSIM2_LP_MODE_ADDR, PMIC_LDO_VSIM2_LP_MODE_MASK, PMIC_LDO_VSIM2_LP_MODE_SHIFT},
    1682. 

  1682. 	{PMIC_LDO_VSIM2_EN, PMIC_LDO_VSIM2_EN_ADDR, PMIC_LDO_VSIM2_EN_MASK, PMIC_LDO_VSIM2_EN_SHIFT},
    1683. 

  1683. 	{PMIC_LDO_VSIM2_LP_CTRL, PMIC_LDO_VSIM2_LP_CTRL_ADDR, PMIC_LDO_VSIM2_LP_CTRL_MASK, PMIC_LDO_VSIM2_LP_CTRL_SHIFT},
    1684. 

  1684. 	{PMIC_LDO_VSIM2_LP_SEL, PMIC_LDO_VSIM2_LP_SEL_ADDR, PMIC_LDO_VSIM2_LP_SEL_MASK, PMIC_LDO_VSIM2_LP_SEL_SHIFT},
    1685. 

  1685. 	{PMIC_DA_QI_VSIM2_MODE, PMIC_DA_QI_VSIM2_MODE_ADDR, PMIC_DA_QI_VSIM2_MODE_MASK, PMIC_DA_QI_VSIM2_MODE_SHIFT},
    1686. 

  1686. 	{PMIC_LDO_VSIM2_STBTD, PMIC_LDO_VSIM2_STBTD_ADDR, PMIC_LDO_VSIM2_STBTD_MASK, PMIC_LDO_VSIM2_STBTD_SHIFT},
    1687. 

  1687. 	{PMIC_DA_QI_VSIM2_STB, PMIC_DA_QI_VSIM2_STB_ADDR, PMIC_DA_QI_VSIM2_STB_MASK, PMIC_DA_QI_VSIM2_STB_SHIFT},
    1688. 

  1688. 	{PMIC_DA_QI_VSIM2_EN, PMIC_DA_QI_VSIM2_EN_ADDR, PMIC_DA_QI_VSIM2_EN_MASK, PMIC_DA_QI_VSIM2_EN_SHIFT},
    1689. 

  1689. 	{PMIC_LDO_VSIM2_OCFB_EN, PMIC_LDO_VSIM2_OCFB_EN_ADDR, PMIC_LDO_VSIM2_OCFB_EN_MASK, PMIC_LDO_VSIM2_OCFB_EN_SHIFT},
    1690. 

  1690. 	{PMIC_DA_QI_VSIM2_OCFB_EN, PMIC_DA_QI_VSIM2_OCFB_EN_ADDR, PMIC_DA_QI_VSIM2_OCFB_EN_MASK, PMIC_DA_QI_VSIM2_OCFB_EN_SHIFT},
    1691. 

  1691. 	{PMIC_LDO_VIO28_LP_MODE, PMIC_LDO_VIO28_LP_MODE_ADDR, PMIC_LDO_VIO28_LP_MODE_MASK, PMIC_LDO_VIO28_LP_MODE_SHIFT},
    1692. 

  1692. 	{PMIC_LDO_VIO28_EN, PMIC_LDO_VIO28_EN_ADDR, PMIC_LDO_VIO28_EN_MASK, PMIC_LDO_VIO28_EN_SHIFT},
    1693. 

  1693. 	{PMIC_LDO_VIO28_LP_CTRL, PMIC_LDO_VIO28_LP_CTRL_ADDR, PMIC_LDO_VIO28_LP_CTRL_MASK, PMIC_LDO_VIO28_LP_CTRL_SHIFT},
    1694. 

  1694. 	{PMIC_LDO_VIO28_LP_SEL, PMIC_LDO_VIO28_LP_SEL_ADDR, PMIC_LDO_VIO28_LP_SEL_MASK, PMIC_LDO_VIO28_LP_SEL_SHIFT},
    1695. 

  1695. 	{PMIC_DA_QI_VIO28_MODE, PMIC_DA_QI_VIO28_MODE_ADDR, PMIC_DA_QI_VIO28_MODE_MASK, PMIC_DA_QI_VIO28_MODE_SHIFT},
    1696. 

  1696. 	{PMIC_LDO_VIO28_STBTD, PMIC_LDO_VIO28_STBTD_ADDR, PMIC_LDO_VIO28_STBTD_MASK, PMIC_LDO_VIO28_STBTD_SHIFT},
    1697. 

  1697. 	{PMIC_DA_QI_VIO28_STB, PMIC_DA_QI_VIO28_STB_ADDR, PMIC_DA_QI_VIO28_STB_MASK, PMIC_DA_QI_VIO28_STB_SHIFT},
    1698. 

  1698. 	{PMIC_DA_QI_VIO28_EN, PMIC_DA_QI_VIO28_EN_ADDR, PMIC_DA_QI_VIO28_EN_MASK, PMIC_DA_QI_VIO28_EN_SHIFT},
    1699. 

  1699. 	{PMIC_LDO_VIO28_OCFB_EN, PMIC_LDO_VIO28_OCFB_EN_ADDR, PMIC_LDO_VIO28_OCFB_EN_MASK, PMIC_LDO_VIO28_OCFB_EN_SHIFT},
    1700. 

  1700. 	{PMIC_DA_QI_VIO28_OCFB_EN, PMIC_DA_QI_VIO28_OCFB_EN_ADDR, PMIC_DA_QI_VIO28_OCFB_EN_MASK, PMIC_DA_QI_VIO28_OCFB_EN_SHIFT},
    1701. 

  1701. 	{PMIC_LDO_VMC_LP_MODE, PMIC_LDO_VMC_LP_MODE_ADDR, PMIC_LDO_VMC_LP_MODE_MASK, PMIC_LDO_VMC_LP_MODE_SHIFT},
    1702. 

  1702. 	{PMIC_LDO_VMC_EN, PMIC_LDO_VMC_EN_ADDR, PMIC_LDO_VMC_EN_MASK, PMIC_LDO_VMC_EN_SHIFT},
    1703. 

  1703. 	{PMIC_LDO_VMC_LP_CTRL, PMIC_LDO_VMC_LP_CTRL_ADDR, PMIC_LDO_VMC_LP_CTRL_MASK, PMIC_LDO_VMC_LP_CTRL_SHIFT},
    1704. 

  1704. 	{PMIC_LDO_VMC_LP_SEL, PMIC_LDO_VMC_LP_SEL_ADDR, PMIC_LDO_VMC_LP_SEL_MASK, PMIC_LDO_VMC_LP_SEL_SHIFT},
    1705. 

  1705. 	{PMIC_DA_QI_VMC_MODE, PMIC_DA_QI_VMC_MODE_ADDR, PMIC_DA_QI_VMC_MODE_MASK, PMIC_DA_QI_VMC_MODE_SHIFT},
    1706. 

  1706. 	{PMIC_LDO_VMC_STBTD, PMIC_LDO_VMC_STBTD_ADDR, PMIC_LDO_VMC_STBTD_MASK, PMIC_LDO_VMC_STBTD_SHIFT},
    1707. 

  1707. 	{PMIC_DA_QI_VMC_STB, PMIC_DA_QI_VMC_STB_ADDR, PMIC_DA_QI_VMC_STB_MASK, PMIC_DA_QI_VMC_STB_SHIFT},
    1708. 

  1708. 	{PMIC_DA_QI_VMC_EN, PMIC_DA_QI_VMC_EN_ADDR, PMIC_DA_QI_VMC_EN_MASK, PMIC_DA_QI_VMC_EN_SHIFT},
    1709. 

  1709. 	{PMIC_LDO_VMC_OCFB_EN, PMIC_LDO_VMC_OCFB_EN_ADDR, PMIC_LDO_VMC_OCFB_EN_MASK, PMIC_LDO_VMC_OCFB_EN_SHIFT},
    1710. 

  1710. 	{PMIC_DA_QI_VMC_OCFB_EN, PMIC_DA_QI_VMC_OCFB_EN_ADDR, PMIC_DA_QI_VMC_OCFB_EN_MASK, PMIC_DA_QI_VMC_OCFB_EN_SHIFT},
    1711. 

  1711. 	{PMIC_LDO_VMC_FAST_TRAN_DL_EN, PMIC_LDO_VMC_FAST_TRAN_DL_EN_ADDR, PMIC_LDO_VMC_FAST_TRAN_DL_EN_MASK, PMIC_LDO_VMC_FAST_TRAN_DL_EN_SHIFT},
    1712. 

  1712. 	{PMIC_LDO_VMC_FAST_TRAN_DL_CTRL, PMIC_LDO_VMC_FAST_TRAN_DL_CTRL_ADDR, PMIC_LDO_VMC_FAST_TRAN_DL_CTRL_MASK, PMIC_LDO_VMC_FAST_TRAN_DL_CTRL_SHIFT},
    1713. 

  1713. 	{PMIC_LDO_VMC_FAST_TRAN_DL_SRCLKEN_SEL, PMIC_LDO_VMC_FAST_TRAN_DL_SRCLKEN_SEL_ADDR, PMIC_LDO_VMC_FAST_TRAN_DL_SRCLKEN_SEL_MASK, PMIC_LDO_VMC_FAST_TRAN_DL_SRCLKEN_SEL_SHIFT},
    1714. 

  1714. 	{PMIC_DA_QI_VMC_FAST_TRAN_DL_EN, PMIC_DA_QI_VMC_FAST_TRAN_DL_EN_ADDR, PMIC_DA_QI_VMC_FAST_TRAN_DL_EN_MASK, PMIC_DA_QI_VMC_FAST_TRAN_DL_EN_SHIFT},
    1715. 

  1715. 	{PMIC_LDO_VMC_FAST_TRAN_CL_EN, PMIC_LDO_VMC_FAST_TRAN_CL_EN_ADDR, PMIC_LDO_VMC_FAST_TRAN_CL_EN_MASK, PMIC_LDO_VMC_FAST_TRAN_CL_EN_SHIFT},
    1716. 

  1716. 	{PMIC_LDO_VMC_FAST_TRAN_CL_CTRL, PMIC_LDO_VMC_FAST_TRAN_CL_CTRL_ADDR, PMIC_LDO_VMC_FAST_TRAN_CL_CTRL_MASK, PMIC_LDO_VMC_FAST_TRAN_CL_CTRL_SHIFT},
    1717. 

  1717. 	{PMIC_LDO_VMC_FAST_TRAN_CL_SRCLKEN_SEL, PMIC_LDO_VMC_FAST_TRAN_CL_SRCLKEN_SEL_ADDR, PMIC_LDO_VMC_FAST_TRAN_CL_SRCLKEN_SEL_MASK, PMIC_LDO_VMC_FAST_TRAN_CL_SRCLKEN_SEL_SHIFT},
    1718. 

  1718. 	{PMIC_DA_QI_VMC_FAST_TRAN_CL_EN, PMIC_DA_QI_VMC_FAST_TRAN_CL_EN_ADDR, PMIC_DA_QI_VMC_FAST_TRAN_CL_EN_MASK, PMIC_DA_QI_VMC_FAST_TRAN_CL_EN_SHIFT},
    1719. 

  1719. 	{PMIC_LDO_VMCH_LP_MODE, PMIC_LDO_VMCH_LP_MODE_ADDR, PMIC_LDO_VMCH_LP_MODE_MASK, PMIC_LDO_VMCH_LP_MODE_SHIFT},
    1720. 

  1720. 	{PMIC_LDO_VMCH_EN, PMIC_LDO_VMCH_EN_ADDR, PMIC_LDO_VMCH_EN_MASK, PMIC_LDO_VMCH_EN_SHIFT},
    1721. 

  1721. 	{PMIC_LDO_VMCH_LP_CTRL, PMIC_LDO_VMCH_LP_CTRL_ADDR, PMIC_LDO_VMCH_LP_CTRL_MASK, PMIC_LDO_VMCH_LP_CTRL_SHIFT},
    1722. 

  1722. 	{PMIC_LDO_VMCH_LP_SEL, PMIC_LDO_VMCH_LP_SEL_ADDR, PMIC_LDO_VMCH_LP_SEL_MASK, PMIC_LDO_VMCH_LP_SEL_SHIFT},
    1723. 

  1723. 	{PMIC_DA_QI_VMCH_MODE, PMIC_DA_QI_VMCH_MODE_ADDR, PMIC_DA_QI_VMCH_MODE_MASK, PMIC_DA_QI_VMCH_MODE_SHIFT},
    1724. 

  1724. 	{PMIC_LDO_VMCH_STBTD, PMIC_LDO_VMCH_STBTD_ADDR, PMIC_LDO_VMCH_STBTD_MASK, PMIC_LDO_VMCH_STBTD_SHIFT},
    1725. 

  1725. 	{PMIC_DA_QI_VMCH_STB, PMIC_DA_QI_VMCH_STB_ADDR, PMIC_DA_QI_VMCH_STB_MASK, PMIC_DA_QI_VMCH_STB_SHIFT},
    1726. 

  1726. 	{PMIC_DA_QI_VMCH_EN, PMIC_DA_QI_VMCH_EN_ADDR, PMIC_DA_QI_VMCH_EN_MASK, PMIC_DA_QI_VMCH_EN_SHIFT},
    1727. 

  1727. 	{PMIC_LDO_VMCH_OCFB_EN, PMIC_LDO_VMCH_OCFB_EN_ADDR, PMIC_LDO_VMCH_OCFB_EN_MASK, PMIC_LDO_VMCH_OCFB_EN_SHIFT},
    1728. 

  1728. 	{PMIC_DA_QI_VMCH_OCFB_EN, PMIC_DA_QI_VMCH_OCFB_EN_ADDR, PMIC_DA_QI_VMCH_OCFB_EN_MASK, PMIC_DA_QI_VMCH_OCFB_EN_SHIFT},
    1729. 

  1729. 	{PMIC_LDO_VMCH_FAST_TRAN_DL_EN, PMIC_LDO_VMCH_FAST_TRAN_DL_EN_ADDR, PMIC_LDO_VMCH_FAST_TRAN_DL_EN_MASK, PMIC_LDO_VMCH_FAST_TRAN_DL_EN_SHIFT},
    1730. 

  1730. 	{PMIC_LDO_VMCH_FAST_TRAN_DL_CTRL, PMIC_LDO_VMCH_FAST_TRAN_DL_CTRL_ADDR, PMIC_LDO_VMCH_FAST_TRAN_DL_CTRL_MASK, PMIC_LDO_VMCH_FAST_TRAN_DL_CTRL_SHIFT},
    1731. 

  1731. 	{PMIC_LDO_VMCH_FAST_TRAN_DL_SRCLKEN_SEL, PMIC_LDO_VMCH_FAST_TRAN_DL_SRCLKEN_SEL_ADDR, PMIC_LDO_VMCH_FAST_TRAN_DL_SRCLKEN_SEL_MASK, PMIC_LDO_VMCH_FAST_TRAN_DL_SRCLKEN_SEL_SHIFT},
    1732. 

  1732. 	{PMIC_DA_QI_VMCH_FAST_TRAN_DL_EN, PMIC_DA_QI_VMCH_FAST_TRAN_DL_EN_ADDR, PMIC_DA_QI_VMCH_FAST_TRAN_DL_EN_MASK, PMIC_DA_QI_VMCH_FAST_TRAN_DL_EN_SHIFT},
    1733. 

  1733. 	{PMIC_LDO_VMCH_FAST_TRAN_CL_EN, PMIC_LDO_VMCH_FAST_TRAN_CL_EN_ADDR, PMIC_LDO_VMCH_FAST_TRAN_CL_EN_MASK, PMIC_LDO_VMCH_FAST_TRAN_CL_EN_SHIFT},
    1734. 

  1734. 	{PMIC_LDO_VMCH_FAST_TRAN_CL_CTRL, PMIC_LDO_VMCH_FAST_TRAN_CL_CTRL_ADDR, PMIC_LDO_VMCH_FAST_TRAN_CL_CTRL_MASK, PMIC_LDO_VMCH_FAST_TRAN_CL_CTRL_SHIFT},
    1735. 

  1735. 	{PMIC_LDO_VMCH_FAST_TRAN_CL_SRCLKEN_SEL, PMIC_LDO_VMCH_FAST_TRAN_CL_SRCLKEN_SEL_ADDR, PMIC_LDO_VMCH_FAST_TRAN_CL_SRCLKEN_SEL_MASK, PMIC_LDO_VMCH_FAST_TRAN_CL_SRCLKEN_SEL_SHIFT},
    1736. 

  1736. 	{PMIC_DA_QI_VMCH_FAST_TRAN_CL_EN, PMIC_DA_QI_VMCH_FAST_TRAN_CL_EN_ADDR, PMIC_DA_QI_VMCH_FAST_TRAN_CL_EN_MASK, PMIC_DA_QI_VMCH_FAST_TRAN_CL_EN_SHIFT},
    1737. 

  1737. 	{PMIC_LDO_VUSB33_LP_MODE, PMIC_LDO_VUSB33_LP_MODE_ADDR, PMIC_LDO_VUSB33_LP_MODE_MASK, PMIC_LDO_VUSB33_LP_MODE_SHIFT},
    1738. 

  1738. 	{PMIC_LDO_VUSB33_EN, PMIC_LDO_VUSB33_EN_ADDR, PMIC_LDO_VUSB33_EN_MASK, PMIC_LDO_VUSB33_EN_SHIFT},
    1739. 

  1739. 	{PMIC_LDO_VUSB33_LP_CTRL, PMIC_LDO_VUSB33_LP_CTRL_ADDR, PMIC_LDO_VUSB33_LP_CTRL_MASK, PMIC_LDO_VUSB33_LP_CTRL_SHIFT},
    1740. 

  1740. 	{PMIC_LDO_VUSB33_LP_SEL, PMIC_LDO_VUSB33_LP_SEL_ADDR, PMIC_LDO_VUSB33_LP_SEL_MASK, PMIC_LDO_VUSB33_LP_SEL_SHIFT},
    1741. 

  1741. 	{PMIC_DA_QI_VUSB33_MODE, PMIC_DA_QI_VUSB33_MODE_ADDR, PMIC_DA_QI_VUSB33_MODE_MASK, PMIC_DA_QI_VUSB33_MODE_SHIFT},
    1742. 

  1742. 	{PMIC_LDO_VUSB33_STBTD, PMIC_LDO_VUSB33_STBTD_ADDR, PMIC_LDO_VUSB33_STBTD_MASK, PMIC_LDO_VUSB33_STBTD_SHIFT},
    1743. 

  1743. 	{PMIC_DA_QI_VUSB33_STB, PMIC_DA_QI_VUSB33_STB_ADDR, PMIC_DA_QI_VUSB33_STB_MASK, PMIC_DA_QI_VUSB33_STB_SHIFT},
    1744. 

  1744. 	{PMIC_DA_QI_VUSB33_EN, PMIC_DA_QI_VUSB33_EN_ADDR, PMIC_DA_QI_VUSB33_EN_MASK, PMIC_DA_QI_VUSB33_EN_SHIFT},
    1745. 

  1745. 	{PMIC_LDO_VUSB33_OCFB_EN, PMIC_LDO_VUSB33_OCFB_EN_ADDR, PMIC_LDO_VUSB33_OCFB_EN_MASK, PMIC_LDO_VUSB33_OCFB_EN_SHIFT},
    1746. 

  1746. 	{PMIC_DA_QI_VUSB33_OCFB_EN, PMIC_DA_QI_VUSB33_OCFB_EN_ADDR, PMIC_DA_QI_VUSB33_OCFB_EN_MASK, PMIC_DA_QI_VUSB33_OCFB_EN_SHIFT},
    1747. 

  1747. 	{PMIC_LDO_VEMC33_LP_MODE, PMIC_LDO_VEMC33_LP_MODE_ADDR, PMIC_LDO_VEMC33_LP_MODE_MASK, PMIC_LDO_VEMC33_LP_MODE_SHIFT},
    1748. 

  1748. 	{PMIC_LDO_VEMC33_EN, PMIC_LDO_VEMC33_EN_ADDR, PMIC_LDO_VEMC33_EN_MASK, PMIC_LDO_VEMC33_EN_SHIFT},
    1749. 

  1749. 	{PMIC_LDO_VEMC33_LP_CTRL, PMIC_LDO_VEMC33_LP_CTRL_ADDR, PMIC_LDO_VEMC33_LP_CTRL_MASK, PMIC_LDO_VEMC33_LP_CTRL_SHIFT},
    1750. 

  1750. 	{PMIC_LDO_VEMC33_LP_SEL, PMIC_LDO_VEMC33_LP_SEL_ADDR, PMIC_LDO_VEMC33_LP_SEL_MASK, PMIC_LDO_VEMC33_LP_SEL_SHIFT},
    1751. 

  1751. 	{PMIC_DA_QI_VEMC33_MODE, PMIC_DA_QI_VEMC33_MODE_ADDR, PMIC_DA_QI_VEMC33_MODE_MASK, PMIC_DA_QI_VEMC33_MODE_SHIFT},
    1752. 

  1752. 	{PMIC_LDO_VEMC33_STBTD, PMIC_LDO_VEMC33_STBTD_ADDR, PMIC_LDO_VEMC33_STBTD_MASK, PMIC_LDO_VEMC33_STBTD_SHIFT},
    1753. 

  1753. 	{PMIC_DA_QI_VEMC33_STB, PMIC_DA_QI_VEMC33_STB_ADDR, PMIC_DA_QI_VEMC33_STB_MASK, PMIC_DA_QI_VEMC33_STB_SHIFT},
    1754. 

  1754. 	{PMIC_DA_QI_VEMC33_EN, PMIC_DA_QI_VEMC33_EN_ADDR, PMIC_DA_QI_VEMC33_EN_MASK, PMIC_DA_QI_VEMC33_EN_SHIFT},
    1755. 

  1755. 	{PMIC_LDO_VEMC33_OCFB_EN, PMIC_LDO_VEMC33_OCFB_EN_ADDR, PMIC_LDO_VEMC33_OCFB_EN_MASK, PMIC_LDO_VEMC33_OCFB_EN_SHIFT},
    1756. 

  1756. 	{PMIC_DA_QI_VEMC33_OCFB_EN, PMIC_DA_QI_VEMC33_OCFB_EN_ADDR, PMIC_DA_QI_VEMC33_OCFB_EN_MASK, PMIC_DA_QI_VEMC33_OCFB_EN_SHIFT},
    1757. 

  1757. 	{PMIC_LDO_VEMC33_FAST_TRAN_DL_EN, PMIC_LDO_VEMC33_FAST_TRAN_DL_EN_ADDR, PMIC_LDO_VEMC33_FAST_TRAN_DL_EN_MASK, PMIC_LDO_VEMC33_FAST_TRAN_DL_EN_SHIFT},
    1758. 

  1758. 	{PMIC_LDO_VEMC33_FAST_TRAN_DL_CTRL, PMIC_LDO_VEMC33_FAST_TRAN_DL_CTRL_ADDR, PMIC_LDO_VEMC33_FAST_TRAN_DL_CTRL_MASK, PMIC_LDO_VEMC33_FAST_TRAN_DL_CTRL_SHIFT},
    1759. 

  1759. 	{PMIC_LDO_VEMC33_FAST_TRAN_DL_SRCLKEN_SEL, PMIC_LDO_VEMC33_FAST_TRAN_DL_SRCLKEN_SEL_ADDR, PMIC_LDO_VEMC33_FAST_TRAN_DL_SRCLKEN_SEL_MASK, PMIC_LDO_VEMC33_FAST_TRAN_DL_SRCLKEN_SEL_SHIFT},
    1760. 

  1760. 	{PMIC_DA_QI_VEMC33_FAST_TRAN_DL_EN, PMIC_DA_QI_VEMC33_FAST_TRAN_DL_EN_ADDR, PMIC_DA_QI_VEMC33_FAST_TRAN_DL_EN_MASK, PMIC_DA_QI_VEMC33_FAST_TRAN_DL_EN_SHIFT},
    1761. 

  1761. 	{PMIC_LDO_VEMC33_FAST_TRAN_CL_EN, PMIC_LDO_VEMC33_FAST_TRAN_CL_EN_ADDR, PMIC_LDO_VEMC33_FAST_TRAN_CL_EN_MASK, PMIC_LDO_VEMC33_FAST_TRAN_CL_EN_SHIFT},
    1762. 

  1762. 	{PMIC_LDO_VEMC33_FAST_TRAN_CL_CTRL, PMIC_LDO_VEMC33_FAST_TRAN_CL_CTRL_ADDR, PMIC_LDO_VEMC33_FAST_TRAN_CL_CTRL_MASK, PMIC_LDO_VEMC33_FAST_TRAN_CL_CTRL_SHIFT},
    1763. 

  1763. 	{PMIC_LDO_VEMC33_FAST_TRAN_CL_SRCLKEN_SEL, PMIC_LDO_VEMC33_FAST_TRAN_CL_SRCLKEN_SEL_ADDR, PMIC_LDO_VEMC33_FAST_TRAN_CL_SRCLKEN_SEL_MASK, PMIC_LDO_VEMC33_FAST_TRAN_CL_SRCLKEN_SEL_SHIFT},
    1764. 

  1764. 	{PMIC_DA_QI_VEMC33_FAST_TRAN_CL_EN, PMIC_DA_QI_VEMC33_FAST_TRAN_CL_EN_ADDR, PMIC_DA_QI_VEMC33_FAST_TRAN_CL_EN_MASK, PMIC_DA_QI_VEMC33_FAST_TRAN_CL_EN_SHIFT},
    1765. 

  1765. 	{PMIC_LDO_VIO18_LP_MODE, PMIC_LDO_VIO18_LP_MODE_ADDR, PMIC_LDO_VIO18_LP_MODE_MASK, PMIC_LDO_VIO18_LP_MODE_SHIFT},
    1766. 

  1766. 	{PMIC_LDO_VIO18_EN, PMIC_LDO_VIO18_EN_ADDR, PMIC_LDO_VIO18_EN_MASK, PMIC_LDO_VIO18_EN_SHIFT},
    1767. 

  1767. 	{PMIC_LDO_VIO18_LP_CTRL, PMIC_LDO_VIO18_LP_CTRL_ADDR, PMIC_LDO_VIO18_LP_CTRL_MASK, PMIC_LDO_VIO18_LP_CTRL_SHIFT},
    1768. 

  1768. 	{PMIC_LDO_VIO18_LP_SEL, PMIC_LDO_VIO18_LP_SEL_ADDR, PMIC_LDO_VIO18_LP_SEL_MASK, PMIC_LDO_VIO18_LP_SEL_SHIFT},
    1769. 

  1769. 	{PMIC_DA_QI_VIO18_MODE, PMIC_DA_QI_VIO18_MODE_ADDR, PMIC_DA_QI_VIO18_MODE_MASK, PMIC_DA_QI_VIO18_MODE_SHIFT},
    1770. 

  1770. 	{PMIC_LDO_VIO18_STBTD, PMIC_LDO_VIO18_STBTD_ADDR, PMIC_LDO_VIO18_STBTD_MASK, PMIC_LDO_VIO18_STBTD_SHIFT},
    1771. 

  1771. 	{PMIC_DA_QI_VIO18_STB, PMIC_DA_QI_VIO18_STB_ADDR, PMIC_DA_QI_VIO18_STB_MASK, PMIC_DA_QI_VIO18_STB_SHIFT},
    1772. 

  1772. 	{PMIC_DA_QI_VIO18_EN, PMIC_DA_QI_VIO18_EN_ADDR, PMIC_DA_QI_VIO18_EN_MASK, PMIC_DA_QI_VIO18_EN_SHIFT},
    1773. 

  1773. 	{PMIC_LDO_VIO18_OCFB_EN, PMIC_LDO_VIO18_OCFB_EN_ADDR, PMIC_LDO_VIO18_OCFB_EN_MASK, PMIC_LDO_VIO18_OCFB_EN_SHIFT},
    1774. 

  1774. 	{PMIC_DA_QI_VIO18_OCFB_EN, PMIC_DA_QI_VIO18_OCFB_EN_ADDR, PMIC_DA_QI_VIO18_OCFB_EN_MASK, PMIC_DA_QI_VIO18_OCFB_EN_SHIFT},
    1775. 

  1775. 	{PMIC_LDO_VIBR_LP_MODE, PMIC_LDO_VIBR_LP_MODE_ADDR, PMIC_LDO_VIBR_LP_MODE_MASK, PMIC_LDO_VIBR_LP_MODE_SHIFT},
    1776. 

  1776. 	{PMIC_LDO_VIBR_EN, PMIC_LDO_VIBR_EN_ADDR, PMIC_LDO_VIBR_EN_MASK, PMIC_LDO_VIBR_EN_SHIFT},
    1777. 

  1777. 	{PMIC_DA_QI_VIBR_MODE, PMIC_DA_QI_VIBR_MODE_ADDR, PMIC_DA_QI_VIBR_MODE_MASK, PMIC_DA_QI_VIBR_MODE_SHIFT},
    1778. 

  1778. 	{PMIC_LDO_VIBR_STBTD, PMIC_LDO_VIBR_STBTD_ADDR, PMIC_LDO_VIBR_STBTD_MASK, PMIC_LDO_VIBR_STBTD_SHIFT},
    1779. 

  1779. 	{PMIC_DA_QI_VIBR_STB, PMIC_DA_QI_VIBR_STB_ADDR, PMIC_DA_QI_VIBR_STB_MASK, PMIC_DA_QI_VIBR_STB_SHIFT},
    1780. 

  1780. 	{PMIC_DA_QI_VIBR_EN, PMIC_DA_QI_VIBR_EN_ADDR, PMIC_DA_QI_VIBR_EN_MASK, PMIC_DA_QI_VIBR_EN_SHIFT},
    1781. 

  1781. 	{PMIC_LDO_VIBR_OCFB_EN, PMIC_LDO_VIBR_OCFB_EN_ADDR, PMIC_LDO_VIBR_OCFB_EN_MASK, PMIC_LDO_VIBR_OCFB_EN_SHIFT},
    1782. 

  1782. 	{PMIC_DA_QI_VIBR_OCFB_EN, PMIC_DA_QI_VIBR_OCFB_EN_ADDR, PMIC_DA_QI_VIBR_OCFB_EN_MASK, PMIC_DA_QI_VIBR_OCFB_EN_SHIFT},
    1783. 

  1783. 	{PMIC_RG_VTCXO28_CAL, PMIC_RG_VTCXO28_CAL_ADDR, PMIC_RG_VTCXO28_CAL_MASK, PMIC_RG_VTCXO28_CAL_SHIFT},
    1784. 

  1784. 	{PMIC_RG_VTCXO28_VOSEL, PMIC_RG_VTCXO28_VOSEL_ADDR, PMIC_RG_VTCXO28_VOSEL_MASK, PMIC_RG_VTCXO28_VOSEL_SHIFT},
    1785. 

  1785. 	{PMIC_RG_VTCXO28_NDIS_EN, PMIC_RG_VTCXO28_NDIS_EN_ADDR, PMIC_RG_VTCXO28_NDIS_EN_MASK, PMIC_RG_VTCXO28_NDIS_EN_SHIFT},
    1786. 

  1786. 	{PMIC_RG_VAUD28_CAL, PMIC_RG_VAUD28_CAL_ADDR, PMIC_RG_VAUD28_CAL_MASK, PMIC_RG_VAUD28_CAL_SHIFT},
    1787. 

  1787. 	{PMIC_RG_VAUD28_VOSEL, PMIC_RG_VAUD28_VOSEL_ADDR, PMIC_RG_VAUD28_VOSEL_MASK, PMIC_RG_VAUD28_VOSEL_SHIFT},
    1788. 

  1788. 	{PMIC_RG_VAUD28_NDIS_EN, PMIC_RG_VAUD28_NDIS_EN_ADDR, PMIC_RG_VAUD28_NDIS_EN_MASK, PMIC_RG_VAUD28_NDIS_EN_SHIFT},
    1789. 

  1789. 	{PMIC_RG_VCN28_CAL, PMIC_RG_VCN28_CAL_ADDR, PMIC_RG_VCN28_CAL_MASK, PMIC_RG_VCN28_CAL_SHIFT},
    1790. 

  1790. 	{PMIC_RG_VCN28_VOSEL, PMIC_RG_VCN28_VOSEL_ADDR, PMIC_RG_VCN28_VOSEL_MASK, PMIC_RG_VCN28_VOSEL_SHIFT},
    1791. 

  1791. 	{PMIC_RG_VCN28_NDIS_EN, PMIC_RG_VCN28_NDIS_EN_ADDR, PMIC_RG_VCN28_NDIS_EN_MASK, PMIC_RG_VCN28_NDIS_EN_SHIFT},
    1792. 

  1792. 	{PMIC_RG_VAUX18_CAL, PMIC_RG_VAUX18_CAL_ADDR, PMIC_RG_VAUX18_CAL_MASK, PMIC_RG_VAUX18_CAL_SHIFT},
    1793. 

  1793. 	{PMIC_RG_VAUX18_VOSEL, PMIC_RG_VAUX18_VOSEL_ADDR, PMIC_RG_VAUX18_VOSEL_MASK, PMIC_RG_VAUX18_VOSEL_SHIFT},
    1794. 

  1794. 	{PMIC_RG_VAUX18_NDIS_EN, PMIC_RG_VAUX18_NDIS_EN_ADDR, PMIC_RG_VAUX18_NDIS_EN_MASK, PMIC_RG_VAUX18_NDIS_EN_SHIFT},
    1795. 

  1795. 	{PMIC_RG_VCAMA_CAL, PMIC_RG_VCAMA_CAL_ADDR, PMIC_RG_VCAMA_CAL_MASK, PMIC_RG_VCAMA_CAL_SHIFT},
    1796. 

  1796. 	{PMIC_RG_VCAMA_VOSEL, PMIC_RG_VCAMA_VOSEL_ADDR, PMIC_RG_VCAMA_VOSEL_MASK, PMIC_RG_VCAMA_VOSEL_SHIFT},
    1797. 

  1797. 	{PMIC_RG_VCAMA_NDIS_EN, PMIC_RG_VCAMA_NDIS_EN_ADDR, PMIC_RG_VCAMA_NDIS_EN_MASK, PMIC_RG_VCAMA_NDIS_EN_SHIFT},
    1798. 

  1798. 	{PMIC_RG_ALDO_RSV_H, PMIC_RG_ALDO_RSV_H_ADDR, PMIC_RG_ALDO_RSV_H_MASK, PMIC_RG_ALDO_RSV_H_SHIFT},
    1799. 

  1799. 	{PMIC_RG_ALDO_RSV_L, PMIC_RG_ALDO_RSV_L_ADDR, PMIC_RG_ALDO_RSV_L_MASK, PMIC_RG_ALDO_RSV_L_SHIFT},
    1800. 

  1800. 	{PMIC_RG_VXO22_CAL, PMIC_RG_VXO22_CAL_ADDR, PMIC_RG_VXO22_CAL_MASK, PMIC_RG_VXO22_CAL_SHIFT},
    1801. 

  1801. 	{PMIC_RG_VXO22_VOSEL, PMIC_RG_VXO22_VOSEL_ADDR, PMIC_RG_VXO22_VOSEL_MASK, PMIC_RG_VXO22_VOSEL_SHIFT},
    1802. 

  1802. 	{PMIC_RG_VXO22_NDIS_EN, PMIC_RG_VXO22_NDIS_EN_ADDR, PMIC_RG_VXO22_NDIS_EN_MASK, PMIC_RG_VXO22_NDIS_EN_SHIFT},
    1803. 

  1803. 	{PMIC_RG_VTCXO24_CAL, PMIC_RG_VTCXO24_CAL_ADDR, PMIC_RG_VTCXO24_CAL_MASK, PMIC_RG_VTCXO24_CAL_SHIFT},
    1804. 

  1804. 	{PMIC_RG_VTCXO24_VOSEL, PMIC_RG_VTCXO24_VOSEL_ADDR, PMIC_RG_VTCXO24_VOSEL_MASK, PMIC_RG_VTCXO24_VOSEL_SHIFT},
    1805. 

  1805. 	{PMIC_RG_VTCXO24_NDIS_EN, PMIC_RG_VTCXO24_NDIS_EN_ADDR, PMIC_RG_VTCXO24_NDIS_EN_MASK, PMIC_RG_VTCXO24_NDIS_EN_SHIFT},
    1806. 

  1806. 	{PMIC_RG_VSIM1_CAL, PMIC_RG_VSIM1_CAL_ADDR, PMIC_RG_VSIM1_CAL_MASK, PMIC_RG_VSIM1_CAL_SHIFT},
    1807. 

  1807. 	{PMIC_RG_VSIM1_VOSEL, PMIC_RG_VSIM1_VOSEL_ADDR, PMIC_RG_VSIM1_VOSEL_MASK, PMIC_RG_VSIM1_VOSEL_SHIFT},
    1808. 

  1808. 	{PMIC_RG_VSIM1_NDIS_EN, PMIC_RG_VSIM1_NDIS_EN_ADDR, PMIC_RG_VSIM1_NDIS_EN_MASK, PMIC_RG_VSIM1_NDIS_EN_SHIFT},
    1809. 

  1809. 	{PMIC_RG_VSIM2_CAL, PMIC_RG_VSIM2_CAL_ADDR, PMIC_RG_VSIM2_CAL_MASK, PMIC_RG_VSIM2_CAL_SHIFT},
    1810. 

  1810. 	{PMIC_RG_VSIM2_VOSEL, PMIC_RG_VSIM2_VOSEL_ADDR, PMIC_RG_VSIM2_VOSEL_MASK, PMIC_RG_VSIM2_VOSEL_SHIFT},
    1811. 

  1811. 	{PMIC_RG_VSIM2_NDIS_EN, PMIC_RG_VSIM2_NDIS_EN_ADDR, PMIC_RG_VSIM2_NDIS_EN_MASK, PMIC_RG_VSIM2_NDIS_EN_SHIFT},
    1812. 

  1812. 	{PMIC_RG_VCN33_CAL, PMIC_RG_VCN33_CAL_ADDR, PMIC_RG_VCN33_CAL_MASK, PMIC_RG_VCN33_CAL_SHIFT},
    1813. 

  1813. 	{PMIC_RG_VCN33_VOSEL, PMIC_RG_VCN33_VOSEL_ADDR, PMIC_RG_VCN33_VOSEL_MASK, PMIC_RG_VCN33_VOSEL_SHIFT},
    1814. 

  1814. 	{PMIC_RG_VCN33_NDIS_EN, PMIC_RG_VCN33_NDIS_EN_ADDR, PMIC_RG_VCN33_NDIS_EN_MASK, PMIC_RG_VCN33_NDIS_EN_SHIFT},
    1815. 

  1815. 	{PMIC_RG_VUSB33_CAL, PMIC_RG_VUSB33_CAL_ADDR, PMIC_RG_VUSB33_CAL_MASK, PMIC_RG_VUSB33_CAL_SHIFT},
    1816. 

  1816. 	{PMIC_RG_VUSB33_NDIS_EN, PMIC_RG_VUSB33_NDIS_EN_ADDR, PMIC_RG_VUSB33_NDIS_EN_MASK, PMIC_RG_VUSB33_NDIS_EN_SHIFT},
    1817. 

  1817. 	{PMIC_RG_VMCH_CAL, PMIC_RG_VMCH_CAL_ADDR, PMIC_RG_VMCH_CAL_MASK, PMIC_RG_VMCH_CAL_SHIFT},
    1818. 

  1818. 	{PMIC_RG_VMCH_VOSEL, PMIC_RG_VMCH_VOSEL_ADDR, PMIC_RG_VMCH_VOSEL_MASK, PMIC_RG_VMCH_VOSEL_SHIFT},
    1819. 

  1819. 	{PMIC_RG_VMCH_NDIS_EN, PMIC_RG_VMCH_NDIS_EN_ADDR, PMIC_RG_VMCH_NDIS_EN_MASK, PMIC_RG_VMCH_NDIS_EN_SHIFT},
    1820. 

  1820. 	{PMIC_RG_VMCH_OC_TRIM, PMIC_RG_VMCH_OC_TRIM_ADDR, PMIC_RG_VMCH_OC_TRIM_MASK, PMIC_RG_VMCH_OC_TRIM_SHIFT},
    1821. 

  1821. 	{PMIC_RG_VMCH_DUMMY_LOAD, PMIC_RG_VMCH_DUMMY_LOAD_ADDR, PMIC_RG_VMCH_DUMMY_LOAD_MASK, PMIC_RG_VMCH_DUMMY_LOAD_SHIFT},
    1822. 

  1822. 	{PMIC_RG_VMCH_DL_EN, PMIC_RG_VMCH_DL_EN_ADDR, PMIC_RG_VMCH_DL_EN_MASK, PMIC_RG_VMCH_DL_EN_SHIFT},
    1823. 

  1823. 	{PMIC_RG_VMCH_CL_EN, PMIC_RG_VMCH_CL_EN_ADDR, PMIC_RG_VMCH_CL_EN_MASK, PMIC_RG_VMCH_CL_EN_SHIFT},
    1824. 

  1824. 	{PMIC_RG_VMCH_STB_SEL, PMIC_RG_VMCH_STB_SEL_ADDR, PMIC_RG_VMCH_STB_SEL_MASK, PMIC_RG_VMCH_STB_SEL_SHIFT},
    1825. 

  1825. 	{PMIC_RG_VEMC33_CAL, PMIC_RG_VEMC33_CAL_ADDR, PMIC_RG_VEMC33_CAL_MASK, PMIC_RG_VEMC33_CAL_SHIFT},
    1826. 

  1826. 	{PMIC_RG_VEMC33_VOSEL, PMIC_RG_VEMC33_VOSEL_ADDR, PMIC_RG_VEMC33_VOSEL_MASK, PMIC_RG_VEMC33_VOSEL_SHIFT},
    1827. 

  1827. 	{PMIC_RG_VEMC33_NDIS_EN, PMIC_RG_VEMC33_NDIS_EN_ADDR, PMIC_RG_VEMC33_NDIS_EN_MASK, PMIC_RG_VEMC33_NDIS_EN_SHIFT},
    1828. 

  1828. 	{PMIC_RG_VEMC33_OC_TRIM, PMIC_RG_VEMC33_OC_TRIM_ADDR, PMIC_RG_VEMC33_OC_TRIM_MASK, PMIC_RG_VEMC33_OC_TRIM_SHIFT},
    1829. 

  1829. 	{PMIC_RG_VEMC33_DUMMY_LOAD, PMIC_RG_VEMC33_DUMMY_LOAD_ADDR, PMIC_RG_VEMC33_DUMMY_LOAD_MASK, PMIC_RG_VEMC33_DUMMY_LOAD_SHIFT},
    1830. 

  1830. 	{PMIC_RG_VEMC33_DL_EN, PMIC_RG_VEMC33_DL_EN_ADDR, PMIC_RG_VEMC33_DL_EN_MASK, PMIC_RG_VEMC33_DL_EN_SHIFT},
    1831. 

  1831. 	{PMIC_RG_VEMC33_CL_EN, PMIC_RG_VEMC33_CL_EN_ADDR, PMIC_RG_VEMC33_CL_EN_MASK, PMIC_RG_VEMC33_CL_EN_SHIFT},
    1832. 

  1832. 	{PMIC_RG_VEMC33_STB_SEL, PMIC_RG_VEMC33_STB_SEL_ADDR, PMIC_RG_VEMC33_STB_SEL_MASK, PMIC_RG_VEMC33_STB_SEL_SHIFT},
    1833. 

  1833. 	{PMIC_RG_VIO28_CAL, PMIC_RG_VIO28_CAL_ADDR, PMIC_RG_VIO28_CAL_MASK, PMIC_RG_VIO28_CAL_SHIFT},
    1834. 

  1834. 	{PMIC_RG_VIO28_NDIS_EN, PMIC_RG_VIO28_NDIS_EN_ADDR, PMIC_RG_VIO28_NDIS_EN_MASK, PMIC_RG_VIO28_NDIS_EN_SHIFT},
    1835. 

  1835. 	{PMIC_RG_VIBR_CAL, PMIC_RG_VIBR_CAL_ADDR, PMIC_RG_VIBR_CAL_MASK, PMIC_RG_VIBR_CAL_SHIFT},
    1836. 

  1836. 	{PMIC_RG_VIBR_VOSEL, PMIC_RG_VIBR_VOSEL_ADDR, PMIC_RG_VIBR_VOSEL_MASK, PMIC_RG_VIBR_VOSEL_SHIFT},
    1837. 

  1837. 	{PMIC_RG_VIBR_NDIS_EN, PMIC_RG_VIBR_NDIS_EN_ADDR, PMIC_RG_VIBR_NDIS_EN_MASK, PMIC_RG_VIBR_NDIS_EN_SHIFT},
    1838. 

  1838. 	{PMIC_RG_VLDO28_CAL, PMIC_RG_VLDO28_CAL_ADDR, PMIC_RG_VLDO28_CAL_MASK, PMIC_RG_VLDO28_CAL_SHIFT},
    1839. 

  1839. 	{PMIC_RG_VLDO28_VOSEL, PMIC_RG_VLDO28_VOSEL_ADDR, PMIC_RG_VLDO28_VOSEL_MASK, PMIC_RG_VLDO28_VOSEL_SHIFT},
    1840. 

  1840. 	{PMIC_RG_VLDO28_NDIS_EN, PMIC_RG_VLDO28_NDIS_EN_ADDR, PMIC_RG_VLDO28_NDIS_EN_MASK, PMIC_RG_VLDO28_NDIS_EN_SHIFT},
    1841. 

  1841. 	{PMIC_RG_VLDO28_DUMMY_LOAD, PMIC_RG_VLDO28_DUMMY_LOAD_ADDR, PMIC_RG_VLDO28_DUMMY_LOAD_MASK, PMIC_RG_VLDO28_DUMMY_LOAD_SHIFT},
    1842. 

  1842. 	{PMIC_RG_VLDO28_DL_EN, PMIC_RG_VLDO28_DL_EN_ADDR, PMIC_RG_VLDO28_DL_EN_MASK, PMIC_RG_VLDO28_DL_EN_SHIFT},
    1843. 

  1843. 	{PMIC_RG_VLDO28_CL_EN, PMIC_RG_VLDO28_CL_EN_ADDR, PMIC_RG_VLDO28_CL_EN_MASK, PMIC_RG_VLDO28_CL_EN_SHIFT},
    1844. 

  1844. 	{PMIC_RG_VMC_CAL, PMIC_RG_VMC_CAL_ADDR, PMIC_RG_VMC_CAL_MASK, PMIC_RG_VMC_CAL_SHIFT},
    1845. 

  1845. 	{PMIC_RG_VMC_VOSEL, PMIC_RG_VMC_VOSEL_ADDR, PMIC_RG_VMC_VOSEL_MASK, PMIC_RG_VMC_VOSEL_SHIFT},
    1846. 

  1846. 	{PMIC_RG_VMC_NDIS_EN, PMIC_RG_VMC_NDIS_EN_ADDR, PMIC_RG_VMC_NDIS_EN_MASK, PMIC_RG_VMC_NDIS_EN_SHIFT},
    1847. 

  1847. 	{PMIC_RG_VMC_DUMMY_LOAD, PMIC_RG_VMC_DUMMY_LOAD_ADDR, PMIC_RG_VMC_DUMMY_LOAD_MASK, PMIC_RG_VMC_DUMMY_LOAD_SHIFT},
    1848. 

  1848. 	{PMIC_RG_VMC_DL_EN, PMIC_RG_VMC_DL_EN_ADDR, PMIC_RG_VMC_DL_EN_MASK, PMIC_RG_VMC_DL_EN_SHIFT},
    1849. 

  1849. 	{PMIC_RG_VMC_CL_EN, PMIC_RG_VMC_CL_EN_ADDR, PMIC_RG_VMC_CL_EN_MASK, PMIC_RG_VMC_CL_EN_SHIFT},
    1850. 

  1850. 	{PMIC_RG_DLDO_RSV_H, PMIC_RG_DLDO_RSV_H_ADDR, PMIC_RG_DLDO_RSV_H_MASK, PMIC_RG_DLDO_RSV_H_SHIFT},
    1851. 

  1851. 	{PMIC_RG_DLDO_RSV_L, PMIC_RG_DLDO_RSV_L_ADDR, PMIC_RG_DLDO_RSV_L_MASK, PMIC_RG_DLDO_RSV_L_SHIFT},
    1852. 

  1852. 	{PMIC_RG_VCAMD_CAL, PMIC_RG_VCAMD_CAL_ADDR, PMIC_RG_VCAMD_CAL_MASK, PMIC_RG_VCAMD_CAL_SHIFT},
    1853. 

  1853. 	{PMIC_RG_VCAMD_VOSEL, PMIC_RG_VCAMD_VOSEL_ADDR, PMIC_RG_VCAMD_VOSEL_MASK, PMIC_RG_VCAMD_VOSEL_SHIFT},
    1854. 

  1854. 	{PMIC_RG_VCAMD_NDIS_EN, PMIC_RG_VCAMD_NDIS_EN_ADDR, PMIC_RG_VCAMD_NDIS_EN_MASK, PMIC_RG_VCAMD_NDIS_EN_SHIFT},
    1855. 

  1855. 	{PMIC_RG_VRF18_CAL, PMIC_RG_VRF18_CAL_ADDR, PMIC_RG_VRF18_CAL_MASK, PMIC_RG_VRF18_CAL_SHIFT},
    1856. 

  1856. 	{PMIC_RG_VRF18_NDIS_EN, PMIC_RG_VRF18_NDIS_EN_ADDR, PMIC_RG_VRF18_NDIS_EN_MASK, PMIC_RG_VRF18_NDIS_EN_SHIFT},
    1857. 

  1857. 	{PMIC_RG_VRF12_CAL, PMIC_RG_VRF12_CAL_ADDR, PMIC_RG_VRF12_CAL_MASK, PMIC_RG_VRF12_CAL_SHIFT},
    1858. 

  1858. 	{PMIC_RG_VRF12_VOSEL, PMIC_RG_VRF12_VOSEL_ADDR, PMIC_RG_VRF12_VOSEL_MASK, PMIC_RG_VRF12_VOSEL_SHIFT},
    1859. 

  1859. 	{PMIC_RG_VRF12_NDIS_EN, PMIC_RG_VRF12_NDIS_EN_ADDR, PMIC_RG_VRF12_NDIS_EN_MASK, PMIC_RG_VRF12_NDIS_EN_SHIFT},
    1860. 

  1860. 	{PMIC_RG_VRF12_STB_SEL, PMIC_RG_VRF12_STB_SEL_ADDR, PMIC_RG_VRF12_STB_SEL_MASK, PMIC_RG_VRF12_STB_SEL_SHIFT},
    1861. 

  1861. 	{PMIC_RG_VRF12_DUMMY_LOAD, PMIC_RG_VRF12_DUMMY_LOAD_ADDR, PMIC_RG_VRF12_DUMMY_LOAD_MASK, PMIC_RG_VRF12_DUMMY_LOAD_SHIFT},
    1862. 

  1862. 	{PMIC_RG_VRF12_DL_EN, PMIC_RG_VRF12_DL_EN_ADDR, PMIC_RG_VRF12_DL_EN_MASK, PMIC_RG_VRF12_DL_EN_SHIFT},
    1863. 

  1863. 	{PMIC_RG_VRF12_CL_EN, PMIC_RG_VRF12_CL_EN_ADDR, PMIC_RG_VRF12_CL_EN_MASK, PMIC_RG_VRF12_CL_EN_SHIFT},
    1864. 

  1864. 	{PMIC_RG_VIO18_CAL, PMIC_RG_VIO18_CAL_ADDR, PMIC_RG_VIO18_CAL_MASK, PMIC_RG_VIO18_CAL_SHIFT},
    1865. 

  1865. 	{PMIC_RG_VIO18_NDIS_EN, PMIC_RG_VIO18_NDIS_EN_ADDR, PMIC_RG_VIO18_NDIS_EN_MASK, PMIC_RG_VIO18_NDIS_EN_SHIFT},
    1866. 

  1866. 	{PMIC_RG_VDRAM_CAL, PMIC_RG_VDRAM_CAL_ADDR, PMIC_RG_VDRAM_CAL_MASK, PMIC_RG_VDRAM_CAL_SHIFT},
    1867. 

  1867. 	{PMIC_RG_VDRAM_VOSEL, PMIC_RG_VDRAM_VOSEL_ADDR, PMIC_RG_VDRAM_VOSEL_MASK, PMIC_RG_VDRAM_VOSEL_SHIFT},
    1868. 

  1868. 	{PMIC_RG_VDRAM_NDIS_EN, PMIC_RG_VDRAM_NDIS_EN_ADDR, PMIC_RG_VDRAM_NDIS_EN_MASK, PMIC_RG_VDRAM_NDIS_EN_SHIFT},
    1869. 

  1869. 	{PMIC_RG_VDRAM_PCUR_CAL, PMIC_RG_VDRAM_PCUR_CAL_ADDR, PMIC_RG_VDRAM_PCUR_CAL_MASK, PMIC_RG_VDRAM_PCUR_CAL_SHIFT},
    1870. 

  1870. 	{PMIC_RG_VDRAM_DL_EN, PMIC_RG_VDRAM_DL_EN_ADDR, PMIC_RG_VDRAM_DL_EN_MASK, PMIC_RG_VDRAM_DL_EN_SHIFT},
    1871. 

  1871. 	{PMIC_RG_VDRAM_CL_EN, PMIC_RG_VDRAM_CL_EN_ADDR, PMIC_RG_VDRAM_CL_EN_MASK, PMIC_RG_VDRAM_CL_EN_SHIFT},
    1872. 

  1872. 	{PMIC_RG_VCAMIO_CAL, PMIC_RG_VCAMIO_CAL_ADDR, PMIC_RG_VCAMIO_CAL_MASK, PMIC_RG_VCAMIO_CAL_SHIFT},
    1873. 

  1873. 	{PMIC_RG_VCAMIO_VOSEL, PMIC_RG_VCAMIO_VOSEL_ADDR, PMIC_RG_VCAMIO_VOSEL_MASK, PMIC_RG_VCAMIO_VOSEL_SHIFT},
    1874. 

  1874. 	{PMIC_RG_VCAMIO_NDIS_EN, PMIC_RG_VCAMIO_NDIS_EN_ADDR, PMIC_RG_VCAMIO_NDIS_EN_MASK, PMIC_RG_VCAMIO_NDIS_EN_SHIFT},
    1875. 

  1875. 	{PMIC_RG_VCN18_CAL, PMIC_RG_VCN18_CAL_ADDR, PMIC_RG_VCN18_CAL_MASK, PMIC_RG_VCN18_CAL_SHIFT},
    1876. 

  1876. 	{PMIC_RG_VCN18_NDIS_EN, PMIC_RG_VCN18_NDIS_EN_ADDR, PMIC_RG_VCN18_NDIS_EN_MASK, PMIC_RG_VCN18_NDIS_EN_SHIFT},
    1877. 

  1877. 	{PMIC_RG_VSRAM_PROC_VOSEL, PMIC_RG_VSRAM_PROC_VOSEL_ADDR, PMIC_RG_VSRAM_PROC_VOSEL_MASK, PMIC_RG_VSRAM_PROC_VOSEL_SHIFT},
    1878. 

  1878. 	{PMIC_RG_VSRAM_PROC_NDIS_PLCUR, PMIC_RG_VSRAM_PROC_NDIS_PLCUR_ADDR, PMIC_RG_VSRAM_PROC_NDIS_PLCUR_MASK, PMIC_RG_VSRAM_PROC_NDIS_PLCUR_SHIFT},
    1879. 

  1879. 	{PMIC_RG_VSRAM_PROC_NDIS_EN, PMIC_RG_VSRAM_PROC_NDIS_EN_ADDR, PMIC_RG_VSRAM_PROC_NDIS_EN_MASK, PMIC_RG_VSRAM_PROC_NDIS_EN_SHIFT},
    1880. 

  1880. 	{PMIC_RG_VSRAM_PROC_PLCUR_EN, PMIC_RG_VSRAM_PROC_PLCUR_EN_ADDR, PMIC_RG_VSRAM_PROC_PLCUR_EN_MASK, PMIC_RG_VSRAM_PROC_PLCUR_EN_SHIFT},
    1881. 

  1881. 	{PMIC_RG_SLDO_RSV_H, PMIC_RG_SLDO_RSV_H_ADDR, PMIC_RG_SLDO_RSV_H_MASK, PMIC_RG_SLDO_RSV_H_SHIFT},
    1882. 

  1882. 	{PMIC_RG_SLDO_RSV_L, PMIC_RG_SLDO_RSV_L_ADDR, PMIC_RG_SLDO_RSV_L_MASK, PMIC_RG_SLDO_RSV_L_SHIFT},
    1883. 

  1883. 	{PMIC_RG_OTP_PA, PMIC_RG_OTP_PA_ADDR, PMIC_RG_OTP_PA_MASK, PMIC_RG_OTP_PA_SHIFT},
    1884. 

  1884. 	{PMIC_RG_OTP_PDIN, PMIC_RG_OTP_PDIN_ADDR, PMIC_RG_OTP_PDIN_MASK, PMIC_RG_OTP_PDIN_SHIFT},
    1885. 

  1885. 	{PMIC_RG_OTP_PTM, PMIC_RG_OTP_PTM_ADDR, PMIC_RG_OTP_PTM_MASK, PMIC_RG_OTP_PTM_SHIFT},
    1886. 

  1886. 	{PMIC_RG_OTP_PWE, PMIC_RG_OTP_PWE_ADDR, PMIC_RG_OTP_PWE_MASK, PMIC_RG_OTP_PWE_SHIFT},
    1887. 

  1887. 	{PMIC_RG_OTP_PPROG, PMIC_RG_OTP_PPROG_ADDR, PMIC_RG_OTP_PPROG_MASK, PMIC_RG_OTP_PPROG_SHIFT},
    1888. 

  1888. 	{PMIC_RG_OTP_PWE_SRC, PMIC_RG_OTP_PWE_SRC_ADDR, PMIC_RG_OTP_PWE_SRC_MASK, PMIC_RG_OTP_PWE_SRC_SHIFT},
    1889. 

  1889. 	{PMIC_RG_OTP_PROG_PKEY, PMIC_RG_OTP_PROG_PKEY_ADDR, PMIC_RG_OTP_PROG_PKEY_MASK, PMIC_RG_OTP_PROG_PKEY_SHIFT},
    1890. 

  1890. 	{PMIC_RG_OTP_RD_PKEY, PMIC_RG_OTP_RD_PKEY_ADDR, PMIC_RG_OTP_RD_PKEY_MASK, PMIC_RG_OTP_RD_PKEY_SHIFT},
    1891. 

  1891. 	{PMIC_RG_OTP_RD_TRIG, PMIC_RG_OTP_RD_TRIG_ADDR, PMIC_RG_OTP_RD_TRIG_MASK, PMIC_RG_OTP_RD_TRIG_SHIFT},
    1892. 

  1892. 	{PMIC_RG_RD_RDY_BYPASS, PMIC_RG_RD_RDY_BYPASS_ADDR, PMIC_RG_RD_RDY_BYPASS_MASK, PMIC_RG_RD_RDY_BYPASS_SHIFT},
    1893. 

  1893. 	{PMIC_RG_SKIP_OTP_OUT, PMIC_RG_SKIP_OTP_OUT_ADDR, PMIC_RG_SKIP_OTP_OUT_MASK, PMIC_RG_SKIP_OTP_OUT_SHIFT},
    1894. 

  1894. 	{PMIC_RG_OTP_RD_SW, PMIC_RG_OTP_RD_SW_ADDR, PMIC_RG_OTP_RD_SW_MASK, PMIC_RG_OTP_RD_SW_SHIFT},
    1895. 

  1895. 	{PMIC_RG_OTP_DOUT_SW, PMIC_RG_OTP_DOUT_SW_ADDR, PMIC_RG_OTP_DOUT_SW_MASK, PMIC_RG_OTP_DOUT_SW_SHIFT},
    1896. 

  1896. 	{PMIC_RG_OTP_RD_BUSY, PMIC_RG_OTP_RD_BUSY_ADDR, PMIC_RG_OTP_RD_BUSY_MASK, PMIC_RG_OTP_RD_BUSY_SHIFT},
    1897. 

  1897. 	{PMIC_RG_OTP_RD_ACK, PMIC_RG_OTP_RD_ACK_ADDR, PMIC_RG_OTP_RD_ACK_MASK, PMIC_RG_OTP_RD_ACK_SHIFT},
    1898. 

  1898. 	{PMIC_RG_OTP_PA_SW, PMIC_RG_OTP_PA_SW_ADDR, PMIC_RG_OTP_PA_SW_MASK, PMIC_RG_OTP_PA_SW_SHIFT},
    1899. 

  1899. 	{PMIC_RG_OTP_DOUT_0_15, PMIC_RG_OTP_DOUT_0_15_ADDR, PMIC_RG_OTP_DOUT_0_15_MASK, PMIC_RG_OTP_DOUT_0_15_SHIFT},
    1900. 

  1900. 	{PMIC_RG_OTP_DOUT_16_31, PMIC_RG_OTP_DOUT_16_31_ADDR, PMIC_RG_OTP_DOUT_16_31_MASK, PMIC_RG_OTP_DOUT_16_31_SHIFT},
    1901. 

  1901. 	{PMIC_RG_OTP_DOUT_32_47, PMIC_RG_OTP_DOUT_32_47_ADDR, PMIC_RG_OTP_DOUT_32_47_MASK, PMIC_RG_OTP_DOUT_32_47_SHIFT},
    1902. 

  1902. 	{PMIC_RG_OTP_DOUT_48_63, PMIC_RG_OTP_DOUT_48_63_ADDR, PMIC_RG_OTP_DOUT_48_63_MASK, PMIC_RG_OTP_DOUT_48_63_SHIFT},
    1903. 

  1903. 	{PMIC_RG_OTP_DOUT_64_79, PMIC_RG_OTP_DOUT_64_79_ADDR, PMIC_RG_OTP_DOUT_64_79_MASK, PMIC_RG_OTP_DOUT_64_79_SHIFT},
    1904. 

  1904. 	{PMIC_RG_OTP_DOUT_80_95, PMIC_RG_OTP_DOUT_80_95_ADDR, PMIC_RG_OTP_DOUT_80_95_MASK, PMIC_RG_OTP_DOUT_80_95_SHIFT},
    1905. 

  1905. 	{PMIC_RG_OTP_DOUT_96_111, PMIC_RG_OTP_DOUT_96_111_ADDR, PMIC_RG_OTP_DOUT_96_111_MASK, PMIC_RG_OTP_DOUT_96_111_SHIFT},
    1906. 

  1906. 	{PMIC_RG_OTP_DOUT_112_127, PMIC_RG_OTP_DOUT_112_127_ADDR, PMIC_RG_OTP_DOUT_112_127_MASK, PMIC_RG_OTP_DOUT_112_127_SHIFT},
    1907. 

  1907. 	{PMIC_RG_OTP_DOUT_128_143, PMIC_RG_OTP_DOUT_128_143_ADDR, PMIC_RG_OTP_DOUT_128_143_MASK, PMIC_RG_OTP_DOUT_128_143_SHIFT},
    1908. 

  1908. 	{PMIC_RG_OTP_DOUT_144_159, PMIC_RG_OTP_DOUT_144_159_ADDR, PMIC_RG_OTP_DOUT_144_159_MASK, PMIC_RG_OTP_DOUT_144_159_SHIFT},
    1909. 

  1909. 	{PMIC_RG_OTP_DOUT_160_175, PMIC_RG_OTP_DOUT_160_175_ADDR, PMIC_RG_OTP_DOUT_160_175_MASK, PMIC_RG_OTP_DOUT_160_175_SHIFT},
    1910. 

  1910. 	{PMIC_RG_OTP_DOUT_176_191, PMIC_RG_OTP_DOUT_176_191_ADDR, PMIC_RG_OTP_DOUT_176_191_MASK, PMIC_RG_OTP_DOUT_176_191_SHIFT},
    1911. 

  1911. 	{PMIC_RG_OTP_DOUT_192_207, PMIC_RG_OTP_DOUT_192_207_ADDR, PMIC_RG_OTP_DOUT_192_207_MASK, PMIC_RG_OTP_DOUT_192_207_SHIFT},
    1912. 

  1912. 	{PMIC_RG_OTP_DOUT_208_223, PMIC_RG_OTP_DOUT_208_223_ADDR, PMIC_RG_OTP_DOUT_208_223_MASK, PMIC_RG_OTP_DOUT_208_223_SHIFT},
    1913. 

  1913. 	{PMIC_RG_OTP_DOUT_224_239, PMIC_RG_OTP_DOUT_224_239_ADDR, PMIC_RG_OTP_DOUT_224_239_MASK, PMIC_RG_OTP_DOUT_224_239_SHIFT},
    1914. 

  1914. 	{PMIC_RG_OTP_DOUT_240_255, PMIC_RG_OTP_DOUT_240_255_ADDR, PMIC_RG_OTP_DOUT_240_255_MASK, PMIC_RG_OTP_DOUT_240_255_SHIFT},
    1915. 

  1915. 	{PMIC_RG_OTP_DOUT_256_271, PMIC_RG_OTP_DOUT_256_271_ADDR, PMIC_RG_OTP_DOUT_256_271_MASK, PMIC_RG_OTP_DOUT_256_271_SHIFT},
    1916. 

  1916. 	{PMIC_RG_OTP_DOUT_272_287, PMIC_RG_OTP_DOUT_272_287_ADDR, PMIC_RG_OTP_DOUT_272_287_MASK, PMIC_RG_OTP_DOUT_272_287_SHIFT},
    1917. 

  1917. 	{PMIC_RG_OTP_DOUT_288_303, PMIC_RG_OTP_DOUT_288_303_ADDR, PMIC_RG_OTP_DOUT_288_303_MASK, PMIC_RG_OTP_DOUT_288_303_SHIFT},
    1918. 

  1918. 	{PMIC_RG_OTP_DOUT_304_319, PMIC_RG_OTP_DOUT_304_319_ADDR, PMIC_RG_OTP_DOUT_304_319_MASK, PMIC_RG_OTP_DOUT_304_319_SHIFT},
    1919. 

  1919. 	{PMIC_RG_OTP_DOUT_320_335, PMIC_RG_OTP_DOUT_320_335_ADDR, PMIC_RG_OTP_DOUT_320_335_MASK, PMIC_RG_OTP_DOUT_320_335_SHIFT},
    1920. 

  1920. 	{PMIC_RG_OTP_DOUT_336_351, PMIC_RG_OTP_DOUT_336_351_ADDR, PMIC_RG_OTP_DOUT_336_351_MASK, PMIC_RG_OTP_DOUT_336_351_SHIFT},
    1921. 

  1921. 	{PMIC_RG_OTP_DOUT_352_367, PMIC_RG_OTP_DOUT_352_367_ADDR, PMIC_RG_OTP_DOUT_352_367_MASK, PMIC_RG_OTP_DOUT_352_367_SHIFT},
    1922. 

  1922. 	{PMIC_RG_OTP_DOUT_368_383, PMIC_RG_OTP_DOUT_368_383_ADDR, PMIC_RG_OTP_DOUT_368_383_MASK, PMIC_RG_OTP_DOUT_368_383_SHIFT},
    1923. 

  1923. 	{PMIC_RG_OTP_DOUT_384_399, PMIC_RG_OTP_DOUT_384_399_ADDR, PMIC_RG_OTP_DOUT_384_399_MASK, PMIC_RG_OTP_DOUT_384_399_SHIFT},
    1924. 

  1924. 	{PMIC_RG_OTP_DOUT_400_415, PMIC_RG_OTP_DOUT_400_415_ADDR, PMIC_RG_OTP_DOUT_400_415_MASK, PMIC_RG_OTP_DOUT_400_415_SHIFT},
    1925. 

  1925. 	{PMIC_RG_OTP_DOUT_416_431, PMIC_RG_OTP_DOUT_416_431_ADDR, PMIC_RG_OTP_DOUT_416_431_MASK, PMIC_RG_OTP_DOUT_416_431_SHIFT},
    1926. 

  1926. 	{PMIC_RG_OTP_DOUT_432_447, PMIC_RG_OTP_DOUT_432_447_ADDR, PMIC_RG_OTP_DOUT_432_447_MASK, PMIC_RG_OTP_DOUT_432_447_SHIFT},
    1927. 

  1927. 	{PMIC_RG_OTP_DOUT_448_463, PMIC_RG_OTP_DOUT_448_463_ADDR, PMIC_RG_OTP_DOUT_448_463_MASK, PMIC_RG_OTP_DOUT_448_463_SHIFT},
    1928. 

  1928. 	{PMIC_RG_OTP_DOUT_464_479, PMIC_RG_OTP_DOUT_464_479_ADDR, PMIC_RG_OTP_DOUT_464_479_MASK, PMIC_RG_OTP_DOUT_464_479_SHIFT},
    1929. 

  1929. 	{PMIC_RG_OTP_DOUT_480_495, PMIC_RG_OTP_DOUT_480_495_ADDR, PMIC_RG_OTP_DOUT_480_495_MASK, PMIC_RG_OTP_DOUT_480_495_SHIFT},
    1930. 

  1930. 	{PMIC_RG_OTP_DOUT_496_511, PMIC_RG_OTP_DOUT_496_511_ADDR, PMIC_RG_OTP_DOUT_496_511_MASK, PMIC_RG_OTP_DOUT_496_511_SHIFT},
    1931. 

  1931. 	{PMIC_RG_OTP_VAL_0_15, PMIC_RG_OTP_VAL_0_15_ADDR, PMIC_RG_OTP_VAL_0_15_MASK, PMIC_RG_OTP_VAL_0_15_SHIFT},
    1932. 

  1932. 	{PMIC_RG_OTP_VAL_16_31, PMIC_RG_OTP_VAL_16_31_ADDR, PMIC_RG_OTP_VAL_16_31_MASK, PMIC_RG_OTP_VAL_16_31_SHIFT},
    1933. 

  1933. 	{PMIC_RG_OTP_VAL_32_47, PMIC_RG_OTP_VAL_32_47_ADDR, PMIC_RG_OTP_VAL_32_47_MASK, PMIC_RG_OTP_VAL_32_47_SHIFT},
    1934. 

  1934. 	{PMIC_RG_OTP_VAL_48_63, PMIC_RG_OTP_VAL_48_63_ADDR, PMIC_RG_OTP_VAL_48_63_MASK, PMIC_RG_OTP_VAL_48_63_SHIFT},
    1935. 

  1935. 	{PMIC_RG_OTP_VAL_64_79, PMIC_RG_OTP_VAL_64_79_ADDR, PMIC_RG_OTP_VAL_64_79_MASK, PMIC_RG_OTP_VAL_64_79_SHIFT},
    1936. 

  1936. 	{PMIC_RG_OTP_VAL_80_95, PMIC_RG_OTP_VAL_80_95_ADDR, PMIC_RG_OTP_VAL_80_95_MASK, PMIC_RG_OTP_VAL_80_95_SHIFT},
    1937. 

  1937. 	{PMIC_RG_OTP_VAL_96_111, PMIC_RG_OTP_VAL_96_111_ADDR, PMIC_RG_OTP_VAL_96_111_MASK, PMIC_RG_OTP_VAL_96_111_SHIFT},
    1938. 

  1938. 	{PMIC_RG_OTP_VAL_112_127, PMIC_RG_OTP_VAL_112_127_ADDR, PMIC_RG_OTP_VAL_112_127_MASK, PMIC_RG_OTP_VAL_112_127_SHIFT},
    1939. 

  1939. 	{PMIC_RG_OTP_VAL_128_143, PMIC_RG_OTP_VAL_128_143_ADDR, PMIC_RG_OTP_VAL_128_143_MASK, PMIC_RG_OTP_VAL_128_143_SHIFT},
    1940. 

  1940. 	{PMIC_RG_OTP_VAL_144_159, PMIC_RG_OTP_VAL_144_159_ADDR, PMIC_RG_OTP_VAL_144_159_MASK, PMIC_RG_OTP_VAL_144_159_SHIFT},
    1941. 

  1941. 	{PMIC_RG_OTP_VAL_160_175, PMIC_RG_OTP_VAL_160_175_ADDR, PMIC_RG_OTP_VAL_160_175_MASK, PMIC_RG_OTP_VAL_160_175_SHIFT},
    1942. 

  1942. 	{PMIC_RG_OTP_VAL_176_191, PMIC_RG_OTP_VAL_176_191_ADDR, PMIC_RG_OTP_VAL_176_191_MASK, PMIC_RG_OTP_VAL_176_191_SHIFT},
    1943. 

  1943. 	{PMIC_RG_OTP_VAL_192_207, PMIC_RG_OTP_VAL_192_207_ADDR, PMIC_RG_OTP_VAL_192_207_MASK, PMIC_RG_OTP_VAL_192_207_SHIFT},
    1944. 

  1944. 	{PMIC_RG_OTP_VAL_208_223, PMIC_RG_OTP_VAL_208_223_ADDR, PMIC_RG_OTP_VAL_208_223_MASK, PMIC_RG_OTP_VAL_208_223_SHIFT},
    1945. 

  1945. 	{PMIC_RG_OTP_VAL_224_239, PMIC_RG_OTP_VAL_224_239_ADDR, PMIC_RG_OTP_VAL_224_239_MASK, PMIC_RG_OTP_VAL_224_239_SHIFT},
    1946. 

  1946. 	{PMIC_RG_OTP_VAL_240_255, PMIC_RG_OTP_VAL_240_255_ADDR, PMIC_RG_OTP_VAL_240_255_MASK, PMIC_RG_OTP_VAL_240_255_SHIFT},
    1947. 

  1947. 	{PMIC_RG_OTP_VAL_256_271, PMIC_RG_OTP_VAL_256_271_ADDR, PMIC_RG_OTP_VAL_256_271_MASK, PMIC_RG_OTP_VAL_256_271_SHIFT},
    1948. 

  1948. 	{PMIC_RG_OTP_VAL_272_287, PMIC_RG_OTP_VAL_272_287_ADDR, PMIC_RG_OTP_VAL_272_287_MASK, PMIC_RG_OTP_VAL_272_287_SHIFT},
    1949. 

  1949. 	{PMIC_RG_OTP_VAL_288_303, PMIC_RG_OTP_VAL_288_303_ADDR, PMIC_RG_OTP_VAL_288_303_MASK, PMIC_RG_OTP_VAL_288_303_SHIFT},
    1950. 

  1950. 	{PMIC_RG_OTP_VAL_304_319, PMIC_RG_OTP_VAL_304_319_ADDR, PMIC_RG_OTP_VAL_304_319_MASK, PMIC_RG_OTP_VAL_304_319_SHIFT},
    1951. 

  1951. 	{PMIC_RG_OTP_VAL_320_335, PMIC_RG_OTP_VAL_320_335_ADDR, PMIC_RG_OTP_VAL_320_335_MASK, PMIC_RG_OTP_VAL_320_335_SHIFT},
    1952. 

  1952. 	{PMIC_RG_OTP_VAL_336_351, PMIC_RG_OTP_VAL_336_351_ADDR, PMIC_RG_OTP_VAL_336_351_MASK, PMIC_RG_OTP_VAL_336_351_SHIFT},
    1953. 

  1953. 	{PMIC_RG_OTP_VAL_352_367, PMIC_RG_OTP_VAL_352_367_ADDR, PMIC_RG_OTP_VAL_352_367_MASK, PMIC_RG_OTP_VAL_352_367_SHIFT},
    1954. 

  1954. 	{PMIC_RG_OTP_VAL_368_383, PMIC_RG_OTP_VAL_368_383_ADDR, PMIC_RG_OTP_VAL_368_383_MASK, PMIC_RG_OTP_VAL_368_383_SHIFT},
    1955. 

  1955. 	{PMIC_RG_OTP_VAL_384_399, PMIC_RG_OTP_VAL_384_399_ADDR, PMIC_RG_OTP_VAL_384_399_MASK, PMIC_RG_OTP_VAL_384_399_SHIFT},
    1956. 

  1956. 	{PMIC_RG_OTP_VAL_400_415, PMIC_RG_OTP_VAL_400_415_ADDR, PMIC_RG_OTP_VAL_400_415_MASK, PMIC_RG_OTP_VAL_400_415_SHIFT},
    1957. 

  1957. 	{PMIC_RG_OTP_VAL_416_431, PMIC_RG_OTP_VAL_416_431_ADDR, PMIC_RG_OTP_VAL_416_431_MASK, PMIC_RG_OTP_VAL_416_431_SHIFT},
    1958. 

  1958. 	{PMIC_RG_OTP_VAL_432_447, PMIC_RG_OTP_VAL_432_447_ADDR, PMIC_RG_OTP_VAL_432_447_MASK, PMIC_RG_OTP_VAL_432_447_SHIFT},
    1959. 

  1959. 	{PMIC_RG_OTP_VAL_448_463, PMIC_RG_OTP_VAL_448_463_ADDR, PMIC_RG_OTP_VAL_448_463_MASK, PMIC_RG_OTP_VAL_448_463_SHIFT},
    1960. 

  1960. 	{PMIC_RG_OTP_VAL_464_479, PMIC_RG_OTP_VAL_464_479_ADDR, PMIC_RG_OTP_VAL_464_479_MASK, PMIC_RG_OTP_VAL_464_479_SHIFT},
    1961. 

  1961. 	{PMIC_RG_OTP_VAL_480_495, PMIC_RG_OTP_VAL_480_495_ADDR, PMIC_RG_OTP_VAL_480_495_MASK, PMIC_RG_OTP_VAL_480_495_SHIFT},
    1962. 

  1962. 	{PMIC_RG_OTP_VAL_496_511, PMIC_RG_OTP_VAL_496_511_ADDR, PMIC_RG_OTP_VAL_496_511_MASK, PMIC_RG_OTP_VAL_496_511_SHIFT},
    1963. 

  1963. 	{PMIC_MIX_EOSC32_STP_LPDTB, PMIC_MIX_EOSC32_STP_LPDTB_ADDR, PMIC_MIX_EOSC32_STP_LPDTB_MASK, PMIC_MIX_EOSC32_STP_LPDTB_SHIFT},
    1964. 

  1964. 	{PMIC_MIX_EOSC32_STP_LPDEN, PMIC_MIX_EOSC32_STP_LPDEN_ADDR, PMIC_MIX_EOSC32_STP_LPDEN_MASK, PMIC_MIX_EOSC32_STP_LPDEN_SHIFT},
    1965. 

  1965. 	{PMIC_MIX_XOSC32_STP_PWDB, PMIC_MIX_XOSC32_STP_PWDB_ADDR, PMIC_MIX_XOSC32_STP_PWDB_MASK, PMIC_MIX_XOSC32_STP_PWDB_SHIFT},
    1966. 

  1966. 	{PMIC_MIX_XOSC32_STP_LPDTB, PMIC_MIX_XOSC32_STP_LPDTB_ADDR, PMIC_MIX_XOSC32_STP_LPDTB_MASK, PMIC_MIX_XOSC32_STP_LPDTB_SHIFT},
    1967. 

  1967. 	{PMIC_MIX_XOSC32_STP_LPDEN, PMIC_MIX_XOSC32_STP_LPDEN_ADDR, PMIC_MIX_XOSC32_STP_LPDEN_MASK, PMIC_MIX_XOSC32_STP_LPDEN_SHIFT},
    1968. 

  1968. 	{PMIC_MIX_XOSC32_STP_LPDRST, PMIC_MIX_XOSC32_STP_LPDRST_ADDR, PMIC_MIX_XOSC32_STP_LPDRST_MASK, PMIC_MIX_XOSC32_STP_LPDRST_SHIFT},
    1969. 

  1969. 	{PMIC_MIX_XOSC32_STP_CALI, PMIC_MIX_XOSC32_STP_CALI_ADDR, PMIC_MIX_XOSC32_STP_CALI_MASK, PMIC_MIX_XOSC32_STP_CALI_SHIFT},
    1970. 

  1970. 	{PMIC_STMP_MODE, PMIC_STMP_MODE_ADDR, PMIC_STMP_MODE_MASK, PMIC_STMP_MODE_SHIFT},
    1971. 

  1971. 	{PMIC_MIX_EOSC32_STP_CHOP_EN, PMIC_MIX_EOSC32_STP_CHOP_EN_ADDR, PMIC_MIX_EOSC32_STP_CHOP_EN_MASK, PMIC_MIX_EOSC32_STP_CHOP_EN_SHIFT},
    1972. 

  1972. 	{PMIC_MIX_DCXO_STP_LVSH_EN, PMIC_MIX_DCXO_STP_LVSH_EN_ADDR, PMIC_MIX_DCXO_STP_LVSH_EN_MASK, PMIC_MIX_DCXO_STP_LVSH_EN_SHIFT},
    1973. 

  1973. 	{PMIC_MIX_PMU_STP_DDLO_VRTC, PMIC_MIX_PMU_STP_DDLO_VRTC_ADDR, PMIC_MIX_PMU_STP_DDLO_VRTC_MASK, PMIC_MIX_PMU_STP_DDLO_VRTC_SHIFT},
    1974. 

  1974. 	{PMIC_MIX_PMU_STP_DDLO_VRTC_EN, PMIC_MIX_PMU_STP_DDLO_VRTC_EN_ADDR, PMIC_MIX_PMU_STP_DDLO_VRTC_EN_MASK, PMIC_MIX_PMU_STP_DDLO_VRTC_EN_SHIFT},
    1975. 

  1975. 	{PMIC_MIX_RTC_STP_XOSC32_ENB, PMIC_MIX_RTC_STP_XOSC32_ENB_ADDR, PMIC_MIX_RTC_STP_XOSC32_ENB_MASK, PMIC_MIX_RTC_STP_XOSC32_ENB_SHIFT},
    1976. 

  1976. 	{PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE, PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE_ADDR, PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE_MASK, PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE_SHIFT},
    1977. 

  1977. 	{PMIC_MIX_EOSC32_STP_RSV, PMIC_MIX_EOSC32_STP_RSV_ADDR, PMIC_MIX_EOSC32_STP_RSV_MASK, PMIC_MIX_EOSC32_STP_RSV_SHIFT},
    1978. 

  1978. 	{PMIC_MIX_EOSC32_VCT_EN, PMIC_MIX_EOSC32_VCT_EN_ADDR, PMIC_MIX_EOSC32_VCT_EN_MASK, PMIC_MIX_EOSC32_VCT_EN_SHIFT},
    1979. 

  1979. 	{PMIC_MIX_EOSC32_OPT, PMIC_MIX_EOSC32_OPT_ADDR, PMIC_MIX_EOSC32_OPT_MASK, PMIC_MIX_EOSC32_OPT_SHIFT},
    1980. 

  1980. 	{PMIC_MIX_DCXO_STP_LVSH_EN_INT, PMIC_MIX_DCXO_STP_LVSH_EN_INT_ADDR, PMIC_MIX_DCXO_STP_LVSH_EN_INT_MASK, PMIC_MIX_DCXO_STP_LVSH_EN_INT_SHIFT},
    1981. 

  1981. 	{PMIC_MIX_RTC_GPIO_COREDETB, PMIC_MIX_RTC_GPIO_COREDETB_ADDR, PMIC_MIX_RTC_GPIO_COREDETB_MASK, PMIC_MIX_RTC_GPIO_COREDETB_SHIFT},
    1982. 

  1982. 	{PMIC_MIX_RTC_GPIO_F32KOB, PMIC_MIX_RTC_GPIO_F32KOB_ADDR, PMIC_MIX_RTC_GPIO_F32KOB_MASK, PMIC_MIX_RTC_GPIO_F32KOB_SHIFT},
    1983. 

  1983. 	{PMIC_MIX_RTC_GPIO_GPO, PMIC_MIX_RTC_GPIO_GPO_ADDR, PMIC_MIX_RTC_GPIO_GPO_MASK, PMIC_MIX_RTC_GPIO_GPO_SHIFT},
    1984. 

  1984. 	{PMIC_MIX_RTC_GPIO_OE, PMIC_MIX_RTC_GPIO_OE_ADDR, PMIC_MIX_RTC_GPIO_OE_MASK, PMIC_MIX_RTC_GPIO_OE_SHIFT},
    1985. 

  1985. 	{PMIC_MIX_RTC_STP_DEBUG_OUT, PMIC_MIX_RTC_STP_DEBUG_OUT_ADDR, PMIC_MIX_RTC_STP_DEBUG_OUT_MASK, PMIC_MIX_RTC_STP_DEBUG_OUT_SHIFT},
    1986. 

  1986. 	{PMIC_MIX_RTC_STP_DEBUG_SEL, PMIC_MIX_RTC_STP_DEBUG_SEL_ADDR, PMIC_MIX_RTC_STP_DEBUG_SEL_MASK, PMIC_MIX_RTC_STP_DEBUG_SEL_SHIFT},
    1987. 

  1987. 	{PMIC_MIX_RTC_STP_K_EOSC32_EN, PMIC_MIX_RTC_STP_K_EOSC32_EN_ADDR, PMIC_MIX_RTC_STP_K_EOSC32_EN_MASK, PMIC_MIX_RTC_STP_K_EOSC32_EN_SHIFT},
    1988. 

  1988. 	{PMIC_MIX_RTC_STP_EMBCK_SEL, PMIC_MIX_RTC_STP_EMBCK_SEL_ADDR, PMIC_MIX_RTC_STP_EMBCK_SEL_MASK, PMIC_MIX_RTC_STP_EMBCK_SEL_SHIFT},
    1989. 

  1989. 	{PMIC_MIX_STP_BBWAKEUP, PMIC_MIX_STP_BBWAKEUP_ADDR, PMIC_MIX_STP_BBWAKEUP_MASK, PMIC_MIX_STP_BBWAKEUP_SHIFT},
    1990. 

  1990. 	{PMIC_MIX_STP_RTC_DDLO, PMIC_MIX_STP_RTC_DDLO_ADDR, PMIC_MIX_STP_RTC_DDLO_MASK, PMIC_MIX_STP_RTC_DDLO_SHIFT},
    1991. 

  1991. 	{PMIC_MIX_RTC_XOSC32_ENB, PMIC_MIX_RTC_XOSC32_ENB_ADDR, PMIC_MIX_RTC_XOSC32_ENB_MASK, PMIC_MIX_RTC_XOSC32_ENB_SHIFT},
    1992. 

  1992. 	{PMIC_MIX_EFUSE_XOSC32_ENB_OPT, PMIC_MIX_EFUSE_XOSC32_ENB_OPT_ADDR, PMIC_MIX_EFUSE_XOSC32_ENB_OPT_MASK, PMIC_MIX_EFUSE_XOSC32_ENB_OPT_SHIFT},
    1993. 

  1993. 	{PMIC_FG_ON, PMIC_FG_ON_ADDR, PMIC_FG_ON_MASK, PMIC_FG_ON_SHIFT},
    1994. 

  1994. 	{PMIC_FG_CAL, PMIC_FG_CAL_ADDR, PMIC_FG_CAL_MASK, PMIC_FG_CAL_SHIFT},
    1995. 

  1995. 	{PMIC_FG_AUTOCALRATE, PMIC_FG_AUTOCALRATE_ADDR, PMIC_FG_AUTOCALRATE_MASK, PMIC_FG_AUTOCALRATE_SHIFT},
    1996. 

  1996. 	{PMIC_FG_SW_CR, PMIC_FG_SW_CR_ADDR, PMIC_FG_SW_CR_MASK, PMIC_FG_SW_CR_SHIFT},
    1997. 

  1997. 	{PMIC_FG_SW_READ_PRE, PMIC_FG_SW_READ_PRE_ADDR, PMIC_FG_SW_READ_PRE_MASK, PMIC_FG_SW_READ_PRE_SHIFT},
    1998. 

  1998. 	{PMIC_FG_LATCHDATA_ST, PMIC_FG_LATCHDATA_ST_ADDR, PMIC_FG_LATCHDATA_ST_MASK, PMIC_FG_LATCHDATA_ST_SHIFT},
    1999. 

  1999. 	{PMIC_FG_SW_CLEAR, PMIC_FG_SW_CLEAR_ADDR, PMIC_FG_SW_CLEAR_MASK, PMIC_FG_SW_CLEAR_SHIFT},
    2000. 

  2000. 	{PMIC_FG_OFFSET_RST, PMIC_FG_OFFSET_RST_ADDR, PMIC_FG_OFFSET_RST_MASK, PMIC_FG_OFFSET_RST_SHIFT},
    2001. 

  2001. 	{PMIC_FG_TIME_RST, PMIC_FG_TIME_RST_ADDR, PMIC_FG_TIME_RST_MASK, PMIC_FG_TIME_RST_SHIFT},
    2002. 

  2002. 	{PMIC_FG_CHARGE_RST, PMIC_FG_CHARGE_RST_ADDR, PMIC_FG_CHARGE_RST_MASK, PMIC_FG_CHARGE_RST_SHIFT},
    2003. 

  2003. 	{PMIC_FG_SW_RSTCLR, PMIC_FG_SW_RSTCLR_ADDR, PMIC_FG_SW_RSTCLR_MASK, PMIC_FG_SW_RSTCLR_SHIFT},
    2004. 

  2004. 	{PMIC_FG_CAR_34_19, PMIC_FG_CAR_34_19_ADDR, PMIC_FG_CAR_34_19_MASK, PMIC_FG_CAR_34_19_SHIFT},
    2005. 

  2005. 	{PMIC_FG_CAR_18_03, PMIC_FG_CAR_18_03_ADDR, PMIC_FG_CAR_18_03_MASK, PMIC_FG_CAR_18_03_SHIFT},
    2006. 

  2006. 	{PMIC_FG_CAR_02_00, PMIC_FG_CAR_02_00_ADDR, PMIC_FG_CAR_02_00_MASK, PMIC_FG_CAR_02_00_SHIFT},
    2007. 

  2007. 	{PMIC_FG_NTER_32_17, PMIC_FG_NTER_32_17_ADDR, PMIC_FG_NTER_32_17_MASK, PMIC_FG_NTER_32_17_SHIFT},
    2008. 

  2008. 	{PMIC_FG_NTER_16_01, PMIC_FG_NTER_16_01_ADDR, PMIC_FG_NTER_16_01_MASK, PMIC_FG_NTER_16_01_SHIFT},
    2009. 

  2009. 	{PMIC_FG_NTER_00, PMIC_FG_NTER_00_ADDR, PMIC_FG_NTER_00_MASK, PMIC_FG_NTER_00_SHIFT},
    2010. 

  2010. 	{PMIC_FG_BLTR_31_16, PMIC_FG_BLTR_31_16_ADDR, PMIC_FG_BLTR_31_16_MASK, PMIC_FG_BLTR_31_16_SHIFT},
    2011. 

  2011. 	{PMIC_FG_BLTR_15_00, PMIC_FG_BLTR_15_00_ADDR, PMIC_FG_BLTR_15_00_MASK, PMIC_FG_BLTR_15_00_SHIFT},
    2012. 

  2012. 	{PMIC_FG_BFTR_31_16, PMIC_FG_BFTR_31_16_ADDR, PMIC_FG_BFTR_31_16_MASK, PMIC_FG_BFTR_31_16_SHIFT},
    2013. 

  2013. 	{PMIC_FG_BFTR_15_00, PMIC_FG_BFTR_15_00_ADDR, PMIC_FG_BFTR_15_00_MASK, PMIC_FG_BFTR_15_00_SHIFT},
    2014. 

  2014. 	{PMIC_FG_CURRENT_OUT, PMIC_FG_CURRENT_OUT_ADDR, PMIC_FG_CURRENT_OUT_MASK, PMIC_FG_CURRENT_OUT_SHIFT},
    2015. 

  2015. 	{PMIC_FG_ADJUST_OFFSET_VALUE, PMIC_FG_ADJUST_OFFSET_VALUE_ADDR, PMIC_FG_ADJUST_OFFSET_VALUE_MASK, PMIC_FG_ADJUST_OFFSET_VALUE_SHIFT},
    2016. 

  2016. 	{PMIC_FG_OFFSET, PMIC_FG_OFFSET_ADDR, PMIC_FG_OFFSET_MASK, PMIC_FG_OFFSET_SHIFT},
    2017. 

  2017. 	{PMIC_RG_FGANALOGTEST, PMIC_RG_FGANALOGTEST_ADDR, PMIC_RG_FGANALOGTEST_MASK, PMIC_RG_FGANALOGTEST_SHIFT},
    2018. 

  2018. 	{PMIC_RG_FGINTMODE, PMIC_RG_FGINTMODE_ADDR, PMIC_RG_FGINTMODE_MASK, PMIC_RG_FGINTMODE_SHIFT},
    2019. 

  2019. 	{PMIC_RG_SPARE, PMIC_RG_SPARE_ADDR, PMIC_RG_SPARE_MASK, PMIC_RG_SPARE_SHIFT},
    2020. 

  2020. 	{PMIC_FG_OSR, PMIC_FG_OSR_ADDR, PMIC_FG_OSR_MASK, PMIC_FG_OSR_SHIFT},
    2021. 

  2021. 	{PMIC_FG_ADJ_OFFSET_EN, PMIC_FG_ADJ_OFFSET_EN_ADDR, PMIC_FG_ADJ_OFFSET_EN_MASK, PMIC_FG_ADJ_OFFSET_EN_SHIFT},
    2022. 

  2022. 	{PMIC_FG_ADC_AUTORST, PMIC_FG_ADC_AUTORST_ADDR, PMIC_FG_ADC_AUTORST_MASK, PMIC_FG_ADC_AUTORST_SHIFT},
    2023. 

  2023. 	{PMIC_FG_FIR1BYPASS, PMIC_FG_FIR1BYPASS_ADDR, PMIC_FG_FIR1BYPASS_MASK, PMIC_FG_FIR1BYPASS_SHIFT},
    2024. 

  2024. 	{PMIC_FG_FIR2BYPASS, PMIC_FG_FIR2BYPASS_ADDR, PMIC_FG_FIR2BYPASS_MASK, PMIC_FG_FIR2BYPASS_SHIFT},
    2025. 

  2025. 	{PMIC_FG_L_CUR_INT_STS, PMIC_FG_L_CUR_INT_STS_ADDR, PMIC_FG_L_CUR_INT_STS_MASK, PMIC_FG_L_CUR_INT_STS_SHIFT},
    2026. 

  2026. 	{PMIC_FG_H_CUR_INT_STS, PMIC_FG_H_CUR_INT_STS_ADDR, PMIC_FG_H_CUR_INT_STS_MASK, PMIC_FG_H_CUR_INT_STS_SHIFT},
    2027. 

  2027. 	{PMIC_FG_L_INT_STS, PMIC_FG_L_INT_STS_ADDR, PMIC_FG_L_INT_STS_MASK, PMIC_FG_L_INT_STS_SHIFT},
    2028. 

  2028. 	{PMIC_FG_H_INT_STS, PMIC_FG_H_INT_STS_ADDR, PMIC_FG_H_INT_STS_MASK, PMIC_FG_H_INT_STS_SHIFT},
    2029. 

  2029. 	{PMIC_FG_ADC_RSTDETECT, PMIC_FG_ADC_RSTDETECT_ADDR, PMIC_FG_ADC_RSTDETECT_MASK, PMIC_FG_ADC_RSTDETECT_SHIFT},
    2030. 

  2030. 	{PMIC_FG_SLP_EN, PMIC_FG_SLP_EN_ADDR, PMIC_FG_SLP_EN_MASK, PMIC_FG_SLP_EN_SHIFT},
    2031. 

  2031. 	{PMIC_FG_ZCV_DET_EN, PMIC_FG_ZCV_DET_EN_ADDR, PMIC_FG_ZCV_DET_EN_MASK, PMIC_FG_ZCV_DET_EN_SHIFT},
    2032. 

  2032. 	{PMIC_RG_FG_AUXADC_R, PMIC_RG_FG_AUXADC_R_ADDR, PMIC_RG_FG_AUXADC_R_MASK, PMIC_RG_FG_AUXADC_R_SHIFT},
    2033. 

  2033. 	{PMIC_DA_FGADC_EN, PMIC_DA_FGADC_EN_ADDR, PMIC_DA_FGADC_EN_MASK, PMIC_DA_FGADC_EN_SHIFT},
    2034. 

  2034. 	{PMIC_DA_FGCAL_EN, PMIC_DA_FGCAL_EN_ADDR, PMIC_DA_FGCAL_EN_MASK, PMIC_DA_FGCAL_EN_SHIFT},
    2035. 

  2035. 	{PMIC_DA_FG_RST, PMIC_DA_FG_RST_ADDR, PMIC_DA_FG_RST_MASK, PMIC_DA_FG_RST_SHIFT},
    2036. 

  2036. 	{PMIC_FG_CIC2, PMIC_FG_CIC2_ADDR, PMIC_FG_CIC2_MASK, PMIC_FG_CIC2_SHIFT},
    2037. 

  2037. 	{PMIC_FG_SLP_CUR_TH, PMIC_FG_SLP_CUR_TH_ADDR, PMIC_FG_SLP_CUR_TH_MASK, PMIC_FG_SLP_CUR_TH_SHIFT},
    2038. 

  2038. 	{PMIC_FG_SLP_TIME, PMIC_FG_SLP_TIME_ADDR, PMIC_FG_SLP_TIME_MASK, PMIC_FG_SLP_TIME_SHIFT},
    2039. 

  2039. 	{PMIC_FG_SRCVOLTEN_FTIME, PMIC_FG_SRCVOLTEN_FTIME_ADDR, PMIC_FG_SRCVOLTEN_FTIME_MASK, PMIC_FG_SRCVOLTEN_FTIME_SHIFT},
    2040. 

  2040. 	{PMIC_FG_DET_TIME, PMIC_FG_DET_TIME_ADDR, PMIC_FG_DET_TIME_MASK, PMIC_FG_DET_TIME_SHIFT},
    2041. 

  2041. 	{PMIC_FG_ZCV_CAR_34_19, PMIC_FG_ZCV_CAR_34_19_ADDR, PMIC_FG_ZCV_CAR_34_19_MASK, PMIC_FG_ZCV_CAR_34_19_SHIFT},
    2042. 

  2042. 	{PMIC_FG_ZCV_CAR_18_03, PMIC_FG_ZCV_CAR_18_03_ADDR, PMIC_FG_ZCV_CAR_18_03_MASK, PMIC_FG_ZCV_CAR_18_03_SHIFT},
    2043. 

  2043. 	{PMIC_FG_ZCV_CAR_02_00, PMIC_FG_ZCV_CAR_02_00_ADDR, PMIC_FG_ZCV_CAR_02_00_MASK, PMIC_FG_ZCV_CAR_02_00_SHIFT},
    2044. 

  2044. 	{PMIC_FG_ZCV_CURR, PMIC_FG_ZCV_CURR_ADDR, PMIC_FG_ZCV_CURR_MASK, PMIC_FG_ZCV_CURR_SHIFT},
    2045. 

  2045. 	{PMIC_FG_R_CURR, PMIC_FG_R_CURR_ADDR, PMIC_FG_R_CURR_MASK, PMIC_FG_R_CURR_SHIFT},
    2046. 

  2046. 	{PMIC_FG_MODE, PMIC_FG_MODE_ADDR, PMIC_FG_MODE_MASK, PMIC_FG_MODE_SHIFT},
    2047. 

  2047. 	{PMIC_FG_RST_SW, PMIC_FG_RST_SW_ADDR, PMIC_FG_RST_SW_MASK, PMIC_FG_RST_SW_SHIFT},
    2048. 

  2048. 	{PMIC_FG_FGCAL_EN_SW, PMIC_FG_FGCAL_EN_SW_ADDR, PMIC_FG_FGCAL_EN_SW_MASK, PMIC_FG_FGCAL_EN_SW_SHIFT},
    2049. 

  2049. 	{PMIC_FG_FGADC_EN_SW, PMIC_FG_FGADC_EN_SW_ADDR, PMIC_FG_FGADC_EN_SW_MASK, PMIC_FG_FGADC_EN_SW_SHIFT},
    2050. 

  2050. 	{PMIC_FG_RSV1, PMIC_FG_RSV1_ADDR, PMIC_FG_RSV1_MASK, PMIC_FG_RSV1_SHIFT},
    2051. 

  2051. 	{PMIC_FG_TEST_MODE0, PMIC_FG_TEST_MODE0_ADDR, PMIC_FG_TEST_MODE0_MASK, PMIC_FG_TEST_MODE0_SHIFT},
    2052. 

  2052. 	{PMIC_FG_TEST_MODE1, PMIC_FG_TEST_MODE1_ADDR, PMIC_FG_TEST_MODE1_MASK, PMIC_FG_TEST_MODE1_SHIFT},
    2053. 

  2053. 	{PMIC_FG_GAIN, PMIC_FG_GAIN_ADDR, PMIC_FG_GAIN_MASK, PMIC_FG_GAIN_SHIFT},
    2054. 

  2054. 	{PMIC_FG_CUR_HTH, PMIC_FG_CUR_HTH_ADDR, PMIC_FG_CUR_HTH_MASK, PMIC_FG_CUR_HTH_SHIFT},
    2055. 

  2055. 	{PMIC_FG_CUR_LTH, PMIC_FG_CUR_LTH_ADDR, PMIC_FG_CUR_LTH_MASK, PMIC_FG_CUR_LTH_SHIFT},
    2056. 

  2056. 	{PMIC_FG_ZCV_DET_TIME, PMIC_FG_ZCV_DET_TIME_ADDR, PMIC_FG_ZCV_DET_TIME_MASK, PMIC_FG_ZCV_DET_TIME_SHIFT},
    2057. 

  2057. 	{PMIC_FG_ZCV_CAR_TH_33_19, PMIC_FG_ZCV_CAR_TH_33_19_ADDR, PMIC_FG_ZCV_CAR_TH_33_19_MASK, PMIC_FG_ZCV_CAR_TH_33_19_SHIFT},
    2058. 

  2058. 	{PMIC_FG_ZCV_CAR_TH_18_03, PMIC_FG_ZCV_CAR_TH_18_03_ADDR, PMIC_FG_ZCV_CAR_TH_18_03_MASK, PMIC_FG_ZCV_CAR_TH_18_03_SHIFT},
    2059. 

  2059. 	{PMIC_FG_ZCV_CAR_TH_02_00, PMIC_FG_ZCV_CAR_TH_02_00_ADDR, PMIC_FG_ZCV_CAR_TH_02_00_MASK, PMIC_FG_ZCV_CAR_TH_02_00_SHIFT},
    2060. 

  2060. 	{PMIC_SYSTEM_INFO_CON0, PMIC_SYSTEM_INFO_CON0_ADDR, PMIC_SYSTEM_INFO_CON0_MASK, PMIC_SYSTEM_INFO_CON0_SHIFT},
    2061. 

  2061. 	{PMIC_SYSTEM_INFO_CON1, PMIC_SYSTEM_INFO_CON1_ADDR, PMIC_SYSTEM_INFO_CON1_MASK, PMIC_SYSTEM_INFO_CON1_SHIFT},
    2062. 

  2062. 	{PMIC_SYSTEM_INFO_CON2, PMIC_SYSTEM_INFO_CON2_ADDR, PMIC_SYSTEM_INFO_CON2_MASK, PMIC_SYSTEM_INFO_CON2_SHIFT},
    2063. 

  2063. 	{PMIC_SYSTEM_INFO_CON3, PMIC_SYSTEM_INFO_CON3_ADDR, PMIC_SYSTEM_INFO_CON3_MASK, PMIC_SYSTEM_INFO_CON3_SHIFT},
    2064. 

  2064. 	{PMIC_SYSTEM_INFO_CON4, PMIC_SYSTEM_INFO_CON4_ADDR, PMIC_SYSTEM_INFO_CON4_MASK, PMIC_SYSTEM_INFO_CON4_SHIFT},
    2065. 

  2065. 	{PMIC_RG_AUDDACLPWRUP_VAUDP15, PMIC_RG_AUDDACLPWRUP_VAUDP15_ADDR, PMIC_RG_AUDDACLPWRUP_VAUDP15_MASK, PMIC_RG_AUDDACLPWRUP_VAUDP15_SHIFT},
    2066. 

  2066. 	{PMIC_RG_AUDDACRPWRUP_VAUDP15, PMIC_RG_AUDDACRPWRUP_VAUDP15_ADDR, PMIC_RG_AUDDACRPWRUP_VAUDP15_MASK, PMIC_RG_AUDDACRPWRUP_VAUDP15_SHIFT},
    2067. 

  2067. 	{PMIC_RG_AUD_DAC_PWR_UP_VA28, PMIC_RG_AUD_DAC_PWR_UP_VA28_ADDR, PMIC_RG_AUD_DAC_PWR_UP_VA28_MASK, PMIC_RG_AUD_DAC_PWR_UP_VA28_SHIFT},
    2068. 

  2068. 	{PMIC_RG_AUD_DAC_PWL_UP_VA28, PMIC_RG_AUD_DAC_PWL_UP_VA28_ADDR, PMIC_RG_AUD_DAC_PWL_UP_VA28_MASK, PMIC_RG_AUD_DAC_PWL_UP_VA28_SHIFT},
    2069. 

  2069. 	{PMIC_RG_AUDHSPWRUP_VAUDP15, PMIC_RG_AUDHSPWRUP_VAUDP15_ADDR, PMIC_RG_AUDHSPWRUP_VAUDP15_MASK, PMIC_RG_AUDHSPWRUP_VAUDP15_SHIFT},
    2070. 

  2070. 	{PMIC_RG_AUDHPLPWRUP_VAUDP15, PMIC_RG_AUDHPLPWRUP_VAUDP15_ADDR, PMIC_RG_AUDHPLPWRUP_VAUDP15_MASK, PMIC_RG_AUDHPLPWRUP_VAUDP15_SHIFT},
    2071. 

  2071. 	{PMIC_RG_AUDHPRPWRUP_VAUDP15, PMIC_RG_AUDHPRPWRUP_VAUDP15_ADDR, PMIC_RG_AUDHPRPWRUP_VAUDP15_MASK, PMIC_RG_AUDHPRPWRUP_VAUDP15_SHIFT},
    2072. 

  2072. 	{PMIC_RG_AUDHSMUXINPUTSEL_VAUDP15, PMIC_RG_AUDHSMUXINPUTSEL_VAUDP15_ADDR, PMIC_RG_AUDHSMUXINPUTSEL_VAUDP15_MASK, PMIC_RG_AUDHSMUXINPUTSEL_VAUDP15_SHIFT},
    2073. 

  2073. 	{PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP15, PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP15_ADDR, PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP15_MASK, PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP15_SHIFT},
    2074. 

  2074. 	{PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP15, PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP15_ADDR, PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP15_MASK, PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP15_SHIFT},
    2075. 

  2075. 	{PMIC_RG_AUDHSSCDISABLE_VAUDP15, PMIC_RG_AUDHSSCDISABLE_VAUDP15_ADDR, PMIC_RG_AUDHSSCDISABLE_VAUDP15_MASK, PMIC_RG_AUDHSSCDISABLE_VAUDP15_SHIFT},
    2076. 

  2076. 	{PMIC_RG_AUDHPLSCDISABLE_VAUDP15, PMIC_RG_AUDHPLSCDISABLE_VAUDP15_ADDR, PMIC_RG_AUDHPLSCDISABLE_VAUDP15_MASK, PMIC_RG_AUDHPLSCDISABLE_VAUDP15_SHIFT},
    2077. 

  2077. 	{PMIC_RG_AUDHPRSCDISABLE_VAUDP15, PMIC_RG_AUDHPRSCDISABLE_VAUDP15_ADDR, PMIC_RG_AUDHPRSCDISABLE_VAUDP15_MASK, PMIC_RG_AUDHPRSCDISABLE_VAUDP15_SHIFT},
    2078. 

  2078. 	{PMIC_RG_AUDHPLBSCCURRENT_VAUDP15, PMIC_RG_AUDHPLBSCCURRENT_VAUDP15_ADDR, PMIC_RG_AUDHPLBSCCURRENT_VAUDP15_MASK, PMIC_RG_AUDHPLBSCCURRENT_VAUDP15_SHIFT},
    2079. 

  2079. 	{PMIC_RG_AUDHPRBSCCURRENT_VAUDP15, PMIC_RG_AUDHPRBSCCURRENT_VAUDP15_ADDR, PMIC_RG_AUDHPRBSCCURRENT_VAUDP15_MASK, PMIC_RG_AUDHPRBSCCURRENT_VAUDP15_SHIFT},
    2080. 

  2080. 	{PMIC_RG_AUDHSBSCCURRENT_VAUDP15, PMIC_RG_AUDHSBSCCURRENT_VAUDP15_ADDR, PMIC_RG_AUDHSBSCCURRENT_VAUDP15_MASK, PMIC_RG_AUDHSBSCCURRENT_VAUDP15_SHIFT},
    2081. 

  2081. 	{PMIC_RG_AUDHPSTARTUP_VAUDP15, PMIC_RG_AUDHPSTARTUP_VAUDP15_ADDR, PMIC_RG_AUDHPSTARTUP_VAUDP15_MASK, PMIC_RG_AUDHPSTARTUP_VAUDP15_SHIFT},
    2082. 

  2082. 	{PMIC_RG_AUDHSSTARTUP_VAUDP15, PMIC_RG_AUDHSSTARTUP_VAUDP15_ADDR, PMIC_RG_AUDHSSTARTUP_VAUDP15_MASK, PMIC_RG_AUDHSSTARTUP_VAUDP15_SHIFT},
    2083. 

  2083. 	{PMIC_RG_PRECHARGEBUF_EN_VAUDP15, PMIC_RG_PRECHARGEBUF_EN_VAUDP15_ADDR, PMIC_RG_PRECHARGEBUF_EN_VAUDP15_MASK, PMIC_RG_PRECHARGEBUF_EN_VAUDP15_SHIFT},
    2084. 

  2084. 	{PMIC_RG_HPINPUTSTBENH_VAUDP15, PMIC_RG_HPINPUTSTBENH_VAUDP15_ADDR, PMIC_RG_HPINPUTSTBENH_VAUDP15_MASK, PMIC_RG_HPINPUTSTBENH_VAUDP15_SHIFT},
    2085. 

  2085. 	{PMIC_RG_HPOUTPUTSTBENH_VAUDP15, PMIC_RG_HPOUTPUTSTBENH_VAUDP15_ADDR, PMIC_RG_HPOUTPUTSTBENH_VAUDP15_MASK, PMIC_RG_HPOUTPUTSTBENH_VAUDP15_SHIFT},
    2086. 

  2086. 	{PMIC_RG_HPINPUTRESET0_VAUDP15, PMIC_RG_HPINPUTRESET0_VAUDP15_ADDR, PMIC_RG_HPINPUTRESET0_VAUDP15_MASK, PMIC_RG_HPINPUTRESET0_VAUDP15_SHIFT},
    2087. 

  2087. 	{PMIC_RG_HPOUTPUTRESET0_VAUDP15, PMIC_RG_HPOUTPUTRESET0_VAUDP15_ADDR, PMIC_RG_HPOUTPUTRESET0_VAUDP15_MASK, PMIC_RG_HPOUTPUTRESET0_VAUDP15_SHIFT},
    2088. 

  2088. 	{PMIC_RG_HPOUT_SHORTVCM_VAUDP15, PMIC_RG_HPOUT_SHORTVCM_VAUDP15_ADDR, PMIC_RG_HPOUT_SHORTVCM_VAUDP15_MASK, PMIC_RG_HPOUT_SHORTVCM_VAUDP15_SHIFT},
    2089. 

  2089. 	{PMIC_RG_HSINPUTSTBENH_VAUDP15, PMIC_RG_HSINPUTSTBENH_VAUDP15_ADDR, PMIC_RG_HSINPUTSTBENH_VAUDP15_MASK, PMIC_RG_HSINPUTSTBENH_VAUDP15_SHIFT},
    2090. 

  2090. 	{PMIC_RG_HSOUTPUTSTBENH_VAUDP15, PMIC_RG_HSOUTPUTSTBENH_VAUDP15_ADDR, PMIC_RG_HSOUTPUTSTBENH_VAUDP15_MASK, PMIC_RG_HSOUTPUTSTBENH_VAUDP15_SHIFT},
    2091. 

  2091. 	{PMIC_RG_HSINPUTRESET0_VAUDP15, PMIC_RG_HSINPUTRESET0_VAUDP15_ADDR, PMIC_RG_HSINPUTRESET0_VAUDP15_MASK, PMIC_RG_HSINPUTRESET0_VAUDP15_SHIFT},
    2092. 

  2092. 	{PMIC_RG_HSOUTPUTRESET0_VAUDP15, PMIC_RG_HSOUTPUTRESET0_VAUDP15_ADDR, PMIC_RG_HSOUTPUTRESET0_VAUDP15_MASK, PMIC_RG_HSOUTPUTRESET0_VAUDP15_SHIFT},
    2093. 

  2093. 	{PMIC_RG_HPOUTSTB_RSEL_VAUDP15, PMIC_RG_HPOUTSTB_RSEL_VAUDP15_ADDR, PMIC_RG_HPOUTSTB_RSEL_VAUDP15_MASK, PMIC_RG_HPOUTSTB_RSEL_VAUDP15_SHIFT},
    2094. 

  2094. 	{PMIC_RG_HSOUT_SHORTVCM_VAUDP15, PMIC_RG_HSOUT_SHORTVCM_VAUDP15_ADDR, PMIC_RG_HSOUT_SHORTVCM_VAUDP15_MASK, PMIC_RG_HSOUT_SHORTVCM_VAUDP15_SHIFT},
    2095. 

  2095. 	{PMIC_RG_AUDHPLTRIM_VAUDP15, PMIC_RG_AUDHPLTRIM_VAUDP15_ADDR, PMIC_RG_AUDHPLTRIM_VAUDP15_MASK, PMIC_RG_AUDHPLTRIM_VAUDP15_SHIFT},
    2096. 

  2096. 	{PMIC_RG_AUDHPRTRIM_VAUDP15, PMIC_RG_AUDHPRTRIM_VAUDP15_ADDR, PMIC_RG_AUDHPRTRIM_VAUDP15_MASK, PMIC_RG_AUDHPRTRIM_VAUDP15_SHIFT},
    2097. 

  2097. 	{PMIC_RG_AUDHPTRIM_EN_VAUDP15, PMIC_RG_AUDHPTRIM_EN_VAUDP15_ADDR, PMIC_RG_AUDHPTRIM_EN_VAUDP15_MASK, PMIC_RG_AUDHPTRIM_EN_VAUDP15_SHIFT},
    2098. 

  2098. 	{PMIC_RG_AUDHPLFINETRIM_VAUDP15, PMIC_RG_AUDHPLFINETRIM_VAUDP15_ADDR, PMIC_RG_AUDHPLFINETRIM_VAUDP15_MASK, PMIC_RG_AUDHPLFINETRIM_VAUDP15_SHIFT},
    2099. 

  2099. 	{PMIC_RG_AUDHPRFINETRIM_VAUDP15, PMIC_RG_AUDHPRFINETRIM_VAUDP15_ADDR, PMIC_RG_AUDHPRFINETRIM_VAUDP15_MASK, PMIC_RG_AUDHPRFINETRIM_VAUDP15_SHIFT},
    2100. 

  2100. 	{PMIC_RG_AUDTRIMBUF_EN_VAUDP15, PMIC_RG_AUDTRIMBUF_EN_VAUDP15_ADDR, PMIC_RG_AUDTRIMBUF_EN_VAUDP15_MASK, PMIC_RG_AUDTRIMBUF_EN_VAUDP15_SHIFT},
    2101. 

  2101. 	{PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15, PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15_ADDR, PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15_MASK, PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15_SHIFT},
    2102. 

  2102. 	{PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP15, PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP15_ADDR, PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP15_MASK, PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP15_SHIFT},
    2103. 

  2103. 	{PMIC_RG_AUDHPSPKDET_EN_VAUDP15, PMIC_RG_AUDHPSPKDET_EN_VAUDP15_ADDR, PMIC_RG_AUDHPSPKDET_EN_VAUDP15_MASK, PMIC_RG_AUDHPSPKDET_EN_VAUDP15_SHIFT},
    2104. 

  2104. 	{PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15, PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15_ADDR, PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15_MASK, PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15_SHIFT},
    2105. 

  2105. 	{PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15, PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15_ADDR, PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15_MASK, PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15_SHIFT},
    2106. 

  2106. 	{PMIC_RG_ABIDEC_RESERVED_VA28, PMIC_RG_ABIDEC_RESERVED_VA28_ADDR, PMIC_RG_ABIDEC_RESERVED_VA28_MASK, PMIC_RG_ABIDEC_RESERVED_VA28_SHIFT},
    2107. 

  2107. 	{PMIC_RG_ABIDEC_RESERVED_VAUDP15, PMIC_RG_ABIDEC_RESERVED_VAUDP15_ADDR, PMIC_RG_ABIDEC_RESERVED_VAUDP15_MASK, PMIC_RG_ABIDEC_RESERVED_VAUDP15_SHIFT},
    2108. 

  2108. 	{PMIC_RG_AUDBIASADJ_0_VAUDP15, PMIC_RG_AUDBIASADJ_0_VAUDP15_ADDR, PMIC_RG_AUDBIASADJ_0_VAUDP15_MASK, PMIC_RG_AUDBIASADJ_0_VAUDP15_SHIFT},
    2109. 

  2109. 	{PMIC_RG_AUDBIASADJ_1_VAUDP15, PMIC_RG_AUDBIASADJ_1_VAUDP15_ADDR, PMIC_RG_AUDBIASADJ_1_VAUDP15_MASK, PMIC_RG_AUDBIASADJ_1_VAUDP15_SHIFT},
    2110. 

  2110. 	{PMIC_RG_AUDIBIASPWRDN_VAUDP15, PMIC_RG_AUDIBIASPWRDN_VAUDP15_ADDR, PMIC_RG_AUDIBIASPWRDN_VAUDP15_MASK, PMIC_RG_AUDIBIASPWRDN_VAUDP15_SHIFT},
    2111. 

  2111. 	{PMIC_RG_RSTB_DECODER_VA28, PMIC_RG_RSTB_DECODER_VA28_ADDR, PMIC_RG_RSTB_DECODER_VA28_MASK, PMIC_RG_RSTB_DECODER_VA28_SHIFT},
    2112. 

  2112. 	{PMIC_RG_RSTB_ENCODER_VA28, PMIC_RG_RSTB_ENCODER_VA28_ADDR, PMIC_RG_RSTB_ENCODER_VA28_MASK, PMIC_RG_RSTB_ENCODER_VA28_SHIFT},
    2113. 

  2113. 	{PMIC_RG_SEL_DECODER_96K_VA28, PMIC_RG_SEL_DECODER_96K_VA28_ADDR, PMIC_RG_SEL_DECODER_96K_VA28_MASK, PMIC_RG_SEL_DECODER_96K_VA28_SHIFT},
    2114. 

  2114. 	{PMIC_RG_SEL_ENCODER_96K_VA28, PMIC_RG_SEL_ENCODER_96K_VA28_ADDR, PMIC_RG_SEL_ENCODER_96K_VA28_MASK, PMIC_RG_SEL_ENCODER_96K_VA28_SHIFT},
    2115. 

  2115. 	{PMIC_RG_SEL_DELAY_VCORE, PMIC_RG_SEL_DELAY_VCORE_ADDR, PMIC_RG_SEL_DELAY_VCORE_MASK, PMIC_RG_SEL_DELAY_VCORE_SHIFT},
    2116. 

  2116. 	{PMIC_RG_HCLDO_EN_VA18, PMIC_RG_HCLDO_EN_VA18_ADDR, PMIC_RG_HCLDO_EN_VA18_MASK, PMIC_RG_HCLDO_EN_VA18_SHIFT},
    2117. 

  2117. 	{PMIC_RG_LCLDO_EN_VA18, PMIC_RG_LCLDO_EN_VA18_ADDR, PMIC_RG_LCLDO_EN_VA18_MASK, PMIC_RG_LCLDO_EN_VA18_SHIFT},
    2118. 

  2118. 	{PMIC_RG_LCLDO_ENC_EN_VA28, PMIC_RG_LCLDO_ENC_EN_VA28_ADDR, PMIC_RG_LCLDO_ENC_EN_VA28_MASK, PMIC_RG_LCLDO_ENC_EN_VA28_SHIFT},
    2119. 

  2119. 	{PMIC_RG_VA33REFGEN_EN_VA18, PMIC_RG_VA33REFGEN_EN_VA18_ADDR, PMIC_RG_VA33REFGEN_EN_VA18_MASK, PMIC_RG_VA33REFGEN_EN_VA18_SHIFT},
    2120. 

  2120. 	{PMIC_RG_HCLDO_PDDIS_EN_VA18, PMIC_RG_HCLDO_PDDIS_EN_VA18_ADDR, PMIC_RG_HCLDO_PDDIS_EN_VA18_MASK, PMIC_RG_HCLDO_PDDIS_EN_VA18_SHIFT},
    2121. 

  2121. 	{PMIC_RG_HCLDO_REMOTE_SENSE_VA18, PMIC_RG_HCLDO_REMOTE_SENSE_VA18_ADDR, PMIC_RG_HCLDO_REMOTE_SENSE_VA18_MASK, PMIC_RG_HCLDO_REMOTE_SENSE_VA18_SHIFT},
    2122. 

  2122. 	{PMIC_RG_LCLDO_PDDIS_EN_VA18, PMIC_RG_LCLDO_PDDIS_EN_VA18_ADDR, PMIC_RG_LCLDO_PDDIS_EN_VA18_MASK, PMIC_RG_LCLDO_PDDIS_EN_VA18_SHIFT},
    2123. 

  2123. 	{PMIC_RG_LCLDO_REMOTE_SENSE_VA18, PMIC_RG_LCLDO_REMOTE_SENSE_VA18_ADDR, PMIC_RG_LCLDO_REMOTE_SENSE_VA18_MASK, PMIC_RG_LCLDO_REMOTE_SENSE_VA18_SHIFT},
    2124. 

  2124. 	{PMIC_RG_LCLDO_VOSEL_VA18, PMIC_RG_LCLDO_VOSEL_VA18_ADDR, PMIC_RG_LCLDO_VOSEL_VA18_MASK, PMIC_RG_LCLDO_VOSEL_VA18_SHIFT},
    2125. 

  2125. 	{PMIC_RG_HCLDO_VOSEL_VA18, PMIC_RG_HCLDO_VOSEL_VA18_ADDR, PMIC_RG_HCLDO_VOSEL_VA18_MASK, PMIC_RG_HCLDO_VOSEL_VA18_SHIFT},
    2126. 

  2126. 	{PMIC_RG_LCLDO_ENC_PDDIS_EN_VA28, PMIC_RG_LCLDO_ENC_PDDIS_EN_VA28_ADDR, PMIC_RG_LCLDO_ENC_PDDIS_EN_VA28_MASK, PMIC_RG_LCLDO_ENC_PDDIS_EN_VA28_SHIFT},
    2127. 

  2127. 	{PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA28, PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA28_ADDR, PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA28_MASK, PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA28_SHIFT},
    2128. 

  2128. 	{PMIC_RG_VA28REFGEN_EN_VA28, PMIC_RG_VA28REFGEN_EN_VA28_ADDR, PMIC_RG_VA28REFGEN_EN_VA28_MASK, PMIC_RG_VA28REFGEN_EN_VA28_SHIFT},
    2129. 

  2129. 	{PMIC_RG_AUDPMU_RESERVED_VA28, PMIC_RG_AUDPMU_RESERVED_VA28_ADDR, PMIC_RG_AUDPMU_RESERVED_VA28_MASK, PMIC_RG_AUDPMU_RESERVED_VA28_SHIFT},
    2130. 

  2130. 	{PMIC_RG_AUDPMU_RESERVED_VA18, PMIC_RG_AUDPMU_RESERVED_VA18_ADDR, PMIC_RG_AUDPMU_RESERVED_VA18_MASK, PMIC_RG_AUDPMU_RESERVED_VA18_SHIFT},
    2131. 

  2131. 	{PMIC_RG_AUDPMU_RESERVED_VAUDP15, PMIC_RG_AUDPMU_RESERVED_VAUDP15_ADDR, PMIC_RG_AUDPMU_RESERVED_VAUDP15_MASK, PMIC_RG_AUDPMU_RESERVED_VAUDP15_SHIFT},
    2132. 

  2132. 	{PMIC_RG_NVREG_EN_VAUDP15, PMIC_RG_NVREG_EN_VAUDP15_ADDR, PMIC_RG_NVREG_EN_VAUDP15_MASK, PMIC_RG_NVREG_EN_VAUDP15_SHIFT},
    2133. 

  2133. 	{PMIC_RG_NVREG_PULL0V_VAUDP15, PMIC_RG_NVREG_PULL0V_VAUDP15_ADDR, PMIC_RG_NVREG_PULL0V_VAUDP15_MASK, PMIC_RG_NVREG_PULL0V_VAUDP15_SHIFT},
    2134. 

  2134. 	{PMIC_RG_AUDGLB_PWRDN_VA28, PMIC_RG_AUDGLB_PWRDN_VA28_ADDR, PMIC_RG_AUDGLB_PWRDN_VA28_MASK, PMIC_RG_AUDGLB_PWRDN_VA28_SHIFT},
    2135. 

  2135. 	{PMIC_RG_AUDPREAMPLON, PMIC_RG_AUDPREAMPLON_ADDR, PMIC_RG_AUDPREAMPLON_MASK, PMIC_RG_AUDPREAMPLON_SHIFT},
    2136. 

  2136. 	{PMIC_RG_AUDPREAMPLDCCEN, PMIC_RG_AUDPREAMPLDCCEN_ADDR, PMIC_RG_AUDPREAMPLDCCEN_MASK, PMIC_RG_AUDPREAMPLDCCEN_SHIFT},
    2137. 

  2137. 	{PMIC_RG_AUDPREAMPLDCRPECHARGE, PMIC_RG_AUDPREAMPLDCRPECHARGE_ADDR, PMIC_RG_AUDPREAMPLDCRPECHARGE_MASK, PMIC_RG_AUDPREAMPLDCRPECHARGE_SHIFT},
    2138. 

  2138. 	{PMIC_RG_AUDPREAMPLPGATEST, PMIC_RG_AUDPREAMPLPGATEST_ADDR, PMIC_RG_AUDPREAMPLPGATEST_MASK, PMIC_RG_AUDPREAMPLPGATEST_SHIFT},
    2139. 

  2139. 	{PMIC_RG_AUDPREAMPLVSCALE, PMIC_RG_AUDPREAMPLVSCALE_ADDR, PMIC_RG_AUDPREAMPLVSCALE_MASK, PMIC_RG_AUDPREAMPLVSCALE_SHIFT},
    2140. 

  2140. 	{PMIC_RG_AUDPREAMPLINPUTSEL, PMIC_RG_AUDPREAMPLINPUTSEL_ADDR, PMIC_RG_AUDPREAMPLINPUTSEL_MASK, PMIC_RG_AUDPREAMPLINPUTSEL_SHIFT},
    2141. 

  2141. 	{PMIC_RG_AUDADCLPWRUP, PMIC_RG_AUDADCLPWRUP_ADDR, PMIC_RG_AUDADCLPWRUP_MASK, PMIC_RG_AUDADCLPWRUP_SHIFT},
    2142. 

  2142. 	{PMIC_RG_AUDADCLINPUTSEL, PMIC_RG_AUDADCLINPUTSEL_ADDR, PMIC_RG_AUDADCLINPUTSEL_MASK, PMIC_RG_AUDADCLINPUTSEL_SHIFT},
    2143. 

  2143. 	{PMIC_RG_AUDPREAMPRON, PMIC_RG_AUDPREAMPRON_ADDR, PMIC_RG_AUDPREAMPRON_MASK, PMIC_RG_AUDPREAMPRON_SHIFT},
    2144. 

  2144. 	{PMIC_RG_AUDPREAMPRDCCEN, PMIC_RG_AUDPREAMPRDCCEN_ADDR, PMIC_RG_AUDPREAMPRDCCEN_MASK, PMIC_RG_AUDPREAMPRDCCEN_SHIFT},
    2145. 

  2145. 	{PMIC_RG_AUDPREAMPRDCRPECHARGE, PMIC_RG_AUDPREAMPRDCRPECHARGE_ADDR, PMIC_RG_AUDPREAMPRDCRPECHARGE_MASK, PMIC_RG_AUDPREAMPRDCRPECHARGE_SHIFT},
    2146. 

  2146. 	{PMIC_RG_AUDPREAMPRPGATEST, PMIC_RG_AUDPREAMPRPGATEST_ADDR, PMIC_RG_AUDPREAMPRPGATEST_MASK, PMIC_RG_AUDPREAMPRPGATEST_SHIFT},
    2147. 

  2147. 	{PMIC_RG_AUDPREAMPRVSCALE, PMIC_RG_AUDPREAMPRVSCALE_ADDR, PMIC_RG_AUDPREAMPRVSCALE_MASK, PMIC_RG_AUDPREAMPRVSCALE_SHIFT},
    2148. 

  2148. 	{PMIC_RG_AUDPREAMPRINPUTSEL, PMIC_RG_AUDPREAMPRINPUTSEL_ADDR, PMIC_RG_AUDPREAMPRINPUTSEL_MASK, PMIC_RG_AUDPREAMPRINPUTSEL_SHIFT},
    2149. 

  2149. 	{PMIC_RG_AUDADCRPWRUP, PMIC_RG_AUDADCRPWRUP_ADDR, PMIC_RG_AUDADCRPWRUP_MASK, PMIC_RG_AUDADCRPWRUP_SHIFT},
    2150. 

  2150. 	{PMIC_RG_AUDADCRINPUTSEL, PMIC_RG_AUDADCRINPUTSEL_ADDR, PMIC_RG_AUDADCRINPUTSEL_MASK, PMIC_RG_AUDADCRINPUTSEL_SHIFT},
    2151. 

  2151. 	{PMIC_RG_AUDULHALFBIAS, PMIC_RG_AUDULHALFBIAS_ADDR, PMIC_RG_AUDULHALFBIAS_MASK, PMIC_RG_AUDULHALFBIAS_SHIFT},
    2152. 

  2152. 	{PMIC_RG_AUDGLBMADLPWEN, PMIC_RG_AUDGLBMADLPWEN_ADDR, PMIC_RG_AUDGLBMADLPWEN_MASK, PMIC_RG_AUDGLBMADLPWEN_SHIFT},
    2153. 

  2153. 	{PMIC_RG_AUDPREAMPLPEN, PMIC_RG_AUDPREAMPLPEN_ADDR, PMIC_RG_AUDPREAMPLPEN_MASK, PMIC_RG_AUDPREAMPLPEN_SHIFT},
    2154. 

  2154. 	{PMIC_RG_AUDADC1STSTAGELPEN, PMIC_RG_AUDADC1STSTAGELPEN_ADDR, PMIC_RG_AUDADC1STSTAGELPEN_MASK, PMIC_RG_AUDADC1STSTAGELPEN_SHIFT},
    2155. 

  2155. 	{PMIC_RG_AUDADC2NDSTAGELPEN, PMIC_RG_AUDADC2NDSTAGELPEN_ADDR, PMIC_RG_AUDADC2NDSTAGELPEN_MASK, PMIC_RG_AUDADC2NDSTAGELPEN_SHIFT},
    2156. 

  2156. 	{PMIC_RG_AUDADCFLASHLPEN, PMIC_RG_AUDADCFLASHLPEN_ADDR, PMIC_RG_AUDADCFLASHLPEN_MASK, PMIC_RG_AUDADCFLASHLPEN_SHIFT},
    2157. 

  2157. 	{PMIC_RG_AUDPREAMPIDDTEST, PMIC_RG_AUDPREAMPIDDTEST_ADDR, PMIC_RG_AUDPREAMPIDDTEST_MASK, PMIC_RG_AUDPREAMPIDDTEST_SHIFT},
    2158. 

  2158. 	{PMIC_RG_AUDADC1STSTAGEIDDTEST, PMIC_RG_AUDADC1STSTAGEIDDTEST_ADDR, PMIC_RG_AUDADC1STSTAGEIDDTEST_MASK, PMIC_RG_AUDADC1STSTAGEIDDTEST_SHIFT},
    2159. 

  2159. 	{PMIC_RG_AUDADC2NDSTAGEIDDTEST, PMIC_RG_AUDADC2NDSTAGEIDDTEST_ADDR, PMIC_RG_AUDADC2NDSTAGEIDDTEST_MASK, PMIC_RG_AUDADC2NDSTAGEIDDTEST_SHIFT},
    2160. 

  2160. 	{PMIC_RG_AUDADCREFBUFIDDTEST, PMIC_RG_AUDADCREFBUFIDDTEST_ADDR, PMIC_RG_AUDADCREFBUFIDDTEST_MASK, PMIC_RG_AUDADCREFBUFIDDTEST_SHIFT},
    2161. 

  2161. 	{PMIC_RG_AUDADCFLASHIDDTEST, PMIC_RG_AUDADCFLASHIDDTEST_ADDR, PMIC_RG_AUDADCFLASHIDDTEST_MASK, PMIC_RG_AUDADCFLASHIDDTEST_SHIFT},
    2162. 

  2162. 	{PMIC_RG_AUDADCDAC0P25FS, PMIC_RG_AUDADCDAC0P25FS_ADDR, PMIC_RG_AUDADCDAC0P25FS_MASK, PMIC_RG_AUDADCDAC0P25FS_SHIFT},
    2163. 

  2163. 	{PMIC_RG_AUDADCCLKSEL, PMIC_RG_AUDADCCLKSEL_ADDR, PMIC_RG_AUDADCCLKSEL_MASK, PMIC_RG_AUDADCCLKSEL_SHIFT},
    2164. 

  2164. 	{PMIC_RG_AUDADCCLKSOURCE, PMIC_RG_AUDADCCLKSOURCE_ADDR, PMIC_RG_AUDADCCLKSOURCE_MASK, PMIC_RG_AUDADCCLKSOURCE_SHIFT},
    2165. 

  2165. 	{PMIC_RG_AUDADCCLKGENMODE, PMIC_RG_AUDADCCLKGENMODE_ADDR, PMIC_RG_AUDADCCLKGENMODE_MASK, PMIC_RG_AUDADCCLKGENMODE_SHIFT},
    2166. 

  2166. 	{PMIC_RG_AUDPREAMPAAFEN, PMIC_RG_AUDPREAMPAAFEN_ADDR, PMIC_RG_AUDPREAMPAAFEN_MASK, PMIC_RG_AUDPREAMPAAFEN_SHIFT},
    2167. 

  2167. 	{PMIC_RG_DCCVCMBUFLPMODSEL, PMIC_RG_DCCVCMBUFLPMODSEL_ADDR, PMIC_RG_DCCVCMBUFLPMODSEL_MASK, PMIC_RG_DCCVCMBUFLPMODSEL_SHIFT},
    2168. 

  2168. 	{PMIC_RG_DCCVCMBUFLPSWEN, PMIC_RG_DCCVCMBUFLPSWEN_ADDR, PMIC_RG_DCCVCMBUFLPSWEN_MASK, PMIC_RG_DCCVCMBUFLPSWEN_SHIFT},
    2169. 

  2169. 	{PMIC_RG_AUDSPAREPGA, PMIC_RG_AUDSPAREPGA_ADDR, PMIC_RG_AUDSPAREPGA_MASK, PMIC_RG_AUDSPAREPGA_SHIFT},
    2170. 

  2170. 	{PMIC_RG_AUDADC1STSTAGESDENB, PMIC_RG_AUDADC1STSTAGESDENB_ADDR, PMIC_RG_AUDADC1STSTAGESDENB_MASK, PMIC_RG_AUDADC1STSTAGESDENB_SHIFT},
    2171. 

  2171. 	{PMIC_RG_AUDADC2NDSTAGERESET, PMIC_RG_AUDADC2NDSTAGERESET_ADDR, PMIC_RG_AUDADC2NDSTAGERESET_MASK, PMIC_RG_AUDADC2NDSTAGERESET_SHIFT},
    2172. 

  2172. 	{PMIC_RG_AUDADC3RDSTAGERESET, PMIC_RG_AUDADC3RDSTAGERESET_ADDR, PMIC_RG_AUDADC3RDSTAGERESET_MASK, PMIC_RG_AUDADC3RDSTAGERESET_SHIFT},
    2173. 

  2173. 	{PMIC_RG_AUDADCFSRESET, PMIC_RG_AUDADCFSRESET_ADDR, PMIC_RG_AUDADCFSRESET_MASK, PMIC_RG_AUDADCFSRESET_SHIFT},
    2174. 

  2174. 	{PMIC_RG_AUDADCWIDECM, PMIC_RG_AUDADCWIDECM_ADDR, PMIC_RG_AUDADCWIDECM_MASK, PMIC_RG_AUDADCWIDECM_SHIFT},
    2175. 

  2175. 	{PMIC_RG_AUDADCNOPATEST, PMIC_RG_AUDADCNOPATEST_ADDR, PMIC_RG_AUDADCNOPATEST_MASK, PMIC_RG_AUDADCNOPATEST_SHIFT},
    2176. 

  2176. 	{PMIC_RG_AUDADCBYPASS, PMIC_RG_AUDADCBYPASS_ADDR, PMIC_RG_AUDADCBYPASS_MASK, PMIC_RG_AUDADCBYPASS_SHIFT},
    2177. 

  2177. 	{PMIC_RG_AUDADCFFBYPASS, PMIC_RG_AUDADCFFBYPASS_ADDR, PMIC_RG_AUDADCFFBYPASS_MASK, PMIC_RG_AUDADCFFBYPASS_SHIFT},
    2178. 

  2178. 	{PMIC_RG_AUDADCDACFBCURRENT, PMIC_RG_AUDADCDACFBCURRENT_ADDR, PMIC_RG_AUDADCDACFBCURRENT_MASK, PMIC_RG_AUDADCDACFBCURRENT_SHIFT},
    2179. 

  2179. 	{PMIC_RG_AUDADCDACIDDTEST, PMIC_RG_AUDADCDACIDDTEST_ADDR, PMIC_RG_AUDADCDACIDDTEST_MASK, PMIC_RG_AUDADCDACIDDTEST_SHIFT},
    2180. 

  2180. 	{PMIC_RG_AUDADCDACNRZ, PMIC_RG_AUDADCDACNRZ_ADDR, PMIC_RG_AUDADCDACNRZ_MASK, PMIC_RG_AUDADCDACNRZ_SHIFT},
    2181. 

  2181. 	{PMIC_RG_AUDADCNODEM, PMIC_RG_AUDADCNODEM_ADDR, PMIC_RG_AUDADCNODEM_MASK, PMIC_RG_AUDADCNODEM_SHIFT},
    2182. 

  2182. 	{PMIC_RG_AUDADCDACTEST, PMIC_RG_AUDADCDACTEST_ADDR, PMIC_RG_AUDADCDACTEST_MASK, PMIC_RG_AUDADCDACTEST_SHIFT},
    2183. 

  2183. 	{PMIC_RG_AUDADCTESTDATA, PMIC_RG_AUDADCTESTDATA_ADDR, PMIC_RG_AUDADCTESTDATA_MASK, PMIC_RG_AUDADCTESTDATA_SHIFT},
    2184. 

  2184. 	{PMIC_RG_AUDRCTUNEL, PMIC_RG_AUDRCTUNEL_ADDR, PMIC_RG_AUDRCTUNEL_MASK, PMIC_RG_AUDRCTUNEL_SHIFT},
    2185. 

  2185. 	{PMIC_RG_AUDRCTUNELSEL, PMIC_RG_AUDRCTUNELSEL_ADDR, PMIC_RG_AUDRCTUNELSEL_MASK, PMIC_RG_AUDRCTUNELSEL_SHIFT},
    2186. 

  2186. 	{PMIC_RG_AUDRCTUNER, PMIC_RG_AUDRCTUNER_ADDR, PMIC_RG_AUDRCTUNER_MASK, PMIC_RG_AUDRCTUNER_SHIFT},
    2187. 

  2187. 	{PMIC_RG_AUDRCTUNERSEL, PMIC_RG_AUDRCTUNERSEL_ADDR, PMIC_RG_AUDRCTUNERSEL_MASK, PMIC_RG_AUDRCTUNERSEL_SHIFT},
    2188. 

  2188. 	{PMIC_RG_AUDSPAREVA28, PMIC_RG_AUDSPAREVA28_ADDR, PMIC_RG_AUDSPAREVA28_MASK, PMIC_RG_AUDSPAREVA28_SHIFT},
    2189. 

  2189. 	{PMIC_RG_AUDSPAREVA18, PMIC_RG_AUDSPAREVA18_ADDR, PMIC_RG_AUDSPAREVA18_MASK, PMIC_RG_AUDSPAREVA18_SHIFT},
    2190. 

  2190. 	{PMIC_RG_AUDENCSPAREVA28, PMIC_RG_AUDENCSPAREVA28_ADDR, PMIC_RG_AUDENCSPAREVA28_MASK, PMIC_RG_AUDENCSPAREVA28_SHIFT},
    2191. 

  2191. 	{PMIC_RG_AUDENCSPAREVA18, PMIC_RG_AUDENCSPAREVA18_ADDR, PMIC_RG_AUDENCSPAREVA18_MASK, PMIC_RG_AUDENCSPAREVA18_SHIFT},
    2192. 

  2192. 	{PMIC_RG_AUDDIGMICEN, PMIC_RG_AUDDIGMICEN_ADDR, PMIC_RG_AUDDIGMICEN_MASK, PMIC_RG_AUDDIGMICEN_SHIFT},
    2193. 

  2193. 	{PMIC_RG_AUDDIGMICBIAS, PMIC_RG_AUDDIGMICBIAS_ADDR, PMIC_RG_AUDDIGMICBIAS_MASK, PMIC_RG_AUDDIGMICBIAS_SHIFT},
    2194. 

  2194. 	{PMIC_RG_DMICHPCLKEN, PMIC_RG_DMICHPCLKEN_ADDR, PMIC_RG_DMICHPCLKEN_MASK, PMIC_RG_DMICHPCLKEN_SHIFT},
    2195. 

  2195. 	{PMIC_RG_AUDDIGMICPDUTY, PMIC_RG_AUDDIGMICPDUTY_ADDR, PMIC_RG_AUDDIGMICPDUTY_MASK, PMIC_RG_AUDDIGMICPDUTY_SHIFT},
    2196. 

  2196. 	{PMIC_RG_AUDDIGMICNDUTY, PMIC_RG_AUDDIGMICNDUTY_ADDR, PMIC_RG_AUDDIGMICNDUTY_MASK, PMIC_RG_AUDDIGMICNDUTY_SHIFT},
    2197. 

  2197. 	{PMIC_RG_DMICMONEN, PMIC_RG_DMICMONEN_ADDR, PMIC_RG_DMICMONEN_MASK, PMIC_RG_DMICMONEN_SHIFT},
    2198. 

  2198. 	{PMIC_RG_DMICMONSEL, PMIC_RG_DMICMONSEL_ADDR, PMIC_RG_DMICMONSEL_MASK, PMIC_RG_DMICMONSEL_SHIFT},
    2199. 

  2199. 	{PMIC_RG_AUDSPAREVMIC, PMIC_RG_AUDSPAREVMIC_ADDR, PMIC_RG_AUDSPAREVMIC_MASK, PMIC_RG_AUDSPAREVMIC_SHIFT},
    2200. 

  2200. 	{PMIC_RG_AUDPWDBMICBIAS0, PMIC_RG_AUDPWDBMICBIAS0_ADDR, PMIC_RG_AUDPWDBMICBIAS0_MASK, PMIC_RG_AUDPWDBMICBIAS0_SHIFT},
    2201. 

  2201. 	{PMIC_RG_AUDMICBIAS0DCSWPEN, PMIC_RG_AUDMICBIAS0DCSWPEN_ADDR, PMIC_RG_AUDMICBIAS0DCSWPEN_MASK, PMIC_RG_AUDMICBIAS0DCSWPEN_SHIFT},
    2202. 

  2202. 	{PMIC_RG_AUDMICBIAS0DCSWNEN, PMIC_RG_AUDMICBIAS0DCSWNEN_ADDR, PMIC_RG_AUDMICBIAS0DCSWNEN_MASK, PMIC_RG_AUDMICBIAS0DCSWNEN_SHIFT},
    2203. 

  2203. 	{PMIC_RG_AUDMICBIAS0BYPASSEN, PMIC_RG_AUDMICBIAS0BYPASSEN_ADDR, PMIC_RG_AUDMICBIAS0BYPASSEN_MASK, PMIC_RG_AUDMICBIAS0BYPASSEN_SHIFT},
    2204. 

  2204. 	{PMIC_RG_AUDPWDBMICBIAS1, PMIC_RG_AUDPWDBMICBIAS1_ADDR, PMIC_RG_AUDPWDBMICBIAS1_MASK, PMIC_RG_AUDPWDBMICBIAS1_SHIFT},
    2205. 

  2205. 	{PMIC_RG_AUDMICBIAS1DCSWPEN, PMIC_RG_AUDMICBIAS1DCSWPEN_ADDR, PMIC_RG_AUDMICBIAS1DCSWPEN_MASK, PMIC_RG_AUDMICBIAS1DCSWPEN_SHIFT},
    2206. 

  2206. 	{PMIC_RG_AUDMICBIAS1DCSWNEN, PMIC_RG_AUDMICBIAS1DCSWNEN_ADDR, PMIC_RG_AUDMICBIAS1DCSWNEN_MASK, PMIC_RG_AUDMICBIAS1DCSWNEN_SHIFT},
    2207. 

  2207. 	{PMIC_RG_AUDMICBIAS1BYPASSEN, PMIC_RG_AUDMICBIAS1BYPASSEN_ADDR, PMIC_RG_AUDMICBIAS1BYPASSEN_MASK, PMIC_RG_AUDMICBIAS1BYPASSEN_SHIFT},
    2208. 

  2208. 	{PMIC_RG_AUDMICBIASVREF, PMIC_RG_AUDMICBIASVREF_ADDR, PMIC_RG_AUDMICBIASVREF_MASK, PMIC_RG_AUDMICBIASVREF_SHIFT},
    2209. 

  2209. 	{PMIC_RG_AUDMICBIASLOWPEN, PMIC_RG_AUDMICBIASLOWPEN_ADDR, PMIC_RG_AUDMICBIASLOWPEN_MASK, PMIC_RG_AUDMICBIASLOWPEN_SHIFT},
    2210. 

  2210. 	{PMIC_RG_BANDGAPGEN, PMIC_RG_BANDGAPGEN_ADDR, PMIC_RG_BANDGAPGEN_MASK, PMIC_RG_BANDGAPGEN_SHIFT},
    2211. 

  2211. 	{PMIC_RG_AUDPREAMPLGAIN, PMIC_RG_AUDPREAMPLGAIN_ADDR, PMIC_RG_AUDPREAMPLGAIN_MASK, PMIC_RG_AUDPREAMPLGAIN_SHIFT},
    2212. 

  2212. 	{PMIC_RG_AUDPREAMPRGAIN, PMIC_RG_AUDPREAMPRGAIN_ADDR, PMIC_RG_AUDPREAMPRGAIN_MASK, PMIC_RG_AUDPREAMPRGAIN_SHIFT},
    2213. 

  2213. 	{PMIC_RG_DIVCKS_CHG, PMIC_RG_DIVCKS_CHG_ADDR, PMIC_RG_DIVCKS_CHG_MASK, PMIC_RG_DIVCKS_CHG_SHIFT},
    2214. 

  2214. 	{PMIC_RG_DIVCKS_ON, PMIC_RG_DIVCKS_ON_ADDR, PMIC_RG_DIVCKS_ON_MASK, PMIC_RG_DIVCKS_ON_SHIFT},
    2215. 

  2215. 	{PMIC_RG_DIVCKS_PRG, PMIC_RG_DIVCKS_PRG_ADDR, PMIC_RG_DIVCKS_PRG_MASK, PMIC_RG_DIVCKS_PRG_SHIFT},
    2216. 

  2216. 	{PMIC_RG_DIVCKS_PWD_NCP, PMIC_RG_DIVCKS_PWD_NCP_ADDR, PMIC_RG_DIVCKS_PWD_NCP_MASK, PMIC_RG_DIVCKS_PWD_NCP_SHIFT},
    2217. 

  2217. 	{PMIC_RG_DIVCKS_PWD_NCP_ST_SEL, PMIC_RG_DIVCKS_PWD_NCP_ST_SEL_ADDR, PMIC_RG_DIVCKS_PWD_NCP_ST_SEL_MASK, PMIC_RG_DIVCKS_PWD_NCP_ST_SEL_SHIFT},
    2218. 

  2218. 	{PMIC_XO_EXTBUF1_MODE, PMIC_XO_EXTBUF1_MODE_ADDR, PMIC_XO_EXTBUF1_MODE_MASK, PMIC_XO_EXTBUF1_MODE_SHIFT},
    2219. 

  2219. 	{PMIC_XO_EXTBUF1_EN_M, PMIC_XO_EXTBUF1_EN_M_ADDR, PMIC_XO_EXTBUF1_EN_M_MASK, PMIC_XO_EXTBUF1_EN_M_SHIFT},
    2220. 

  2220. 	{PMIC_XO_EXTBUF2_MODE, PMIC_XO_EXTBUF2_MODE_ADDR, PMIC_XO_EXTBUF2_MODE_MASK, PMIC_XO_EXTBUF2_MODE_SHIFT},
    2221. 

  2221. 	{PMIC_XO_EXTBUF2_EN_M, PMIC_XO_EXTBUF2_EN_M_ADDR, PMIC_XO_EXTBUF2_EN_M_MASK, PMIC_XO_EXTBUF2_EN_M_SHIFT},
    2222. 

  2222. 	{PMIC_XO_EXTBUF3_MODE, PMIC_XO_EXTBUF3_MODE_ADDR, PMIC_XO_EXTBUF3_MODE_MASK, PMIC_XO_EXTBUF3_MODE_SHIFT},
    2223. 

  2223. 	{PMIC_XO_EXTBUF3_EN_M, PMIC_XO_EXTBUF3_EN_M_ADDR, PMIC_XO_EXTBUF3_EN_M_MASK, PMIC_XO_EXTBUF3_EN_M_SHIFT},
    2224. 

  2224. 	{PMIC_XO_EXTBUF4_MODE, PMIC_XO_EXTBUF4_MODE_ADDR, PMIC_XO_EXTBUF4_MODE_MASK, PMIC_XO_EXTBUF4_MODE_SHIFT},
    2225. 

  2225. 	{PMIC_XO_EXTBUF4_EN_M, PMIC_XO_EXTBUF4_EN_M_ADDR, PMIC_XO_EXTBUF4_EN_M_MASK, PMIC_XO_EXTBUF4_EN_M_SHIFT},
    2226. 

  2226. 	{PMIC_XO_BB_LPM_EN, PMIC_XO_BB_LPM_EN_ADDR, PMIC_XO_BB_LPM_EN_MASK, PMIC_XO_BB_LPM_EN_SHIFT},
    2227. 

  2227. 	{PMIC_XO_ENBB_MAN, PMIC_XO_ENBB_MAN_ADDR, PMIC_XO_ENBB_MAN_MASK, PMIC_XO_ENBB_MAN_SHIFT},
    2228. 

  2228. 	{PMIC_XO_ENBB_EN_M, PMIC_XO_ENBB_EN_M_ADDR, PMIC_XO_ENBB_EN_M_MASK, PMIC_XO_ENBB_EN_M_SHIFT},
    2229. 

  2229. 	{PMIC_XO_CLKSEL_MAN, PMIC_XO_CLKSEL_MAN_ADDR, PMIC_XO_CLKSEL_MAN_MASK, PMIC_XO_CLKSEL_MAN_SHIFT},
    2230. 

  2230. 	{PMIC_DCXO_CW00_SET, PMIC_DCXO_CW00_SET_ADDR, PMIC_DCXO_CW00_SET_MASK, PMIC_DCXO_CW00_SET_SHIFT},
    2231. 

  2231. 	{PMIC_DCXO_CW00_CLR, PMIC_DCXO_CW00_CLR_ADDR, PMIC_DCXO_CW00_CLR_MASK, PMIC_DCXO_CW00_CLR_SHIFT},
    2232. 

  2232. 	{PMIC_XO_CLKSEL_EN_M, PMIC_XO_CLKSEL_EN_M_ADDR, PMIC_XO_CLKSEL_EN_M_MASK, PMIC_XO_CLKSEL_EN_M_SHIFT},
    2233. 

  2233. 	{PMIC_XO_EXTBUF1_CKG_MAN, PMIC_XO_EXTBUF1_CKG_MAN_ADDR, PMIC_XO_EXTBUF1_CKG_MAN_MASK, PMIC_XO_EXTBUF1_CKG_MAN_SHIFT},
    2234. 

  2234. 	{PMIC_XO_EXTBUF1_CKG_EN_M, PMIC_XO_EXTBUF1_CKG_EN_M_ADDR, PMIC_XO_EXTBUF1_CKG_EN_M_MASK, PMIC_XO_EXTBUF1_CKG_EN_M_SHIFT},
    2235. 

  2235. 	{PMIC_XO_EXTBUF2_CKG_MAN, PMIC_XO_EXTBUF2_CKG_MAN_ADDR, PMIC_XO_EXTBUF2_CKG_MAN_MASK, PMIC_XO_EXTBUF2_CKG_MAN_SHIFT},
    2236. 

  2236. 	{PMIC_XO_EXTBUF2_CKG_EN_M, PMIC_XO_EXTBUF2_CKG_EN_M_ADDR, PMIC_XO_EXTBUF2_CKG_EN_M_MASK, PMIC_XO_EXTBUF2_CKG_EN_M_SHIFT},
    2237. 

  2237. 	{PMIC_XO_EXTBUF3_CKG_MAN, PMIC_XO_EXTBUF3_CKG_MAN_ADDR, PMIC_XO_EXTBUF3_CKG_MAN_MASK, PMIC_XO_EXTBUF3_CKG_MAN_SHIFT},
    2238. 

  2238. 	{PMIC_XO_EXTBUF3_CKG_EN_M, PMIC_XO_EXTBUF3_CKG_EN_M_ADDR, PMIC_XO_EXTBUF3_CKG_EN_M_MASK, PMIC_XO_EXTBUF3_CKG_EN_M_SHIFT},
    2239. 

  2239. 	{PMIC_XO_EXTBUF4_CKG_MAN, PMIC_XO_EXTBUF4_CKG_MAN_ADDR, PMIC_XO_EXTBUF4_CKG_MAN_MASK, PMIC_XO_EXTBUF4_CKG_MAN_SHIFT},
    2240. 

  2240. 	{PMIC_XO_EXTBUF4_CKG_EN_M, PMIC_XO_EXTBUF4_CKG_EN_M_ADDR, PMIC_XO_EXTBUF4_CKG_EN_M_MASK, PMIC_XO_EXTBUF4_CKG_EN_M_SHIFT},
    2241. 

  2241. 	{PMIC_XO_INTBUF_MAN, PMIC_XO_INTBUF_MAN_ADDR, PMIC_XO_INTBUF_MAN_MASK, PMIC_XO_INTBUF_MAN_SHIFT},
    2242. 

  2242. 	{PMIC_XO_PBUF_EN_M, PMIC_XO_PBUF_EN_M_ADDR, PMIC_XO_PBUF_EN_M_MASK, PMIC_XO_PBUF_EN_M_SHIFT},
    2243. 

  2243. 	{PMIC_XO_IBUF_EN_M, PMIC_XO_IBUF_EN_M_ADDR, PMIC_XO_IBUF_EN_M_MASK, PMIC_XO_IBUF_EN_M_SHIFT},
    2244. 

  2244. 	{PMIC_XO_LPMBUF_MAN, PMIC_XO_LPMBUF_MAN_ADDR, PMIC_XO_LPMBUF_MAN_MASK, PMIC_XO_LPMBUF_MAN_SHIFT},
    2245. 

  2245. 	{PMIC_XO_LPM_PREBUF_EN_M, PMIC_XO_LPM_PREBUF_EN_M_ADDR, PMIC_XO_LPM_PREBUF_EN_M_MASK, PMIC_XO_LPM_PREBUF_EN_M_SHIFT},
    2246. 

  2246. 	{PMIC_XO_LPBUF_EN_M, PMIC_XO_LPBUF_EN_M_ADDR, PMIC_XO_LPBUF_EN_M_MASK, PMIC_XO_LPBUF_EN_M_SHIFT},
    2247. 

  2247. 	{PMIC_XO_AUDIO_EN_M, PMIC_XO_AUDIO_EN_M_ADDR, PMIC_XO_AUDIO_EN_M_MASK, PMIC_XO_AUDIO_EN_M_SHIFT},
    2248. 

  2248. 	{PMIC_XO_EN32K_MAN, PMIC_XO_EN32K_MAN_ADDR, PMIC_XO_EN32K_MAN_MASK, PMIC_XO_EN32K_MAN_SHIFT},
    2249. 

  2249. 	{PMIC_XO_EN32K_M, PMIC_XO_EN32K_M_ADDR, PMIC_XO_EN32K_M_MASK, PMIC_XO_EN32K_M_SHIFT},
    2250. 

  2250. 	{PMIC_XO_XMODE_MAN, PMIC_XO_XMODE_MAN_ADDR, PMIC_XO_XMODE_MAN_MASK, PMIC_XO_XMODE_MAN_SHIFT},
    2251. 

  2251. 	{PMIC_XO_XMODE_M, PMIC_XO_XMODE_M_ADDR, PMIC_XO_XMODE_M_MASK, PMIC_XO_XMODE_M_SHIFT},
    2252. 

  2252. 	{PMIC_XO_STRUP_MODE, PMIC_XO_STRUP_MODE_ADDR, PMIC_XO_STRUP_MODE_MASK, PMIC_XO_STRUP_MODE_SHIFT},
    2253. 

  2253. 	{PMIC_XO_AAC_FPM_TIME, PMIC_XO_AAC_FPM_TIME_ADDR, PMIC_XO_AAC_FPM_TIME_MASK, PMIC_XO_AAC_FPM_TIME_SHIFT},
    2254. 

  2254. 	{PMIC_XO_AAC_MODE_LPM, PMIC_XO_AAC_MODE_LPM_ADDR, PMIC_XO_AAC_MODE_LPM_MASK, PMIC_XO_AAC_MODE_LPM_SHIFT},
    2255. 

  2255. 	{PMIC_XO_AAC_MODE_FPM, PMIC_XO_AAC_MODE_FPM_ADDR, PMIC_XO_AAC_MODE_FPM_MASK, PMIC_XO_AAC_MODE_FPM_SHIFT},
    2256. 

  2256. 	{PMIC_XO_EN26M_OFFSQ_EN, PMIC_XO_EN26M_OFFSQ_EN_ADDR, PMIC_XO_EN26M_OFFSQ_EN_MASK, PMIC_XO_EN26M_OFFSQ_EN_SHIFT},
    2257. 

  2257. 	{PMIC_XO_LDOCAL_EN, PMIC_XO_LDOCAL_EN_ADDR, PMIC_XO_LDOCAL_EN_MASK, PMIC_XO_LDOCAL_EN_SHIFT},
    2258. 

  2258. 	{PMIC_XO_CBANK_SYNC_DYN, PMIC_XO_CBANK_SYNC_DYN_ADDR, PMIC_XO_CBANK_SYNC_DYN_MASK, PMIC_XO_CBANK_SYNC_DYN_SHIFT},
    2259. 

  2259. 	{PMIC_XO_26MLP_MAN_EN, PMIC_XO_26MLP_MAN_EN_ADDR, PMIC_XO_26MLP_MAN_EN_MASK, PMIC_XO_26MLP_MAN_EN_SHIFT},
    2260. 

  2260. 	{PMIC_XO_OPMODE_MAN, PMIC_XO_OPMODE_MAN_ADDR, PMIC_XO_OPMODE_MAN_MASK, PMIC_XO_OPMODE_MAN_SHIFT},
    2261. 

  2261. 	{PMIC_XO_BUFLDO13_VSET_M, PMIC_XO_BUFLDO13_VSET_M_ADDR, PMIC_XO_BUFLDO13_VSET_M_MASK, PMIC_XO_BUFLDO13_VSET_M_SHIFT},
    2262. 

  2262. 	{PMIC_XO_RESERVED0, PMIC_XO_RESERVED0_ADDR, PMIC_XO_RESERVED0_MASK, PMIC_XO_RESERVED0_SHIFT},
    2263. 

  2263. 	{PMIC_XO_LPM_ISEL_MAN, PMIC_XO_LPM_ISEL_MAN_ADDR, PMIC_XO_LPM_ISEL_MAN_MASK, PMIC_XO_LPM_ISEL_MAN_SHIFT},
    2264. 

  2264. 	{PMIC_XO_FPM_ISEL_MAN, PMIC_XO_FPM_ISEL_MAN_ADDR, PMIC_XO_FPM_ISEL_MAN_MASK, PMIC_XO_FPM_ISEL_MAN_SHIFT},
    2265. 

  2265. 	{PMIC_XO_CDAC_FPM, PMIC_XO_CDAC_FPM_ADDR, PMIC_XO_CDAC_FPM_MASK, PMIC_XO_CDAC_FPM_SHIFT},
    2266. 

  2266. 	{PMIC_XO_CDAC_LPM, PMIC_XO_CDAC_LPM_ADDR, PMIC_XO_CDAC_LPM_MASK, PMIC_XO_CDAC_LPM_SHIFT},
    2267. 

  2267. 	{PMIC_XO_32KDIV_NFRAC_FPM, PMIC_XO_32KDIV_NFRAC_FPM_ADDR, PMIC_XO_32KDIV_NFRAC_FPM_MASK, PMIC_XO_32KDIV_NFRAC_FPM_SHIFT},
    2268. 

  2268. 	{PMIC_XO_COFST_FPM, PMIC_XO_COFST_FPM_ADDR, PMIC_XO_COFST_FPM_MASK, PMIC_XO_COFST_FPM_SHIFT},
    2269. 

  2269. 	{PMIC_XO_32KDIV_NFRAC_LPM, PMIC_XO_32KDIV_NFRAC_LPM_ADDR, PMIC_XO_32KDIV_NFRAC_LPM_MASK, PMIC_XO_32KDIV_NFRAC_LPM_SHIFT},
    2270. 

  2270. 	{PMIC_XO_COFST_LPM, PMIC_XO_COFST_LPM_ADDR, PMIC_XO_COFST_LPM_MASK, PMIC_XO_COFST_LPM_SHIFT},
    2271. 

  2271. 	{PMIC_XO_CORE_MAN, PMIC_XO_CORE_MAN_ADDR, PMIC_XO_CORE_MAN_MASK, PMIC_XO_CORE_MAN_SHIFT},
    2272. 

  2272. 	{PMIC_XO_CORE_EN_M, PMIC_XO_CORE_EN_M_ADDR, PMIC_XO_CORE_EN_M_MASK, PMIC_XO_CORE_EN_M_SHIFT},
    2273. 

  2273. 	{PMIC_XO_CORE_TURBO_EN_M, PMIC_XO_CORE_TURBO_EN_M_ADDR, PMIC_XO_CORE_TURBO_EN_M_MASK, PMIC_XO_CORE_TURBO_EN_M_SHIFT},
    2274. 

  2274. 	{PMIC_XO_CORE_AAC_EN_M, PMIC_XO_CORE_AAC_EN_M_ADDR, PMIC_XO_CORE_AAC_EN_M_MASK, PMIC_XO_CORE_AAC_EN_M_SHIFT},
    2275. 

  2275. 	{PMIC_XO_STARTUP_EN_M, PMIC_XO_STARTUP_EN_M_ADDR, PMIC_XO_STARTUP_EN_M_MASK, PMIC_XO_STARTUP_EN_M_SHIFT},
    2276. 

  2276. 	{PMIC_XO_CORE_VBFPM_EN_M, PMIC_XO_CORE_VBFPM_EN_M_ADDR, PMIC_XO_CORE_VBFPM_EN_M_MASK, PMIC_XO_CORE_VBFPM_EN_M_SHIFT},
    2277. 

  2277. 	{PMIC_XO_CORE_VBLPM_EN_M, PMIC_XO_CORE_VBLPM_EN_M_ADDR, PMIC_XO_CORE_VBLPM_EN_M_MASK, PMIC_XO_CORE_VBLPM_EN_M_SHIFT},
    2278. 

  2278. 	{PMIC_XO_LPMBIAS_EN_M, PMIC_XO_LPMBIAS_EN_M_ADDR, PMIC_XO_LPMBIAS_EN_M_MASK, PMIC_XO_LPMBIAS_EN_M_SHIFT},
    2279. 

  2279. 	{PMIC_XO_VTCGEN_EN_M, PMIC_XO_VTCGEN_EN_M_ADDR, PMIC_XO_VTCGEN_EN_M_MASK, PMIC_XO_VTCGEN_EN_M_SHIFT},
    2280. 

  2280. 	{PMIC_XO_IAAC_COMP_EN_M, PMIC_XO_IAAC_COMP_EN_M_ADDR, PMIC_XO_IAAC_COMP_EN_M_MASK, PMIC_XO_IAAC_COMP_EN_M_SHIFT},
    2281. 

  2281. 	{PMIC_XO_IFPM_COMP_EN_M, PMIC_XO_IFPM_COMP_EN_M_ADDR, PMIC_XO_IFPM_COMP_EN_M_MASK, PMIC_XO_IFPM_COMP_EN_M_SHIFT},
    2282. 

  2282. 	{PMIC_XO_ILPM_COMP_EN_M, PMIC_XO_ILPM_COMP_EN_M_ADDR, PMIC_XO_ILPM_COMP_EN_M_MASK, PMIC_XO_ILPM_COMP_EN_M_SHIFT},
    2283. 

  2283. 	{PMIC_XO_CORE_BYPCAS_FPM, PMIC_XO_CORE_BYPCAS_FPM_ADDR, PMIC_XO_CORE_BYPCAS_FPM_MASK, PMIC_XO_CORE_BYPCAS_FPM_SHIFT},
    2284. 

  2284. 	{PMIC_XO_CORE_GMX2_FPM, PMIC_XO_CORE_GMX2_FPM_ADDR, PMIC_XO_CORE_GMX2_FPM_MASK, PMIC_XO_CORE_GMX2_FPM_SHIFT},
    2285. 

  2285. 	{PMIC_XO_CORE_IDAC_FPM, PMIC_XO_CORE_IDAC_FPM_ADDR, PMIC_XO_CORE_IDAC_FPM_MASK, PMIC_XO_CORE_IDAC_FPM_SHIFT},
    2286. 

  2286. 	{PMIC_XO_AAC_COMP_MAN, PMIC_XO_AAC_COMP_MAN_ADDR, PMIC_XO_AAC_COMP_MAN_MASK, PMIC_XO_AAC_COMP_MAN_SHIFT},
    2287. 

  2287. 	{PMIC_XO_AAC_EN_M, PMIC_XO_AAC_EN_M_ADDR, PMIC_XO_AAC_EN_M_MASK, PMIC_XO_AAC_EN_M_SHIFT},
    2288. 

  2288. 	{PMIC_XO_AAC_MONEN_M, PMIC_XO_AAC_MONEN_M_ADDR, PMIC_XO_AAC_MONEN_M_MASK, PMIC_XO_AAC_MONEN_M_SHIFT},
    2289. 

  2289. 	{PMIC_XO_COMP_EN_M, PMIC_XO_COMP_EN_M_ADDR, PMIC_XO_COMP_EN_M_MASK, PMIC_XO_COMP_EN_M_SHIFT},
    2290. 

  2290. 	{PMIC_XO_COMP_TSTEN_M, PMIC_XO_COMP_TSTEN_M_ADDR, PMIC_XO_COMP_TSTEN_M_MASK, PMIC_XO_COMP_TSTEN_M_SHIFT},
    2291. 

  2291. 	{PMIC_XO_AAC_HV_FPM, PMIC_XO_AAC_HV_FPM_ADDR, PMIC_XO_AAC_HV_FPM_MASK, PMIC_XO_AAC_HV_FPM_SHIFT},
    2292. 

  2292. 	{PMIC_XO_AAC_IBIAS_FPM, PMIC_XO_AAC_IBIAS_FPM_ADDR, PMIC_XO_AAC_IBIAS_FPM_MASK, PMIC_XO_AAC_IBIAS_FPM_SHIFT},
    2293. 

  2293. 	{PMIC_XO_AAC_VOFST_FPM, PMIC_XO_AAC_VOFST_FPM_ADDR, PMIC_XO_AAC_VOFST_FPM_MASK, PMIC_XO_AAC_VOFST_FPM_SHIFT},
    2294. 

  2294. 	{PMIC_XO_AAC_COMP_HV_FPM, PMIC_XO_AAC_COMP_HV_FPM_ADDR, PMIC_XO_AAC_COMP_HV_FPM_MASK, PMIC_XO_AAC_COMP_HV_FPM_SHIFT},
    2295. 

  2295. 	{PMIC_XO_AAC_VSEL_FPM, PMIC_XO_AAC_VSEL_FPM_ADDR, PMIC_XO_AAC_VSEL_FPM_MASK, PMIC_XO_AAC_VSEL_FPM_SHIFT},
    2296. 

  2296. 	{PMIC_XO_AAC_COMP_POL, PMIC_XO_AAC_COMP_POL_ADDR, PMIC_XO_AAC_COMP_POL_MASK, PMIC_XO_AAC_COMP_POL_SHIFT},
    2297. 

  2297. 	{PMIC_XO_CORE_BYPCAS_LPM, PMIC_XO_CORE_BYPCAS_LPM_ADDR, PMIC_XO_CORE_BYPCAS_LPM_MASK, PMIC_XO_CORE_BYPCAS_LPM_SHIFT},
    2298. 

  2298. 	{PMIC_XO_CORE_GMX2_LPM, PMIC_XO_CORE_GMX2_LPM_ADDR, PMIC_XO_CORE_GMX2_LPM_MASK, PMIC_XO_CORE_GMX2_LPM_SHIFT},
    2299. 

  2299. 	{PMIC_XO_CORE_IDAC_LPM, PMIC_XO_CORE_IDAC_LPM_ADDR, PMIC_XO_CORE_IDAC_LPM_MASK, PMIC_XO_CORE_IDAC_LPM_SHIFT},
    2300. 

  2300. 	{PMIC_XO_AAC_COMP_HV_LPM, PMIC_XO_AAC_COMP_HV_LPM_ADDR, PMIC_XO_AAC_COMP_HV_LPM_MASK, PMIC_XO_AAC_COMP_HV_LPM_SHIFT},
    2301. 

  2301. 	{PMIC_XO_AAC_VSEL_LPM, PMIC_XO_AAC_VSEL_LPM_ADDR, PMIC_XO_AAC_VSEL_LPM_MASK, PMIC_XO_AAC_VSEL_LPM_SHIFT},
    2302. 

  2302. 	{PMIC_XO_AAC_HV_LPM, PMIC_XO_AAC_HV_LPM_ADDR, PMIC_XO_AAC_HV_LPM_MASK, PMIC_XO_AAC_HV_LPM_SHIFT},
    2303. 

  2303. 	{PMIC_XO_AAC_IBIAS_LPM, PMIC_XO_AAC_IBIAS_LPM_ADDR, PMIC_XO_AAC_IBIAS_LPM_MASK, PMIC_XO_AAC_IBIAS_LPM_SHIFT},
    2304. 

  2304. 	{PMIC_XO_AAC_VOFST_LPM, PMIC_XO_AAC_VOFST_LPM_ADDR, PMIC_XO_AAC_VOFST_LPM_MASK, PMIC_XO_AAC_VOFST_LPM_SHIFT},
    2305. 

  2305. 	{PMIC_XO_AAC_FPM_SWEN, PMIC_XO_AAC_FPM_SWEN_ADDR, PMIC_XO_AAC_FPM_SWEN_MASK, PMIC_XO_AAC_FPM_SWEN_SHIFT},
    2306. 

  2306. 	{PMIC_XO_SWRST, PMIC_XO_SWRST_ADDR, PMIC_XO_SWRST_MASK, PMIC_XO_SWRST_SHIFT},
    2307. 

  2307. 	{PMIC_XO_32KDIV_SWRST, PMIC_XO_32KDIV_SWRST_ADDR, PMIC_XO_32KDIV_SWRST_MASK, PMIC_XO_32KDIV_SWRST_SHIFT},
    2308. 

  2308. 	{PMIC_XO_32KDIV_RATIO_MAN, PMIC_XO_32KDIV_RATIO_MAN_ADDR, PMIC_XO_32KDIV_RATIO_MAN_MASK, PMIC_XO_32KDIV_RATIO_MAN_SHIFT},
    2309. 

  2309. 	{PMIC_XO_32KDIV_TEST_EN, PMIC_XO_32KDIV_TEST_EN_ADDR, PMIC_XO_32KDIV_TEST_EN_MASK, PMIC_XO_32KDIV_TEST_EN_SHIFT},
    2310. 

  2310. 	{PMIC_XO_CBANK_SYNC_MAN, PMIC_XO_CBANK_SYNC_MAN_ADDR, PMIC_XO_CBANK_SYNC_MAN_MASK, PMIC_XO_CBANK_SYNC_MAN_SHIFT},
    2311. 

  2311. 	{PMIC_XO_CBANK_SYNC_EN_M, PMIC_XO_CBANK_SYNC_EN_M_ADDR, PMIC_XO_CBANK_SYNC_EN_M_MASK, PMIC_XO_CBANK_SYNC_EN_M_SHIFT},
    2312. 

  2312. 	{PMIC_XO_CTL_SYNC_MAN, PMIC_XO_CTL_SYNC_MAN_ADDR, PMIC_XO_CTL_SYNC_MAN_MASK, PMIC_XO_CTL_SYNC_MAN_SHIFT},
    2313. 

  2313. 	{PMIC_XO_CTL_SYNC_EN_M, PMIC_XO_CTL_SYNC_EN_M_ADDR, PMIC_XO_CTL_SYNC_EN_M_MASK, PMIC_XO_CTL_SYNC_EN_M_SHIFT},
    2314. 

  2314. 	{PMIC_XO_LDO_MAN, PMIC_XO_LDO_MAN_ADDR, PMIC_XO_LDO_MAN_MASK, PMIC_XO_LDO_MAN_SHIFT},
    2315. 

  2315. 	{PMIC_XO_LDOPBUF_EN_M, PMIC_XO_LDOPBUF_EN_M_ADDR, PMIC_XO_LDOPBUF_EN_M_MASK, PMIC_XO_LDOPBUF_EN_M_SHIFT},
    2316. 

  2316. 	{PMIC_XO_LDOPBUF_VSET_M, PMIC_XO_LDOPBUF_VSET_M_ADDR, PMIC_XO_LDOPBUF_VSET_M_MASK, PMIC_XO_LDOPBUF_VSET_M_SHIFT},
    2317. 

  2317. 	{PMIC_XO_LDOVTST_EN_M, PMIC_XO_LDOVTST_EN_M_ADDR, PMIC_XO_LDOVTST_EN_M_MASK, PMIC_XO_LDOVTST_EN_M_SHIFT},
    2318. 

  2318. 	{PMIC_XO_TEST_VCAL_EN_M, PMIC_XO_TEST_VCAL_EN_M_ADDR, PMIC_XO_TEST_VCAL_EN_M_MASK, PMIC_XO_TEST_VCAL_EN_M_SHIFT},
    2319. 

  2319. 	{PMIC_XO_VBIST_EN_M, PMIC_XO_VBIST_EN_M_ADDR, PMIC_XO_VBIST_EN_M_MASK, PMIC_XO_VBIST_EN_M_SHIFT},
    2320. 

  2320. 	{PMIC_XO_VTEST_SEL_MUX, PMIC_XO_VTEST_SEL_MUX_ADDR, PMIC_XO_VTEST_SEL_MUX_MASK, PMIC_XO_VTEST_SEL_MUX_SHIFT},
    2321. 

  2321. 	{PMIC_RG_XO_CORE_OSCTD, PMIC_RG_XO_CORE_OSCTD_ADDR, PMIC_RG_XO_CORE_OSCTD_MASK, PMIC_RG_XO_CORE_OSCTD_SHIFT},
    2322. 

  2322. 	{PMIC_RG_XO_THADC_EN, PMIC_RG_XO_THADC_EN_ADDR, PMIC_RG_XO_THADC_EN_MASK, PMIC_RG_XO_THADC_EN_SHIFT},
    2323. 

  2323. 	{PMIC_RG_XO_SYNC_CKPOL, PMIC_RG_XO_SYNC_CKPOL_ADDR, PMIC_RG_XO_SYNC_CKPOL_MASK, PMIC_RG_XO_SYNC_CKPOL_SHIFT},
    2324. 

  2324. 	{PMIC_RG_XO_CBANK_POL, PMIC_RG_XO_CBANK_POL_ADDR, PMIC_RG_XO_CBANK_POL_MASK, PMIC_RG_XO_CBANK_POL_SHIFT},
    2325. 

  2325. 	{PMIC_RG_XO_CBANK_SYNC_BYP, PMIC_RG_XO_CBANK_SYNC_BYP_ADDR, PMIC_RG_XO_CBANK_SYNC_BYP_MASK, PMIC_RG_XO_CBANK_SYNC_BYP_SHIFT},
    2326. 

  2326. 	{PMIC_RG_XO_CTL_POL, PMIC_RG_XO_CTL_POL_ADDR, PMIC_RG_XO_CTL_POL_MASK, PMIC_RG_XO_CTL_POL_SHIFT},
    2327. 

  2327. 	{PMIC_RG_XO_CTL_SYNC_BYP, PMIC_RG_XO_CTL_SYNC_BYP_ADDR, PMIC_RG_XO_CTL_SYNC_BYP_MASK, PMIC_RG_XO_CTL_SYNC_BYP_SHIFT},
    2328. 

  2328. 	{PMIC_RG_XO_LPBUF_INV, PMIC_RG_XO_LPBUF_INV_ADDR, PMIC_RG_XO_LPBUF_INV_MASK, PMIC_RG_XO_LPBUF_INV_SHIFT},
    2329. 

  2329. 	{PMIC_RG_XO_LDOPBUF_BYP, PMIC_RG_XO_LDOPBUF_BYP_ADDR, PMIC_RG_XO_LDOPBUF_BYP_MASK, PMIC_RG_XO_LDOPBUF_BYP_SHIFT},
    2330. 

  2330. 	{PMIC_RG_XO_LDOPBUF_ENCL, PMIC_RG_XO_LDOPBUF_ENCL_ADDR, PMIC_RG_XO_LDOPBUF_ENCL_MASK, PMIC_RG_XO_LDOPBUF_ENCL_SHIFT},
    2331. 

  2331. 	{PMIC_RG_XO_VGBIAS_VSET, PMIC_RG_XO_VGBIAS_VSET_ADDR, PMIC_RG_XO_VGBIAS_VSET_MASK, PMIC_RG_XO_VGBIAS_VSET_SHIFT},
    2332. 

  2332. 	{PMIC_RG_XO_PBUF_ISET, PMIC_RG_XO_PBUF_ISET_ADDR, PMIC_RG_XO_PBUF_ISET_MASK, PMIC_RG_XO_PBUF_ISET_SHIFT},
    2333. 

  2333. 	{PMIC_RG_XO_IBUF_ISET, PMIC_RG_XO_IBUF_ISET_ADDR, PMIC_RG_XO_IBUF_ISET_MASK, PMIC_RG_XO_IBUF_ISET_SHIFT},
    2334. 

  2334. 	{PMIC_RG_XO_BUFLDO13_ENCL, PMIC_RG_XO_BUFLDO13_ENCL_ADDR, PMIC_RG_XO_BUFLDO13_ENCL_MASK, PMIC_RG_XO_BUFLDO13_ENCL_SHIFT},
    2335. 

  2335. 	{PMIC_RG_XO_BUFLDO13_IBX2, PMIC_RG_XO_BUFLDO13_IBX2_ADDR, PMIC_RG_XO_BUFLDO13_IBX2_MASK, PMIC_RG_XO_BUFLDO13_IBX2_SHIFT},
    2336. 

  2336. 	{PMIC_RG_XO_BUFLDO13_IX2, PMIC_RG_XO_BUFLDO13_IX2_ADDR, PMIC_RG_XO_BUFLDO13_IX2_MASK, PMIC_RG_XO_BUFLDO13_IX2_SHIFT},
    2337. 

  2337. 	{PMIC_XO_RESERVED1, PMIC_XO_RESERVED1_ADDR, PMIC_XO_RESERVED1_MASK, PMIC_XO_RESERVED1_SHIFT},
    2338. 

  2338. 	{PMIC_RG_XO_BUFLDO24_ENCL, PMIC_RG_XO_BUFLDO24_ENCL_ADDR, PMIC_RG_XO_BUFLDO24_ENCL_MASK, PMIC_RG_XO_BUFLDO24_ENCL_SHIFT},
    2339. 

  2339. 	{PMIC_RG_XO_BUFLDO24_IBX2, PMIC_RG_XO_BUFLDO24_IBX2_ADDR, PMIC_RG_XO_BUFLDO24_IBX2_MASK, PMIC_RG_XO_BUFLDO24_IBX2_SHIFT},
    2340. 

  2340. 	{PMIC_XO_BUFLDO24_VSET_M, PMIC_XO_BUFLDO24_VSET_M_ADDR, PMIC_XO_BUFLDO24_VSET_M_MASK, PMIC_XO_BUFLDO24_VSET_M_SHIFT},
    2341. 

  2341. 	{PMIC_RG_XO_EXTBUF1_HD, PMIC_RG_XO_EXTBUF1_HD_ADDR, PMIC_RG_XO_EXTBUF1_HD_MASK, PMIC_RG_XO_EXTBUF1_HD_SHIFT},
    2342. 

  2342. 	{PMIC_RG_XO_EXTBUF1_ISET, PMIC_RG_XO_EXTBUF1_ISET_ADDR, PMIC_RG_XO_EXTBUF1_ISET_MASK, PMIC_RG_XO_EXTBUF1_ISET_SHIFT},
    2343. 

  2343. 	{PMIC_RG_XO_EXTBUF2_HD, PMIC_RG_XO_EXTBUF2_HD_ADDR, PMIC_RG_XO_EXTBUF2_HD_MASK, PMIC_RG_XO_EXTBUF2_HD_SHIFT},
    2344. 

  2344. 	{PMIC_RG_XO_EXTBUF2_ISET, PMIC_RG_XO_EXTBUF2_ISET_ADDR, PMIC_RG_XO_EXTBUF2_ISET_MASK, PMIC_RG_XO_EXTBUF2_ISET_SHIFT},
    2345. 

  2345. 	{PMIC_RG_XO_EXTBUF3_HD, PMIC_RG_XO_EXTBUF3_HD_ADDR, PMIC_RG_XO_EXTBUF3_HD_MASK, PMIC_RG_XO_EXTBUF3_HD_SHIFT},
    2346. 

  2346. 	{PMIC_RG_XO_EXTBUF3_ISET, PMIC_RG_XO_EXTBUF3_ISET_ADDR, PMIC_RG_XO_EXTBUF3_ISET_MASK, PMIC_RG_XO_EXTBUF3_ISET_SHIFT},
    2347. 

  2347. 	{PMIC_RG_XO_EXTBUF4_HD, PMIC_RG_XO_EXTBUF4_HD_ADDR, PMIC_RG_XO_EXTBUF4_HD_MASK, PMIC_RG_XO_EXTBUF4_HD_SHIFT},
    2348. 

  2348. 	{PMIC_RG_XO_EXTBUF4_ISET, PMIC_RG_XO_EXTBUF4_ISET_ADDR, PMIC_RG_XO_EXTBUF4_ISET_MASK, PMIC_RG_XO_EXTBUF4_ISET_SHIFT},
    2349. 

  2349. 	{PMIC_RG_XO_LPM_PREBUF_ISET, PMIC_RG_XO_LPM_PREBUF_ISET_ADDR, PMIC_RG_XO_LPM_PREBUF_ISET_MASK, PMIC_RG_XO_LPM_PREBUF_ISET_SHIFT},
    2350. 

  2350. 	{PMIC_RG_XO_AUDIO_ATTEN, PMIC_RG_XO_AUDIO_ATTEN_ADDR, PMIC_RG_XO_AUDIO_ATTEN_MASK, PMIC_RG_XO_AUDIO_ATTEN_SHIFT},
    2351. 

  2351. 	{PMIC_RG_XO_AUDIO_ISET, PMIC_RG_XO_AUDIO_ISET_ADDR, PMIC_RG_XO_AUDIO_ISET_MASK, PMIC_RG_XO_AUDIO_ISET_SHIFT},
    2352. 

  2352. 	{PMIC_XO_EXTBUF4_CLKSEL_MAN, PMIC_XO_EXTBUF4_CLKSEL_MAN_ADDR, PMIC_XO_EXTBUF4_CLKSEL_MAN_MASK, PMIC_XO_EXTBUF4_CLKSEL_MAN_SHIFT},
    2353. 

  2353. 	{PMIC_RG_XO_RESERVED0, PMIC_RG_XO_RESERVED0_ADDR, PMIC_RG_XO_RESERVED0_MASK, PMIC_RG_XO_RESERVED0_SHIFT},
    2354. 

  2354. 	{PMIC_XO_VIO18PG_BUFEN, PMIC_XO_VIO18PG_BUFEN_ADDR, PMIC_XO_VIO18PG_BUFEN_MASK, PMIC_XO_VIO18PG_BUFEN_SHIFT},
    2355. 

  2355. 	{PMIC_RG_XO_RESERVED1, PMIC_RG_XO_RESERVED1_ADDR, PMIC_RG_XO_RESERVED1_MASK, PMIC_RG_XO_RESERVED1_SHIFT},
    2356. 

  2356. 	{PMIC_XO_CAL_EN_MAN, PMIC_XO_CAL_EN_MAN_ADDR, PMIC_XO_CAL_EN_MAN_MASK, PMIC_XO_CAL_EN_MAN_SHIFT},
    2357. 

  2357. 	{PMIC_XO_CAL_EN_M, PMIC_XO_CAL_EN_M_ADDR, PMIC_XO_CAL_EN_M_MASK, PMIC_XO_CAL_EN_M_SHIFT},
    2358. 

  2358. 	{PMIC_XO_STATIC_AUXOUT_SEL, PMIC_XO_STATIC_AUXOUT_SEL_ADDR, PMIC_XO_STATIC_AUXOUT_SEL_MASK, PMIC_XO_STATIC_AUXOUT_SEL_SHIFT},
    2359. 

  2359. 	{PMIC_XO_AUXOUT_SEL, PMIC_XO_AUXOUT_SEL_ADDR, PMIC_XO_AUXOUT_SEL_MASK, PMIC_XO_AUXOUT_SEL_SHIFT},
    2360. 

  2360. 	{PMIC_XO_STATIC_AUXOUT, PMIC_XO_STATIC_AUXOUT_ADDR, PMIC_XO_STATIC_AUXOUT_MASK, PMIC_XO_STATIC_AUXOUT_SHIFT},
    2361. 

  2361. 	{PMIC_AUXADC_ADC_OUT_CH0, PMIC_AUXADC_ADC_OUT_CH0_ADDR, PMIC_AUXADC_ADC_OUT_CH0_MASK, PMIC_AUXADC_ADC_OUT_CH0_SHIFT},
    2362. 

  2362. 	{PMIC_AUXADC_ADC_RDY_CH0, PMIC_AUXADC_ADC_RDY_CH0_ADDR, PMIC_AUXADC_ADC_RDY_CH0_MASK, PMIC_AUXADC_ADC_RDY_CH0_SHIFT},
    2363. 

  2363. 	{PMIC_AUXADC_ADC_OUT_CH1, PMIC_AUXADC_ADC_OUT_CH1_ADDR, PMIC_AUXADC_ADC_OUT_CH1_MASK, PMIC_AUXADC_ADC_OUT_CH1_SHIFT},
    2364. 

  2364. 	{PMIC_AUXADC_ADC_RDY_CH1, PMIC_AUXADC_ADC_RDY_CH1_ADDR, PMIC_AUXADC_ADC_RDY_CH1_MASK, PMIC_AUXADC_ADC_RDY_CH1_SHIFT},
    2365. 

  2365. 	{PMIC_AUXADC_ADC_OUT_CH2, PMIC_AUXADC_ADC_OUT_CH2_ADDR, PMIC_AUXADC_ADC_OUT_CH2_MASK, PMIC_AUXADC_ADC_OUT_CH2_SHIFT},
    2366. 

  2366. 	{PMIC_AUXADC_ADC_RDY_CH2, PMIC_AUXADC_ADC_RDY_CH2_ADDR, PMIC_AUXADC_ADC_RDY_CH2_MASK, PMIC_AUXADC_ADC_RDY_CH2_SHIFT},
    2367. 

  2367. 	{PMIC_AUXADC_ADC_OUT_CH3, PMIC_AUXADC_ADC_OUT_CH3_ADDR, PMIC_AUXADC_ADC_OUT_CH3_MASK, PMIC_AUXADC_ADC_OUT_CH3_SHIFT},
    2368. 

  2368. 	{PMIC_AUXADC_ADC_RDY_CH3, PMIC_AUXADC_ADC_RDY_CH3_ADDR, PMIC_AUXADC_ADC_RDY_CH3_MASK, PMIC_AUXADC_ADC_RDY_CH3_SHIFT},
    2369. 

  2369. 	{PMIC_AUXADC_ADC_OUT_CH4, PMIC_AUXADC_ADC_OUT_CH4_ADDR, PMIC_AUXADC_ADC_OUT_CH4_MASK, PMIC_AUXADC_ADC_OUT_CH4_SHIFT},
    2370. 

  2370. 	{PMIC_AUXADC_ADC_RDY_CH4, PMIC_AUXADC_ADC_RDY_CH4_ADDR, PMIC_AUXADC_ADC_RDY_CH4_MASK, PMIC_AUXADC_ADC_RDY_CH4_SHIFT},
    2371. 

  2371. 	{PMIC_AUXADC_ADC_OUT_CH5, PMIC_AUXADC_ADC_OUT_CH5_ADDR, PMIC_AUXADC_ADC_OUT_CH5_MASK, PMIC_AUXADC_ADC_OUT_CH5_SHIFT},
    2372. 

  2372. 	{PMIC_AUXADC_ADC_RDY_CH5, PMIC_AUXADC_ADC_RDY_CH5_ADDR, PMIC_AUXADC_ADC_RDY_CH5_MASK, PMIC_AUXADC_ADC_RDY_CH5_SHIFT},
    2373. 

  2373. 	{PMIC_AUXADC_ADC_OUT_CH6, PMIC_AUXADC_ADC_OUT_CH6_ADDR, PMIC_AUXADC_ADC_OUT_CH6_MASK, PMIC_AUXADC_ADC_OUT_CH6_SHIFT},
    2374. 

  2374. 	{PMIC_AUXADC_ADC_RDY_CH6, PMIC_AUXADC_ADC_RDY_CH6_ADDR, PMIC_AUXADC_ADC_RDY_CH6_MASK, PMIC_AUXADC_ADC_RDY_CH6_SHIFT},
    2375. 

  2375. 	{PMIC_AUXADC_ADC_OUT_CH7, PMIC_AUXADC_ADC_OUT_CH7_ADDR, PMIC_AUXADC_ADC_OUT_CH7_MASK, PMIC_AUXADC_ADC_OUT_CH7_SHIFT},
    2376. 

  2376. 	{PMIC_AUXADC_ADC_RDY_CH7, PMIC_AUXADC_ADC_RDY_CH7_ADDR, PMIC_AUXADC_ADC_RDY_CH7_MASK, PMIC_AUXADC_ADC_RDY_CH7_SHIFT},
    2377. 

  2377. 	{PMIC_AUXADC_ADC_OUT_CH8, PMIC_AUXADC_ADC_OUT_CH8_ADDR, PMIC_AUXADC_ADC_OUT_CH8_MASK, PMIC_AUXADC_ADC_OUT_CH8_SHIFT},
    2378. 

  2378. 	{PMIC_AUXADC_ADC_RDY_CH8, PMIC_AUXADC_ADC_RDY_CH8_ADDR, PMIC_AUXADC_ADC_RDY_CH8_MASK, PMIC_AUXADC_ADC_RDY_CH8_SHIFT},
    2379. 

  2379. 	{PMIC_AUXADC_ADC_OUT_CH9, PMIC_AUXADC_ADC_OUT_CH9_ADDR, PMIC_AUXADC_ADC_OUT_CH9_MASK, PMIC_AUXADC_ADC_OUT_CH9_SHIFT},
    2380. 

  2380. 	{PMIC_AUXADC_ADC_RDY_CH9, PMIC_AUXADC_ADC_RDY_CH9_ADDR, PMIC_AUXADC_ADC_RDY_CH9_MASK, PMIC_AUXADC_ADC_RDY_CH9_SHIFT},
    2381. 

  2381. 	{PMIC_AUXADC_ADC_OUT_CH10, PMIC_AUXADC_ADC_OUT_CH10_ADDR, PMIC_AUXADC_ADC_OUT_CH10_MASK, PMIC_AUXADC_ADC_OUT_CH10_SHIFT},
    2382. 

  2382. 	{PMIC_AUXADC_ADC_RDY_CH10, PMIC_AUXADC_ADC_RDY_CH10_ADDR, PMIC_AUXADC_ADC_RDY_CH10_MASK, PMIC_AUXADC_ADC_RDY_CH10_SHIFT},
    2383. 

  2383. 	{PMIC_AUXADC_ADC_OUT_CH11, PMIC_AUXADC_ADC_OUT_CH11_ADDR, PMIC_AUXADC_ADC_OUT_CH11_MASK, PMIC_AUXADC_ADC_OUT_CH11_SHIFT},
    2384. 

  2384. 	{PMIC_AUXADC_ADC_RDY_CH11, PMIC_AUXADC_ADC_RDY_CH11_ADDR, PMIC_AUXADC_ADC_RDY_CH11_MASK, PMIC_AUXADC_ADC_RDY_CH11_SHIFT},
    2385. 

  2385. 	{PMIC_AUXADC_ADC_OUT_CH12_15, PMIC_AUXADC_ADC_OUT_CH12_15_ADDR, PMIC_AUXADC_ADC_OUT_CH12_15_MASK, PMIC_AUXADC_ADC_OUT_CH12_15_SHIFT},
    2386. 

  2386. 	{PMIC_AUXADC_ADC_RDY_CH12_15, PMIC_AUXADC_ADC_RDY_CH12_15_ADDR, PMIC_AUXADC_ADC_RDY_CH12_15_MASK, PMIC_AUXADC_ADC_RDY_CH12_15_SHIFT},
    2387. 

  2387. 	{PMIC_AUXADC_ADC_OUT_THR_HW, PMIC_AUXADC_ADC_OUT_THR_HW_ADDR, PMIC_AUXADC_ADC_OUT_THR_HW_MASK, PMIC_AUXADC_ADC_OUT_THR_HW_SHIFT},
    2388. 

  2388. 	{PMIC_AUXADC_ADC_RDY_THR_HW, PMIC_AUXADC_ADC_RDY_THR_HW_ADDR, PMIC_AUXADC_ADC_RDY_THR_HW_MASK, PMIC_AUXADC_ADC_RDY_THR_HW_SHIFT},
    2389. 

  2389. 	{PMIC_AUXADC_ADC_OUT_LBAT, PMIC_AUXADC_ADC_OUT_LBAT_ADDR, PMIC_AUXADC_ADC_OUT_LBAT_MASK, PMIC_AUXADC_ADC_OUT_LBAT_SHIFT},
    2390. 

  2390. 	{PMIC_AUXADC_ADC_RDY_LBAT, PMIC_AUXADC_ADC_RDY_LBAT_ADDR, PMIC_AUXADC_ADC_RDY_LBAT_MASK, PMIC_AUXADC_ADC_RDY_LBAT_SHIFT},
    2391. 

  2391. 	{PMIC_AUXADC_ADC_OUT_LBAT2, PMIC_AUXADC_ADC_OUT_LBAT2_ADDR, PMIC_AUXADC_ADC_OUT_LBAT2_MASK, PMIC_AUXADC_ADC_OUT_LBAT2_SHIFT},
    2392. 

  2392. 	{PMIC_AUXADC_ADC_RDY_LBAT2, PMIC_AUXADC_ADC_RDY_LBAT2_ADDR, PMIC_AUXADC_ADC_RDY_LBAT2_MASK, PMIC_AUXADC_ADC_RDY_LBAT2_SHIFT},
    2393. 

  2393. 	{PMIC_AUXADC_ADC_OUT_CH7_BY_GPS, PMIC_AUXADC_ADC_OUT_CH7_BY_GPS_ADDR, PMIC_AUXADC_ADC_OUT_CH7_BY_GPS_MASK, PMIC_AUXADC_ADC_OUT_CH7_BY_GPS_SHIFT},
    2394. 

  2394. 	{PMIC_AUXADC_ADC_RDY_CH7_BY_GPS, PMIC_AUXADC_ADC_RDY_CH7_BY_GPS_ADDR, PMIC_AUXADC_ADC_RDY_CH7_BY_GPS_MASK, PMIC_AUXADC_ADC_RDY_CH7_BY_GPS_SHIFT},
    2395. 

  2395. 	{PMIC_AUXADC_ADC_OUT_CH7_BY_MD, PMIC_AUXADC_ADC_OUT_CH7_BY_MD_ADDR, PMIC_AUXADC_ADC_OUT_CH7_BY_MD_MASK, PMIC_AUXADC_ADC_OUT_CH7_BY_MD_SHIFT},
    2396. 

  2396. 	{PMIC_AUXADC_ADC_RDY_CH7_BY_MD, PMIC_AUXADC_ADC_RDY_CH7_BY_MD_ADDR, PMIC_AUXADC_ADC_RDY_CH7_BY_MD_MASK, PMIC_AUXADC_ADC_RDY_CH7_BY_MD_SHIFT},
    2397. 

  2397. 	{PMIC_AUXADC_ADC_OUT_CH7_BY_AP, PMIC_AUXADC_ADC_OUT_CH7_BY_AP_ADDR, PMIC_AUXADC_ADC_OUT_CH7_BY_AP_MASK, PMIC_AUXADC_ADC_OUT_CH7_BY_AP_SHIFT},
    2398. 

  2398. 	{PMIC_AUXADC_ADC_RDY_CH7_BY_AP, PMIC_AUXADC_ADC_RDY_CH7_BY_AP_ADDR, PMIC_AUXADC_ADC_RDY_CH7_BY_AP_MASK, PMIC_AUXADC_ADC_RDY_CH7_BY_AP_SHIFT},
    2399. 

  2399. 	{PMIC_AUXADC_ADC_OUT_CH4_BY_MD, PMIC_AUXADC_ADC_OUT_CH4_BY_MD_ADDR, PMIC_AUXADC_ADC_OUT_CH4_BY_MD_MASK, PMIC_AUXADC_ADC_OUT_CH4_BY_MD_SHIFT},
    2400. 

  2400. 	{PMIC_AUXADC_ADC_RDY_CH4_BY_MD, PMIC_AUXADC_ADC_RDY_CH4_BY_MD_ADDR, PMIC_AUXADC_ADC_RDY_CH4_BY_MD_MASK, PMIC_AUXADC_ADC_RDY_CH4_BY_MD_SHIFT},
    2401. 

  2401. 	{PMIC_AUXADC_ADC_OUT_WAKEUP_PCHR, PMIC_AUXADC_ADC_OUT_WAKEUP_PCHR_ADDR, PMIC_AUXADC_ADC_OUT_WAKEUP_PCHR_MASK, PMIC_AUXADC_ADC_OUT_WAKEUP_PCHR_SHIFT},
    2402. 

  2402. 	{PMIC_AUXADC_ADC_RDY_WAKEUP_PCHR, PMIC_AUXADC_ADC_RDY_WAKEUP_PCHR_ADDR, PMIC_AUXADC_ADC_RDY_WAKEUP_PCHR_MASK, PMIC_AUXADC_ADC_RDY_WAKEUP_PCHR_SHIFT},
    2403. 

  2403. 	{PMIC_AUXADC_ADC_OUT_WAKEUP_SWCHR, PMIC_AUXADC_ADC_OUT_WAKEUP_SWCHR_ADDR, PMIC_AUXADC_ADC_OUT_WAKEUP_SWCHR_MASK, PMIC_AUXADC_ADC_OUT_WAKEUP_SWCHR_SHIFT},
    2404. 

  2404. 	{PMIC_AUXADC_ADC_RDY_WAKEUP_SWCHR, PMIC_AUXADC_ADC_RDY_WAKEUP_SWCHR_ADDR, PMIC_AUXADC_ADC_RDY_WAKEUP_SWCHR_MASK, PMIC_AUXADC_ADC_RDY_WAKEUP_SWCHR_SHIFT},
    2405. 

  2405. 	{PMIC_AUXADC_ADC_OUT_CH0_BY_MD, PMIC_AUXADC_ADC_OUT_CH0_BY_MD_ADDR, PMIC_AUXADC_ADC_OUT_CH0_BY_MD_MASK, PMIC_AUXADC_ADC_OUT_CH0_BY_MD_SHIFT},
    2406. 

  2406. 	{PMIC_AUXADC_ADC_RDY_CH0_BY_MD, PMIC_AUXADC_ADC_RDY_CH0_BY_MD_ADDR, PMIC_AUXADC_ADC_RDY_CH0_BY_MD_MASK, PMIC_AUXADC_ADC_RDY_CH0_BY_MD_SHIFT},
    2407. 

  2407. 	{PMIC_AUXADC_ADC_OUT_CH0_BY_AP, PMIC_AUXADC_ADC_OUT_CH0_BY_AP_ADDR, PMIC_AUXADC_ADC_OUT_CH0_BY_AP_MASK, PMIC_AUXADC_ADC_OUT_CH0_BY_AP_SHIFT},
    2408. 

  2408. 	{PMIC_AUXADC_ADC_RDY_CH0_BY_AP, PMIC_AUXADC_ADC_RDY_CH0_BY_AP_ADDR, PMIC_AUXADC_ADC_RDY_CH0_BY_AP_MASK, PMIC_AUXADC_ADC_RDY_CH0_BY_AP_SHIFT},
    2409. 

  2409. 	{PMIC_AUXADC_ADC_OUT_CH1_BY_MD, PMIC_AUXADC_ADC_OUT_CH1_BY_MD_ADDR, PMIC_AUXADC_ADC_OUT_CH1_BY_MD_MASK, PMIC_AUXADC_ADC_OUT_CH1_BY_MD_SHIFT},
    2410. 

  2410. 	{PMIC_AUXADC_ADC_RDY_CH1_BY_MD, PMIC_AUXADC_ADC_RDY_CH1_BY_MD_ADDR, PMIC_AUXADC_ADC_RDY_CH1_BY_MD_MASK, PMIC_AUXADC_ADC_RDY_CH1_BY_MD_SHIFT},
    2411. 

  2411. 	{PMIC_AUXADC_ADC_OUT_CH1_BY_AP, PMIC_AUXADC_ADC_OUT_CH1_BY_AP_ADDR, PMIC_AUXADC_ADC_OUT_CH1_BY_AP_MASK, PMIC_AUXADC_ADC_OUT_CH1_BY_AP_SHIFT},
    2412. 

  2412. 	{PMIC_AUXADC_ADC_RDY_CH1_BY_AP, PMIC_AUXADC_ADC_RDY_CH1_BY_AP_ADDR, PMIC_AUXADC_ADC_RDY_CH1_BY_AP_MASK, PMIC_AUXADC_ADC_RDY_CH1_BY_AP_SHIFT},
    2413. 

  2413. 	{PMIC_AUXADC_ADC_OUT_VISMPS0, PMIC_AUXADC_ADC_OUT_VISMPS0_ADDR, PMIC_AUXADC_ADC_OUT_VISMPS0_MASK, PMIC_AUXADC_ADC_OUT_VISMPS0_SHIFT},
    2414. 

  2414. 	{PMIC_AUXADC_ADC_RDY_VISMPS0, PMIC_AUXADC_ADC_RDY_VISMPS0_ADDR, PMIC_AUXADC_ADC_RDY_VISMPS0_MASK, PMIC_AUXADC_ADC_RDY_VISMPS0_SHIFT},
    2415. 

  2415. 	{PMIC_AUXADC_ADC_OUT_FGADC1, PMIC_AUXADC_ADC_OUT_FGADC1_ADDR, PMIC_AUXADC_ADC_OUT_FGADC1_MASK, PMIC_AUXADC_ADC_OUT_FGADC1_SHIFT},
    2416. 

  2416. 	{PMIC_AUXADC_ADC_RDY_FGADC1, PMIC_AUXADC_ADC_RDY_FGADC1_ADDR, PMIC_AUXADC_ADC_RDY_FGADC1_MASK, PMIC_AUXADC_ADC_RDY_FGADC1_SHIFT},
    2417. 

  2417. 	{PMIC_AUXADC_ADC_OUT_FGADC2, PMIC_AUXADC_ADC_OUT_FGADC2_ADDR, PMIC_AUXADC_ADC_OUT_FGADC2_MASK, PMIC_AUXADC_ADC_OUT_FGADC2_SHIFT},
    2418. 

  2418. 	{PMIC_AUXADC_ADC_RDY_FGADC2, PMIC_AUXADC_ADC_RDY_FGADC2_ADDR, PMIC_AUXADC_ADC_RDY_FGADC2_MASK, PMIC_AUXADC_ADC_RDY_FGADC2_SHIFT},
    2419. 

  2419. 	{PMIC_AUXADC_ADC_OUT_IMP, PMIC_AUXADC_ADC_OUT_IMP_ADDR, PMIC_AUXADC_ADC_OUT_IMP_MASK, PMIC_AUXADC_ADC_OUT_IMP_SHIFT},
    2420. 

  2420. 	{PMIC_AUXADC_ADC_RDY_IMP, PMIC_AUXADC_ADC_RDY_IMP_ADDR, PMIC_AUXADC_ADC_RDY_IMP_MASK, PMIC_AUXADC_ADC_RDY_IMP_SHIFT},
    2421. 

  2421. 	{PMIC_AUXADC_ADC_OUT_IMP_AVG, PMIC_AUXADC_ADC_OUT_IMP_AVG_ADDR, PMIC_AUXADC_ADC_OUT_IMP_AVG_MASK, PMIC_AUXADC_ADC_OUT_IMP_AVG_SHIFT},
    2422. 

  2422. 	{PMIC_AUXADC_ADC_RDY_IMP_AVG, PMIC_AUXADC_ADC_RDY_IMP_AVG_ADDR, PMIC_AUXADC_ADC_RDY_IMP_AVG_MASK, PMIC_AUXADC_ADC_RDY_IMP_AVG_SHIFT},
    2423. 

  2423. 	{PMIC_AUXADC_ADC_OUT_RAW, PMIC_AUXADC_ADC_OUT_RAW_ADDR, PMIC_AUXADC_ADC_OUT_RAW_MASK, PMIC_AUXADC_ADC_OUT_RAW_SHIFT},
    2424. 

  2424. 	{PMIC_AUXADC_ADC_OUT_MDRT, PMIC_AUXADC_ADC_OUT_MDRT_ADDR, PMIC_AUXADC_ADC_OUT_MDRT_MASK, PMIC_AUXADC_ADC_OUT_MDRT_SHIFT},
    2425. 

  2425. 	{PMIC_AUXADC_ADC_RDY_MDRT, PMIC_AUXADC_ADC_RDY_MDRT_ADDR, PMIC_AUXADC_ADC_RDY_MDRT_MASK, PMIC_AUXADC_ADC_RDY_MDRT_SHIFT},
    2426. 

  2426. 	{PMIC_AUXADC_ADC_OUT_MDBG, PMIC_AUXADC_ADC_OUT_MDBG_ADDR, PMIC_AUXADC_ADC_OUT_MDBG_MASK, PMIC_AUXADC_ADC_OUT_MDBG_SHIFT},
    2427. 

  2427. 	{PMIC_AUXADC_ADC_RDY_MDBG, PMIC_AUXADC_ADC_RDY_MDBG_ADDR, PMIC_AUXADC_ADC_RDY_MDBG_MASK, PMIC_AUXADC_ADC_RDY_MDBG_SHIFT},
    2428. 

  2428. 	{PMIC_AUXADC_ADC_OUT_DCXO_BY_GPS, PMIC_AUXADC_ADC_OUT_DCXO_BY_GPS_ADDR, PMIC_AUXADC_ADC_OUT_DCXO_BY_GPS_MASK, PMIC_AUXADC_ADC_OUT_DCXO_BY_GPS_SHIFT},
    2429. 

  2429. 	{PMIC_AUXADC_ADC_RDY_DCXO_BY_GPS, PMIC_AUXADC_ADC_RDY_DCXO_BY_GPS_ADDR, PMIC_AUXADC_ADC_RDY_DCXO_BY_GPS_MASK, PMIC_AUXADC_ADC_RDY_DCXO_BY_GPS_SHIFT},
    2430. 

  2430. 	{PMIC_AUXADC_ADC_OUT_DCXO_BY_MD, PMIC_AUXADC_ADC_OUT_DCXO_BY_MD_ADDR, PMIC_AUXADC_ADC_OUT_DCXO_BY_MD_MASK, PMIC_AUXADC_ADC_OUT_DCXO_BY_MD_SHIFT},
    2431. 

  2431. 	{PMIC_AUXADC_ADC_RDY_DCXO_BY_MD, PMIC_AUXADC_ADC_RDY_DCXO_BY_MD_ADDR, PMIC_AUXADC_ADC_RDY_DCXO_BY_MD_MASK, PMIC_AUXADC_ADC_RDY_DCXO_BY_MD_SHIFT},
    2432. 

  2432. 	{PMIC_AUXADC_ADC_OUT_DCXO_BY_AP, PMIC_AUXADC_ADC_OUT_DCXO_BY_AP_ADDR, PMIC_AUXADC_ADC_OUT_DCXO_BY_AP_MASK, PMIC_AUXADC_ADC_OUT_DCXO_BY_AP_SHIFT},
    2433. 

  2433. 	{PMIC_AUXADC_ADC_RDY_DCXO_BY_AP, PMIC_AUXADC_ADC_RDY_DCXO_BY_AP_ADDR, PMIC_AUXADC_ADC_RDY_DCXO_BY_AP_MASK, PMIC_AUXADC_ADC_RDY_DCXO_BY_AP_SHIFT},
    2434. 

  2434. 	{PMIC_AUXADC_ADC_OUT_DCXO_MDRT, PMIC_AUXADC_ADC_OUT_DCXO_MDRT_ADDR, PMIC_AUXADC_ADC_OUT_DCXO_MDRT_MASK, PMIC_AUXADC_ADC_OUT_DCXO_MDRT_SHIFT},
    2435. 

  2435. 	{PMIC_AUXADC_ADC_RDY_DCXO_MDRT, PMIC_AUXADC_ADC_RDY_DCXO_MDRT_ADDR, PMIC_AUXADC_ADC_RDY_DCXO_MDRT_MASK, PMIC_AUXADC_ADC_RDY_DCXO_MDRT_SHIFT},
    2436. 

  2436. 	{PMIC_AUXADC_ADC_OUT_NAG, PMIC_AUXADC_ADC_OUT_NAG_ADDR, PMIC_AUXADC_ADC_OUT_NAG_MASK, PMIC_AUXADC_ADC_OUT_NAG_SHIFT},
    2437. 

  2437. 	{PMIC_AUXADC_ADC_RDY_NAG, PMIC_AUXADC_ADC_RDY_NAG_ADDR, PMIC_AUXADC_ADC_RDY_NAG_MASK, PMIC_AUXADC_ADC_RDY_NAG_SHIFT},
    2438. 

  2438. 	{PMIC_AUXADC_ADC_OUT_TYPEC_H, PMIC_AUXADC_ADC_OUT_TYPEC_H_ADDR, PMIC_AUXADC_ADC_OUT_TYPEC_H_MASK, PMIC_AUXADC_ADC_OUT_TYPEC_H_SHIFT},
    2439. 

  2439. 	{PMIC_AUXADC_ADC_RDY_TYPEC_H, PMIC_AUXADC_ADC_RDY_TYPEC_H_ADDR, PMIC_AUXADC_ADC_RDY_TYPEC_H_MASK, PMIC_AUXADC_ADC_RDY_TYPEC_H_SHIFT},
    2440. 

  2440. 	{PMIC_AUXADC_ADC_OUT_TYPEC_L, PMIC_AUXADC_ADC_OUT_TYPEC_L_ADDR, PMIC_AUXADC_ADC_OUT_TYPEC_L_MASK, PMIC_AUXADC_ADC_OUT_TYPEC_L_SHIFT},
    2441. 

  2441. 	{PMIC_AUXADC_ADC_RDY_TYPEC_L, PMIC_AUXADC_ADC_RDY_TYPEC_L_ADDR, PMIC_AUXADC_ADC_RDY_TYPEC_L_MASK, PMIC_AUXADC_ADC_RDY_TYPEC_L_SHIFT},
    2442. 

  2442. 	{PMIC_AUXADC_BUF_OUT_00, PMIC_AUXADC_BUF_OUT_00_ADDR, PMIC_AUXADC_BUF_OUT_00_MASK, PMIC_AUXADC_BUF_OUT_00_SHIFT},
    2443. 

  2443. 	{PMIC_AUXADC_BUF_RDY_00, PMIC_AUXADC_BUF_RDY_00_ADDR, PMIC_AUXADC_BUF_RDY_00_MASK, PMIC_AUXADC_BUF_RDY_00_SHIFT},
    2444. 

  2444. 	{PMIC_AUXADC_BUF_OUT_01, PMIC_AUXADC_BUF_OUT_01_ADDR, PMIC_AUXADC_BUF_OUT_01_MASK, PMIC_AUXADC_BUF_OUT_01_SHIFT},
    2445. 

  2445. 	{PMIC_AUXADC_BUF_RDY_01, PMIC_AUXADC_BUF_RDY_01_ADDR, PMIC_AUXADC_BUF_RDY_01_MASK, PMIC_AUXADC_BUF_RDY_01_SHIFT},
    2446. 

  2446. 	{PMIC_AUXADC_BUF_OUT_02, PMIC_AUXADC_BUF_OUT_02_ADDR, PMIC_AUXADC_BUF_OUT_02_MASK, PMIC_AUXADC_BUF_OUT_02_SHIFT},
    2447. 

  2447. 	{PMIC_AUXADC_BUF_RDY_02, PMIC_AUXADC_BUF_RDY_02_ADDR, PMIC_AUXADC_BUF_RDY_02_MASK, PMIC_AUXADC_BUF_RDY_02_SHIFT},
    2448. 

  2448. 	{PMIC_AUXADC_BUF_OUT_03, PMIC_AUXADC_BUF_OUT_03_ADDR, PMIC_AUXADC_BUF_OUT_03_MASK, PMIC_AUXADC_BUF_OUT_03_SHIFT},
    2449. 

  2449. 	{PMIC_AUXADC_BUF_RDY_03, PMIC_AUXADC_BUF_RDY_03_ADDR, PMIC_AUXADC_BUF_RDY_03_MASK, PMIC_AUXADC_BUF_RDY_03_SHIFT},
    2450. 

  2450. 	{PMIC_AUXADC_BUF_OUT_04, PMIC_AUXADC_BUF_OUT_04_ADDR, PMIC_AUXADC_BUF_OUT_04_MASK, PMIC_AUXADC_BUF_OUT_04_SHIFT},
    2451. 

  2451. 	{PMIC_AUXADC_BUF_RDY_04, PMIC_AUXADC_BUF_RDY_04_ADDR, PMIC_AUXADC_BUF_RDY_04_MASK, PMIC_AUXADC_BUF_RDY_04_SHIFT},
    2452. 

  2452. 	{PMIC_AUXADC_BUF_OUT_05, PMIC_AUXADC_BUF_OUT_05_ADDR, PMIC_AUXADC_BUF_OUT_05_MASK, PMIC_AUXADC_BUF_OUT_05_SHIFT},
    2453. 

  2453. 	{PMIC_AUXADC_BUF_RDY_05, PMIC_AUXADC_BUF_RDY_05_ADDR, PMIC_AUXADC_BUF_RDY_05_MASK, PMIC_AUXADC_BUF_RDY_05_SHIFT},
    2454. 

  2454. 	{PMIC_AUXADC_BUF_OUT_06, PMIC_AUXADC_BUF_OUT_06_ADDR, PMIC_AUXADC_BUF_OUT_06_MASK, PMIC_AUXADC_BUF_OUT_06_SHIFT},
    2455. 

  2455. 	{PMIC_AUXADC_BUF_RDY_06, PMIC_AUXADC_BUF_RDY_06_ADDR, PMIC_AUXADC_BUF_RDY_06_MASK, PMIC_AUXADC_BUF_RDY_06_SHIFT},
    2456. 

  2456. 	{PMIC_AUXADC_BUF_OUT_07, PMIC_AUXADC_BUF_OUT_07_ADDR, PMIC_AUXADC_BUF_OUT_07_MASK, PMIC_AUXADC_BUF_OUT_07_SHIFT},
    2457. 

  2457. 	{PMIC_AUXADC_BUF_RDY_07, PMIC_AUXADC_BUF_RDY_07_ADDR, PMIC_AUXADC_BUF_RDY_07_MASK, PMIC_AUXADC_BUF_RDY_07_SHIFT},
    2458. 

  2458. 	{PMIC_AUXADC_BUF_OUT_08, PMIC_AUXADC_BUF_OUT_08_ADDR, PMIC_AUXADC_BUF_OUT_08_MASK, PMIC_AUXADC_BUF_OUT_08_SHIFT},
    2459. 

  2459. 	{PMIC_AUXADC_BUF_RDY_08, PMIC_AUXADC_BUF_RDY_08_ADDR, PMIC_AUXADC_BUF_RDY_08_MASK, PMIC_AUXADC_BUF_RDY_08_SHIFT},
    2460. 

  2460. 	{PMIC_AUXADC_BUF_OUT_09, PMIC_AUXADC_BUF_OUT_09_ADDR, PMIC_AUXADC_BUF_OUT_09_MASK, PMIC_AUXADC_BUF_OUT_09_SHIFT},
    2461. 

  2461. 	{PMIC_AUXADC_BUF_RDY_09, PMIC_AUXADC_BUF_RDY_09_ADDR, PMIC_AUXADC_BUF_RDY_09_MASK, PMIC_AUXADC_BUF_RDY_09_SHIFT},
    2462. 

  2462. 	{PMIC_AUXADC_BUF_OUT_10, PMIC_AUXADC_BUF_OUT_10_ADDR, PMIC_AUXADC_BUF_OUT_10_MASK, PMIC_AUXADC_BUF_OUT_10_SHIFT},
    2463. 

  2463. 	{PMIC_AUXADC_BUF_RDY_10, PMIC_AUXADC_BUF_RDY_10_ADDR, PMIC_AUXADC_BUF_RDY_10_MASK, PMIC_AUXADC_BUF_RDY_10_SHIFT},
    2464. 

  2464. 	{PMIC_AUXADC_BUF_OUT_11, PMIC_AUXADC_BUF_OUT_11_ADDR, PMIC_AUXADC_BUF_OUT_11_MASK, PMIC_AUXADC_BUF_OUT_11_SHIFT},
    2465. 

  2465. 	{PMIC_AUXADC_BUF_RDY_11, PMIC_AUXADC_BUF_RDY_11_ADDR, PMIC_AUXADC_BUF_RDY_11_MASK, PMIC_AUXADC_BUF_RDY_11_SHIFT},
    2466. 

  2466. 	{PMIC_AUXADC_BUF_OUT_12, PMIC_AUXADC_BUF_OUT_12_ADDR, PMIC_AUXADC_BUF_OUT_12_MASK, PMIC_AUXADC_BUF_OUT_12_SHIFT},
    2467. 

  2467. 	{PMIC_AUXADC_BUF_RDY_12, PMIC_AUXADC_BUF_RDY_12_ADDR, PMIC_AUXADC_BUF_RDY_12_MASK, PMIC_AUXADC_BUF_RDY_12_SHIFT},
    2468. 

  2468. 	{PMIC_AUXADC_BUF_OUT_13, PMIC_AUXADC_BUF_OUT_13_ADDR, PMIC_AUXADC_BUF_OUT_13_MASK, PMIC_AUXADC_BUF_OUT_13_SHIFT},
    2469. 

  2469. 	{PMIC_AUXADC_BUF_RDY_13, PMIC_AUXADC_BUF_RDY_13_ADDR, PMIC_AUXADC_BUF_RDY_13_MASK, PMIC_AUXADC_BUF_RDY_13_SHIFT},
    2470. 

  2470. 	{PMIC_AUXADC_BUF_OUT_14, PMIC_AUXADC_BUF_OUT_14_ADDR, PMIC_AUXADC_BUF_OUT_14_MASK, PMIC_AUXADC_BUF_OUT_14_SHIFT},
    2471. 

  2471. 	{PMIC_AUXADC_BUF_RDY_14, PMIC_AUXADC_BUF_RDY_14_ADDR, PMIC_AUXADC_BUF_RDY_14_MASK, PMIC_AUXADC_BUF_RDY_14_SHIFT},
    2472. 

  2472. 	{PMIC_AUXADC_BUF_OUT_15, PMIC_AUXADC_BUF_OUT_15_ADDR, PMIC_AUXADC_BUF_OUT_15_MASK, PMIC_AUXADC_BUF_OUT_15_SHIFT},
    2473. 

  2473. 	{PMIC_AUXADC_BUF_RDY_15, PMIC_AUXADC_BUF_RDY_15_ADDR, PMIC_AUXADC_BUF_RDY_15_MASK, PMIC_AUXADC_BUF_RDY_15_SHIFT},
    2474. 

  2474. 	{PMIC_AUXADC_BUF_OUT_16, PMIC_AUXADC_BUF_OUT_16_ADDR, PMIC_AUXADC_BUF_OUT_16_MASK, PMIC_AUXADC_BUF_OUT_16_SHIFT},
    2475. 

  2475. 	{PMIC_AUXADC_BUF_RDY_16, PMIC_AUXADC_BUF_RDY_16_ADDR, PMIC_AUXADC_BUF_RDY_16_MASK, PMIC_AUXADC_BUF_RDY_16_SHIFT},
    2476. 

  2476. 	{PMIC_AUXADC_BUF_OUT_17, PMIC_AUXADC_BUF_OUT_17_ADDR, PMIC_AUXADC_BUF_OUT_17_MASK, PMIC_AUXADC_BUF_OUT_17_SHIFT},
    2477. 

  2477. 	{PMIC_AUXADC_BUF_RDY_17, PMIC_AUXADC_BUF_RDY_17_ADDR, PMIC_AUXADC_BUF_RDY_17_MASK, PMIC_AUXADC_BUF_RDY_17_SHIFT},
    2478. 

  2478. 	{PMIC_AUXADC_BUF_OUT_18, PMIC_AUXADC_BUF_OUT_18_ADDR, PMIC_AUXADC_BUF_OUT_18_MASK, PMIC_AUXADC_BUF_OUT_18_SHIFT},
    2479. 

  2479. 	{PMIC_AUXADC_BUF_RDY_18, PMIC_AUXADC_BUF_RDY_18_ADDR, PMIC_AUXADC_BUF_RDY_18_MASK, PMIC_AUXADC_BUF_RDY_18_SHIFT},
    2480. 

  2480. 	{PMIC_AUXADC_BUF_OUT_19, PMIC_AUXADC_BUF_OUT_19_ADDR, PMIC_AUXADC_BUF_OUT_19_MASK, PMIC_AUXADC_BUF_OUT_19_SHIFT},
    2481. 

  2481. 	{PMIC_AUXADC_BUF_RDY_19, PMIC_AUXADC_BUF_RDY_19_ADDR, PMIC_AUXADC_BUF_RDY_19_MASK, PMIC_AUXADC_BUF_RDY_19_SHIFT},
    2482. 

  2482. 	{PMIC_AUXADC_BUF_OUT_20, PMIC_AUXADC_BUF_OUT_20_ADDR, PMIC_AUXADC_BUF_OUT_20_MASK, PMIC_AUXADC_BUF_OUT_20_SHIFT},
    2483. 

  2483. 	{PMIC_AUXADC_BUF_RDY_20, PMIC_AUXADC_BUF_RDY_20_ADDR, PMIC_AUXADC_BUF_RDY_20_MASK, PMIC_AUXADC_BUF_RDY_20_SHIFT},
    2484. 

  2484. 	{PMIC_AUXADC_BUF_OUT_21, PMIC_AUXADC_BUF_OUT_21_ADDR, PMIC_AUXADC_BUF_OUT_21_MASK, PMIC_AUXADC_BUF_OUT_21_SHIFT},
    2485. 

  2485. 	{PMIC_AUXADC_BUF_RDY_21, PMIC_AUXADC_BUF_RDY_21_ADDR, PMIC_AUXADC_BUF_RDY_21_MASK, PMIC_AUXADC_BUF_RDY_21_SHIFT},
    2486. 

  2486. 	{PMIC_AUXADC_BUF_OUT_22, PMIC_AUXADC_BUF_OUT_22_ADDR, PMIC_AUXADC_BUF_OUT_22_MASK, PMIC_AUXADC_BUF_OUT_22_SHIFT},
    2487. 

  2487. 	{PMIC_AUXADC_BUF_RDY_22, PMIC_AUXADC_BUF_RDY_22_ADDR, PMIC_AUXADC_BUF_RDY_22_MASK, PMIC_AUXADC_BUF_RDY_22_SHIFT},
    2488. 

  2488. 	{PMIC_AUXADC_BUF_OUT_23, PMIC_AUXADC_BUF_OUT_23_ADDR, PMIC_AUXADC_BUF_OUT_23_MASK, PMIC_AUXADC_BUF_OUT_23_SHIFT},
    2489. 

  2489. 	{PMIC_AUXADC_BUF_RDY_23, PMIC_AUXADC_BUF_RDY_23_ADDR, PMIC_AUXADC_BUF_RDY_23_MASK, PMIC_AUXADC_BUF_RDY_23_SHIFT},
    2490. 

  2490. 	{PMIC_AUXADC_BUF_OUT_24, PMIC_AUXADC_BUF_OUT_24_ADDR, PMIC_AUXADC_BUF_OUT_24_MASK, PMIC_AUXADC_BUF_OUT_24_SHIFT},
    2491. 

  2491. 	{PMIC_AUXADC_BUF_RDY_24, PMIC_AUXADC_BUF_RDY_24_ADDR, PMIC_AUXADC_BUF_RDY_24_MASK, PMIC_AUXADC_BUF_RDY_24_SHIFT},
    2492. 

  2492. 	{PMIC_AUXADC_BUF_OUT_25, PMIC_AUXADC_BUF_OUT_25_ADDR, PMIC_AUXADC_BUF_OUT_25_MASK, PMIC_AUXADC_BUF_OUT_25_SHIFT},
    2493. 

  2493. 	{PMIC_AUXADC_BUF_RDY_25, PMIC_AUXADC_BUF_RDY_25_ADDR, PMIC_AUXADC_BUF_RDY_25_MASK, PMIC_AUXADC_BUF_RDY_25_SHIFT},
    2494. 

  2494. 	{PMIC_AUXADC_BUF_OUT_26, PMIC_AUXADC_BUF_OUT_26_ADDR, PMIC_AUXADC_BUF_OUT_26_MASK, PMIC_AUXADC_BUF_OUT_26_SHIFT},
    2495. 

  2495. 	{PMIC_AUXADC_BUF_RDY_26, PMIC_AUXADC_BUF_RDY_26_ADDR, PMIC_AUXADC_BUF_RDY_26_MASK, PMIC_AUXADC_BUF_RDY_26_SHIFT},
    2496. 

  2496. 	{PMIC_AUXADC_BUF_OUT_27, PMIC_AUXADC_BUF_OUT_27_ADDR, PMIC_AUXADC_BUF_OUT_27_MASK, PMIC_AUXADC_BUF_OUT_27_SHIFT},
    2497. 

  2497. 	{PMIC_AUXADC_BUF_RDY_27, PMIC_AUXADC_BUF_RDY_27_ADDR, PMIC_AUXADC_BUF_RDY_27_MASK, PMIC_AUXADC_BUF_RDY_27_SHIFT},
    2498. 

  2498. 	{PMIC_AUXADC_BUF_OUT_28, PMIC_AUXADC_BUF_OUT_28_ADDR, PMIC_AUXADC_BUF_OUT_28_MASK, PMIC_AUXADC_BUF_OUT_28_SHIFT},
    2499. 

  2499. 	{PMIC_AUXADC_BUF_RDY_28, PMIC_AUXADC_BUF_RDY_28_ADDR, PMIC_AUXADC_BUF_RDY_28_MASK, PMIC_AUXADC_BUF_RDY_28_SHIFT},
    2500. 

  2500. 	{PMIC_AUXADC_BUF_OUT_29, PMIC_AUXADC_BUF_OUT_29_ADDR, PMIC_AUXADC_BUF_OUT_29_MASK, PMIC_AUXADC_BUF_OUT_29_SHIFT},
    2501. 

  2501. 	{PMIC_AUXADC_BUF_RDY_29, PMIC_AUXADC_BUF_RDY_29_ADDR, PMIC_AUXADC_BUF_RDY_29_MASK, PMIC_AUXADC_BUF_RDY_29_SHIFT},
    2502. 

  2502. 	{PMIC_AUXADC_BUF_OUT_30, PMIC_AUXADC_BUF_OUT_30_ADDR, PMIC_AUXADC_BUF_OUT_30_MASK, PMIC_AUXADC_BUF_OUT_30_SHIFT},
    2503. 

  2503. 	{PMIC_AUXADC_BUF_RDY_30, PMIC_AUXADC_BUF_RDY_30_ADDR, PMIC_AUXADC_BUF_RDY_30_MASK, PMIC_AUXADC_BUF_RDY_30_SHIFT},
    2504. 

  2504. 	{PMIC_AUXADC_BUF_OUT_31, PMIC_AUXADC_BUF_OUT_31_ADDR, PMIC_AUXADC_BUF_OUT_31_MASK, PMIC_AUXADC_BUF_OUT_31_SHIFT},
    2505. 

  2505. 	{PMIC_AUXADC_BUF_RDY_31, PMIC_AUXADC_BUF_RDY_31_ADDR, PMIC_AUXADC_BUF_RDY_31_MASK, PMIC_AUXADC_BUF_RDY_31_SHIFT},
    2506. 

  2506. 	{PMIC_AUXADC_ADC_BUSY_IN, PMIC_AUXADC_ADC_BUSY_IN_ADDR, PMIC_AUXADC_ADC_BUSY_IN_MASK, PMIC_AUXADC_ADC_BUSY_IN_SHIFT},
    2507. 

  2507. 	{PMIC_AUXADC_ADC_BUSY_IN_LBAT, PMIC_AUXADC_ADC_BUSY_IN_LBAT_ADDR, PMIC_AUXADC_ADC_BUSY_IN_LBAT_MASK, PMIC_AUXADC_ADC_BUSY_IN_LBAT_SHIFT},
    2508. 

  2508. 	{PMIC_AUXADC_ADC_BUSY_IN_LBAT2, PMIC_AUXADC_ADC_BUSY_IN_LBAT2_ADDR, PMIC_AUXADC_ADC_BUSY_IN_LBAT2_MASK, PMIC_AUXADC_ADC_BUSY_IN_LBAT2_SHIFT},
    2509. 

  2509. 	{PMIC_AUXADC_ADC_BUSY_IN_VISMPS0, PMIC_AUXADC_ADC_BUSY_IN_VISMPS0_ADDR, PMIC_AUXADC_ADC_BUSY_IN_VISMPS0_MASK, PMIC_AUXADC_ADC_BUSY_IN_VISMPS0_SHIFT},
    2510. 

  2510. 	{PMIC_AUXADC_ADC_BUSY_IN_WAKEUP, PMIC_AUXADC_ADC_BUSY_IN_WAKEUP_ADDR, PMIC_AUXADC_ADC_BUSY_IN_WAKEUP_MASK, PMIC_AUXADC_ADC_BUSY_IN_WAKEUP_SHIFT},
    2511. 

  2511. 	{PMIC_AUXADC_ADC_BUSY_IN_DCXO_MDRT, PMIC_AUXADC_ADC_BUSY_IN_DCXO_MDRT_ADDR, PMIC_AUXADC_ADC_BUSY_IN_DCXO_MDRT_MASK, PMIC_AUXADC_ADC_BUSY_IN_DCXO_MDRT_SHIFT},
    2512. 

  2512. 	{PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_AP, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_AP_ADDR, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_AP_MASK, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_AP_SHIFT},
    2513. 

  2513. 	{PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MD, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MD_ADDR, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MD_MASK, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MD_SHIFT},
    2514. 

  2514. 	{PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_ADDR, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MASK, PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_SHIFT},
    2515. 

  2515. 	{PMIC_AUXADC_ADC_BUSY_IN_MDRT, PMIC_AUXADC_ADC_BUSY_IN_MDRT_ADDR, PMIC_AUXADC_ADC_BUSY_IN_MDRT_MASK, PMIC_AUXADC_ADC_BUSY_IN_MDRT_SHIFT},
    2516. 

  2516. 	{PMIC_AUXADC_ADC_BUSY_IN_MDBG, PMIC_AUXADC_ADC_BUSY_IN_MDBG_ADDR, PMIC_AUXADC_ADC_BUSY_IN_MDBG_MASK, PMIC_AUXADC_ADC_BUSY_IN_MDBG_SHIFT},
    2517. 

  2517. 	{PMIC_AUXADC_ADC_BUSY_IN_SHARE, PMIC_AUXADC_ADC_BUSY_IN_SHARE_ADDR, PMIC_AUXADC_ADC_BUSY_IN_SHARE_MASK, PMIC_AUXADC_ADC_BUSY_IN_SHARE_SHIFT},
    2518. 

  2518. 	{PMIC_AUXADC_ADC_BUSY_IN_IMP, PMIC_AUXADC_ADC_BUSY_IN_IMP_ADDR, PMIC_AUXADC_ADC_BUSY_IN_IMP_MASK, PMIC_AUXADC_ADC_BUSY_IN_IMP_SHIFT},
    2519. 

  2519. 	{PMIC_AUXADC_ADC_BUSY_IN_FGADC1, PMIC_AUXADC_ADC_BUSY_IN_FGADC1_ADDR, PMIC_AUXADC_ADC_BUSY_IN_FGADC1_MASK, PMIC_AUXADC_ADC_BUSY_IN_FGADC1_SHIFT},
    2520. 

  2520. 	{PMIC_AUXADC_ADC_BUSY_IN_FGADC2, PMIC_AUXADC_ADC_BUSY_IN_FGADC2_ADDR, PMIC_AUXADC_ADC_BUSY_IN_FGADC2_MASK, PMIC_AUXADC_ADC_BUSY_IN_FGADC2_SHIFT},
    2521. 

  2521. 	{PMIC_AUXADC_ADC_BUSY_IN_GPS_AP, PMIC_AUXADC_ADC_BUSY_IN_GPS_AP_ADDR, PMIC_AUXADC_ADC_BUSY_IN_GPS_AP_MASK, PMIC_AUXADC_ADC_BUSY_IN_GPS_AP_SHIFT},
    2522. 

  2522. 	{PMIC_AUXADC_ADC_BUSY_IN_GPS_MD, PMIC_AUXADC_ADC_BUSY_IN_GPS_MD_ADDR, PMIC_AUXADC_ADC_BUSY_IN_GPS_MD_MASK, PMIC_AUXADC_ADC_BUSY_IN_GPS_MD_SHIFT},
    2523. 

  2523. 	{PMIC_AUXADC_ADC_BUSY_IN_GPS, PMIC_AUXADC_ADC_BUSY_IN_GPS_ADDR, PMIC_AUXADC_ADC_BUSY_IN_GPS_MASK, PMIC_AUXADC_ADC_BUSY_IN_GPS_SHIFT},
    2524. 

  2524. 	{PMIC_AUXADC_ADC_BUSY_IN_THR_HW, PMIC_AUXADC_ADC_BUSY_IN_THR_HW_ADDR, PMIC_AUXADC_ADC_BUSY_IN_THR_HW_MASK, PMIC_AUXADC_ADC_BUSY_IN_THR_HW_SHIFT},
    2525. 

  2525. 	{PMIC_AUXADC_ADC_BUSY_IN_THR_MD, PMIC_AUXADC_ADC_BUSY_IN_THR_MD_ADDR, PMIC_AUXADC_ADC_BUSY_IN_THR_MD_MASK, PMIC_AUXADC_ADC_BUSY_IN_THR_MD_SHIFT},
    2526. 

  2526. 	{PMIC_AUXADC_ADC_BUSY_IN_TYPEC_H, PMIC_AUXADC_ADC_BUSY_IN_TYPEC_H_ADDR, PMIC_AUXADC_ADC_BUSY_IN_TYPEC_H_MASK, PMIC_AUXADC_ADC_BUSY_IN_TYPEC_H_SHIFT},
    2527. 

  2527. 	{PMIC_AUXADC_ADC_BUSY_IN_TYPEC_L, PMIC_AUXADC_ADC_BUSY_IN_TYPEC_L_ADDR, PMIC_AUXADC_ADC_BUSY_IN_TYPEC_L_MASK, PMIC_AUXADC_ADC_BUSY_IN_TYPEC_L_SHIFT},
    2528. 

  2528. 	{PMIC_AUXADC_ADC_BUSY_IN_NAG, PMIC_AUXADC_ADC_BUSY_IN_NAG_ADDR, PMIC_AUXADC_ADC_BUSY_IN_NAG_MASK, PMIC_AUXADC_ADC_BUSY_IN_NAG_SHIFT},
    2529. 

  2529. 	{PMIC_AUXADC_RQST_CH0, PMIC_AUXADC_RQST_CH0_ADDR, PMIC_AUXADC_RQST_CH0_MASK, PMIC_AUXADC_RQST_CH0_SHIFT},
    2530. 

  2530. 	{PMIC_AUXADC_RQST_CH1, PMIC_AUXADC_RQST_CH1_ADDR, PMIC_AUXADC_RQST_CH1_MASK, PMIC_AUXADC_RQST_CH1_SHIFT},
    2531. 

  2531. 	{PMIC_AUXADC_RQST_CH2, PMIC_AUXADC_RQST_CH2_ADDR, PMIC_AUXADC_RQST_CH2_MASK, PMIC_AUXADC_RQST_CH2_SHIFT},
    2532. 

  2532. 	{PMIC_AUXADC_RQST_CH3, PMIC_AUXADC_RQST_CH3_ADDR, PMIC_AUXADC_RQST_CH3_MASK, PMIC_AUXADC_RQST_CH3_SHIFT},
    2533. 

  2533. 	{PMIC_AUXADC_RQST_CH4, PMIC_AUXADC_RQST_CH4_ADDR, PMIC_AUXADC_RQST_CH4_MASK, PMIC_AUXADC_RQST_CH4_SHIFT},
    2534. 

  2534. 	{PMIC_AUXADC_RQST_CH5, PMIC_AUXADC_RQST_CH5_ADDR, PMIC_AUXADC_RQST_CH5_MASK, PMIC_AUXADC_RQST_CH5_SHIFT},
    2535. 

  2535. 	{PMIC_AUXADC_RQST_CH6, PMIC_AUXADC_RQST_CH6_ADDR, PMIC_AUXADC_RQST_CH6_MASK, PMIC_AUXADC_RQST_CH6_SHIFT},
    2536. 

  2536. 	{PMIC_AUXADC_RQST_CH7, PMIC_AUXADC_RQST_CH7_ADDR, PMIC_AUXADC_RQST_CH7_MASK, PMIC_AUXADC_RQST_CH7_SHIFT},
    2537. 

  2537. 	{PMIC_AUXADC_RQST_CH8, PMIC_AUXADC_RQST_CH8_ADDR, PMIC_AUXADC_RQST_CH8_MASK, PMIC_AUXADC_RQST_CH8_SHIFT},
    2538. 

  2538. 	{PMIC_AUXADC_RQST_CH9, PMIC_AUXADC_RQST_CH9_ADDR, PMIC_AUXADC_RQST_CH9_MASK, PMIC_AUXADC_RQST_CH9_SHIFT},
    2539. 

  2539. 	{PMIC_AUXADC_RQST_CH10, PMIC_AUXADC_RQST_CH10_ADDR, PMIC_AUXADC_RQST_CH10_MASK, PMIC_AUXADC_RQST_CH10_SHIFT},
    2540. 

  2540. 	{PMIC_AUXADC_RQST_CH11, PMIC_AUXADC_RQST_CH11_ADDR, PMIC_AUXADC_RQST_CH11_MASK, PMIC_AUXADC_RQST_CH11_SHIFT},
    2541. 

  2541. 	{PMIC_AUXADC_RQST_CH12, PMIC_AUXADC_RQST_CH12_ADDR, PMIC_AUXADC_RQST_CH12_MASK, PMIC_AUXADC_RQST_CH12_SHIFT},
    2542. 

  2542. 	{PMIC_AUXADC_RQST_CH13, PMIC_AUXADC_RQST_CH13_ADDR, PMIC_AUXADC_RQST_CH13_MASK, PMIC_AUXADC_RQST_CH13_SHIFT},
    2543. 

  2543. 	{PMIC_AUXADC_RQST_CH14, PMIC_AUXADC_RQST_CH14_ADDR, PMIC_AUXADC_RQST_CH14_MASK, PMIC_AUXADC_RQST_CH14_SHIFT},
    2544. 

  2544. 	{PMIC_AUXADC_RQST_CH15, PMIC_AUXADC_RQST_CH15_ADDR, PMIC_AUXADC_RQST_CH15_MASK, PMIC_AUXADC_RQST_CH15_SHIFT},
    2545. 

  2545. 	{PMIC_AUXADC_RQST0_SET, PMIC_AUXADC_RQST0_SET_ADDR, PMIC_AUXADC_RQST0_SET_MASK, PMIC_AUXADC_RQST0_SET_SHIFT},
    2546. 

  2546. 	{PMIC_AUXADC_RQST0_CLR, PMIC_AUXADC_RQST0_CLR_ADDR, PMIC_AUXADC_RQST0_CLR_MASK, PMIC_AUXADC_RQST0_CLR_SHIFT},
    2547. 

  2547. 	{PMIC_AUXADC_RQST_CH0_BY_MD, PMIC_AUXADC_RQST_CH0_BY_MD_ADDR, PMIC_AUXADC_RQST_CH0_BY_MD_MASK, PMIC_AUXADC_RQST_CH0_BY_MD_SHIFT},
    2548. 

  2548. 	{PMIC_AUXADC_RQST_CH1_BY_MD, PMIC_AUXADC_RQST_CH1_BY_MD_ADDR, PMIC_AUXADC_RQST_CH1_BY_MD_MASK, PMIC_AUXADC_RQST_CH1_BY_MD_SHIFT},
    2549. 

  2549. 	{PMIC_AUXADC_RQST_RSV0, PMIC_AUXADC_RQST_RSV0_ADDR, PMIC_AUXADC_RQST_RSV0_MASK, PMIC_AUXADC_RQST_RSV0_SHIFT},
    2550. 

  2550. 	{PMIC_AUXADC_RQST_CH4_BY_MD, PMIC_AUXADC_RQST_CH4_BY_MD_ADDR, PMIC_AUXADC_RQST_CH4_BY_MD_MASK, PMIC_AUXADC_RQST_CH4_BY_MD_SHIFT},
    2551. 

  2551. 	{PMIC_AUXADC_RQST_CH7_BY_MD, PMIC_AUXADC_RQST_CH7_BY_MD_ADDR, PMIC_AUXADC_RQST_CH7_BY_MD_MASK, PMIC_AUXADC_RQST_CH7_BY_MD_SHIFT},
    2552. 

  2552. 	{PMIC_AUXADC_RQST_CH7_BY_GPS, PMIC_AUXADC_RQST_CH7_BY_GPS_ADDR, PMIC_AUXADC_RQST_CH7_BY_GPS_MASK, PMIC_AUXADC_RQST_CH7_BY_GPS_SHIFT},
    2553. 

  2553. 	{PMIC_AUXADC_RQST_DCXO_BY_MD, PMIC_AUXADC_RQST_DCXO_BY_MD_ADDR, PMIC_AUXADC_RQST_DCXO_BY_MD_MASK, PMIC_AUXADC_RQST_DCXO_BY_MD_SHIFT},
    2554. 

  2554. 	{PMIC_AUXADC_RQST_DCXO_BY_GPS, PMIC_AUXADC_RQST_DCXO_BY_GPS_ADDR, PMIC_AUXADC_RQST_DCXO_BY_GPS_MASK, PMIC_AUXADC_RQST_DCXO_BY_GPS_SHIFT},
    2555. 

  2555. 	{PMIC_AUXADC_RQST_RSV1, PMIC_AUXADC_RQST_RSV1_ADDR, PMIC_AUXADC_RQST_RSV1_MASK, PMIC_AUXADC_RQST_RSV1_SHIFT},
    2556. 

  2556. 	{PMIC_AUXADC_RQST1_SET, PMIC_AUXADC_RQST1_SET_ADDR, PMIC_AUXADC_RQST1_SET_MASK, PMIC_AUXADC_RQST1_SET_SHIFT},
    2557. 

  2557. 	{PMIC_AUXADC_RQST1_CLR, PMIC_AUXADC_RQST1_CLR_ADDR, PMIC_AUXADC_RQST1_CLR_MASK, PMIC_AUXADC_RQST1_CLR_SHIFT},
    2558. 

  2558. 	{PMIC_AUXADC_CK_ON_EXTD, PMIC_AUXADC_CK_ON_EXTD_ADDR, PMIC_AUXADC_CK_ON_EXTD_MASK, PMIC_AUXADC_CK_ON_EXTD_SHIFT},
    2559. 

  2559. 	{PMIC_AUXADC_SRCLKEN_SRC_SEL, PMIC_AUXADC_SRCLKEN_SRC_SEL_ADDR, PMIC_AUXADC_SRCLKEN_SRC_SEL_MASK, PMIC_AUXADC_SRCLKEN_SRC_SEL_SHIFT},
    2560. 

  2560. 	{PMIC_AUXADC_ADC_PWDB, PMIC_AUXADC_ADC_PWDB_ADDR, PMIC_AUXADC_ADC_PWDB_MASK, PMIC_AUXADC_ADC_PWDB_SHIFT},
    2561. 

  2561. 	{PMIC_AUXADC_ADC_PWDB_SWCTRL, PMIC_AUXADC_ADC_PWDB_SWCTRL_ADDR, PMIC_AUXADC_ADC_PWDB_SWCTRL_MASK, PMIC_AUXADC_ADC_PWDB_SWCTRL_SHIFT},
    2562. 

  2562. 	{PMIC_AUXADC_STRUP_CK_ON_ENB, PMIC_AUXADC_STRUP_CK_ON_ENB_ADDR, PMIC_AUXADC_STRUP_CK_ON_ENB_MASK, PMIC_AUXADC_STRUP_CK_ON_ENB_SHIFT},
    2563. 

  2563. 	{PMIC_AUXADC_ADC_RDY_WAKEUP_CLR, PMIC_AUXADC_ADC_RDY_WAKEUP_CLR_ADDR, PMIC_AUXADC_ADC_RDY_WAKEUP_CLR_MASK, PMIC_AUXADC_ADC_RDY_WAKEUP_CLR_SHIFT},
    2564. 

  2564. 	{PMIC_AUXADC_SRCLKEN_CK_EN, PMIC_AUXADC_SRCLKEN_CK_EN_ADDR, PMIC_AUXADC_SRCLKEN_CK_EN_MASK, PMIC_AUXADC_SRCLKEN_CK_EN_SHIFT},
    2565. 

  2565. 	{PMIC_AUXADC_CK_AON_GPS, PMIC_AUXADC_CK_AON_GPS_ADDR, PMIC_AUXADC_CK_AON_GPS_MASK, PMIC_AUXADC_CK_AON_GPS_SHIFT},
    2566. 

  2566. 	{PMIC_AUXADC_CK_AON_MD, PMIC_AUXADC_CK_AON_MD_ADDR, PMIC_AUXADC_CK_AON_MD_MASK, PMIC_AUXADC_CK_AON_MD_SHIFT},
    2567. 

  2567. 	{PMIC_AUXADC_CK_AON, PMIC_AUXADC_CK_AON_ADDR, PMIC_AUXADC_CK_AON_MASK, PMIC_AUXADC_CK_AON_SHIFT},
    2568. 

  2568. 	{PMIC_AUXADC_CON0_SET, PMIC_AUXADC_CON0_SET_ADDR, PMIC_AUXADC_CON0_SET_MASK, PMIC_AUXADC_CON0_SET_SHIFT},
    2569. 

  2569. 	{PMIC_AUXADC_CON0_CLR, PMIC_AUXADC_CON0_CLR_ADDR, PMIC_AUXADC_CON0_CLR_MASK, PMIC_AUXADC_CON0_CLR_SHIFT},
    2570. 

  2570. 	{PMIC_AUXADC_AVG_NUM_SMALL, PMIC_AUXADC_AVG_NUM_SMALL_ADDR, PMIC_AUXADC_AVG_NUM_SMALL_MASK, PMIC_AUXADC_AVG_NUM_SMALL_SHIFT},
    2571. 

  2571. 	{PMIC_AUXADC_AVG_NUM_LARGE, PMIC_AUXADC_AVG_NUM_LARGE_ADDR, PMIC_AUXADC_AVG_NUM_LARGE_MASK, PMIC_AUXADC_AVG_NUM_LARGE_SHIFT},
    2572. 

  2572. 	{PMIC_AUXADC_SPL_NUM, PMIC_AUXADC_SPL_NUM_ADDR, PMIC_AUXADC_SPL_NUM_MASK, PMIC_AUXADC_SPL_NUM_SHIFT},
    2573. 

  2573. 	{PMIC_AUXADC_AVG_NUM_SEL, PMIC_AUXADC_AVG_NUM_SEL_ADDR, PMIC_AUXADC_AVG_NUM_SEL_MASK, PMIC_AUXADC_AVG_NUM_SEL_SHIFT},
    2574. 

  2574. 	{PMIC_AUXADC_AVG_NUM_SEL_SHARE, PMIC_AUXADC_AVG_NUM_SEL_SHARE_ADDR, PMIC_AUXADC_AVG_NUM_SEL_SHARE_MASK, PMIC_AUXADC_AVG_NUM_SEL_SHARE_SHIFT},
    2575. 

  2575. 	{PMIC_AUXADC_AVG_NUM_SEL_LBAT, PMIC_AUXADC_AVG_NUM_SEL_LBAT_ADDR, PMIC_AUXADC_AVG_NUM_SEL_LBAT_MASK, PMIC_AUXADC_AVG_NUM_SEL_LBAT_SHIFT},
    2576. 

  2576. 	{PMIC_AUXADC_AVG_NUM_SEL_VISMPS, PMIC_AUXADC_AVG_NUM_SEL_VISMPS_ADDR, PMIC_AUXADC_AVG_NUM_SEL_VISMPS_MASK, PMIC_AUXADC_AVG_NUM_SEL_VISMPS_SHIFT},
    2577. 

  2577. 	{PMIC_AUXADC_AVG_NUM_SEL_WAKEUP, PMIC_AUXADC_AVG_NUM_SEL_WAKEUP_ADDR, PMIC_AUXADC_AVG_NUM_SEL_WAKEUP_MASK, PMIC_AUXADC_AVG_NUM_SEL_WAKEUP_SHIFT},
    2578. 

  2578. 	{PMIC_AUXADC_SPL_NUM_LARGE, PMIC_AUXADC_SPL_NUM_LARGE_ADDR, PMIC_AUXADC_SPL_NUM_LARGE_MASK, PMIC_AUXADC_SPL_NUM_LARGE_SHIFT},
    2579. 

  2579. 	{PMIC_AUXADC_SPL_NUM_SLEEP, PMIC_AUXADC_SPL_NUM_SLEEP_ADDR, PMIC_AUXADC_SPL_NUM_SLEEP_MASK, PMIC_AUXADC_SPL_NUM_SLEEP_SHIFT},
    2580. 

  2580. 	{PMIC_AUXADC_SPL_NUM_SLEEP_SEL, PMIC_AUXADC_SPL_NUM_SLEEP_SEL_ADDR, PMIC_AUXADC_SPL_NUM_SLEEP_SEL_MASK, PMIC_AUXADC_SPL_NUM_SLEEP_SEL_SHIFT},
    2581. 

  2581. 	{PMIC_AUXADC_SPL_NUM_SEL, PMIC_AUXADC_SPL_NUM_SEL_ADDR, PMIC_AUXADC_SPL_NUM_SEL_MASK, PMIC_AUXADC_SPL_NUM_SEL_SHIFT},
    2582. 

  2582. 	{PMIC_AUXADC_SPL_NUM_SEL_SHARE, PMIC_AUXADC_SPL_NUM_SEL_SHARE_ADDR, PMIC_AUXADC_SPL_NUM_SEL_SHARE_MASK, PMIC_AUXADC_SPL_NUM_SEL_SHARE_SHIFT},
    2583. 

  2583. 	{PMIC_AUXADC_SPL_NUM_SEL_LBAT, PMIC_AUXADC_SPL_NUM_SEL_LBAT_ADDR, PMIC_AUXADC_SPL_NUM_SEL_LBAT_MASK, PMIC_AUXADC_SPL_NUM_SEL_LBAT_SHIFT},
    2584. 

  2584. 	{PMIC_AUXADC_SPL_NUM_SEL_VISMPS, PMIC_AUXADC_SPL_NUM_SEL_VISMPS_ADDR, PMIC_AUXADC_SPL_NUM_SEL_VISMPS_MASK, PMIC_AUXADC_SPL_NUM_SEL_VISMPS_SHIFT},
    2585. 

  2585. 	{PMIC_AUXADC_SPL_NUM_SEL_WAKEUP, PMIC_AUXADC_SPL_NUM_SEL_WAKEUP_ADDR, PMIC_AUXADC_SPL_NUM_SEL_WAKEUP_MASK, PMIC_AUXADC_SPL_NUM_SEL_WAKEUP_SHIFT},
    2586. 

  2586. 	{PMIC_AUXADC_TRIM_CH0_SEL, PMIC_AUXADC_TRIM_CH0_SEL_ADDR, PMIC_AUXADC_TRIM_CH0_SEL_MASK, PMIC_AUXADC_TRIM_CH0_SEL_SHIFT},
    2587. 

  2587. 	{PMIC_AUXADC_TRIM_CH1_SEL, PMIC_AUXADC_TRIM_CH1_SEL_ADDR, PMIC_AUXADC_TRIM_CH1_SEL_MASK, PMIC_AUXADC_TRIM_CH1_SEL_SHIFT},
    2588. 

  2588. 	{PMIC_AUXADC_TRIM_CH2_SEL, PMIC_AUXADC_TRIM_CH2_SEL_ADDR, PMIC_AUXADC_TRIM_CH2_SEL_MASK, PMIC_AUXADC_TRIM_CH2_SEL_SHIFT},
    2589. 

  2589. 	{PMIC_AUXADC_TRIM_CH3_SEL, PMIC_AUXADC_TRIM_CH3_SEL_ADDR, PMIC_AUXADC_TRIM_CH3_SEL_MASK, PMIC_AUXADC_TRIM_CH3_SEL_SHIFT},
    2590. 

  2590. 	{PMIC_AUXADC_TRIM_CH4_SEL, PMIC_AUXADC_TRIM_CH4_SEL_ADDR, PMIC_AUXADC_TRIM_CH4_SEL_MASK, PMIC_AUXADC_TRIM_CH4_SEL_SHIFT},
    2591. 

  2591. 	{PMIC_AUXADC_TRIM_CH5_SEL, PMIC_AUXADC_TRIM_CH5_SEL_ADDR, PMIC_AUXADC_TRIM_CH5_SEL_MASK, PMIC_AUXADC_TRIM_CH5_SEL_SHIFT},
    2592. 

  2592. 	{PMIC_AUXADC_TRIM_CH6_SEL, PMIC_AUXADC_TRIM_CH6_SEL_ADDR, PMIC_AUXADC_TRIM_CH6_SEL_MASK, PMIC_AUXADC_TRIM_CH6_SEL_SHIFT},
    2593. 

  2593. 	{PMIC_AUXADC_TRIM_CH7_SEL, PMIC_AUXADC_TRIM_CH7_SEL_ADDR, PMIC_AUXADC_TRIM_CH7_SEL_MASK, PMIC_AUXADC_TRIM_CH7_SEL_SHIFT},
    2594. 

  2594. 	{PMIC_AUXADC_TRIM_CH8_SEL, PMIC_AUXADC_TRIM_CH8_SEL_ADDR, PMIC_AUXADC_TRIM_CH8_SEL_MASK, PMIC_AUXADC_TRIM_CH8_SEL_SHIFT},
    2595. 

  2595. 	{PMIC_AUXADC_TRIM_CH9_SEL, PMIC_AUXADC_TRIM_CH9_SEL_ADDR, PMIC_AUXADC_TRIM_CH9_SEL_MASK, PMIC_AUXADC_TRIM_CH9_SEL_SHIFT},
    2596. 

  2596. 	{PMIC_AUXADC_TRIM_CH10_SEL, PMIC_AUXADC_TRIM_CH10_SEL_ADDR, PMIC_AUXADC_TRIM_CH10_SEL_MASK, PMIC_AUXADC_TRIM_CH10_SEL_SHIFT},
    2597. 

  2597. 	{PMIC_AUXADC_TRIM_CH11_SEL, PMIC_AUXADC_TRIM_CH11_SEL_ADDR, PMIC_AUXADC_TRIM_CH11_SEL_MASK, PMIC_AUXADC_TRIM_CH11_SEL_SHIFT},
    2598. 

  2598. 	{PMIC_AUXADC_ADC_2S_COMP_ENB, PMIC_AUXADC_ADC_2S_COMP_ENB_ADDR, PMIC_AUXADC_ADC_2S_COMP_ENB_MASK, PMIC_AUXADC_ADC_2S_COMP_ENB_SHIFT},
    2599. 

  2599. 	{PMIC_AUXADC_ADC_TRIM_COMP, PMIC_AUXADC_ADC_TRIM_COMP_ADDR, PMIC_AUXADC_ADC_TRIM_COMP_MASK, PMIC_AUXADC_ADC_TRIM_COMP_SHIFT},
    2600. 

  2600. 	{PMIC_AUXADC_SW_GAIN_TRIM, PMIC_AUXADC_SW_GAIN_TRIM_ADDR, PMIC_AUXADC_SW_GAIN_TRIM_MASK, PMIC_AUXADC_SW_GAIN_TRIM_SHIFT},
    2601. 

  2601. 	{PMIC_AUXADC_SW_OFFSET_TRIM, PMIC_AUXADC_SW_OFFSET_TRIM_ADDR, PMIC_AUXADC_SW_OFFSET_TRIM_MASK, PMIC_AUXADC_SW_OFFSET_TRIM_SHIFT},
    2602. 

  2602. 	{PMIC_AUXADC_RNG_EN, PMIC_AUXADC_RNG_EN_ADDR, PMIC_AUXADC_RNG_EN_MASK, PMIC_AUXADC_RNG_EN_SHIFT},
    2603. 

  2603. 	{PMIC_AUXADC_DATA_REUSE_SEL, PMIC_AUXADC_DATA_REUSE_SEL_ADDR, PMIC_AUXADC_DATA_REUSE_SEL_MASK, PMIC_AUXADC_DATA_REUSE_SEL_SHIFT},
    2604. 

  2604. 	{PMIC_AUXADC_TEST_MODE, PMIC_AUXADC_TEST_MODE_ADDR, PMIC_AUXADC_TEST_MODE_MASK, PMIC_AUXADC_TEST_MODE_SHIFT},
    2605. 

  2605. 	{PMIC_AUXADC_BIT_SEL, PMIC_AUXADC_BIT_SEL_ADDR, PMIC_AUXADC_BIT_SEL_MASK, PMIC_AUXADC_BIT_SEL_SHIFT},
    2606. 

  2606. 	{PMIC_AUXADC_START_SW, PMIC_AUXADC_START_SW_ADDR, PMIC_AUXADC_START_SW_MASK, PMIC_AUXADC_START_SW_SHIFT},
    2607. 

  2607. 	{PMIC_AUXADC_START_SWCTRL, PMIC_AUXADC_START_SWCTRL_ADDR, PMIC_AUXADC_START_SWCTRL_MASK, PMIC_AUXADC_START_SWCTRL_SHIFT},
    2608. 

  2608. 	{PMIC_AUXADC_TS_VBE_SEL, PMIC_AUXADC_TS_VBE_SEL_ADDR, PMIC_AUXADC_TS_VBE_SEL_MASK, PMIC_AUXADC_TS_VBE_SEL_SHIFT},
    2609. 

  2609. 	{PMIC_AUXADC_TS_VBE_SEL_SWCTRL, PMIC_AUXADC_TS_VBE_SEL_SWCTRL_ADDR, PMIC_AUXADC_TS_VBE_SEL_SWCTRL_MASK, PMIC_AUXADC_TS_VBE_SEL_SWCTRL_SHIFT},
    2610. 

  2610. 	{PMIC_AUXADC_VBUF_EN, PMIC_AUXADC_VBUF_EN_ADDR, PMIC_AUXADC_VBUF_EN_MASK, PMIC_AUXADC_VBUF_EN_SHIFT},
    2611. 

  2611. 	{PMIC_AUXADC_VBUF_EN_SWCTRL, PMIC_AUXADC_VBUF_EN_SWCTRL_ADDR, PMIC_AUXADC_VBUF_EN_SWCTRL_MASK, PMIC_AUXADC_VBUF_EN_SWCTRL_SHIFT},
    2612. 

  2612. 	{PMIC_AUXADC_OUT_SEL, PMIC_AUXADC_OUT_SEL_ADDR, PMIC_AUXADC_OUT_SEL_MASK, PMIC_AUXADC_OUT_SEL_SHIFT},
    2613. 

  2613. 	{PMIC_AUXADC_DA_DAC, PMIC_AUXADC_DA_DAC_ADDR, PMIC_AUXADC_DA_DAC_MASK, PMIC_AUXADC_DA_DAC_SHIFT},
    2614. 

  2614. 	{PMIC_AUXADC_DA_DAC_SWCTRL, PMIC_AUXADC_DA_DAC_SWCTRL_ADDR, PMIC_AUXADC_DA_DAC_SWCTRL_MASK, PMIC_AUXADC_DA_DAC_SWCTRL_SHIFT},
    2615. 

  2615. 	{PMIC_AD_AUXADC_COMP, PMIC_AD_AUXADC_COMP_ADDR, PMIC_AD_AUXADC_COMP_MASK, PMIC_AD_AUXADC_COMP_SHIFT},
    2616. 

  2616. 	{PMIC_RG_VBUF_EXTEN, PMIC_RG_VBUF_EXTEN_ADDR, PMIC_RG_VBUF_EXTEN_MASK, PMIC_RG_VBUF_EXTEN_SHIFT},
    2617. 

  2617. 	{PMIC_RG_VBUF_CALEN, PMIC_RG_VBUF_CALEN_ADDR, PMIC_RG_VBUF_CALEN_MASK, PMIC_RG_VBUF_CALEN_SHIFT},
    2618. 

  2618. 	{PMIC_RG_VBUF_BYP, PMIC_RG_VBUF_BYP_ADDR, PMIC_RG_VBUF_BYP_MASK, PMIC_RG_VBUF_BYP_SHIFT},
    2619. 

  2619. 	{PMIC_RG_AUX_RSV, PMIC_RG_AUX_RSV_ADDR, PMIC_RG_AUX_RSV_MASK, PMIC_RG_AUX_RSV_SHIFT},
    2620. 

  2620. 	{PMIC_RG_AUXADC_CALI, PMIC_RG_AUXADC_CALI_ADDR, PMIC_RG_AUXADC_CALI_MASK, PMIC_RG_AUXADC_CALI_SHIFT},
    2621. 

  2621. 	{PMIC_RG_VBUF_EN, PMIC_RG_VBUF_EN_ADDR, PMIC_RG_VBUF_EN_MASK, PMIC_RG_VBUF_EN_SHIFT},
    2622. 

  2622. 	{PMIC_RG_VBE_SEL, PMIC_RG_VBE_SEL_ADDR, PMIC_RG_VBE_SEL_MASK, PMIC_RG_VBE_SEL_SHIFT},
    2623. 

  2623. 	{PMIC_AUXADC_ADCIN_VSEN_EN, PMIC_AUXADC_ADCIN_VSEN_EN_ADDR, PMIC_AUXADC_ADCIN_VSEN_EN_MASK, PMIC_AUXADC_ADCIN_VSEN_EN_SHIFT},
    2624. 

  2624. 	{PMIC_AUXADC_ADCIN_VBAT_EN, PMIC_AUXADC_ADCIN_VBAT_EN_ADDR, PMIC_AUXADC_ADCIN_VBAT_EN_MASK, PMIC_AUXADC_ADCIN_VBAT_EN_SHIFT},
    2625. 

  2625. 	{PMIC_AUXADC_ADCIN_VSEN_MUX_EN, PMIC_AUXADC_ADCIN_VSEN_MUX_EN_ADDR, PMIC_AUXADC_ADCIN_VSEN_MUX_EN_MASK, PMIC_AUXADC_ADCIN_VSEN_MUX_EN_SHIFT},
    2626. 

  2626. 	{PMIC_AUXADC_ADCIN_VSEN_EXT_BATON_EN, PMIC_AUXADC_ADCIN_VSEN_EXT_BATON_EN_ADDR, PMIC_AUXADC_ADCIN_VSEN_EXT_BATON_EN_MASK, PMIC_AUXADC_ADCIN_VSEN_EXT_BATON_EN_SHIFT},
    2627. 

  2627. 	{PMIC_AUXADC_ADCIN_CHR_EN, PMIC_AUXADC_ADCIN_CHR_EN_ADDR, PMIC_AUXADC_ADCIN_CHR_EN_MASK, PMIC_AUXADC_ADCIN_CHR_EN_SHIFT},
    2628. 

  2628. 	{PMIC_AUXADC_ADCIN_BATON_TDET_EN, PMIC_AUXADC_ADCIN_BATON_TDET_EN_ADDR, PMIC_AUXADC_ADCIN_BATON_TDET_EN_MASK, PMIC_AUXADC_ADCIN_BATON_TDET_EN_SHIFT},
    2629. 

  2629. 	{PMIC_AUXADC_ACCDET_ANASWCTRL_EN, PMIC_AUXADC_ACCDET_ANASWCTRL_EN_ADDR, PMIC_AUXADC_ACCDET_ANASWCTRL_EN_MASK, PMIC_AUXADC_ACCDET_ANASWCTRL_EN_SHIFT},
    2630. 

  2630. 	{PMIC_AUXADC_DIG0_RSV0, PMIC_AUXADC_DIG0_RSV0_ADDR, PMIC_AUXADC_DIG0_RSV0_MASK, PMIC_AUXADC_DIG0_RSV0_SHIFT},
    2631. 

  2631. 	{PMIC_AUXADC_CHSEL, PMIC_AUXADC_CHSEL_ADDR, PMIC_AUXADC_CHSEL_MASK, PMIC_AUXADC_CHSEL_SHIFT},
    2632. 

  2632. 	{PMIC_AUXADC_SWCTRL_EN, PMIC_AUXADC_SWCTRL_EN_ADDR, PMIC_AUXADC_SWCTRL_EN_MASK, PMIC_AUXADC_SWCTRL_EN_SHIFT},
    2633. 

  2633. 	{PMIC_AUXADC_SOURCE_LBAT_SEL, PMIC_AUXADC_SOURCE_LBAT_SEL_ADDR, PMIC_AUXADC_SOURCE_LBAT_SEL_MASK, PMIC_AUXADC_SOURCE_LBAT_SEL_SHIFT},
    2634. 

  2634. 	{PMIC_AUXADC_SOURCE_LBAT2_SEL, PMIC_AUXADC_SOURCE_LBAT2_SEL_ADDR, PMIC_AUXADC_SOURCE_LBAT2_SEL_MASK, PMIC_AUXADC_SOURCE_LBAT2_SEL_SHIFT},
    2635. 

  2635. 	{PMIC_AUXADC_DIG0_RSV2, PMIC_AUXADC_DIG0_RSV2_ADDR, PMIC_AUXADC_DIG0_RSV2_MASK, PMIC_AUXADC_DIG0_RSV2_SHIFT},
    2636. 

  2636. 	{PMIC_AUXADC_DIG1_RSV2, PMIC_AUXADC_DIG1_RSV2_ADDR, PMIC_AUXADC_DIG1_RSV2_MASK, PMIC_AUXADC_DIG1_RSV2_SHIFT},
    2637. 

  2637. 	{PMIC_AUXADC_DAC_EXTD, PMIC_AUXADC_DAC_EXTD_ADDR, PMIC_AUXADC_DAC_EXTD_MASK, PMIC_AUXADC_DAC_EXTD_SHIFT},
    2638. 

  2638. 	{PMIC_AUXADC_DAC_EXTD_EN, PMIC_AUXADC_DAC_EXTD_EN_ADDR, PMIC_AUXADC_DAC_EXTD_EN_MASK, PMIC_AUXADC_DAC_EXTD_EN_SHIFT},
    2639. 

  2639. 	{PMIC_AUXADC_PMU_THR_PDN_SW, PMIC_AUXADC_PMU_THR_PDN_SW_ADDR, PMIC_AUXADC_PMU_THR_PDN_SW_MASK, PMIC_AUXADC_PMU_THR_PDN_SW_SHIFT},
    2640. 

  2640. 	{PMIC_AUXADC_PMU_THR_PDN_SEL, PMIC_AUXADC_PMU_THR_PDN_SEL_ADDR, PMIC_AUXADC_PMU_THR_PDN_SEL_MASK, PMIC_AUXADC_PMU_THR_PDN_SEL_SHIFT},
    2641. 

  2641. 	{PMIC_AUXADC_PMU_THR_PDN_STATUS, PMIC_AUXADC_PMU_THR_PDN_STATUS_ADDR, PMIC_AUXADC_PMU_THR_PDN_STATUS_MASK, PMIC_AUXADC_PMU_THR_PDN_STATUS_SHIFT},
    2642. 

  2642. 	{PMIC_AUXADC_DIG0_RSV1, PMIC_AUXADC_DIG0_RSV1_ADDR, PMIC_AUXADC_DIG0_RSV1_MASK, PMIC_AUXADC_DIG0_RSV1_SHIFT},
    2643. 

  2643. 	{PMIC_AUXADC_START_SHADE_NUM, PMIC_AUXADC_START_SHADE_NUM_ADDR, PMIC_AUXADC_START_SHADE_NUM_MASK, PMIC_AUXADC_START_SHADE_NUM_SHIFT},
    2644. 

  2644. 	{PMIC_AUXADC_START_SHADE_EN, PMIC_AUXADC_START_SHADE_EN_ADDR, PMIC_AUXADC_START_SHADE_EN_MASK, PMIC_AUXADC_START_SHADE_EN_SHIFT},
    2645. 

  2645. 	{PMIC_AUXADC_START_SHADE_SEL, PMIC_AUXADC_START_SHADE_SEL_ADDR, PMIC_AUXADC_START_SHADE_SEL_MASK, PMIC_AUXADC_START_SHADE_SEL_SHIFT},
    2646. 

  2646. 	{PMIC_AUXADC_AUTORPT_PRD, PMIC_AUXADC_AUTORPT_PRD_ADDR, PMIC_AUXADC_AUTORPT_PRD_MASK, PMIC_AUXADC_AUTORPT_PRD_SHIFT},
    2647. 

  2647. 	{PMIC_AUXADC_AUTORPT_EN, PMIC_AUXADC_AUTORPT_EN_ADDR, PMIC_AUXADC_AUTORPT_EN_MASK, PMIC_AUXADC_AUTORPT_EN_SHIFT},
    2648. 

  2648. 	{PMIC_AUXADC_LBAT_DEBT_MAX, PMIC_AUXADC_LBAT_DEBT_MAX_ADDR, PMIC_AUXADC_LBAT_DEBT_MAX_MASK, PMIC_AUXADC_LBAT_DEBT_MAX_SHIFT},
    2649. 

  2649. 	{PMIC_AUXADC_LBAT_DEBT_MIN, PMIC_AUXADC_LBAT_DEBT_MIN_ADDR, PMIC_AUXADC_LBAT_DEBT_MIN_MASK, PMIC_AUXADC_LBAT_DEBT_MIN_SHIFT},
    2650. 

  2650. 	{PMIC_AUXADC_LBAT_DET_PRD_15_0, PMIC_AUXADC_LBAT_DET_PRD_15_0_ADDR, PMIC_AUXADC_LBAT_DET_PRD_15_0_MASK, PMIC_AUXADC_LBAT_DET_PRD_15_0_SHIFT},
    2651. 

  2651. 	{PMIC_AUXADC_LBAT_DET_PRD_19_16, PMIC_AUXADC_LBAT_DET_PRD_19_16_ADDR, PMIC_AUXADC_LBAT_DET_PRD_19_16_MASK, PMIC_AUXADC_LBAT_DET_PRD_19_16_SHIFT},
    2652. 

  2652. 	{PMIC_AUXADC_LBAT_VOLT_MAX, PMIC_AUXADC_LBAT_VOLT_MAX_ADDR, PMIC_AUXADC_LBAT_VOLT_MAX_MASK, PMIC_AUXADC_LBAT_VOLT_MAX_SHIFT},
    2653. 

  2653. 	{PMIC_AUXADC_LBAT_IRQ_EN_MAX, PMIC_AUXADC_LBAT_IRQ_EN_MAX_ADDR, PMIC_AUXADC_LBAT_IRQ_EN_MAX_MASK, PMIC_AUXADC_LBAT_IRQ_EN_MAX_SHIFT},
    2654. 

  2654. 	{PMIC_AUXADC_LBAT_EN_MAX, PMIC_AUXADC_LBAT_EN_MAX_ADDR, PMIC_AUXADC_LBAT_EN_MAX_MASK, PMIC_AUXADC_LBAT_EN_MAX_SHIFT},
    2655. 

  2655. 	{PMIC_AUXADC_LBAT_MAX_IRQ_B, PMIC_AUXADC_LBAT_MAX_IRQ_B_ADDR, PMIC_AUXADC_LBAT_MAX_IRQ_B_MASK, PMIC_AUXADC_LBAT_MAX_IRQ_B_SHIFT},
    2656. 

  2656. 	{PMIC_AUXADC_LBAT_VOLT_MIN, PMIC_AUXADC_LBAT_VOLT_MIN_ADDR, PMIC_AUXADC_LBAT_VOLT_MIN_MASK, PMIC_AUXADC_LBAT_VOLT_MIN_SHIFT},
    2657. 

  2657. 	{PMIC_AUXADC_LBAT_IRQ_EN_MIN, PMIC_AUXADC_LBAT_IRQ_EN_MIN_ADDR, PMIC_AUXADC_LBAT_IRQ_EN_MIN_MASK, PMIC_AUXADC_LBAT_IRQ_EN_MIN_SHIFT},
    2658. 

  2658. 	{PMIC_AUXADC_LBAT_EN_MIN, PMIC_AUXADC_LBAT_EN_MIN_ADDR, PMIC_AUXADC_LBAT_EN_MIN_MASK, PMIC_AUXADC_LBAT_EN_MIN_SHIFT},
    2659. 

  2659. 	{PMIC_AUXADC_LBAT_MIN_IRQ_B, PMIC_AUXADC_LBAT_MIN_IRQ_B_ADDR, PMIC_AUXADC_LBAT_MIN_IRQ_B_MASK, PMIC_AUXADC_LBAT_MIN_IRQ_B_SHIFT},
    2660. 

  2660. 	{PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX, PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX_ADDR, PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX_MASK, PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX_SHIFT},
    2661. 

  2661. 	{PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN, PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN_ADDR, PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN_MASK, PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN_SHIFT},
    2662. 

  2662. 	{PMIC_AUXADC_ACCDET_AUTO_SPL, PMIC_AUXADC_ACCDET_AUTO_SPL_ADDR, PMIC_AUXADC_ACCDET_AUTO_SPL_MASK, PMIC_AUXADC_ACCDET_AUTO_SPL_SHIFT},
    2663. 

  2663. 	{PMIC_AUXADC_ACCDET_AUTO_RQST_CLR, PMIC_AUXADC_ACCDET_AUTO_RQST_CLR_ADDR, PMIC_AUXADC_ACCDET_AUTO_RQST_CLR_MASK, PMIC_AUXADC_ACCDET_AUTO_RQST_CLR_SHIFT},
    2664. 

  2664. 	{PMIC_AUXADC_ACCDET_DIG1_RSV0, PMIC_AUXADC_ACCDET_DIG1_RSV0_ADDR, PMIC_AUXADC_ACCDET_DIG1_RSV0_MASK, PMIC_AUXADC_ACCDET_DIG1_RSV0_SHIFT},
    2665. 

  2665. 	{PMIC_AUXADC_ACCDET_DIG0_RSV0, PMIC_AUXADC_ACCDET_DIG0_RSV0_ADDR, PMIC_AUXADC_ACCDET_DIG0_RSV0_MASK, PMIC_AUXADC_ACCDET_DIG0_RSV0_SHIFT},
    2666. 

  2666. 	{PMIC_AUXADC_THR_DEBT_MAX, PMIC_AUXADC_THR_DEBT_MAX_ADDR, PMIC_AUXADC_THR_DEBT_MAX_MASK, PMIC_AUXADC_THR_DEBT_MAX_SHIFT},
    2667. 

  2667. 	{PMIC_AUXADC_THR_DEBT_MIN, PMIC_AUXADC_THR_DEBT_MIN_ADDR, PMIC_AUXADC_THR_DEBT_MIN_MASK, PMIC_AUXADC_THR_DEBT_MIN_SHIFT},
    2668. 

  2668. 	{PMIC_AUXADC_THR_DET_PRD_15_0, PMIC_AUXADC_THR_DET_PRD_15_0_ADDR, PMIC_AUXADC_THR_DET_PRD_15_0_MASK, PMIC_AUXADC_THR_DET_PRD_15_0_SHIFT},
    2669. 

  2669. 	{PMIC_AUXADC_THR_DET_PRD_19_16, PMIC_AUXADC_THR_DET_PRD_19_16_ADDR, PMIC_AUXADC_THR_DET_PRD_19_16_MASK, PMIC_AUXADC_THR_DET_PRD_19_16_SHIFT},
    2670. 

  2670. 	{PMIC_AUXADC_THR_VOLT_MAX, PMIC_AUXADC_THR_VOLT_MAX_ADDR, PMIC_AUXADC_THR_VOLT_MAX_MASK, PMIC_AUXADC_THR_VOLT_MAX_SHIFT},
    2671. 

  2671. 	{PMIC_AUXADC_THR_IRQ_EN_MAX, PMIC_AUXADC_THR_IRQ_EN_MAX_ADDR, PMIC_AUXADC_THR_IRQ_EN_MAX_MASK, PMIC_AUXADC_THR_IRQ_EN_MAX_SHIFT},
    2672. 

  2672. 	{PMIC_AUXADC_THR_EN_MAX, PMIC_AUXADC_THR_EN_MAX_ADDR, PMIC_AUXADC_THR_EN_MAX_MASK, PMIC_AUXADC_THR_EN_MAX_SHIFT},
    2673. 

  2673. 	{PMIC_AUXADC_THR_MAX_IRQ_B, PMIC_AUXADC_THR_MAX_IRQ_B_ADDR, PMIC_AUXADC_THR_MAX_IRQ_B_MASK, PMIC_AUXADC_THR_MAX_IRQ_B_SHIFT},
    2674. 

  2674. 	{PMIC_AUXADC_THR_VOLT_MIN, PMIC_AUXADC_THR_VOLT_MIN_ADDR, PMIC_AUXADC_THR_VOLT_MIN_MASK, PMIC_AUXADC_THR_VOLT_MIN_SHIFT},
    2675. 

  2675. 	{PMIC_AUXADC_THR_IRQ_EN_MIN, PMIC_AUXADC_THR_IRQ_EN_MIN_ADDR, PMIC_AUXADC_THR_IRQ_EN_MIN_MASK, PMIC_AUXADC_THR_IRQ_EN_MIN_SHIFT},
    2676. 

  2676. 	{PMIC_AUXADC_THR_EN_MIN, PMIC_AUXADC_THR_EN_MIN_ADDR, PMIC_AUXADC_THR_EN_MIN_MASK, PMIC_AUXADC_THR_EN_MIN_SHIFT},
    2677. 

  2677. 	{PMIC_AUXADC_THR_MIN_IRQ_B, PMIC_AUXADC_THR_MIN_IRQ_B_ADDR, PMIC_AUXADC_THR_MIN_IRQ_B_MASK, PMIC_AUXADC_THR_MIN_IRQ_B_SHIFT},
    2678. 

  2678. 	{PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX, PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX_ADDR, PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX_MASK, PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX_SHIFT},
    2679. 

  2679. 	{PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN, PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN_ADDR, PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN_MASK, PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN_SHIFT},
    2680. 

  2680. 	{PMIC_EFUSE_GAIN_CH4_TRIM, PMIC_EFUSE_GAIN_CH4_TRIM_ADDR, PMIC_EFUSE_GAIN_CH4_TRIM_MASK, PMIC_EFUSE_GAIN_CH4_TRIM_SHIFT},
    2681. 

  2681. 	{PMIC_EFUSE_OFFSET_CH4_TRIM, PMIC_EFUSE_OFFSET_CH4_TRIM_ADDR, PMIC_EFUSE_OFFSET_CH4_TRIM_MASK, PMIC_EFUSE_OFFSET_CH4_TRIM_SHIFT},
    2682. 

  2682. 	{PMIC_EFUSE_GAIN_CH0_TRIM, PMIC_EFUSE_GAIN_CH0_TRIM_ADDR, PMIC_EFUSE_GAIN_CH0_TRIM_MASK, PMIC_EFUSE_GAIN_CH0_TRIM_SHIFT},
    2683. 

  2683. 	{PMIC_EFUSE_OFFSET_CH0_TRIM, PMIC_EFUSE_OFFSET_CH0_TRIM_ADDR, PMIC_EFUSE_OFFSET_CH0_TRIM_MASK, PMIC_EFUSE_OFFSET_CH0_TRIM_SHIFT},
    2684. 

  2684. 	{PMIC_EFUSE_GAIN_CH7_TRIM, PMIC_EFUSE_GAIN_CH7_TRIM_ADDR, PMIC_EFUSE_GAIN_CH7_TRIM_MASK, PMIC_EFUSE_GAIN_CH7_TRIM_SHIFT},
    2685. 

  2685. 	{PMIC_EFUSE_OFFSET_CH7_TRIM, PMIC_EFUSE_OFFSET_CH7_TRIM_ADDR, PMIC_EFUSE_OFFSET_CH7_TRIM_MASK, PMIC_EFUSE_OFFSET_CH7_TRIM_SHIFT},
    2686. 

  2686. 	{PMIC_AUXADC_FGADC_START_SW, PMIC_AUXADC_FGADC_START_SW_ADDR, PMIC_AUXADC_FGADC_START_SW_MASK, PMIC_AUXADC_FGADC_START_SW_SHIFT},
    2687. 

  2687. 	{PMIC_AUXADC_FGADC_START_SEL, PMIC_AUXADC_FGADC_START_SEL_ADDR, PMIC_AUXADC_FGADC_START_SEL_MASK, PMIC_AUXADC_FGADC_START_SEL_SHIFT},
    2688. 

  2688. 	{PMIC_AUXADC_FGADC_R_SW, PMIC_AUXADC_FGADC_R_SW_ADDR, PMIC_AUXADC_FGADC_R_SW_MASK, PMIC_AUXADC_FGADC_R_SW_SHIFT},
    2689. 

  2689. 	{PMIC_AUXADC_FGADC_R_SEL, PMIC_AUXADC_FGADC_R_SEL_ADDR, PMIC_AUXADC_FGADC_R_SEL_MASK, PMIC_AUXADC_FGADC_R_SEL_SHIFT},
    2690. 

  2690. 	{PMIC_AUXADC_DBG_DIG0_RSV2, PMIC_AUXADC_DBG_DIG0_RSV2_ADDR, PMIC_AUXADC_DBG_DIG0_RSV2_MASK, PMIC_AUXADC_DBG_DIG0_RSV2_SHIFT},
    2691. 

  2691. 	{PMIC_AUXADC_DBG_DIG1_RSV2, PMIC_AUXADC_DBG_DIG1_RSV2_ADDR, PMIC_AUXADC_DBG_DIG1_RSV2_MASK, PMIC_AUXADC_DBG_DIG1_RSV2_SHIFT},
    2692. 

  2692. 	{PMIC_AUXADC_IMPEDANCE_CNT, PMIC_AUXADC_IMPEDANCE_CNT_ADDR, PMIC_AUXADC_IMPEDANCE_CNT_MASK, PMIC_AUXADC_IMPEDANCE_CNT_SHIFT},
    2693. 

  2693. 	{PMIC_AUXADC_IMPEDANCE_CHSEL, PMIC_AUXADC_IMPEDANCE_CHSEL_ADDR, PMIC_AUXADC_IMPEDANCE_CHSEL_MASK, PMIC_AUXADC_IMPEDANCE_CHSEL_SHIFT},
    2694. 

  2694. 	{PMIC_AUXADC_IMPEDANCE_IRQ_CLR, PMIC_AUXADC_IMPEDANCE_IRQ_CLR_ADDR, PMIC_AUXADC_IMPEDANCE_IRQ_CLR_MASK, PMIC_AUXADC_IMPEDANCE_IRQ_CLR_SHIFT},
    2695. 

  2695. 	{PMIC_AUXADC_IMPEDANCE_IRQ_STATUS, PMIC_AUXADC_IMPEDANCE_IRQ_STATUS_ADDR, PMIC_AUXADC_IMPEDANCE_IRQ_STATUS_MASK, PMIC_AUXADC_IMPEDANCE_IRQ_STATUS_SHIFT},
    2696. 

  2696. 	{PMIC_AUXADC_CLR_IMP_CNT_STOP, PMIC_AUXADC_CLR_IMP_CNT_STOP_ADDR, PMIC_AUXADC_CLR_IMP_CNT_STOP_MASK, PMIC_AUXADC_CLR_IMP_CNT_STOP_SHIFT},
    2697. 

  2697. 	{PMIC_AUXADC_IMPEDANCE_MODE, PMIC_AUXADC_IMPEDANCE_MODE_ADDR, PMIC_AUXADC_IMPEDANCE_MODE_MASK, PMIC_AUXADC_IMPEDANCE_MODE_SHIFT},
    2698. 

  2698. 	{PMIC_AUXADC_IMP_AUTORPT_PRD, PMIC_AUXADC_IMP_AUTORPT_PRD_ADDR, PMIC_AUXADC_IMP_AUTORPT_PRD_MASK, PMIC_AUXADC_IMP_AUTORPT_PRD_SHIFT},
    2699. 

  2699. 	{PMIC_AUXADC_IMP_AUTORPT_EN, PMIC_AUXADC_IMP_AUTORPT_EN_ADDR, PMIC_AUXADC_IMP_AUTORPT_EN_MASK, PMIC_AUXADC_IMP_AUTORPT_EN_SHIFT},
    2700. 

  2700. 	{PMIC_AUXADC_VISMPS0_DEBT_MAX, PMIC_AUXADC_VISMPS0_DEBT_MAX_ADDR, PMIC_AUXADC_VISMPS0_DEBT_MAX_MASK, PMIC_AUXADC_VISMPS0_DEBT_MAX_SHIFT},
    2701. 

  2701. 	{PMIC_AUXADC_VISMPS0_DEBT_MIN, PMIC_AUXADC_VISMPS0_DEBT_MIN_ADDR, PMIC_AUXADC_VISMPS0_DEBT_MIN_MASK, PMIC_AUXADC_VISMPS0_DEBT_MIN_SHIFT},
    2702. 

  2702. 	{PMIC_AUXADC_VISMPS0_DET_PRD_15_0, PMIC_AUXADC_VISMPS0_DET_PRD_15_0_ADDR, PMIC_AUXADC_VISMPS0_DET_PRD_15_0_MASK, PMIC_AUXADC_VISMPS0_DET_PRD_15_0_SHIFT},
    2703. 

  2703. 	{PMIC_AUXADC_VISMPS0_DET_PRD_19_16, PMIC_AUXADC_VISMPS0_DET_PRD_19_16_ADDR, PMIC_AUXADC_VISMPS0_DET_PRD_19_16_MASK, PMIC_AUXADC_VISMPS0_DET_PRD_19_16_SHIFT},
    2704. 

  2704. 	{PMIC_AUXADC_VISMPS0_VOLT_MAX, PMIC_AUXADC_VISMPS0_VOLT_MAX_ADDR, PMIC_AUXADC_VISMPS0_VOLT_MAX_MASK, PMIC_AUXADC_VISMPS0_VOLT_MAX_SHIFT},
    2705. 

  2705. 	{PMIC_AUXADC_VISMPS0_IRQ_EN_MAX, PMIC_AUXADC_VISMPS0_IRQ_EN_MAX_ADDR, PMIC_AUXADC_VISMPS0_IRQ_EN_MAX_MASK, PMIC_AUXADC_VISMPS0_IRQ_EN_MAX_SHIFT},
    2706. 

  2706. 	{PMIC_AUXADC_VISMPS0_EN_MAX, PMIC_AUXADC_VISMPS0_EN_MAX_ADDR, PMIC_AUXADC_VISMPS0_EN_MAX_MASK, PMIC_AUXADC_VISMPS0_EN_MAX_SHIFT},
    2707. 

  2707. 	{PMIC_AUXADC_VISMPS0_MAX_IRQ_B, PMIC_AUXADC_VISMPS0_MAX_IRQ_B_ADDR, PMIC_AUXADC_VISMPS0_MAX_IRQ_B_MASK, PMIC_AUXADC_VISMPS0_MAX_IRQ_B_SHIFT},
    2708. 

  2708. 	{PMIC_AUXADC_VISMPS0_VOLT_MIN, PMIC_AUXADC_VISMPS0_VOLT_MIN_ADDR, PMIC_AUXADC_VISMPS0_VOLT_MIN_MASK, PMIC_AUXADC_VISMPS0_VOLT_MIN_SHIFT},
    2709. 

  2709. 	{PMIC_AUXADC_VISMPS0_IRQ_EN_MIN, PMIC_AUXADC_VISMPS0_IRQ_EN_MIN_ADDR, PMIC_AUXADC_VISMPS0_IRQ_EN_MIN_MASK, PMIC_AUXADC_VISMPS0_IRQ_EN_MIN_SHIFT},
    2710. 

  2710. 	{PMIC_AUXADC_VISMPS0_EN_MIN, PMIC_AUXADC_VISMPS0_EN_MIN_ADDR, PMIC_AUXADC_VISMPS0_EN_MIN_MASK, PMIC_AUXADC_VISMPS0_EN_MIN_SHIFT},
    2711. 

  2711. 	{PMIC_AUXADC_VISMPS0_MIN_IRQ_B, PMIC_AUXADC_VISMPS0_MIN_IRQ_B_ADDR, PMIC_AUXADC_VISMPS0_MIN_IRQ_B_MASK, PMIC_AUXADC_VISMPS0_MIN_IRQ_B_SHIFT},
    2712. 

  2712. 	{PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MAX, PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MAX_ADDR, PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MAX_MASK, PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MAX_SHIFT},
    2713. 

  2713. 	{PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MIN, PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MIN_ADDR, PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MIN_MASK, PMIC_AUXADC_VISMPS0_DEBOUNCE_COUNT_MIN_SHIFT},
    2714. 

  2714. 	{PMIC_AUXADC_LBAT2_DEBT_MAX, PMIC_AUXADC_LBAT2_DEBT_MAX_ADDR, PMIC_AUXADC_LBAT2_DEBT_MAX_MASK, PMIC_AUXADC_LBAT2_DEBT_MAX_SHIFT},
    2715. 

  2715. 	{PMIC_AUXADC_LBAT2_DEBT_MIN, PMIC_AUXADC_LBAT2_DEBT_MIN_ADDR, PMIC_AUXADC_LBAT2_DEBT_MIN_MASK, PMIC_AUXADC_LBAT2_DEBT_MIN_SHIFT},
    2716. 

  2716. 	{PMIC_AUXADC_LBAT2_DET_PRD_15_0, PMIC_AUXADC_LBAT2_DET_PRD_15_0_ADDR, PMIC_AUXADC_LBAT2_DET_PRD_15_0_MASK, PMIC_AUXADC_LBAT2_DET_PRD_15_0_SHIFT},
    2717. 

  2717. 	{PMIC_AUXADC_LBAT2_DET_PRD_19_16, PMIC_AUXADC_LBAT2_DET_PRD_19_16_ADDR, PMIC_AUXADC_LBAT2_DET_PRD_19_16_MASK, PMIC_AUXADC_LBAT2_DET_PRD_19_16_SHIFT},
    2718. 

  2718. 	{PMIC_AUXADC_LBAT2_VOLT_MAX, PMIC_AUXADC_LBAT2_VOLT_MAX_ADDR, PMIC_AUXADC_LBAT2_VOLT_MAX_MASK, PMIC_AUXADC_LBAT2_VOLT_MAX_SHIFT},
    2719. 

  2719. 	{PMIC_AUXADC_LBAT2_IRQ_EN_MAX, PMIC_AUXADC_LBAT2_IRQ_EN_MAX_ADDR, PMIC_AUXADC_LBAT2_IRQ_EN_MAX_MASK, PMIC_AUXADC_LBAT2_IRQ_EN_MAX_SHIFT},
    2720. 

  2720. 	{PMIC_AUXADC_LBAT2_EN_MAX, PMIC_AUXADC_LBAT2_EN_MAX_ADDR, PMIC_AUXADC_LBAT2_EN_MAX_MASK, PMIC_AUXADC_LBAT2_EN_MAX_SHIFT},
    2721. 

  2721. 	{PMIC_AUXADC_LBAT2_MAX_IRQ_B, PMIC_AUXADC_LBAT2_MAX_IRQ_B_ADDR, PMIC_AUXADC_LBAT2_MAX_IRQ_B_MASK, PMIC_AUXADC_LBAT2_MAX_IRQ_B_SHIFT},
    2722. 

  2722. 	{PMIC_AUXADC_LBAT2_VOLT_MIN, PMIC_AUXADC_LBAT2_VOLT_MIN_ADDR, PMIC_AUXADC_LBAT2_VOLT_MIN_MASK, PMIC_AUXADC_LBAT2_VOLT_MIN_SHIFT},
    2723. 

  2723. 	{PMIC_AUXADC_LBAT2_IRQ_EN_MIN, PMIC_AUXADC_LBAT2_IRQ_EN_MIN_ADDR, PMIC_AUXADC_LBAT2_IRQ_EN_MIN_MASK, PMIC_AUXADC_LBAT2_IRQ_EN_MIN_SHIFT},
    2724. 

  2724. 	{PMIC_AUXADC_LBAT2_EN_MIN, PMIC_AUXADC_LBAT2_EN_MIN_ADDR, PMIC_AUXADC_LBAT2_EN_MIN_MASK, PMIC_AUXADC_LBAT2_EN_MIN_SHIFT},
    2725. 

  2725. 	{PMIC_AUXADC_LBAT2_MIN_IRQ_B, PMIC_AUXADC_LBAT2_MIN_IRQ_B_ADDR, PMIC_AUXADC_LBAT2_MIN_IRQ_B_MASK, PMIC_AUXADC_LBAT2_MIN_IRQ_B_SHIFT},
    2726. 

  2726. 	{PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MAX, PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MAX_ADDR, PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MAX_MASK, PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MAX_SHIFT},
    2727. 

  2727. 	{PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MIN, PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MIN_ADDR, PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MIN_MASK, PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MIN_SHIFT},
    2728. 

  2728. 	{PMIC_AUXADC_MDBG_DET_PRD, PMIC_AUXADC_MDBG_DET_PRD_ADDR, PMIC_AUXADC_MDBG_DET_PRD_MASK, PMIC_AUXADC_MDBG_DET_PRD_SHIFT},
    2729. 

  2729. 	{PMIC_AUXADC_MDBG_DET_EN, PMIC_AUXADC_MDBG_DET_EN_ADDR, PMIC_AUXADC_MDBG_DET_EN_MASK, PMIC_AUXADC_MDBG_DET_EN_SHIFT},
    2730. 

  2730. 	{PMIC_AUXADC_MDBG_R_PTR, PMIC_AUXADC_MDBG_R_PTR_ADDR, PMIC_AUXADC_MDBG_R_PTR_MASK, PMIC_AUXADC_MDBG_R_PTR_SHIFT},
    2731. 

  2731. 	{PMIC_AUXADC_MDBG_W_PTR, PMIC_AUXADC_MDBG_W_PTR_ADDR, PMIC_AUXADC_MDBG_W_PTR_MASK, PMIC_AUXADC_MDBG_W_PTR_SHIFT},
    2732. 

  2732. 	{PMIC_AUXADC_MDBG_BUF_LENGTH, PMIC_AUXADC_MDBG_BUF_LENGTH_ADDR, PMIC_AUXADC_MDBG_BUF_LENGTH_MASK, PMIC_AUXADC_MDBG_BUF_LENGTH_SHIFT},
    2733. 

  2733. 	{PMIC_AUXADC_MDRT_DET_PRD, PMIC_AUXADC_MDRT_DET_PRD_ADDR, PMIC_AUXADC_MDRT_DET_PRD_MASK, PMIC_AUXADC_MDRT_DET_PRD_SHIFT},
    2734. 

  2734. 	{PMIC_AUXADC_MDRT_DET_EN, PMIC_AUXADC_MDRT_DET_EN_ADDR, PMIC_AUXADC_MDRT_DET_EN_MASK, PMIC_AUXADC_MDRT_DET_EN_SHIFT},
    2735. 

  2735. 	{PMIC_AUXADC_MDRT_DET_WKUP_START_CNT, PMIC_AUXADC_MDRT_DET_WKUP_START_CNT_ADDR, PMIC_AUXADC_MDRT_DET_WKUP_START_CNT_MASK, PMIC_AUXADC_MDRT_DET_WKUP_START_CNT_SHIFT},
    2736. 

  2736. 	{PMIC_AUXADC_MDRT_DET_WKUP_START_CLR, PMIC_AUXADC_MDRT_DET_WKUP_START_CLR_ADDR, PMIC_AUXADC_MDRT_DET_WKUP_START_CLR_MASK, PMIC_AUXADC_MDRT_DET_WKUP_START_CLR_SHIFT},
    2737. 

  2737. 	{PMIC_AUXADC_MDRT_DET_WKUP_START, PMIC_AUXADC_MDRT_DET_WKUP_START_ADDR, PMIC_AUXADC_MDRT_DET_WKUP_START_MASK, PMIC_AUXADC_MDRT_DET_WKUP_START_SHIFT},
    2738. 

  2738. 	{PMIC_AUXADC_MDRT_DET_WKUP_START_SEL, PMIC_AUXADC_MDRT_DET_WKUP_START_SEL_ADDR, PMIC_AUXADC_MDRT_DET_WKUP_START_SEL_MASK, PMIC_AUXADC_MDRT_DET_WKUP_START_SEL_SHIFT},
    2739. 

  2739. 	{PMIC_AUXADC_MDRT_DET_WKUP_EN, PMIC_AUXADC_MDRT_DET_WKUP_EN_ADDR, PMIC_AUXADC_MDRT_DET_WKUP_EN_MASK, PMIC_AUXADC_MDRT_DET_WKUP_EN_SHIFT},
    2740. 

  2740. 	{PMIC_AUXADC_MDRT_DET_SRCLKEN_IND, PMIC_AUXADC_MDRT_DET_SRCLKEN_IND_ADDR, PMIC_AUXADC_MDRT_DET_SRCLKEN_IND_MASK, PMIC_AUXADC_MDRT_DET_SRCLKEN_IND_SHIFT},
    2741. 

  2741. 	{PMIC_AUXADC_DCXO_MDRT_DET_PRD, PMIC_AUXADC_DCXO_MDRT_DET_PRD_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_PRD_MASK, PMIC_AUXADC_DCXO_MDRT_DET_PRD_SHIFT},
    2742. 

  2742. 	{PMIC_AUXADC_DCXO_MDRT_DET_EN, PMIC_AUXADC_DCXO_MDRT_DET_EN_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_EN_MASK, PMIC_AUXADC_DCXO_MDRT_DET_EN_SHIFT},
    2743. 

  2743. 	{PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CNT, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CNT_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CNT_MASK, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CNT_SHIFT},
    2744. 

  2744. 	{PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CLR, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CLR_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CLR_MASK, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CLR_SHIFT},
    2745. 

  2745. 	{PMIC_AUXADC_DCXO_MDRT_DET_WKUP_EN, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_EN_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_EN_MASK, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_EN_SHIFT},
    2746. 

  2746. 	{PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SEL, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SEL_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SEL_MASK, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SEL_SHIFT},
    2747. 

  2747. 	{PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_MASK, PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SHIFT},
    2748. 

  2748. 	{PMIC_AUXADC_DCXO_MDRT_DET_SRCLKEN_IND, PMIC_AUXADC_DCXO_MDRT_DET_SRCLKEN_IND_ADDR, PMIC_AUXADC_DCXO_MDRT_DET_SRCLKEN_IND_MASK, PMIC_AUXADC_DCXO_MDRT_DET_SRCLKEN_IND_SHIFT},
    2749. 

  2749. 	{PMIC_AUXADC_DCXO_CH4_MUX_AP_SEL, PMIC_AUXADC_DCXO_CH4_MUX_AP_SEL_ADDR, PMIC_AUXADC_DCXO_CH4_MUX_AP_SEL_MASK, PMIC_AUXADC_DCXO_CH4_MUX_AP_SEL_SHIFT},
    2750. 

  2750. 	{PMIC_AUXADC_NAG_EN, PMIC_AUXADC_NAG_EN_ADDR, PMIC_AUXADC_NAG_EN_MASK, PMIC_AUXADC_NAG_EN_SHIFT},
    2751. 

  2751. 	{PMIC_AUXADC_NAG_CLR, PMIC_AUXADC_NAG_CLR_ADDR, PMIC_AUXADC_NAG_CLR_MASK, PMIC_AUXADC_NAG_CLR_SHIFT},
    2752. 

  2752. 	{PMIC_AUXADC_NAG_VBAT1_SEL, PMIC_AUXADC_NAG_VBAT1_SEL_ADDR, PMIC_AUXADC_NAG_VBAT1_SEL_MASK, PMIC_AUXADC_NAG_VBAT1_SEL_SHIFT},
    2753. 

  2753. 	{PMIC_AUXADC_NAG_PRD, PMIC_AUXADC_NAG_PRD_ADDR, PMIC_AUXADC_NAG_PRD_MASK, PMIC_AUXADC_NAG_PRD_SHIFT},
    2754. 

  2754. 	{PMIC_AUXADC_NAG_IRQ_EN, PMIC_AUXADC_NAG_IRQ_EN_ADDR, PMIC_AUXADC_NAG_IRQ_EN_MASK, PMIC_AUXADC_NAG_IRQ_EN_SHIFT},
    2755. 

  2755. 	{PMIC_AUXADC_NAG_C_DLTV_IRQ, PMIC_AUXADC_NAG_C_DLTV_IRQ_ADDR, PMIC_AUXADC_NAG_C_DLTV_IRQ_MASK, PMIC_AUXADC_NAG_C_DLTV_IRQ_SHIFT},
    2756. 

  2756. 	{PMIC_AUXADC_NAG_ZCV, PMIC_AUXADC_NAG_ZCV_ADDR, PMIC_AUXADC_NAG_ZCV_MASK, PMIC_AUXADC_NAG_ZCV_SHIFT},
    2757. 

  2757. 	{PMIC_AUXADC_NAG_C_DLTV_TH_15_0, PMIC_AUXADC_NAG_C_DLTV_TH_15_0_ADDR, PMIC_AUXADC_NAG_C_DLTV_TH_15_0_MASK, PMIC_AUXADC_NAG_C_DLTV_TH_15_0_SHIFT},
    2758. 

  2758. 	{PMIC_AUXADC_NAG_C_DLTV_TH_26_16, PMIC_AUXADC_NAG_C_DLTV_TH_26_16_ADDR, PMIC_AUXADC_NAG_C_DLTV_TH_26_16_MASK, PMIC_AUXADC_NAG_C_DLTV_TH_26_16_SHIFT},
    2759. 

  2759. 	{PMIC_AUXADC_NAG_CNT_15_0, PMIC_AUXADC_NAG_CNT_15_0_ADDR, PMIC_AUXADC_NAG_CNT_15_0_MASK, PMIC_AUXADC_NAG_CNT_15_0_SHIFT},
    2760. 

  2760. 	{PMIC_AUXADC_NAG_CNT_25_16, PMIC_AUXADC_NAG_CNT_25_16_ADDR, PMIC_AUXADC_NAG_CNT_25_16_MASK, PMIC_AUXADC_NAG_CNT_25_16_SHIFT},
    2761. 

  2761. 	{PMIC_AUXADC_NAG_DLTV, PMIC_AUXADC_NAG_DLTV_ADDR, PMIC_AUXADC_NAG_DLTV_MASK, PMIC_AUXADC_NAG_DLTV_SHIFT},
    2762. 

  2762. 	{PMIC_AUXADC_NAG_C_DLTV_15_0, PMIC_AUXADC_NAG_C_DLTV_15_0_ADDR, PMIC_AUXADC_NAG_C_DLTV_15_0_MASK, PMIC_AUXADC_NAG_C_DLTV_15_0_SHIFT},
    2763. 

  2763. 	{PMIC_AUXADC_NAG_C_DLTV_26_16, PMIC_AUXADC_NAG_C_DLTV_26_16_ADDR, PMIC_AUXADC_NAG_C_DLTV_26_16_MASK, PMIC_AUXADC_NAG_C_DLTV_26_16_SHIFT},
    2764. 

  2764. 	{PMIC_AUXADC_TYPEC_H_DEBT_MAX, PMIC_AUXADC_TYPEC_H_DEBT_MAX_ADDR, PMIC_AUXADC_TYPEC_H_DEBT_MAX_MASK, PMIC_AUXADC_TYPEC_H_DEBT_MAX_SHIFT},
    2765. 

  2765. 	{PMIC_AUXADC_TYPEC_H_DEBT_MIN, PMIC_AUXADC_TYPEC_H_DEBT_MIN_ADDR, PMIC_AUXADC_TYPEC_H_DEBT_MIN_MASK, PMIC_AUXADC_TYPEC_H_DEBT_MIN_SHIFT},
    2766. 

  2766. 	{PMIC_AUXADC_TYPEC_H_DET_PRD_15_0, PMIC_AUXADC_TYPEC_H_DET_PRD_15_0_ADDR, PMIC_AUXADC_TYPEC_H_DET_PRD_15_0_MASK, PMIC_AUXADC_TYPEC_H_DET_PRD_15_0_SHIFT},
    2767. 

  2767. 	{PMIC_AUXADC_TYPEC_H_DET_PRD_19_16, PMIC_AUXADC_TYPEC_H_DET_PRD_19_16_ADDR, PMIC_AUXADC_TYPEC_H_DET_PRD_19_16_MASK, PMIC_AUXADC_TYPEC_H_DET_PRD_19_16_SHIFT},
    2768. 

  2768. 	{PMIC_AUXADC_TYPEC_H_VOLT_MAX, PMIC_AUXADC_TYPEC_H_VOLT_MAX_ADDR, PMIC_AUXADC_TYPEC_H_VOLT_MAX_MASK, PMIC_AUXADC_TYPEC_H_VOLT_MAX_SHIFT},
    2769. 

  2769. 	{PMIC_AUXADC_TYPEC_H_IRQ_EN_MAX, PMIC_AUXADC_TYPEC_H_IRQ_EN_MAX_ADDR, PMIC_AUXADC_TYPEC_H_IRQ_EN_MAX_MASK, PMIC_AUXADC_TYPEC_H_IRQ_EN_MAX_SHIFT},
    2770. 

  2770. 	{PMIC_AUXADC_TYPEC_H_EN_MAX, PMIC_AUXADC_TYPEC_H_EN_MAX_ADDR, PMIC_AUXADC_TYPEC_H_EN_MAX_MASK, PMIC_AUXADC_TYPEC_H_EN_MAX_SHIFT},
    2771. 

  2771. 	{PMIC_AUXADC_TYPEC_H_MAX_IRQ_B, PMIC_AUXADC_TYPEC_H_MAX_IRQ_B_ADDR, PMIC_AUXADC_TYPEC_H_MAX_IRQ_B_MASK, PMIC_AUXADC_TYPEC_H_MAX_IRQ_B_SHIFT},
    2772. 

  2772. 	{PMIC_AUXADC_TYPEC_H_VOLT_MIN, PMIC_AUXADC_TYPEC_H_VOLT_MIN_ADDR, PMIC_AUXADC_TYPEC_H_VOLT_MIN_MASK, PMIC_AUXADC_TYPEC_H_VOLT_MIN_SHIFT},
    2773. 

  2773. 	{PMIC_AUXADC_TYPEC_H_IRQ_EN_MIN, PMIC_AUXADC_TYPEC_H_IRQ_EN_MIN_ADDR, PMIC_AUXADC_TYPEC_H_IRQ_EN_MIN_MASK, PMIC_AUXADC_TYPEC_H_IRQ_EN_MIN_SHIFT},
    2774. 

  2774. 	{PMIC_AUXADC_TYPEC_H_EN_MIN, PMIC_AUXADC_TYPEC_H_EN_MIN_ADDR, PMIC_AUXADC_TYPEC_H_EN_MIN_MASK, PMIC_AUXADC_TYPEC_H_EN_MIN_SHIFT},
    2775. 

  2775. 	{PMIC_AUXADC_TYPEC_H_MIN_IRQ_B, PMIC_AUXADC_TYPEC_H_MIN_IRQ_B_ADDR, PMIC_AUXADC_TYPEC_H_MIN_IRQ_B_MASK, PMIC_AUXADC_TYPEC_H_MIN_IRQ_B_SHIFT},
    2776. 

  2776. 	{PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MAX, PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MAX_ADDR, PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MAX_MASK, PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MAX_SHIFT},
    2777. 

  2777. 	{PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MIN, PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MIN_ADDR, PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MIN_MASK, PMIC_AUXADC_TYPEC_H_DEBOUNCE_COUNT_MIN_SHIFT},
    2778. 

  2778. 	{PMIC_AUXADC_TYPEC_L_DEBT_MAX, PMIC_AUXADC_TYPEC_L_DEBT_MAX_ADDR, PMIC_AUXADC_TYPEC_L_DEBT_MAX_MASK, PMIC_AUXADC_TYPEC_L_DEBT_MAX_SHIFT},
    2779. 

  2779. 	{PMIC_AUXADC_TYPEC_L_DEBT_MIN, PMIC_AUXADC_TYPEC_L_DEBT_MIN_ADDR, PMIC_AUXADC_TYPEC_L_DEBT_MIN_MASK, PMIC_AUXADC_TYPEC_L_DEBT_MIN_SHIFT},
    2780. 

  2780. 	{PMIC_AUXADC_TYPEC_L_DET_PRD_15_0, PMIC_AUXADC_TYPEC_L_DET_PRD_15_0_ADDR, PMIC_AUXADC_TYPEC_L_DET_PRD_15_0_MASK, PMIC_AUXADC_TYPEC_L_DET_PRD_15_0_SHIFT},
    2781. 

  2781. 	{PMIC_AUXADC_TYPEC_L_DET_PRD_19_16, PMIC_AUXADC_TYPEC_L_DET_PRD_19_16_ADDR, PMIC_AUXADC_TYPEC_L_DET_PRD_19_16_MASK, PMIC_AUXADC_TYPEC_L_DET_PRD_19_16_SHIFT},
    2782. 

  2782. 	{PMIC_AUXADC_TYPEC_L_VOLT_MAX, PMIC_AUXADC_TYPEC_L_VOLT_MAX_ADDR, PMIC_AUXADC_TYPEC_L_VOLT_MAX_MASK, PMIC_AUXADC_TYPEC_L_VOLT_MAX_SHIFT},
    2783. 

  2783. 	{PMIC_AUXADC_TYPEC_L_IRQ_EN_MAX, PMIC_AUXADC_TYPEC_L_IRQ_EN_MAX_ADDR, PMIC_AUXADC_TYPEC_L_IRQ_EN_MAX_MASK, PMIC_AUXADC_TYPEC_L_IRQ_EN_MAX_SHIFT},
    2784. 

  2784. 	{PMIC_AUXADC_TYPEC_L_EN_MAX, PMIC_AUXADC_TYPEC_L_EN_MAX_ADDR, PMIC_AUXADC_TYPEC_L_EN_MAX_MASK, PMIC_AUXADC_TYPEC_L_EN_MAX_SHIFT},
    2785. 

  2785. 	{PMIC_AUXADC_TYPEC_L_MAX_IRQ_B, PMIC_AUXADC_TYPEC_L_MAX_IRQ_B_ADDR, PMIC_AUXADC_TYPEC_L_MAX_IRQ_B_MASK, PMIC_AUXADC_TYPEC_L_MAX_IRQ_B_SHIFT},
    2786. 

  2786. 	{PMIC_AUXADC_TYPEC_L_VOLT_MIN, PMIC_AUXADC_TYPEC_L_VOLT_MIN_ADDR, PMIC_AUXADC_TYPEC_L_VOLT_MIN_MASK, PMIC_AUXADC_TYPEC_L_VOLT_MIN_SHIFT},
    2787. 

  2787. 	{PMIC_AUXADC_TYPEC_L_IRQ_EN_MIN, PMIC_AUXADC_TYPEC_L_IRQ_EN_MIN_ADDR, PMIC_AUXADC_TYPEC_L_IRQ_EN_MIN_MASK, PMIC_AUXADC_TYPEC_L_IRQ_EN_MIN_SHIFT},
    2788. 

  2788. 	{PMIC_AUXADC_TYPEC_L_EN_MIN, PMIC_AUXADC_TYPEC_L_EN_MIN_ADDR, PMIC_AUXADC_TYPEC_L_EN_MIN_MASK, PMIC_AUXADC_TYPEC_L_EN_MIN_SHIFT},
    2789. 

  2789. 	{PMIC_AUXADC_TYPEC_L_MIN_IRQ_B, PMIC_AUXADC_TYPEC_L_MIN_IRQ_B_ADDR, PMIC_AUXADC_TYPEC_L_MIN_IRQ_B_MASK, PMIC_AUXADC_TYPEC_L_MIN_IRQ_B_SHIFT},
    2790. 

  2790. 	{PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MAX, PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MAX_ADDR, PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MAX_MASK, PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MAX_SHIFT},
    2791. 

  2791. 	{PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MIN, PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MIN_ADDR, PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MIN_MASK, PMIC_AUXADC_TYPEC_L_DEBOUNCE_COUNT_MIN_SHIFT},
    2792. 

  2792. 	{PMIC_RG_AUDACCDETVTHBCAL, PMIC_RG_AUDACCDETVTHBCAL_ADDR, PMIC_RG_AUDACCDETVTHBCAL_MASK, PMIC_RG_AUDACCDETVTHBCAL_SHIFT},
    2793. 

  2793. 	{PMIC_RG_AUDACCDETVTHACAL, PMIC_RG_AUDACCDETVTHACAL_ADDR, PMIC_RG_AUDACCDETVTHACAL_MASK, PMIC_RG_AUDACCDETVTHACAL_SHIFT},
    2794. 

  2794. 	{PMIC_RG_AUDACCDETANASWCTRLENB, PMIC_RG_AUDACCDETANASWCTRLENB_ADDR, PMIC_RG_AUDACCDETANASWCTRLENB_MASK, PMIC_RG_AUDACCDETANASWCTRLENB_SHIFT},
    2795. 

  2795. 	{PMIC_RG_ACCDETSEL, PMIC_RG_ACCDETSEL_ADDR, PMIC_RG_ACCDETSEL_MASK, PMIC_RG_ACCDETSEL_SHIFT},
    2796. 

  2796. 	{PMIC_RG_AUDACCDETSWCTRL, PMIC_RG_AUDACCDETSWCTRL_ADDR, PMIC_RG_AUDACCDETSWCTRL_MASK, PMIC_RG_AUDACCDETSWCTRL_SHIFT},
    2797. 

  2797. 	{PMIC_RG_AUDACCDETMICBIAS1PULLLOW, PMIC_RG_AUDACCDETMICBIAS1PULLLOW_ADDR, PMIC_RG_AUDACCDETMICBIAS1PULLLOW_MASK, PMIC_RG_AUDACCDETMICBIAS1PULLLOW_SHIFT},
    2798. 

  2798. 	{PMIC_RG_AUDACCDETTVDET, PMIC_RG_AUDACCDETTVDET_ADDR, PMIC_RG_AUDACCDETTVDET_MASK, PMIC_RG_AUDACCDETTVDET_SHIFT},
    2799. 

  2799. 	{PMIC_RG_AUDACCDETVIN1PULLLOW, PMIC_RG_AUDACCDETVIN1PULLLOW_ADDR, PMIC_RG_AUDACCDETVIN1PULLLOW_MASK, PMIC_RG_AUDACCDETVIN1PULLLOW_SHIFT},
    2800. 

  2800. 	{PMIC_AUDACCDETAUXADCSWCTRL, PMIC_AUDACCDETAUXADCSWCTRL_ADDR, PMIC_AUDACCDETAUXADCSWCTRL_MASK, PMIC_AUDACCDETAUXADCSWCTRL_SHIFT},
    2801. 

  2801. 	{PMIC_AUDACCDETAUXADCSWCTRL_SEL, PMIC_AUDACCDETAUXADCSWCTRL_SEL_ADDR, PMIC_AUDACCDETAUXADCSWCTRL_SEL_MASK, PMIC_AUDACCDETAUXADCSWCTRL_SEL_SHIFT},
    2802. 

  2802. 	{PMIC_RG_AUDACCDETMICBIAS0PULLLOW, PMIC_RG_AUDACCDETMICBIAS0PULLLOW_ADDR, PMIC_RG_AUDACCDETMICBIAS0PULLLOW_MASK, PMIC_RG_AUDACCDETMICBIAS0PULLLOW_SHIFT},
    2803. 

  2803. 	{PMIC_RG_AUDACCDETRSV, PMIC_RG_AUDACCDETRSV_ADDR, PMIC_RG_AUDACCDETRSV_MASK, PMIC_RG_AUDACCDETRSV_SHIFT},
    2804. 

  2804. 	{PMIC_ACCDET_EN, PMIC_ACCDET_EN_ADDR, PMIC_ACCDET_EN_MASK, PMIC_ACCDET_EN_SHIFT},
    2805. 

  2805. 	{PMIC_ACCDET_SEQ_INIT, PMIC_ACCDET_SEQ_INIT_ADDR, PMIC_ACCDET_SEQ_INIT_MASK, PMIC_ACCDET_SEQ_INIT_SHIFT},
    2806. 

  2806. 	{PMIC_ACCDET_EINTDET_EN, PMIC_ACCDET_EINTDET_EN_ADDR, PMIC_ACCDET_EINTDET_EN_MASK, PMIC_ACCDET_EINTDET_EN_SHIFT},
    2807. 

  2807. 	{PMIC_ACCDET_EINT_SEQ_INIT, PMIC_ACCDET_EINT_SEQ_INIT_ADDR, PMIC_ACCDET_EINT_SEQ_INIT_MASK, PMIC_ACCDET_EINT_SEQ_INIT_SHIFT},
    2808. 

  2808. 	{PMIC_ACCDET_NEGVDET_EN, PMIC_ACCDET_NEGVDET_EN_ADDR, PMIC_ACCDET_NEGVDET_EN_MASK, PMIC_ACCDET_NEGVDET_EN_SHIFT},
    2809. 

  2809. 	{PMIC_ACCDET_NEGVDET_EN_CTRL, PMIC_ACCDET_NEGVDET_EN_CTRL_ADDR, PMIC_ACCDET_NEGVDET_EN_CTRL_MASK, PMIC_ACCDET_NEGVDET_EN_CTRL_SHIFT},
    2810. 

  2810. 	{PMIC_ACCDET_ANASWCTRL_SEL, PMIC_ACCDET_ANASWCTRL_SEL_ADDR, PMIC_ACCDET_ANASWCTRL_SEL_MASK, PMIC_ACCDET_ANASWCTRL_SEL_SHIFT},
    2811. 

  2811. 	{PMIC_ACCDET_CMP_PWM_EN, PMIC_ACCDET_CMP_PWM_EN_ADDR, PMIC_ACCDET_CMP_PWM_EN_MASK, PMIC_ACCDET_CMP_PWM_EN_SHIFT},
    2812. 

  2812. 	{PMIC_ACCDET_VTH_PWM_EN, PMIC_ACCDET_VTH_PWM_EN_ADDR, PMIC_ACCDET_VTH_PWM_EN_MASK, PMIC_ACCDET_VTH_PWM_EN_SHIFT},
    2813. 

  2813. 	{PMIC_ACCDET_MBIAS_PWM_EN, PMIC_ACCDET_MBIAS_PWM_EN_ADDR, PMIC_ACCDET_MBIAS_PWM_EN_MASK, PMIC_ACCDET_MBIAS_PWM_EN_SHIFT},
    2814. 

  2814. 	{PMIC_ACCDET_EINT_PWM_EN, PMIC_ACCDET_EINT_PWM_EN_ADDR, PMIC_ACCDET_EINT_PWM_EN_MASK, PMIC_ACCDET_EINT_PWM_EN_SHIFT},
    2815. 

  2815. 	{PMIC_ACCDET_CMP_PWM_IDLE, PMIC_ACCDET_CMP_PWM_IDLE_ADDR, PMIC_ACCDET_CMP_PWM_IDLE_MASK, PMIC_ACCDET_CMP_PWM_IDLE_SHIFT},
    2816. 

  2816. 	{PMIC_ACCDET_VTH_PWM_IDLE, PMIC_ACCDET_VTH_PWM_IDLE_ADDR, PMIC_ACCDET_VTH_PWM_IDLE_MASK, PMIC_ACCDET_VTH_PWM_IDLE_SHIFT},
    2817. 

  2817. 	{PMIC_ACCDET_MBIAS_PWM_IDLE, PMIC_ACCDET_MBIAS_PWM_IDLE_ADDR, PMIC_ACCDET_MBIAS_PWM_IDLE_MASK, PMIC_ACCDET_MBIAS_PWM_IDLE_SHIFT},
    2818. 

  2818. 	{PMIC_ACCDET_EINT_PWM_IDLE, PMIC_ACCDET_EINT_PWM_IDLE_ADDR, PMIC_ACCDET_EINT_PWM_IDLE_MASK, PMIC_ACCDET_EINT_PWM_IDLE_SHIFT},
    2819. 

  2819. 	{PMIC_ACCDET_PWM_WIDTH, PMIC_ACCDET_PWM_WIDTH_ADDR, PMIC_ACCDET_PWM_WIDTH_MASK, PMIC_ACCDET_PWM_WIDTH_SHIFT},
    2820. 

  2820. 	{PMIC_ACCDET_PWM_THRESH, PMIC_ACCDET_PWM_THRESH_ADDR, PMIC_ACCDET_PWM_THRESH_MASK, PMIC_ACCDET_PWM_THRESH_SHIFT},
    2821. 

  2821. 	{PMIC_ACCDET_RISE_DELAY, PMIC_ACCDET_RISE_DELAY_ADDR, PMIC_ACCDET_RISE_DELAY_MASK, PMIC_ACCDET_RISE_DELAY_SHIFT},
    2822. 

  2822. 	{PMIC_ACCDET_FALL_DELAY, PMIC_ACCDET_FALL_DELAY_ADDR, PMIC_ACCDET_FALL_DELAY_MASK, PMIC_ACCDET_FALL_DELAY_SHIFT},
    2823. 

  2823. 	{PMIC_ACCDET_DEBOUNCE0, PMIC_ACCDET_DEBOUNCE0_ADDR, PMIC_ACCDET_DEBOUNCE0_MASK, PMIC_ACCDET_DEBOUNCE0_SHIFT},
    2824. 

  2824. 	{PMIC_ACCDET_DEBOUNCE1, PMIC_ACCDET_DEBOUNCE1_ADDR, PMIC_ACCDET_DEBOUNCE1_MASK, PMIC_ACCDET_DEBOUNCE1_SHIFT},
    2825. 

  2825. 	{PMIC_ACCDET_DEBOUNCE2, PMIC_ACCDET_DEBOUNCE2_ADDR, PMIC_ACCDET_DEBOUNCE2_MASK, PMIC_ACCDET_DEBOUNCE2_SHIFT},
    2826. 

  2826. 	{PMIC_ACCDET_DEBOUNCE3, PMIC_ACCDET_DEBOUNCE3_ADDR, PMIC_ACCDET_DEBOUNCE3_MASK, PMIC_ACCDET_DEBOUNCE3_SHIFT},
    2827. 

  2827. 	{PMIC_ACCDET_DEBOUNCE4, PMIC_ACCDET_DEBOUNCE4_ADDR, PMIC_ACCDET_DEBOUNCE4_MASK, PMIC_ACCDET_DEBOUNCE4_SHIFT},
    2828. 

  2828. 	{PMIC_ACCDET_IVAL_CUR_IN, PMIC_ACCDET_IVAL_CUR_IN_ADDR, PMIC_ACCDET_IVAL_CUR_IN_MASK, PMIC_ACCDET_IVAL_CUR_IN_SHIFT},
    2829. 

  2829. 	{PMIC_ACCDET_EINT_IVAL_CUR_IN, PMIC_ACCDET_EINT_IVAL_CUR_IN_ADDR, PMIC_ACCDET_EINT_IVAL_CUR_IN_MASK, PMIC_ACCDET_EINT_IVAL_CUR_IN_SHIFT},
    2830. 

  2830. 	{PMIC_ACCDET_IVAL_SAM_IN, PMIC_ACCDET_IVAL_SAM_IN_ADDR, PMIC_ACCDET_IVAL_SAM_IN_MASK, PMIC_ACCDET_IVAL_SAM_IN_SHIFT},
    2831. 

  2831. 	{PMIC_ACCDET_EINT_IVAL_SAM_IN, PMIC_ACCDET_EINT_IVAL_SAM_IN_ADDR, PMIC_ACCDET_EINT_IVAL_SAM_IN_MASK, PMIC_ACCDET_EINT_IVAL_SAM_IN_SHIFT},
    2832. 

  2832. 	{PMIC_ACCDET_IVAL_MEM_IN, PMIC_ACCDET_IVAL_MEM_IN_ADDR, PMIC_ACCDET_IVAL_MEM_IN_MASK, PMIC_ACCDET_IVAL_MEM_IN_SHIFT},
    2833. 

  2833. 	{PMIC_ACCDET_EINT_IVAL_MEM_IN, PMIC_ACCDET_EINT_IVAL_MEM_IN_ADDR, PMIC_ACCDET_EINT_IVAL_MEM_IN_MASK, PMIC_ACCDET_EINT_IVAL_MEM_IN_SHIFT},
    2834. 

  2834. 	{PMIC_ACCDET_EINT_IVAL_SEL, PMIC_ACCDET_EINT_IVAL_SEL_ADDR, PMIC_ACCDET_EINT_IVAL_SEL_MASK, PMIC_ACCDET_EINT_IVAL_SEL_SHIFT},
    2835. 

  2835. 	{PMIC_ACCDET_IVAL_SEL, PMIC_ACCDET_IVAL_SEL_ADDR, PMIC_ACCDET_IVAL_SEL_MASK, PMIC_ACCDET_IVAL_SEL_SHIFT},
    2836. 

  2836. 	{PMIC_ACCDET_IRQ, PMIC_ACCDET_IRQ_ADDR, PMIC_ACCDET_IRQ_MASK, PMIC_ACCDET_IRQ_SHIFT},
    2837. 

  2837. 	{PMIC_ACCDET_NEGV_IRQ, PMIC_ACCDET_NEGV_IRQ_ADDR, PMIC_ACCDET_NEGV_IRQ_MASK, PMIC_ACCDET_NEGV_IRQ_SHIFT},
    2838. 

  2838. 	{PMIC_ACCDET_EINT_IRQ, PMIC_ACCDET_EINT_IRQ_ADDR, PMIC_ACCDET_EINT_IRQ_MASK, PMIC_ACCDET_EINT_IRQ_SHIFT},
    2839. 

  2839. 	{PMIC_ACCDET_IRQ_CLR, PMIC_ACCDET_IRQ_CLR_ADDR, PMIC_ACCDET_IRQ_CLR_MASK, PMIC_ACCDET_IRQ_CLR_SHIFT},
    2840. 

  2840. 	{PMIC_ACCDET_NEGV_IRQ_CLR, PMIC_ACCDET_NEGV_IRQ_CLR_ADDR, PMIC_ACCDET_NEGV_IRQ_CLR_MASK, PMIC_ACCDET_NEGV_IRQ_CLR_SHIFT},
    2841. 

  2841. 	{PMIC_ACCDET_EINT_IRQ_CLR, PMIC_ACCDET_EINT_IRQ_CLR_ADDR, PMIC_ACCDET_EINT_IRQ_CLR_MASK, PMIC_ACCDET_EINT_IRQ_CLR_SHIFT},
    2842. 

  2842. 	{PMIC_ACCDET_EINT_IRQ_POLARITY, PMIC_ACCDET_EINT_IRQ_POLARITY_ADDR, PMIC_ACCDET_EINT_IRQ_POLARITY_MASK, PMIC_ACCDET_EINT_IRQ_POLARITY_SHIFT},
    2843. 

  2843. 	{PMIC_ACCDET_TEST_MODE0, PMIC_ACCDET_TEST_MODE0_ADDR, PMIC_ACCDET_TEST_MODE0_MASK, PMIC_ACCDET_TEST_MODE0_SHIFT},
    2844. 

  2844. 	{PMIC_ACCDET_TEST_MODE1, PMIC_ACCDET_TEST_MODE1_ADDR, PMIC_ACCDET_TEST_MODE1_MASK, PMIC_ACCDET_TEST_MODE1_SHIFT},
    2845. 

  2845. 	{PMIC_ACCDET_TEST_MODE2, PMIC_ACCDET_TEST_MODE2_ADDR, PMIC_ACCDET_TEST_MODE2_MASK, PMIC_ACCDET_TEST_MODE2_SHIFT},
    2846. 

  2846. 	{PMIC_ACCDET_TEST_MODE3, PMIC_ACCDET_TEST_MODE3_ADDR, PMIC_ACCDET_TEST_MODE3_MASK, PMIC_ACCDET_TEST_MODE3_SHIFT},
    2847. 

  2847. 	{PMIC_ACCDET_TEST_MODE4, PMIC_ACCDET_TEST_MODE4_ADDR, PMIC_ACCDET_TEST_MODE4_MASK, PMIC_ACCDET_TEST_MODE4_SHIFT},
    2848. 

  2848. 	{PMIC_ACCDET_TEST_MODE5, PMIC_ACCDET_TEST_MODE5_ADDR, PMIC_ACCDET_TEST_MODE5_MASK, PMIC_ACCDET_TEST_MODE5_SHIFT},
    2849. 

  2849. 	{PMIC_ACCDET_PWM_SEL, PMIC_ACCDET_PWM_SEL_ADDR, PMIC_ACCDET_PWM_SEL_MASK, PMIC_ACCDET_PWM_SEL_SHIFT},
    2850. 

  2850. 	{PMIC_ACCDET_IN_SW, PMIC_ACCDET_IN_SW_ADDR, PMIC_ACCDET_IN_SW_MASK, PMIC_ACCDET_IN_SW_SHIFT},
    2851. 

  2851. 	{PMIC_ACCDET_CMP_EN_SW, PMIC_ACCDET_CMP_EN_SW_ADDR, PMIC_ACCDET_CMP_EN_SW_MASK, PMIC_ACCDET_CMP_EN_SW_SHIFT},
    2852. 

  2852. 	{PMIC_ACCDET_VTH_EN_SW, PMIC_ACCDET_VTH_EN_SW_ADDR, PMIC_ACCDET_VTH_EN_SW_MASK, PMIC_ACCDET_VTH_EN_SW_SHIFT},
    2853. 

  2853. 	{PMIC_ACCDET_MBIAS_EN_SW, PMIC_ACCDET_MBIAS_EN_SW_ADDR, PMIC_ACCDET_MBIAS_EN_SW_MASK, PMIC_ACCDET_MBIAS_EN_SW_SHIFT},
    2854. 

  2854. 	{PMIC_ACCDET_PWM_EN_SW, PMIC_ACCDET_PWM_EN_SW_ADDR, PMIC_ACCDET_PWM_EN_SW_MASK, PMIC_ACCDET_PWM_EN_SW_SHIFT},
    2855. 

  2855. 	{PMIC_ACCDET_IN, PMIC_ACCDET_IN_ADDR, PMIC_ACCDET_IN_MASK, PMIC_ACCDET_IN_SHIFT},
    2856. 

  2856. 	{PMIC_ACCDET_CUR_IN, PMIC_ACCDET_CUR_IN_ADDR, PMIC_ACCDET_CUR_IN_MASK, PMIC_ACCDET_CUR_IN_SHIFT},
    2857. 

  2857. 	{PMIC_ACCDET_SAM_IN, PMIC_ACCDET_SAM_IN_ADDR, PMIC_ACCDET_SAM_IN_MASK, PMIC_ACCDET_SAM_IN_SHIFT},
    2858. 

  2858. 	{PMIC_ACCDET_MEM_IN, PMIC_ACCDET_MEM_IN_ADDR, PMIC_ACCDET_MEM_IN_MASK, PMIC_ACCDET_MEM_IN_SHIFT},
    2859. 

  2859. 	{PMIC_ACCDET_STATE, PMIC_ACCDET_STATE_ADDR, PMIC_ACCDET_STATE_MASK, PMIC_ACCDET_STATE_SHIFT},
    2860. 

  2860. 	{PMIC_ACCDET_MBIAS_CLK, PMIC_ACCDET_MBIAS_CLK_ADDR, PMIC_ACCDET_MBIAS_CLK_MASK, PMIC_ACCDET_MBIAS_CLK_SHIFT},
    2861. 

  2861. 	{PMIC_ACCDET_VTH_CLK, PMIC_ACCDET_VTH_CLK_ADDR, PMIC_ACCDET_VTH_CLK_MASK, PMIC_ACCDET_VTH_CLK_SHIFT},
    2862. 

  2862. 	{PMIC_ACCDET_CMP_CLK, PMIC_ACCDET_CMP_CLK_ADDR, PMIC_ACCDET_CMP_CLK_MASK, PMIC_ACCDET_CMP_CLK_SHIFT},
    2863. 

  2863. 	{PMIC_DA_AUDACCDETAUXADCSWCTRL, PMIC_DA_AUDACCDETAUXADCSWCTRL_ADDR, PMIC_DA_AUDACCDETAUXADCSWCTRL_MASK, PMIC_DA_AUDACCDETAUXADCSWCTRL_SHIFT},
    2864. 

  2864. 	{PMIC_ACCDET_EINT_DEB_SEL, PMIC_ACCDET_EINT_DEB_SEL_ADDR, PMIC_ACCDET_EINT_DEB_SEL_MASK, PMIC_ACCDET_EINT_DEB_SEL_SHIFT},
    2865. 

  2865. 	{PMIC_ACCDET_EINT_DEBOUNCE, PMIC_ACCDET_EINT_DEBOUNCE_ADDR, PMIC_ACCDET_EINT_DEBOUNCE_MASK, PMIC_ACCDET_EINT_DEBOUNCE_SHIFT},
    2866. 

  2866. 	{PMIC_ACCDET_EINT_PWM_THRESH, PMIC_ACCDET_EINT_PWM_THRESH_ADDR, PMIC_ACCDET_EINT_PWM_THRESH_MASK, PMIC_ACCDET_EINT_PWM_THRESH_SHIFT},
    2867. 

  2867. 	{PMIC_ACCDET_EINT_PWM_WIDTH, PMIC_ACCDET_EINT_PWM_WIDTH_ADDR, PMIC_ACCDET_EINT_PWM_WIDTH_MASK, PMIC_ACCDET_EINT_PWM_WIDTH_SHIFT},
    2868. 

  2868. 	{PMIC_ACCDET_NEGV_THRESH, PMIC_ACCDET_NEGV_THRESH_ADDR, PMIC_ACCDET_NEGV_THRESH_MASK, PMIC_ACCDET_NEGV_THRESH_SHIFT},
    2869. 

  2869. 	{PMIC_ACCDET_EINT_PWM_FALL_DELAY, PMIC_ACCDET_EINT_PWM_FALL_DELAY_ADDR, PMIC_ACCDET_EINT_PWM_FALL_DELAY_MASK, PMIC_ACCDET_EINT_PWM_FALL_DELAY_SHIFT},
    2870. 

  2870. 	{PMIC_ACCDET_EINT_PWM_RISE_DELAY, PMIC_ACCDET_EINT_PWM_RISE_DELAY_ADDR, PMIC_ACCDET_EINT_PWM_RISE_DELAY_MASK, PMIC_ACCDET_EINT_PWM_RISE_DELAY_SHIFT},
    2871. 

  2871. 	{PMIC_ACCDET_TEST_MODE13, PMIC_ACCDET_TEST_MODE13_ADDR, PMIC_ACCDET_TEST_MODE13_MASK, PMIC_ACCDET_TEST_MODE13_SHIFT},
    2872. 

  2872. 	{PMIC_ACCDET_TEST_MODE12, PMIC_ACCDET_TEST_MODE12_ADDR, PMIC_ACCDET_TEST_MODE12_MASK, PMIC_ACCDET_TEST_MODE12_SHIFT},
    2873. 

  2873. 	{PMIC_ACCDET_NVDETECTOUT_SW, PMIC_ACCDET_NVDETECTOUT_SW_ADDR, PMIC_ACCDET_NVDETECTOUT_SW_MASK, PMIC_ACCDET_NVDETECTOUT_SW_SHIFT},
    2874. 

  2874. 	{PMIC_ACCDET_TEST_MODE11, PMIC_ACCDET_TEST_MODE11_ADDR, PMIC_ACCDET_TEST_MODE11_MASK, PMIC_ACCDET_TEST_MODE11_SHIFT},
    2875. 

  2875. 	{PMIC_ACCDET_TEST_MODE10, PMIC_ACCDET_TEST_MODE10_ADDR, PMIC_ACCDET_TEST_MODE10_MASK, PMIC_ACCDET_TEST_MODE10_SHIFT},
    2876. 

  2876. 	{PMIC_ACCDET_EINTCMPOUT_SW, PMIC_ACCDET_EINTCMPOUT_SW_ADDR, PMIC_ACCDET_EINTCMPOUT_SW_MASK, PMIC_ACCDET_EINTCMPOUT_SW_SHIFT},
    2877. 

  2877. 	{PMIC_ACCDET_TEST_MODE9, PMIC_ACCDET_TEST_MODE9_ADDR, PMIC_ACCDET_TEST_MODE9_MASK, PMIC_ACCDET_TEST_MODE9_SHIFT},
    2878. 

  2878. 	{PMIC_ACCDET_TEST_MODE8, PMIC_ACCDET_TEST_MODE8_ADDR, PMIC_ACCDET_TEST_MODE8_MASK, PMIC_ACCDET_TEST_MODE8_SHIFT},
    2879. 

  2879. 	{PMIC_ACCDET_AUXADC_CTRL_SW, PMIC_ACCDET_AUXADC_CTRL_SW_ADDR, PMIC_ACCDET_AUXADC_CTRL_SW_MASK, PMIC_ACCDET_AUXADC_CTRL_SW_SHIFT},
    2880. 

  2880. 	{PMIC_ACCDET_TEST_MODE7, PMIC_ACCDET_TEST_MODE7_ADDR, PMIC_ACCDET_TEST_MODE7_MASK, PMIC_ACCDET_TEST_MODE7_SHIFT},
    2881. 

  2881. 	{PMIC_ACCDET_TEST_MODE6, PMIC_ACCDET_TEST_MODE6_ADDR, PMIC_ACCDET_TEST_MODE6_MASK, PMIC_ACCDET_TEST_MODE6_SHIFT},
    2882. 

  2882. 	{PMIC_ACCDET_EINTCMP_EN_SW, PMIC_ACCDET_EINTCMP_EN_SW_ADDR, PMIC_ACCDET_EINTCMP_EN_SW_MASK, PMIC_ACCDET_EINTCMP_EN_SW_SHIFT},
    2883. 

  2883. 	{PMIC_RG_NVCMPSWEN, PMIC_RG_NVCMPSWEN_ADDR, PMIC_RG_NVCMPSWEN_MASK, PMIC_RG_NVCMPSWEN_SHIFT},
    2884. 

  2884. 	{PMIC_RG_NVMODSEL, PMIC_RG_NVMODSEL_ADDR, PMIC_RG_NVMODSEL_MASK, PMIC_RG_NVMODSEL_SHIFT},
    2885. 

  2885. 	{PMIC_RG_SWBUFSWEN, PMIC_RG_SWBUFSWEN_ADDR, PMIC_RG_SWBUFSWEN_MASK, PMIC_RG_SWBUFSWEN_SHIFT},
    2886. 

  2886. 	{PMIC_RG_SWBUFMODSEL, PMIC_RG_SWBUFMODSEL_ADDR, PMIC_RG_SWBUFMODSEL_MASK, PMIC_RG_SWBUFMODSEL_SHIFT},
    2887. 

  2887. 	{PMIC_RG_NVDETVTH, PMIC_RG_NVDETVTH_ADDR, PMIC_RG_NVDETVTH_MASK, PMIC_RG_NVDETVTH_SHIFT},
    2888. 

  2888. 	{PMIC_RG_NVDETCMPEN, PMIC_RG_NVDETCMPEN_ADDR, PMIC_RG_NVDETCMPEN_MASK, PMIC_RG_NVDETCMPEN_SHIFT},
    2889. 

  2889. 	{PMIC_RG_EINTCONFIGACCDET, PMIC_RG_EINTCONFIGACCDET_ADDR, PMIC_RG_EINTCONFIGACCDET_MASK, PMIC_RG_EINTCONFIGACCDET_SHIFT},
    2890. 

  2890. 	{PMIC_RG_EINTCOMPVTH, PMIC_RG_EINTCOMPVTH_ADDR, PMIC_RG_EINTCOMPVTH_MASK, PMIC_RG_EINTCOMPVTH_SHIFT},
    2891. 

  2891. 	{PMIC_ACCDET_EINT_STATE, PMIC_ACCDET_EINT_STATE_ADDR, PMIC_ACCDET_EINT_STATE_MASK, PMIC_ACCDET_EINT_STATE_SHIFT},
    2892. 

  2892. 	{PMIC_ACCDET_AUXADC_DEBOUNCE_END, PMIC_ACCDET_AUXADC_DEBOUNCE_END_ADDR, PMIC_ACCDET_AUXADC_DEBOUNCE_END_MASK, PMIC_ACCDET_AUXADC_DEBOUNCE_END_SHIFT},
    2893. 

  2893. 	{PMIC_ACCDET_AUXADC_CONNECT_PRE, PMIC_ACCDET_AUXADC_CONNECT_PRE_ADDR, PMIC_ACCDET_AUXADC_CONNECT_PRE_MASK, PMIC_ACCDET_AUXADC_CONNECT_PRE_SHIFT},
    2894. 

  2894. 	{PMIC_ACCDET_EINT_CUR_IN, PMIC_ACCDET_EINT_CUR_IN_ADDR, PMIC_ACCDET_EINT_CUR_IN_MASK, PMIC_ACCDET_EINT_CUR_IN_SHIFT},
    2895. 

  2895. 	{PMIC_ACCDET_EINT_SAM_IN, PMIC_ACCDET_EINT_SAM_IN_ADDR, PMIC_ACCDET_EINT_SAM_IN_MASK, PMIC_ACCDET_EINT_SAM_IN_SHIFT},
    2896. 

  2896. 	{PMIC_ACCDET_EINT_MEM_IN, PMIC_ACCDET_EINT_MEM_IN_ADDR, PMIC_ACCDET_EINT_MEM_IN_MASK, PMIC_ACCDET_EINT_MEM_IN_SHIFT},
    2897. 

  2897. 	{PMIC_AD_NVDETECTOUT, PMIC_AD_NVDETECTOUT_ADDR, PMIC_AD_NVDETECTOUT_MASK, PMIC_AD_NVDETECTOUT_SHIFT},
    2898. 

  2898. 	{PMIC_AD_EINTCMPOUT, PMIC_AD_EINTCMPOUT_ADDR, PMIC_AD_EINTCMPOUT_MASK, PMIC_AD_EINTCMPOUT_SHIFT},
    2899. 

  2899. 	{PMIC_DA_NI_EINTCMPEN, PMIC_DA_NI_EINTCMPEN_ADDR, PMIC_DA_NI_EINTCMPEN_MASK, PMIC_DA_NI_EINTCMPEN_SHIFT},
    2900. 

  2900. 	{PMIC_ACCDET_NEGV_COUNT_IN, PMIC_ACCDET_NEGV_COUNT_IN_ADDR, PMIC_ACCDET_NEGV_COUNT_IN_MASK, PMIC_ACCDET_NEGV_COUNT_IN_SHIFT},
    2901. 

  2901. 	{PMIC_ACCDET_NEGV_EN_FINAL, PMIC_ACCDET_NEGV_EN_FINAL_ADDR, PMIC_ACCDET_NEGV_EN_FINAL_MASK, PMIC_ACCDET_NEGV_EN_FINAL_SHIFT},
    2902. 

  2902. 	{PMIC_ACCDET_NEGV_COUNT_END, PMIC_ACCDET_NEGV_COUNT_END_ADDR, PMIC_ACCDET_NEGV_COUNT_END_MASK, PMIC_ACCDET_NEGV_COUNT_END_SHIFT},
    2903. 

  2903. 	{PMIC_ACCDET_NEGV_MINU, PMIC_ACCDET_NEGV_MINU_ADDR, PMIC_ACCDET_NEGV_MINU_MASK, PMIC_ACCDET_NEGV_MINU_SHIFT},
    2904. 

  2904. 	{PMIC_ACCDET_NEGV_ADD, PMIC_ACCDET_NEGV_ADD_ADDR, PMIC_ACCDET_NEGV_ADD_MASK, PMIC_ACCDET_NEGV_ADD_SHIFT},
    2905. 

  2905. 	{PMIC_ACCDET_NEGV_CMP, PMIC_ACCDET_NEGV_CMP_ADDR, PMIC_ACCDET_NEGV_CMP_MASK, PMIC_ACCDET_NEGV_CMP_SHIFT},
    2906. 

  2906. 	{PMIC_ACCDET_CUR_DEB, PMIC_ACCDET_CUR_DEB_ADDR, PMIC_ACCDET_CUR_DEB_MASK, PMIC_ACCDET_CUR_DEB_SHIFT},
    2907. 

  2907. 	{PMIC_ACCDET_EINT_CUR_DEB, PMIC_ACCDET_EINT_CUR_DEB_ADDR, PMIC_ACCDET_EINT_CUR_DEB_MASK, PMIC_ACCDET_EINT_CUR_DEB_SHIFT},
    2908. 

  2908. 	{PMIC_ACCDET_RSV_CON0, PMIC_ACCDET_RSV_CON0_ADDR, PMIC_ACCDET_RSV_CON0_MASK, PMIC_ACCDET_RSV_CON0_SHIFT},
    2909. 

  2909. 	{PMIC_ACCDET_RSV_CON1, PMIC_ACCDET_RSV_CON1_ADDR, PMIC_ACCDET_RSV_CON1_MASK, PMIC_ACCDET_RSV_CON1_SHIFT},
    2910. 

  2910. 	{PMIC_ACCDET_AUXADC_CONNECT_TIME, PMIC_ACCDET_AUXADC_CONNECT_TIME_ADDR, PMIC_ACCDET_AUXADC_CONNECT_TIME_MASK, PMIC_ACCDET_AUXADC_CONNECT_TIME_SHIFT},
    2911. 

  2911. 	{PMIC_RG_VCDT_HV_EN, PMIC_RG_VCDT_HV_EN_ADDR, PMIC_RG_VCDT_HV_EN_MASK, PMIC_RG_VCDT_HV_EN_SHIFT},
    2912. 

  2912. 	{PMIC_RGS_CHR_LDO_DET, PMIC_RGS_CHR_LDO_DET_ADDR, PMIC_RGS_CHR_LDO_DET_MASK, PMIC_RGS_CHR_LDO_DET_SHIFT},
    2913. 

  2913. 	{PMIC_RG_PCHR_AUTOMODE, PMIC_RG_PCHR_AUTOMODE_ADDR, PMIC_RG_PCHR_AUTOMODE_MASK, PMIC_RG_PCHR_AUTOMODE_SHIFT},
    2914. 

  2914. 	{PMIC_RG_CSDAC_EN, PMIC_RG_CSDAC_EN_ADDR, PMIC_RG_CSDAC_EN_MASK, PMIC_RG_CSDAC_EN_SHIFT},
    2915. 

  2915. 	{PMIC_RG_CHR_EN, PMIC_RG_CHR_EN_ADDR, PMIC_RG_CHR_EN_MASK, PMIC_RG_CHR_EN_SHIFT},
    2916. 

  2916. 	{PMIC_RGS_CHRDET, PMIC_RGS_CHRDET_ADDR, PMIC_RGS_CHRDET_MASK, PMIC_RGS_CHRDET_SHIFT},
    2917. 

  2917. 	{PMIC_RGS_VCDT_LV_DET, PMIC_RGS_VCDT_LV_DET_ADDR, PMIC_RGS_VCDT_LV_DET_MASK, PMIC_RGS_VCDT_LV_DET_SHIFT},
    2918. 

  2918. 	{PMIC_RGS_VCDT_HV_DET, PMIC_RGS_VCDT_HV_DET_ADDR, PMIC_RGS_VCDT_HV_DET_MASK, PMIC_RGS_VCDT_HV_DET_SHIFT},
    2919. 

  2919. 	{PMIC_RG_VCDT_LV_VTH, PMIC_RG_VCDT_LV_VTH_ADDR, PMIC_RG_VCDT_LV_VTH_MASK, PMIC_RG_VCDT_LV_VTH_SHIFT},
    2920. 

  2920. 	{PMIC_RG_VCDT_HV_VTH, PMIC_RG_VCDT_HV_VTH_ADDR, PMIC_RG_VCDT_HV_VTH_MASK, PMIC_RG_VCDT_HV_VTH_SHIFT},
    2921. 

  2921. 	{PMIC_RG_VBAT_CV_EN, PMIC_RG_VBAT_CV_EN_ADDR, PMIC_RG_VBAT_CV_EN_MASK, PMIC_RG_VBAT_CV_EN_SHIFT},
    2922. 

  2922. 	{PMIC_RG_VBAT_CC_EN, PMIC_RG_VBAT_CC_EN_ADDR, PMIC_RG_VBAT_CC_EN_MASK, PMIC_RG_VBAT_CC_EN_SHIFT},
    2923. 

  2923. 	{PMIC_RG_CS_EN, PMIC_RG_CS_EN_ADDR, PMIC_RG_CS_EN_MASK, PMIC_RG_CS_EN_SHIFT},
    2924. 

  2924. 	{PMIC_RGS_CS_DET, PMIC_RGS_CS_DET_ADDR, PMIC_RGS_CS_DET_MASK, PMIC_RGS_CS_DET_SHIFT},
    2925. 

  2925. 	{PMIC_RGS_VBAT_CV_DET, PMIC_RGS_VBAT_CV_DET_ADDR, PMIC_RGS_VBAT_CV_DET_MASK, PMIC_RGS_VBAT_CV_DET_SHIFT},
    2926. 

  2926. 	{PMIC_RGS_VBAT_CC_DET, PMIC_RGS_VBAT_CC_DET_ADDR, PMIC_RGS_VBAT_CC_DET_MASK, PMIC_RGS_VBAT_CC_DET_SHIFT},
    2927. 

  2927. 	{PMIC_RG_VBAT_CV_VTH, PMIC_RG_VBAT_CV_VTH_ADDR, PMIC_RG_VBAT_CV_VTH_MASK, PMIC_RG_VBAT_CV_VTH_SHIFT},
    2928. 

  2928. 	{PMIC_RG_VBAT_CC_VTH, PMIC_RG_VBAT_CC_VTH_ADDR, PMIC_RG_VBAT_CC_VTH_MASK, PMIC_RG_VBAT_CC_VTH_SHIFT},
    2929. 

  2929. 	{PMIC_RG_CS_VTH, PMIC_RG_CS_VTH_ADDR, PMIC_RG_CS_VTH_MASK, PMIC_RG_CS_VTH_SHIFT},
    2930. 

  2930. 	{PMIC_RG_PCHR_TOHTC, PMIC_RG_PCHR_TOHTC_ADDR, PMIC_RG_PCHR_TOHTC_MASK, PMIC_RG_PCHR_TOHTC_SHIFT},
    2931. 

  2931. 	{PMIC_RG_PCHR_TOLTC, PMIC_RG_PCHR_TOLTC_ADDR, PMIC_RG_PCHR_TOLTC_MASK, PMIC_RG_PCHR_TOLTC_SHIFT},
    2932. 

  2932. 	{PMIC_RG_VBAT_OV_EN, PMIC_RG_VBAT_OV_EN_ADDR, PMIC_RG_VBAT_OV_EN_MASK, PMIC_RG_VBAT_OV_EN_SHIFT},
    2933. 

  2933. 	{PMIC_RG_VBAT_OV_VTH, PMIC_RG_VBAT_OV_VTH_ADDR, PMIC_RG_VBAT_OV_VTH_MASK, PMIC_RG_VBAT_OV_VTH_SHIFT},
    2934. 

  2934. 	{PMIC_RG_VBAT_OV_DEG, PMIC_RG_VBAT_OV_DEG_ADDR, PMIC_RG_VBAT_OV_DEG_MASK, PMIC_RG_VBAT_OV_DEG_SHIFT},
    2935. 

  2935. 	{PMIC_RGS_VBAT_OV_DET, PMIC_RGS_VBAT_OV_DET_ADDR, PMIC_RGS_VBAT_OV_DET_MASK, PMIC_RGS_VBAT_OV_DET_SHIFT},
    2936. 

  2936. 	{PMIC_RG_BATON_EN, PMIC_RG_BATON_EN_ADDR, PMIC_RG_BATON_EN_MASK, PMIC_RG_BATON_EN_SHIFT},
    2937. 

  2937. 	{PMIC_RG_BATON_HT_EN_RSV0, PMIC_RG_BATON_HT_EN_RSV0_ADDR, PMIC_RG_BATON_HT_EN_RSV0_MASK, PMIC_RG_BATON_HT_EN_RSV0_SHIFT},
    2938. 

  2938. 	{PMIC_BATON_TDET_EN, PMIC_BATON_TDET_EN_ADDR, PMIC_BATON_TDET_EN_MASK, PMIC_BATON_TDET_EN_SHIFT},
    2939. 

  2939. 	{PMIC_RG_BATON_HT_TRIM, PMIC_RG_BATON_HT_TRIM_ADDR, PMIC_RG_BATON_HT_TRIM_MASK, PMIC_RG_BATON_HT_TRIM_SHIFT},
    2940. 

  2940. 	{PMIC_RG_BATON_HT_TRIM_SET, PMIC_RG_BATON_HT_TRIM_SET_ADDR, PMIC_RG_BATON_HT_TRIM_SET_MASK, PMIC_RG_BATON_HT_TRIM_SET_SHIFT},
    2941. 

  2941. 	{PMIC_RG_BATON_TDET_EN, PMIC_RG_BATON_TDET_EN_ADDR, PMIC_RG_BATON_TDET_EN_MASK, PMIC_RG_BATON_TDET_EN_SHIFT},
    2942. 

  2942. 	{PMIC_RG_CSDAC_DATA, PMIC_RG_CSDAC_DATA_ADDR, PMIC_RG_CSDAC_DATA_MASK, PMIC_RG_CSDAC_DATA_SHIFT},
    2943. 

  2943. 	{PMIC_RG_FRC_CSVTH_USBDL, PMIC_RG_FRC_CSVTH_USBDL_ADDR, PMIC_RG_FRC_CSVTH_USBDL_MASK, PMIC_RG_FRC_CSVTH_USBDL_SHIFT},
    2944. 

  2944. 	{PMIC_RGS_PCHR_FLAG_OUT, PMIC_RGS_PCHR_FLAG_OUT_ADDR, PMIC_RGS_PCHR_FLAG_OUT_MASK, PMIC_RGS_PCHR_FLAG_OUT_SHIFT},
    2945. 

  2945. 	{PMIC_RG_PCHR_FLAG_EN, PMIC_RG_PCHR_FLAG_EN_ADDR, PMIC_RG_PCHR_FLAG_EN_MASK, PMIC_RG_PCHR_FLAG_EN_SHIFT},
    2946. 

  2946. 	{PMIC_RG_OTG_BVALID_EN, PMIC_RG_OTG_BVALID_EN_ADDR, PMIC_RG_OTG_BVALID_EN_MASK, PMIC_RG_OTG_BVALID_EN_SHIFT},
    2947. 

  2947. 	{PMIC_RGS_OTG_BVALID_DET, PMIC_RGS_OTG_BVALID_DET_ADDR, PMIC_RGS_OTG_BVALID_DET_MASK, PMIC_RGS_OTG_BVALID_DET_SHIFT},
    2948. 

  2948. 	{PMIC_RG_PCHR_FLAG_SEL, PMIC_RG_PCHR_FLAG_SEL_ADDR, PMIC_RG_PCHR_FLAG_SEL_MASK, PMIC_RG_PCHR_FLAG_SEL_SHIFT},
    2949. 

  2949. 	{PMIC_RG_PCHR_TESTMODE, PMIC_RG_PCHR_TESTMODE_ADDR, PMIC_RG_PCHR_TESTMODE_MASK, PMIC_RG_PCHR_TESTMODE_SHIFT},
    2950. 

  2950. 	{PMIC_RG_CSDAC_TESTMODE, PMIC_RG_CSDAC_TESTMODE_ADDR, PMIC_RG_CSDAC_TESTMODE_MASK, PMIC_RG_CSDAC_TESTMODE_SHIFT},
    2951. 

  2951. 	{PMIC_RG_PCHR_RST, PMIC_RG_PCHR_RST_ADDR, PMIC_RG_PCHR_RST_MASK, PMIC_RG_PCHR_RST_SHIFT},
    2952. 

  2952. 	{PMIC_RG_PCHR_FT_CTRL, PMIC_RG_PCHR_FT_CTRL_ADDR, PMIC_RG_PCHR_FT_CTRL_MASK, PMIC_RG_PCHR_FT_CTRL_SHIFT},
    2953. 

  2953. 	{PMIC_RG_CHRWDT_TD, PMIC_RG_CHRWDT_TD_ADDR, PMIC_RG_CHRWDT_TD_MASK, PMIC_RG_CHRWDT_TD_SHIFT},
    2954. 

  2954. 	{PMIC_RG_CHRWDT_EN, PMIC_RG_CHRWDT_EN_ADDR, PMIC_RG_CHRWDT_EN_MASK, PMIC_RG_CHRWDT_EN_SHIFT},
    2955. 

  2955. 	{PMIC_RG_CHRWDT_WR, PMIC_RG_CHRWDT_WR_ADDR, PMIC_RG_CHRWDT_WR_MASK, PMIC_RG_CHRWDT_WR_SHIFT},
    2956. 

  2956. 	{PMIC_RG_PCHR_RV, PMIC_RG_PCHR_RV_ADDR, PMIC_RG_PCHR_RV_MASK, PMIC_RG_PCHR_RV_SHIFT},
    2957. 

  2957. 	{PMIC_RG_CHRWDT_INT_EN, PMIC_RG_CHRWDT_INT_EN_ADDR, PMIC_RG_CHRWDT_INT_EN_MASK, PMIC_RG_CHRWDT_INT_EN_SHIFT},
    2958. 

  2958. 	{PMIC_RG_CHRWDT_FLAG_WR, PMIC_RG_CHRWDT_FLAG_WR_ADDR, PMIC_RG_CHRWDT_FLAG_WR_MASK, PMIC_RG_CHRWDT_FLAG_WR_SHIFT},
    2959. 

  2959. 	{PMIC_RGS_CHRWDT_OUT, PMIC_RGS_CHRWDT_OUT_ADDR, PMIC_RGS_CHRWDT_OUT_MASK, PMIC_RGS_CHRWDT_OUT_SHIFT},
    2960. 

  2960. 	{PMIC_RG_USBDL_RST, PMIC_RG_USBDL_RST_ADDR, PMIC_RG_USBDL_RST_MASK, PMIC_RG_USBDL_RST_SHIFT},
    2961. 

  2961. 	{PMIC_RG_USBDL_SET, PMIC_RG_USBDL_SET_ADDR, PMIC_RG_USBDL_SET_MASK, PMIC_RG_USBDL_SET_SHIFT},
    2962. 

  2962. 	{PMIC_RG_ADCIN_VSEN_MUX_EN, PMIC_RG_ADCIN_VSEN_MUX_EN_ADDR, PMIC_RG_ADCIN_VSEN_MUX_EN_MASK, PMIC_RG_ADCIN_VSEN_MUX_EN_SHIFT},
    2963. 

  2963. 	{PMIC_RG_ADCIN_VSEN_EXT_BATON_EN, PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_ADDR, PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_MASK, PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_SHIFT},
    2964. 

  2964. 	{PMIC_RG_ADCIN_VBAT_EN, PMIC_RG_ADCIN_VBAT_EN_ADDR, PMIC_RG_ADCIN_VBAT_EN_MASK, PMIC_RG_ADCIN_VBAT_EN_SHIFT},
    2965. 

  2965. 	{PMIC_RG_ADCIN_VSEN_EN, PMIC_RG_ADCIN_VSEN_EN_ADDR, PMIC_RG_ADCIN_VSEN_EN_MASK, PMIC_RG_ADCIN_VSEN_EN_SHIFT},
    2966. 

  2966. 	{PMIC_RG_ADCIN_CHR_EN, PMIC_RG_ADCIN_CHR_EN_ADDR, PMIC_RG_ADCIN_CHR_EN_MASK, PMIC_RG_ADCIN_CHR_EN_SHIFT},
    2967. 

  2967. 	{PMIC_RG_UVLO_VTHL, PMIC_RG_UVLO_VTHL_ADDR, PMIC_RG_UVLO_VTHL_MASK, PMIC_RG_UVLO_VTHL_SHIFT},
    2968. 

  2968. 	{PMIC_RG_UVLO_VH_LAT, PMIC_RG_UVLO_VH_LAT_ADDR, PMIC_RG_UVLO_VH_LAT_MASK, PMIC_RG_UVLO_VH_LAT_SHIFT},
    2969. 

  2969. 	{PMIC_RG_LBAT_INT_VTH, PMIC_RG_LBAT_INT_VTH_ADDR, PMIC_RG_LBAT_INT_VTH_MASK, PMIC_RG_LBAT_INT_VTH_SHIFT},
    2970. 

  2970. 	{PMIC_RG_BGR_RSEL, PMIC_RG_BGR_RSEL_ADDR, PMIC_RG_BGR_RSEL_MASK, PMIC_RG_BGR_RSEL_SHIFT},
    2971. 

  2971. 	{PMIC_RG_BGR_UNCHOP_PH, PMIC_RG_BGR_UNCHOP_PH_ADDR, PMIC_RG_BGR_UNCHOP_PH_MASK, PMIC_RG_BGR_UNCHOP_PH_SHIFT},
    2972. 

  2972. 	{PMIC_RG_BGR_UNCHOP, PMIC_RG_BGR_UNCHOP_ADDR, PMIC_RG_BGR_UNCHOP_MASK, PMIC_RG_BGR_UNCHOP_SHIFT},
    2973. 

  2973. 	{PMIC_RG_BC11_BB_CTRL, PMIC_RG_BC11_BB_CTRL_ADDR, PMIC_RG_BC11_BB_CTRL_MASK, PMIC_RG_BC11_BB_CTRL_SHIFT},
    2974. 

  2974. 	{PMIC_RG_BC11_RST, PMIC_RG_BC11_RST_ADDR, PMIC_RG_BC11_RST_MASK, PMIC_RG_BC11_RST_SHIFT},
    2975. 

  2975. 	{PMIC_RG_BC11_VSRC_EN, PMIC_RG_BC11_VSRC_EN_ADDR, PMIC_RG_BC11_VSRC_EN_MASK, PMIC_RG_BC11_VSRC_EN_SHIFT},
    2976. 

  2976. 	{PMIC_RGS_BC11_CMP_OUT, PMIC_RGS_BC11_CMP_OUT_ADDR, PMIC_RGS_BC11_CMP_OUT_MASK, PMIC_RGS_BC11_CMP_OUT_SHIFT},
    2977. 

  2977. 	{PMIC_RG_BC11_VREF_VTH, PMIC_RG_BC11_VREF_VTH_ADDR, PMIC_RG_BC11_VREF_VTH_MASK, PMIC_RG_BC11_VREF_VTH_SHIFT},
    2978. 

  2978. 	{PMIC_RG_BC11_CMP_EN, PMIC_RG_BC11_CMP_EN_ADDR, PMIC_RG_BC11_CMP_EN_MASK, PMIC_RG_BC11_CMP_EN_SHIFT},
    2979. 

  2979. 	{PMIC_RG_BC11_IPD_EN, PMIC_RG_BC11_IPD_EN_ADDR, PMIC_RG_BC11_IPD_EN_MASK, PMIC_RG_BC11_IPD_EN_SHIFT},
    2980. 

  2980. 	{PMIC_RG_BC11_IPU_EN, PMIC_RG_BC11_IPU_EN_ADDR, PMIC_RG_BC11_IPU_EN_MASK, PMIC_RG_BC11_IPU_EN_SHIFT},
    2981. 

  2981. 	{PMIC_RG_BC11_BIAS_EN, PMIC_RG_BC11_BIAS_EN_ADDR, PMIC_RG_BC11_BIAS_EN_MASK, PMIC_RG_BC11_BIAS_EN_SHIFT},
    2982. 

  2982. 	{PMIC_RG_CSDAC_STP_INC, PMIC_RG_CSDAC_STP_INC_ADDR, PMIC_RG_CSDAC_STP_INC_MASK, PMIC_RG_CSDAC_STP_INC_SHIFT},
    2983. 

  2983. 	{PMIC_RG_CSDAC_STP_DEC, PMIC_RG_CSDAC_STP_DEC_ADDR, PMIC_RG_CSDAC_STP_DEC_MASK, PMIC_RG_CSDAC_STP_DEC_SHIFT},
    2984. 

  2984. 	{PMIC_RG_CSDAC_DLY, PMIC_RG_CSDAC_DLY_ADDR, PMIC_RG_CSDAC_DLY_MASK, PMIC_RG_CSDAC_DLY_SHIFT},
    2985. 

  2985. 	{PMIC_RG_CSDAC_STP, PMIC_RG_CSDAC_STP_ADDR, PMIC_RG_CSDAC_STP_MASK, PMIC_RG_CSDAC_STP_SHIFT},
    2986. 

  2986. 	{PMIC_RG_LOW_ICH_DB, PMIC_RG_LOW_ICH_DB_ADDR, PMIC_RG_LOW_ICH_DB_MASK, PMIC_RG_LOW_ICH_DB_SHIFT},
    2987. 

  2987. 	{PMIC_RG_CHRIND_ON, PMIC_RG_CHRIND_ON_ADDR, PMIC_RG_CHRIND_ON_MASK, PMIC_RG_CHRIND_ON_SHIFT},
    2988. 

  2988. 	{PMIC_RG_CHRIND_DIMMING, PMIC_RG_CHRIND_DIMMING_ADDR, PMIC_RG_CHRIND_DIMMING_MASK, PMIC_RG_CHRIND_DIMMING_SHIFT},
    2989. 

  2989. 	{PMIC_RG_CV_MODE, PMIC_RG_CV_MODE_ADDR, PMIC_RG_CV_MODE_MASK, PMIC_RG_CV_MODE_SHIFT},
    2990. 

  2990. 	{PMIC_RG_VCDT_MODE, PMIC_RG_VCDT_MODE_ADDR, PMIC_RG_VCDT_MODE_MASK, PMIC_RG_VCDT_MODE_SHIFT},
    2991. 

  2991. 	{PMIC_RG_CSDAC_MODE, PMIC_RG_CSDAC_MODE_ADDR, PMIC_RG_CSDAC_MODE_MASK, PMIC_RG_CSDAC_MODE_SHIFT},
    2992. 

  2992. 	{PMIC_RG_TRACKING_EN, PMIC_RG_TRACKING_EN_ADDR, PMIC_RG_TRACKING_EN_MASK, PMIC_RG_TRACKING_EN_SHIFT},
    2993. 

  2993. 	{PMIC_RG_HWCV_EN, PMIC_RG_HWCV_EN_ADDR, PMIC_RG_HWCV_EN_MASK, PMIC_RG_HWCV_EN_SHIFT},
    2994. 

  2994. 	{PMIC_RG_ULC_DET_EN, PMIC_RG_ULC_DET_EN_ADDR, PMIC_RG_ULC_DET_EN_MASK, PMIC_RG_ULC_DET_EN_SHIFT},
    2995. 

  2995. 	{PMIC_RG_BGR_TRIM_EN, PMIC_RG_BGR_TRIM_EN_ADDR, PMIC_RG_BGR_TRIM_EN_MASK, PMIC_RG_BGR_TRIM_EN_SHIFT},
    2996. 

  2996. 	{PMIC_RG_ICHRG_TRIM, PMIC_RG_ICHRG_TRIM_ADDR, PMIC_RG_ICHRG_TRIM_MASK, PMIC_RG_ICHRG_TRIM_SHIFT},
    2997. 

  2997. 	{PMIC_RG_BGR_TRIM, PMIC_RG_BGR_TRIM_ADDR, PMIC_RG_BGR_TRIM_MASK, PMIC_RG_BGR_TRIM_SHIFT},
    2998. 

  2998. 	{PMIC_RG_OVP_TRIM, PMIC_RG_OVP_TRIM_ADDR, PMIC_RG_OVP_TRIM_MASK, PMIC_RG_OVP_TRIM_SHIFT},
    2999. 

  2999. 	{PMIC_RG_CHR_OSC_TRIM, PMIC_RG_CHR_OSC_TRIM_ADDR, PMIC_RG_CHR_OSC_TRIM_MASK, PMIC_RG_CHR_OSC_TRIM_SHIFT},
    3000. 

  3000. 	{PMIC_DA_QI_BGR_EXT_BUF_EN, PMIC_DA_QI_BGR_EXT_BUF_EN_ADDR, PMIC_DA_QI_BGR_EXT_BUF_EN_MASK, PMIC_DA_QI_BGR_EXT_BUF_EN_SHIFT},
    3001. 

  3001. 	{PMIC_RG_BGR_TEST_EN, PMIC_RG_BGR_TEST_EN_ADDR, PMIC_RG_BGR_TEST_EN_MASK, PMIC_RG_BGR_TEST_EN_SHIFT},
    3002. 

  3002. 	{PMIC_RG_BGR_TEST_RSTB, PMIC_RG_BGR_TEST_RSTB_ADDR, PMIC_RG_BGR_TEST_RSTB_MASK, PMIC_RG_BGR_TEST_RSTB_SHIFT},
    3003. 

  3003. 	{PMIC_RG_DAC_USBDL_MAX, PMIC_RG_DAC_USBDL_MAX_ADDR, PMIC_RG_DAC_USBDL_MAX_MASK, PMIC_RG_DAC_USBDL_MAX_SHIFT},
    3004. 

  3004. 	{PMIC_RG_CM_VDEC_TRIG, PMIC_RG_CM_VDEC_TRIG_ADDR, PMIC_RG_CM_VDEC_TRIG_MASK, PMIC_RG_CM_VDEC_TRIG_SHIFT},
    3005. 

  3005. 	{PMIC_PCHR_CM_VDEC_STATUS, PMIC_PCHR_CM_VDEC_STATUS_ADDR, PMIC_PCHR_CM_VDEC_STATUS_MASK, PMIC_PCHR_CM_VDEC_STATUS_SHIFT},
    3006. 

  3006. 	{PMIC_RG_CM_VINC_TRIG, PMIC_RG_CM_VINC_TRIG_ADDR, PMIC_RG_CM_VINC_TRIG_MASK, PMIC_RG_CM_VINC_TRIG_SHIFT},
    3007. 

  3007. 	{PMIC_PCHR_CM_VINC_STATUS, PMIC_PCHR_CM_VINC_STATUS_ADDR, PMIC_PCHR_CM_VINC_STATUS_MASK, PMIC_PCHR_CM_VINC_STATUS_SHIFT},
    3008. 

  3008. 	{PMIC_RG_CM_VDEC_HPRD1, PMIC_RG_CM_VDEC_HPRD1_ADDR, PMIC_RG_CM_VDEC_HPRD1_MASK, PMIC_RG_CM_VDEC_HPRD1_SHIFT},
    3009. 

  3009. 	{PMIC_RG_CM_VDEC_HPRD2, PMIC_RG_CM_VDEC_HPRD2_ADDR, PMIC_RG_CM_VDEC_HPRD2_MASK, PMIC_RG_CM_VDEC_HPRD2_SHIFT},
    3010. 

  3010. 	{PMIC_RG_CM_VDEC_HPRD3, PMIC_RG_CM_VDEC_HPRD3_ADDR, PMIC_RG_CM_VDEC_HPRD3_MASK, PMIC_RG_CM_VDEC_HPRD3_SHIFT},
    3011. 

  3011. 	{PMIC_RG_CM_VDEC_HPRD4, PMIC_RG_CM_VDEC_HPRD4_ADDR, PMIC_RG_CM_VDEC_HPRD4_MASK, PMIC_RG_CM_VDEC_HPRD4_SHIFT},
    3012. 

  3012. 	{PMIC_RG_CM_VDEC_HPRD5, PMIC_RG_CM_VDEC_HPRD5_ADDR, PMIC_RG_CM_VDEC_HPRD5_MASK, PMIC_RG_CM_VDEC_HPRD5_SHIFT},
    3013. 

  3013. 	{PMIC_RG_CM_VDEC_HPRD6, PMIC_RG_CM_VDEC_HPRD6_ADDR, PMIC_RG_CM_VDEC_HPRD6_MASK, PMIC_RG_CM_VDEC_HPRD6_SHIFT},
    3014. 

  3014. 	{PMIC_RG_CM_VINC_HPRD1, PMIC_RG_CM_VINC_HPRD1_ADDR, PMIC_RG_CM_VINC_HPRD1_MASK, PMIC_RG_CM_VINC_HPRD1_SHIFT},
    3015. 

  3015. 	{PMIC_RG_CM_VINC_HPRD2, PMIC_RG_CM_VINC_HPRD2_ADDR, PMIC_RG_CM_VINC_HPRD2_MASK, PMIC_RG_CM_VINC_HPRD2_SHIFT},
    3016. 

  3016. 	{PMIC_RG_CM_VINC_HPRD3, PMIC_RG_CM_VINC_HPRD3_ADDR, PMIC_RG_CM_VINC_HPRD3_MASK, PMIC_RG_CM_VINC_HPRD3_SHIFT},
    3017. 

  3017. 	{PMIC_RG_CM_VINC_HPRD4, PMIC_RG_CM_VINC_HPRD4_ADDR, PMIC_RG_CM_VINC_HPRD4_MASK, PMIC_RG_CM_VINC_HPRD4_SHIFT},
    3018. 

  3018. 	{PMIC_RG_CM_VINC_HPRD5, PMIC_RG_CM_VINC_HPRD5_ADDR, PMIC_RG_CM_VINC_HPRD5_MASK, PMIC_RG_CM_VINC_HPRD5_SHIFT},
    3019. 

  3019. 	{PMIC_RG_CM_VINC_HPRD6, PMIC_RG_CM_VINC_HPRD6_ADDR, PMIC_RG_CM_VINC_HPRD6_MASK, PMIC_RG_CM_VINC_HPRD6_SHIFT},
    3020. 

  3020. 	{PMIC_RG_CM_LPRD, PMIC_RG_CM_LPRD_ADDR, PMIC_RG_CM_LPRD_MASK, PMIC_RG_CM_LPRD_SHIFT},
    3021. 

  3021. 	{PMIC_RG_CM_CS_VTHL, PMIC_RG_CM_CS_VTHL_ADDR, PMIC_RG_CM_CS_VTHL_MASK, PMIC_RG_CM_CS_VTHL_SHIFT},
    3022. 

  3022. 	{PMIC_RG_CM_CS_VTHH, PMIC_RG_CM_CS_VTHH_ADDR, PMIC_RG_CM_CS_VTHH_MASK, PMIC_RG_CM_CS_VTHH_SHIFT},
    3023. 

  3023. 	{PMIC_RG_PCHR_RSV, PMIC_RG_PCHR_RSV_ADDR, PMIC_RG_PCHR_RSV_MASK, PMIC_RG_PCHR_RSV_SHIFT},
    3024. 

  3024. 	{PMIC_RG_ENVTEM_D, PMIC_RG_ENVTEM_D_ADDR, PMIC_RG_ENVTEM_D_MASK, PMIC_RG_ENVTEM_D_SHIFT},
    3025. 

  3025. 	{PMIC_RG_ENVTEM_EN, PMIC_RG_ENVTEM_EN_ADDR, PMIC_RG_ENVTEM_EN_MASK, PMIC_RG_ENVTEM_EN_SHIFT},
    3026. 

  3026. 	{PMIC_RGS_BATON_HV, PMIC_RGS_BATON_HV_ADDR, PMIC_RGS_BATON_HV_MASK, PMIC_RGS_BATON_HV_SHIFT},
    3027. 

  3027. 	{PMIC_RG_HW_VTH_CTRL, PMIC_RG_HW_VTH_CTRL_ADDR, PMIC_RG_HW_VTH_CTRL_MASK, PMIC_RG_HW_VTH_CTRL_SHIFT},
    3028. 

  3028. 	{PMIC_RG_HW_VTH2, PMIC_RG_HW_VTH2_ADDR, PMIC_RG_HW_VTH2_MASK, PMIC_RG_HW_VTH2_SHIFT},
    3029. 

  3029. 	{PMIC_RG_HW_VTH1, PMIC_RG_HW_VTH1_ADDR, PMIC_RG_HW_VTH1_MASK, PMIC_RG_HW_VTH1_SHIFT},
    3030. 

  3030. 	{PMIC_RG_CM_VDEC_INT_EN, PMIC_RG_CM_VDEC_INT_EN_ADDR, PMIC_RG_CM_VDEC_INT_EN_MASK, PMIC_RG_CM_VDEC_INT_EN_SHIFT},
    3031. 

  3031. 	{PMIC_RG_CM_VINC_INT_EN, PMIC_RG_CM_VINC_INT_EN_ADDR, PMIC_RG_CM_VINC_INT_EN_MASK, PMIC_RG_CM_VINC_INT_EN_SHIFT},
    3032. 

  3032. 	{PMIC_RG_QI_BATON_LT_EN, PMIC_RG_QI_BATON_LT_EN_ADDR, PMIC_RG_QI_BATON_LT_EN_MASK, PMIC_RG_QI_BATON_LT_EN_SHIFT},
    3033. 

  3033. 	{PMIC_RGS_BATON_UNDET, PMIC_RGS_BATON_UNDET_ADDR, PMIC_RGS_BATON_UNDET_MASK, PMIC_RGS_BATON_UNDET_SHIFT},
    3034. 

  3034. 	{PMIC_RG_VCDT_TRIM, PMIC_RG_VCDT_TRIM_ADDR, PMIC_RG_VCDT_TRIM_MASK, PMIC_RG_VCDT_TRIM_SHIFT},
    3035. 

  3035. 	{PMIC_RG_INDICATOR_TRIM, PMIC_RG_INDICATOR_TRIM_ADDR, PMIC_RG_INDICATOR_TRIM_MASK, PMIC_RG_INDICATOR_TRIM_SHIFT},
    3036. 

  3036. 	{PMIC_EOSC_CALI_START, PMIC_EOSC_CALI_START_ADDR, PMIC_EOSC_CALI_START_MASK, PMIC_EOSC_CALI_START_SHIFT},
    3037. 

  3037. 	{PMIC_EOSC_CALI_TD, PMIC_EOSC_CALI_TD_ADDR, PMIC_EOSC_CALI_TD_MASK, PMIC_EOSC_CALI_TD_SHIFT},
    3038. 

  3038. 	{PMIC_EOSC_CALI_TEST, PMIC_EOSC_CALI_TEST_ADDR, PMIC_EOSC_CALI_TEST_MASK, PMIC_EOSC_CALI_TEST_SHIFT},
    3039. 

  3039. 	{PMIC_EOSC_CALI_DCXO_RDY_TD, PMIC_EOSC_CALI_DCXO_RDY_TD_ADDR, PMIC_EOSC_CALI_DCXO_RDY_TD_MASK, PMIC_EOSC_CALI_DCXO_RDY_TD_SHIFT},
    3040. 

  3040. 	{PMIC_FRC_VTCXO0_ON, PMIC_FRC_VTCXO0_ON_ADDR, PMIC_FRC_VTCXO0_ON_MASK, PMIC_FRC_VTCXO0_ON_SHIFT},
    3041. 

  3041. 	{PMIC_EOSC_CALI_RSV, PMIC_EOSC_CALI_RSV_ADDR, PMIC_EOSC_CALI_RSV_MASK, PMIC_EOSC_CALI_RSV_SHIFT},
    3042. 

  3042. 	{PMIC_VRTC_PWM_MODE, PMIC_VRTC_PWM_MODE_ADDR, PMIC_VRTC_PWM_MODE_MASK, PMIC_VRTC_PWM_MODE_SHIFT},
    3043. 

  3043. 	{PMIC_VRTC_PWM_RSV, PMIC_VRTC_PWM_RSV_ADDR, PMIC_VRTC_PWM_RSV_MASK, PMIC_VRTC_PWM_RSV_SHIFT},
    3044. 

  3044. 	{PMIC_VRTC_PWM_L_DUTY, PMIC_VRTC_PWM_L_DUTY_ADDR, PMIC_VRTC_PWM_L_DUTY_MASK, PMIC_VRTC_PWM_L_DUTY_SHIFT},
    3045. 

  3045. 	{PMIC_VRTC_PWM_H_DUTY, PMIC_VRTC_PWM_H_DUTY_ADDR, PMIC_VRTC_PWM_H_DUTY_MASK, PMIC_VRTC_PWM_H_DUTY_SHIFT},
    3046. 

  3046. 	{PMIC_VRTC_CAP_SEL, PMIC_VRTC_CAP_SEL_ADDR, PMIC_VRTC_CAP_SEL_MASK, PMIC_VRTC_CAP_SEL_SHIFT},
    3047. 

  3047. };
    3048. 

  3048. 

  3049. 

  3050. unsigned short mt6353_set_register_value(PMU_FLAGS_LIST_ENUM flagname, unsigned int val)
    3051. 

  3051. {
    3052. 

  3052. 	const PMU_FLAG_TABLE_ENTRY *pFlag = &pmu_flags_table[flagname];
    3053. 

  3053. 	unsigned int ret = 0;
    3054. 

  3054. 

  3055. 

  3056. 	if (pFlag->flagname!=flagname) {
    3057. 

  3057. 		dprintf(CRITICAL,"[pmu_set_register_value]pmic flag idx error\n");
    3058. 

  3058. 		return 1;
    3059. 

  3059. 	}
    3060. 

  3060. 

  3061. 

  3062. 	ret = pmic_config_interface((pFlag->offset),
    3063. 

  3063. 				    (unsigned int) (val),
    3064. 

  3064. 				    (unsigned int) (pFlag->mask), (unsigned int) (pFlag->shift)
    3065. 

  3065. 	    );
    3066. 

  3066. 

  3067. 	return 0;
    3068. 

  3068. }
    3069. 

  3069. 

  3070. 

  3071. unsigned short mt6353_get_register_value(PMU_FLAGS_LIST_ENUM flagname)
    3072. 

  3072. {
    3073. 

  3073. 	const PMU_FLAG_TABLE_ENTRY *pFlag = &pmu_flags_table[flagname];
    3074. 

  3074. 	unsigned int val = 0;
    3075. 

  3075. 	unsigned int ret = 0;
    3076. 

  3076. 

  3077. 	ret =
    3078. 

  3078. 	    pmic_read_interface((unsigned int) pFlag->offset, &val, (unsigned int) (pFlag->mask),
    3079. 

  3079. 				(unsigned int) (pFlag->shift));
    3080. 

  3080. 

  3081. 	return val;
    3082. 

  3082. }
    3083. 

  3083. 

  3084. 

  3085. unsigned short pmic_set_register_value(PMU_FLAGS_LIST_ENUM flagname, unsigned int val)
    3086. 

  3086. {
    3087. 

  3087. 	return mt6353_set_register_value(flagname, val);
    3088. 

  3088. }
    3089. 

  3089. 

  3090. 

  3091. unsigned short pmic_get_register_value(PMU_FLAGS_LIST_ENUM flagname)
    3092. 

  3092. {
    3093. 

  3093. 	return mt6353_get_register_value(flagname);
    3094. 

  3094. }
    3095. 

  3095. 

  3096. 

  3097. 

  3098. unsigned short bc11_set_register_value(PMU_FLAGS_LIST_ENUM flagname, unsigned int val)
    3099. 

  3099. {
    3100. 

  3100. 	return mt6353_set_register_value(flagname, val);
    3101. 

  3101. }
    3102. 

  3102. 

  3103. 

  3104. unsigned short bc11_get_register_value(PMU_FLAGS_LIST_ENUM flagname)
    3105. 

  3105. {
    3106. 

  3106. 	return mt6353_get_register_value(flagname);
    3107. 

  3107. }
    3108. 

  3108. 

  3109. 

  3110. 

  3111. 

  3112. 

  3113. 

  3114. 

  3115. 

  3116.