mt_gpio_init.c 11 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <platform/mt_gpio.h>
  32. #if !defined(MACH_FPGA)
  33. #include <cust_power.h>
  34. #include <cust_gpio_boot.h>
  35. #endif
  36. #include <platform/mt_reg_base.h>
  37. #include <debug.h>
  38. #define GPIO_INIT_DEBUG 1
  39. /*----------------------------------------------------------------------------*/
  40. #define GPIOTAG "[GPIO] "
  41. #define GPIODBG(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  42. #define GPIOERR(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  43. #define GPIOVER(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  44. #define GPIO_WR32(addr, data) DRV_WriteReg32(addr,data)
  45. #define GPIO_RD32(addr) DRV_Reg32(addr)
  46. #define ADDR_BIT 0
  47. #define VAL_BIT 1
  48. #define MASK_BIT 2
  49. /*----------------------------------------------------------------------------*/
  50. #if defined(MACH_FPGA)
  51. void mt_gpio_set_default(void)
  52. {
  53. return;
  54. }
  55. #else
  56. #include <platform/gpio_init.h>
  57. #if defined(GPIO_INIT_DEBUG)
  58. //static GPIO_REGS saved;
  59. #endif
  60. void mt_gpio_set_default_chip(void)
  61. {
  62. #ifdef CD1_STYLE_FEATURE_PHONE_K2_RAINIER
  63. u32 idx;
  64. u32 val;
  65. u32 mask;
  66. for (idx = 0; idx < sizeof(gpio_init_value)/((sizeof(UINT32))*(MASK_BIT+1)); idx++) {
  67. mask = gpio_init_value[idx][MASK_BIT];
  68. val = GPIO_RD32(gpio_init_value[idx][ADDR_BIT]);
  69. val &= ~(mask);
  70. val |= ((gpio_init_value[idx][VAL_BIT])&mask);
  71. GPIO_WR32(gpio_init_value[idx][ADDR_BIT],val);
  72. }
  73. #else
  74. unsigned pin = 0;
  75. for (pin = 0; pin < MT_GPIO_BASE_MAX; pin++) {
  76. /* set GPIOx_MODE*/
  77. mt_set_gpio_mode(0x80000000+pin ,gpio_array[pin].mode);
  78. /* set GPIOx_DIR*/
  79. mt_set_gpio_dir(0x80000000+pin ,gpio_array[pin].dir);
  80. //GPIOVER("fwq2..........\n");
  81. /* set GPIOx_PULLEN*/
  82. mt_set_gpio_pull_enable(0x80000000+pin ,gpio_array[pin].pullen);
  83. //GPIOVER("fwq3..........\n");
  84. /* set GPIOx_PULL*/
  85. mt_set_gpio_pull_select(0x80000000+pin ,gpio_array[pin].pull);
  86. /* set GPIOx_DATAOUT*/
  87. mt_set_gpio_out(0x80000000+pin ,gpio_array[pin].dataout);
  88. //GPIOVER("fwq5..........\n");
  89. /* set GPIO0_SMT */
  90. mt_set_gpio_smt(0x80000000+pin ,gpio_array[pin].smt);
  91. //GPIOVER("smt1-init %d\n",pin);
  92. }
  93. #endif
  94. }
  95. void mt_gpio_set_driving(void)
  96. {
  97. #if 0
  98. u32 val;
  99. u32 mask;
  100. /* [MT6571] for MD BSI request */
  101. mask = 0x3000;
  102. val = GPIO_RD32(IO_CFG_T_BASE+0xF0);
  103. val &= ~(mask);
  104. val |= (0x0000 & mask);
  105. GPIO_WR32(IO_CFG_T_BASE+0xF0, val);
  106. /* [MT6571] end */
  107. /* [MT6571] for desense request (AUD IO) */
  108. mask = 0x30;
  109. val = GPIO_RD32(IO_CFG_L_BASE+0xA0);
  110. val &= ~(mask);
  111. val |= (0x00 & mask);
  112. GPIO_WR32(IO_CFG_L_BASE+0xA0, val);
  113. /* [MT6571] end */
  114. #endif
  115. }
  116. void mt_gpio_set_power(u8 mc1_power,u8 mc2_power, u8 sim1_power, u8 sim2_power)
  117. {
  118. #if CD1_STYLE_FEATURE_PHONE_K2_RAINIER
  119. u32 val;
  120. val = GPIO_RD32(GPIO_BASE+0x510);
  121. if (((val & 0x100)>>8) == 1) {
  122. GPIO_WR32(IO_CFG_L_BASE+0x48, 0x8000);
  123. }
  124. if (((val & 0x200)>>9) == 1) {
  125. GPIO_WR32(IO_CFG_L_BASE+0x48, 0x10000);
  126. }
  127. #else
  128. u32 reg=0;
  129. #if LIGHT_HSIEH
  130. //MC1
  131. if (mc1_power == GPIO_VIO28) {
  132. reg = GPIO_RD32(GPIO_BASE+0x0c28);
  133. reg |= 0xc30c000;
  134. GPIO_WR32(GPIO_BASE+0x0c28, reg);
  135. } else {
  136. reg = GPIO_RD32(GPIO_BASE+0x0c28);
  137. reg &= ~(0x3ffff<<12);
  138. GPIO_WR32(GPIO_BASE+0x0c28, reg);
  139. }
  140. //MC2
  141. if (mc2_power == GPIO_VIO28) {
  142. reg = GPIO_RD32(GPIO_BASE+0x0828);
  143. reg |= 0xc30c0;
  144. GPIO_WR32(GPIO_BASE+0x0828, reg);
  145. } else {
  146. reg = GPIO_RD32(GPIO_BASE+0x0828);
  147. reg &= ~(0x3ffff<<4);
  148. GPIO_WR32(GPIO_BASE+0x0828, reg);
  149. }
  150. #endif
  151. //sim1
  152. if (sim1_power == GPIO_VIO28) {
  153. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  154. //reg |= (0x6000);
  155. GPIO_WR32(IOCFG_0_BASE+0x0c28, reg);
  156. } else {
  157. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  158. reg &= ~(0x3f<<12);
  159. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  160. }
  161. //sim2
  162. if (sim2_power == GPIO_VIO28) {
  163. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  164. //reg |= 0x0c;
  165. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  166. } else {
  167. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  168. reg &= ~(0x3f<<6);
  169. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  170. }
  171. #endif
  172. }
  173. void mt_gpio_set_avoid_leakage(void)
  174. {
  175. #if 0
  176. #ifdef MTK_EMMC_SUPPORT
  177. GPIO_WR32(IO_CFG_B_BASE+0x58, 0x220000);
  178. #endif
  179. #endif
  180. }
  181. void mt_gpio_set_default(void)
  182. {
  183. //mt_gpio_set_avoid_leakage();
  184. mt_gpio_set_default_chip();
  185. //mt_gpio_set_driving();
  186. //mt_gpio_set_power();
  187. mutex_init(&gpio_mutex);
  188. return;
  189. }
  190. /*----------------------------------------------------------------------------*/
  191. //EXPORT_SYMBOL(mt_gpio_set_default);
  192. /*----------------------------------------------------------------------------*/
  193. #if CHECK_POINT_TEST
  194. void mt_gpio_checkpoint_save(void)
  195. {
  196. #if defined(GPIO_INIT_DEBUG)
  197. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  198. GPIO_REGS *cur = &saved;
  199. int idx;
  200. memset(cur, 0x00, sizeof(*cur));
  201. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++)
  202. cur->dir[idx].val = GPIO_RD32(&pReg->dir[idx]);
  203. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++)
  204. cur->pullen[idx].val = GPIO_RD32(&pReg->pullen[idx]);
  205. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++)
  206. cur->pullsel[idx].val =GPIO_RD32(&pReg->pullsel[idx]);
  207. /* for (idx = 0; idx < sizeof(pReg->dinv)/sizeof(pReg->dinv[0]); idx++)
  208. cur->dinv[idx].val =GPIO_RD32(&pReg->dinv[idx]);*/
  209. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++)
  210. cur->dout[idx].val = GPIO_RD32(&pReg->dout[idx]);
  211. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++)
  212. cur->mode[idx].val = GPIO_RD32(&pReg->mode[idx]);
  213. #endif
  214. }
  215. /*----------------------------------------------------------------------------*/
  216. EXPORT_SYMBOL(mt_gpio_checkpoint_save);
  217. /*----------------------------------------------------------------------------*/
  218. void mt_gpio_dump_diff(GPIO_REGS* pre, GPIO_REGS* cur)
  219. {
  220. #if defined(GPIO_INIT_DEBUG)
  221. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  222. int idx;
  223. unsigned char* p = (unsigned char*)pre;
  224. unsigned char* q = (unsigned char*)cur;
  225. GPIOVER("------ dumping difference between %p and %p ------\n", pre, cur);
  226. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++) {
  227. if (pre->dir[idx].val != cur->dir[idx].val)
  228. GPIOVER("diff: dir[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->dir[idx].val, cur->dir[idx].val);
  229. }
  230. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++) {
  231. if (pre->pullen[idx].val != cur->pullen[idx].val)
  232. GPIOVER("diff: pullen[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->pullen[idx].val, cur->pullen[idx].val);
  233. }
  234. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++) {
  235. if (pre->pullsel[idx].val != cur->pullsel[idx].val)
  236. GPIOVER("diff: pullsel[%2d]: 0x%08X <=> 0x%08X\n", idx, pre->pullsel[idx].val, cur->pullsel[idx].val);
  237. }
  238. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++) {
  239. if (pre->dout[idx].val != cur->dout[idx].val)
  240. GPIOVER("diff: dout[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->dout[idx].val, cur->dout[idx].val);
  241. }
  242. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++) {
  243. if (pre->mode[idx].val != cur->mode[idx].val)
  244. GPIOVER("diff: mode[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->mode[idx].val, cur->mode[idx].val);
  245. }
  246. for (idx = 0; idx < sizeof(*pre); idx++) {
  247. if (p[idx] != q[idx])
  248. GPIOVER("diff: raw[%2d]: 0x%02X <=> 0x%02X\n", idx, p[idx], q[idx]);
  249. }
  250. GPIOVER("memcmp(%p, %p, %d) = %d\n", p, q, sizeof(*pre), memcmp(p, q, sizeof(*pre)));
  251. GPIOVER("------ dumping difference end --------------------------------\n");
  252. #endif
  253. }
  254. /*----------------------------------------------------------------------------*/
  255. void mt_gpio_checkpoint_compare(void)
  256. {
  257. #if defined(GPIO_INIT_DEBUG)
  258. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  259. GPIO_REGS latest;
  260. GPIO_REGS *cur = &latest;
  261. int idx;
  262. memset(cur, 0x00, sizeof(*cur));
  263. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++)
  264. cur->dir[idx].val = GPIO_RD32(&pReg->dir[idx]);
  265. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++)
  266. cur->pullen[idx].val = GPIO_RD32(&pReg->pullen[idx]);
  267. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++)
  268. cur->pullsel[idx].val =GPIO_RD32(&pReg->pullsel[idx]);
  269. /* for (idx = 0; idx < sizeof(pReg->dinv)/sizeof(pReg->dinv[0]); idx++)
  270. cur->dinv[idx].val =GPIO_RD32(&pReg->dinv[idx]);*/
  271. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++)
  272. cur->dout[idx].val = GPIO_RD32(&pReg->dout[idx]);
  273. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++)
  274. cur->mode[idx].val = GPIO_RD32(&pReg->mode[idx]);
  275. //mt_gpio_dump_diff(&latest, &saved);
  276. //GPIODBG("memcmp(%p, %p, %d) = %d\n", &latest, &saved, sizeof(GPIO_REGS), memcmp(&latest, &saved, sizeof(GPIO_REGS)));
  277. if (memcmp(&latest, &saved, sizeof(GPIO_REGS))) {
  278. GPIODBG("checkpoint compare fail!!\n");
  279. GPIODBG("dump checkpoint....\n");
  280. //mt_gpio_dump(&saved);
  281. GPIODBG("\n\n");
  282. GPIODBG("dump current state\n");
  283. //mt_gpio_dump(&latest);
  284. GPIODBG("\n\n");
  285. mt_gpio_dump_diff(&saved, &latest);
  286. //WARN_ON(1);
  287. } else {
  288. GPIODBG("checkpoint compare success!!\n");
  289. }
  290. #endif
  291. }
  292. /*----------------------------------------------------------------------------*/
  293. EXPORT_SYMBOL(mt_gpio_checkpoint_compare);
  294. /*----------------------------------------------------------------------------*/
  295. #endif
  296. #endif