mtk-lk/platform/mt6761/sec_efuse.c

/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
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*/
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*
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* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
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*/
#include <platform/mt_pmic.h>
#include <platform/mtk_wdt.h>
#include <platform/mt_gpt.h>

#define EFUSE_PMIC_CONTROL_ENABLE   1

/**************************************************************
 * WDT
 **************************************************************/
void efuse_wdt_restart(void)
{
    mtk_wdt_restart();
}

/****************************************************
 * Fsource
 * return 0 : success
 ****************************************************/
U32 efuse_fsource_set(void)
{
    U32 ret_val = 0;

#if EFUSE_PMIC_CONTROL_ENABLE

    /* 1.8V */
    ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_VEFUSE_VOSEL_ADDR),
            (kal_uint32)(0x4),
            (kal_uint32)(PMIC_RG_VEFUSE_VOSEL_MASK),
            (kal_uint32)(PMIC_RG_VEFUSE_VOSEL_SHIFT)
            );

    /* +0mV */
    ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_VEFUSE_VOCAL_ADDR),
            (kal_uint32)(0x0),
            (kal_uint32)(PMIC_RG_VEFUSE_VOCAL_MASK),
            (kal_uint32)(PMIC_RG_VEFUSE_VOCAL_SHIFT)
            );

    /* Fsource(VEFUSE or VEFUSE) enabled */
    ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
            (kal_uint32)(1),
            (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
            (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT));

    mdelay(10);

#endif

    return ret_val;
}

U32 efuse_fsource_close(void)
{
    U32 ret_val = 0;

#if EFUSE_PMIC_CONTROL_ENABLE

    /* Fsource(VEFUSE or VEFUSE) disabled */
    ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
            (kal_uint32)(0),
            (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
            (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT));

    mdelay(10);

#endif

    return ret_val;
}

U32 efuse_fsource_is_enabled(void)
{
    U32 regVal = 0;

#if EFUSE_PMIC_CONTROL_ENABLE

    /*  Check Fsource(VEFUSE) Status */
    pmic_read_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
            &regVal,
            (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
            (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
            );

    /* return 1 : fsource enabled
     * return 0 : fsource disabled */

#endif

    return regVal;
}