bq25890.c 32 KB

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  1. #include <platform/mt_typedefs.h>
  2. #include <platform/mt_reg_base.h>
  3. #include <platform/mt_i2c.h>
  4. #include <platform/mt_pmic.h>
  5. #include <platform/bq25890.h>
  6. #include <printf.h>
  7. #include <platform/mt_pumpexpress.h>
  8. #if !defined(CONFIG_POWER_EXT)
  9. #include <platform/upmu_common.h>
  10. #endif
  11. int g_log_en=0;
  12. /**********************************************************
  13. *
  14. * [I2C Slave Setting]
  15. *
  16. *********************************************************/
  17. #define BQ25890_SLAVE_ADDR_WRITE 0xD6
  18. #define BQ25890_SLAVE_ADDR_READ 0xD7
  19. #define PRECC_BATVOL 2800 //preCC 2.8V
  20. /**********************************************************
  21. *
  22. * [Global Variable]
  23. *
  24. *********************************************************/
  25. kal_uint8 bq25890_reg[bq25890_REG_NUM] = {0};
  26. int g_bq25890_hw_exist=0;
  27. /**********************************************************
  28. *
  29. * [I2C Function For Read/Write bq25890]
  30. *
  31. *********************************************************/
  32. #define BQ25890_I2C_ID I2C1
  33. static struct mt_i2c_t bq25890_i2c;
  34. kal_uint32 bq25890_write_byte(kal_uint8 cmd, kal_uint8 writeData)
  35. {
  36. kal_uint32 ret_code = I2C_OK;
  37. kal_uint8 write_data[2];
  38. kal_uint16 len;
  39. write_data[0]= cmd;
  40. write_data[1] = writeData;
  41. bq25890_i2c.id = BQ25890_I2C_ID;
  42. /* Since i2c will left shift 1 bit, we need to set I2C address to >>1 */
  43. bq25890_i2c.addr = (BQ25890_SLAVE_ADDR_WRITE >> 1);
  44. bq25890_i2c.mode = ST_MODE;
  45. bq25890_i2c.speed = 100;
  46. len = 2;
  47. ret_code = i2c_write(&bq25890_i2c, write_data, len);
  48. if (I2C_OK != ret_code)
  49. dprintf(INFO, "%s: i2c_write: ret_code: %d\n", __func__, ret_code);
  50. return ret_code;
  51. }
  52. kal_uint32 bq25890_read_byte(kal_uint8 cmd, kal_uint8 *returnData)
  53. {
  54. kal_uint32 ret_code = I2C_OK;
  55. kal_uint16 len;
  56. *returnData = cmd;
  57. bq25890_i2c.id = BQ25890_I2C_ID;
  58. /* Since i2c will left shift 1 bit, we need to set I2C address to >>1 */
  59. bq25890_i2c.addr = (BQ25890_SLAVE_ADDR_READ >> 1);
  60. bq25890_i2c.mode = ST_MODE;
  61. bq25890_i2c.speed = 100;
  62. len = 1;
  63. ret_code = i2c_write_read(&bq25890_i2c, returnData, len, len);
  64. if (I2C_OK != ret_code)
  65. dprintf(INFO, "%s: i2c_read: ret_code: %d\n", __func__, ret_code);
  66. return ret_code;
  67. }
  68. /**********************************************************
  69. *
  70. * [Read / Write Function]
  71. *
  72. *********************************************************/
  73. kal_uint32 bq25890_read_interface (kal_uint8 RegNum, kal_uint8 *val, kal_uint8 MASK, kal_uint8 SHIFT)
  74. {
  75. kal_uint8 bq25890_reg = 0;
  76. kal_uint32 ret = 0;
  77. dprintf(INFO, "--------------------------------------------------LK\n");
  78. ret = bq25890_read_byte(RegNum, &bq25890_reg);
  79. dprintf(INFO, "[bq25890_read_interface] Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  80. bq25890_reg &= (MASK << SHIFT);
  81. *val = (bq25890_reg >> SHIFT);
  82. dprintf(INFO, "[bq25890_read_interface] val=0x%x\n", *val);
  83. return ret;
  84. }
  85. kal_uint32 bq25890_config_interface (kal_uint8 RegNum, kal_uint8 val, kal_uint8 MASK, kal_uint8 SHIFT)
  86. {
  87. kal_uint8 bq25890_reg = 0;
  88. kal_uint32 ret = 0;
  89. dprintf(INFO, "--------------------------------------------------\n");
  90. ret = bq25890_read_byte(RegNum, &bq25890_reg);
  91. dprintf(INFO, "[bq25890_config_interface] Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  92. bq25890_reg &= ~(MASK << SHIFT);
  93. bq25890_reg |= (val << SHIFT);
  94. if (RegNum == bq25890_CON1 && val == 1 && MASK ==CON1_RESET_MASK && SHIFT == CON1_RESET_SHIFT) {
  95. // RESET bit
  96. } else if (RegNum == bq25890_CON1) {
  97. bq25890_reg &= ~0x80; //RESET bit read returs 1, so clear it
  98. }
  99. ret = bq25890_write_byte(RegNum, bq25890_reg);
  100. dprintf(INFO, "[bq25890_config_interface] write Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  101. // Check
  102. //bq25890_read_byte(RegNum, &bq25890_reg);
  103. //printk("[bq25890_config_interface] Check Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  104. return ret;
  105. }
  106. //write one register directly
  107. kal_uint32 bq25890_reg_config_interface (kal_uint8 RegNum, kal_uint8 val)
  108. {
  109. kal_uint32 ret = 0;
  110. ret = bq25890_write_byte(RegNum, val);
  111. return ret;
  112. }
  113. /**********************************************************
  114. *
  115. * [Internal Function]
  116. *
  117. *********************************************************/
  118. //CON0----------------------------------------------------
  119. void bq25890_set_en_hiz(kal_uint32 val)
  120. {
  121. kal_uint32 ret=0;
  122. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON0),
  123. (kal_uint8)(val),
  124. (kal_uint8)(CON0_EN_HIZ_MASK),
  125. (kal_uint8)(CON0_EN_HIZ_SHIFT)
  126. );
  127. }
  128. void bq25890_set_en_ilim(kal_uint32 val)
  129. {
  130. kal_uint32 ret=0;
  131. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON0),
  132. (kal_uint8)(val),
  133. (kal_uint8)(CON0_EN_ILIM_MASK),
  134. (kal_uint8)(CON0_EN_ILIM_SHIFT)
  135. );
  136. }
  137. void bq25890_set_iinlim(kal_uint32 val)
  138. {
  139. kal_uint32 ret=0;
  140. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON0),
  141. (val),
  142. (kal_uint8)(CON0_IINLIM_MASK),
  143. (kal_uint8)(CON0_IINLIM_SHIFT)
  144. );
  145. }
  146. //CON1----------------------------------------------------
  147. void bq25890_ADC_start(kal_uint32 val)
  148. {
  149. kal_uint32 ret=0;
  150. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON2),
  151. (kal_uint8)(val),
  152. (kal_uint8)(CON2_CONV_START_MASK),
  153. (kal_uint8)(CON2_CONV_START_SHIFT)
  154. );
  155. }
  156. void bq25890_set_ADC_rate(kal_uint32 val)
  157. {
  158. kal_uint32 ret=0;
  159. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON2),
  160. (kal_uint8)(val),
  161. (kal_uint8)(CON2_CONV_RATE_MASK),
  162. (kal_uint8)(CON2_CONV_RATE_SHIFT)
  163. );
  164. }
  165. void bq25890_set_vindpm_os(kal_uint32 val)
  166. {
  167. kal_uint32 ret=0;
  168. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON1),
  169. (kal_uint8)(val),
  170. (kal_uint8)(CON1_VINDPM_OS_MASK),
  171. (kal_uint8)(CON1_VINDPM_OS_SHIFT)
  172. );
  173. }
  174. //CON2----------------------------------------------------
  175. void bq25890_set_ico_en_start(kal_uint32 val)
  176. {
  177. kal_uint32 ret=0;
  178. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON2),
  179. (kal_uint8)(val),
  180. (kal_uint8)(CON2_ICO_EN_MASK),
  181. (kal_uint8)(CON2_ICO_EN_RATE_SHIFT)
  182. );
  183. }
  184. //CON3----------------------------------------------------
  185. void bq25890_wd_reset(kal_uint32 val)
  186. {
  187. kal_uint32 ret=0;
  188. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  189. (val),
  190. (kal_uint8)(CON3_WD_MASK),
  191. (kal_uint8)(CON3_WD_SHIFT)
  192. );
  193. }
  194. void bq25890_otg_en(kal_uint32 val)
  195. {
  196. kal_uint32 ret=0;
  197. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  198. (val),
  199. (kal_uint8)(CON3_OTG_CONFIG_MASK),
  200. (kal_uint8)(CON3_OTG_CONFIG_SHIFT)
  201. );
  202. }
  203. void bq25890_chg_en(kal_uint32 val)
  204. {
  205. kal_uint32 ret=0;
  206. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  207. (val),
  208. (kal_uint8)(CON3_CHG_CONFIG_MASK),
  209. (kal_uint8)(CON3_CHG_CONFIG_SHIFT)
  210. );
  211. }
  212. void bq25890_set_sys_min(kal_uint32 val)
  213. {
  214. kal_uint32 ret=0;
  215. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  216. (val),
  217. (kal_uint8)(CON3_SYS_V_LIMIT_MASK),
  218. (kal_uint8)(CON3_SYS_V_LIMIT_SHIFT)
  219. );
  220. }
  221. //CON4----------------------------------------------------
  222. void bq25890_en_pumpx(kal_uint32 val)
  223. {
  224. kal_uint32 ret=0;
  225. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON4),
  226. (kal_uint8)(val),
  227. (kal_uint8)(CON4_EN_PUMPX_MASK),
  228. (kal_uint8)(CON4_EN_PUMPX_SHIFT)
  229. );
  230. }
  231. void bq25890_set_ichg(kal_uint32 val)
  232. {
  233. kal_uint32 ret=0;
  234. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON4),
  235. (kal_uint8)(val),
  236. (kal_uint8)(CON4_ICHG_MASK),
  237. (kal_uint8)(CON4_ICHG_SHIFT)
  238. );
  239. }
  240. //CON5----------------------------------------------------
  241. void bq25890_set_iprechg(kal_uint32 val)
  242. {
  243. kal_uint32 ret=0;
  244. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON5),
  245. (val),
  246. (kal_uint8)(CON5_IPRECHG_MASK),
  247. (kal_uint8)(CON5_IPRECHG_SHIFT)
  248. );
  249. }
  250. void bq25890_set_iterml(kal_uint32 val)
  251. {
  252. kal_uint32 ret=0;
  253. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON5),
  254. (val),
  255. (kal_uint8)(CON5_ITERM_MASK),
  256. (kal_uint8)(CON5_ITERM_SHIFT)
  257. );
  258. }
  259. //CON6----------------------------------------------------
  260. void bq25890_set_vreg(kal_uint32 val)
  261. {
  262. kal_uint32 ret=0;
  263. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON6),
  264. (kal_uint8)(val),
  265. (kal_uint8)(CON6_2XTMR_EN_MASK),
  266. (kal_uint8)(CON6_2XTMR_EN_SHIFT)
  267. );
  268. }
  269. void bq25890_set_batlowv(kal_uint32 val)
  270. {
  271. kal_uint32 ret=0;
  272. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON6),
  273. (kal_uint8)(val),
  274. (kal_uint8)(CON6_BATLOWV_MASK),
  275. (kal_uint8)(CON6_BATLOWV_SHIFT)
  276. );
  277. }
  278. void bq25890_set_vrechg(kal_uint32 val)
  279. {
  280. kal_uint32 ret=0;
  281. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON6),
  282. (kal_uint8)(val),
  283. (kal_uint8)(CON6_VRECHG_MASK),
  284. (kal_uint8)(CON6_VRECHG_SHIFT)
  285. );
  286. }
  287. //CON7----------------------------------------------------
  288. void bq25890_en_term_chg(kal_uint32 val)
  289. {
  290. kal_uint32 ret=0;
  291. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  292. (kal_uint8)(val),
  293. (kal_uint8)(CON7_EN_TERM_CHG_MASK),
  294. (kal_uint8)(CON7_EN_TERM_CHG_SHIFT)
  295. );
  296. }
  297. void bq25890_en_state_dis(kal_uint32 val)
  298. {
  299. kal_uint32 ret=0;
  300. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  301. (kal_uint8)(val),
  302. (kal_uint8)(CON7_STAT_DIS_MASK),
  303. (kal_uint8)(CON7_STAT_DIS_SHIFT)
  304. );
  305. }
  306. void bq25890_set_wd_timer(kal_uint32 val)
  307. {
  308. kal_uint32 ret=0;
  309. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  310. (kal_uint8)(val),
  311. (kal_uint8)(CON7_WTG_TIM_SET_MASK),
  312. (kal_uint8)(CON7_WTG_TIM_SET_SHIFT)
  313. );
  314. }
  315. void bq25890_en_chg_timer(kal_uint32 val)
  316. {
  317. kal_uint32 ret=0;
  318. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  319. (kal_uint8)(val),
  320. (kal_uint8)(CON7_EN_TIM_MASK),
  321. (kal_uint8)(CON7_EN_TIMG_SHIFT)
  322. );
  323. }
  324. void bq25890_set_chg_timer(kal_uint32 val)
  325. {
  326. kal_uint32 ret=0;
  327. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  328. (kal_uint8)(val),
  329. (kal_uint8)(CON7_SET_CHG_TIM_MASK),
  330. (kal_uint8)(CON7_SET_CHG_TIM_SHIFT)
  331. );
  332. }
  333. //CON8---------------------------------------------------
  334. void bq25890_set_thermal_regulation(kal_uint32 val)
  335. {
  336. kal_uint32 ret=0;
  337. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON8),
  338. (kal_uint8)(val),
  339. (kal_uint8)(CON8_TREG_MASK),
  340. (kal_uint8)(CON8_TREG_SHIFT)
  341. );
  342. }
  343. void bq25890_set_VBAT_clamp(kal_uint32 val)
  344. {
  345. kal_uint32 ret=0;
  346. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON8),
  347. (kal_uint8)(val),
  348. (kal_uint8)(CON8_VCLAMP_MASK),
  349. (kal_uint8)(CON8_VCLAMP_SHIFT)
  350. );
  351. }
  352. void bq25890_set_VBAT_IR_compensation(kal_uint32 val)
  353. {
  354. kal_uint32 ret=0;
  355. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON8),
  356. (kal_uint8)(val),
  357. (kal_uint8)(CON8_BAT_COMP_MASK),
  358. (kal_uint8)(CON8_BAT_COMP_SHIFT)
  359. );
  360. }
  361. //CON9----------------------------------------------------
  362. void bq25890_set_BATFET_DLY(kal_uint32 val)
  363. {
  364. bq25890_config_interface( (kal_uint8)(bq25890_CON9),
  365. (kal_uint8)(val),
  366. (kal_uint8)(CON9_BATFET_DLY_MASK),
  367. (kal_uint8)(CON9_BATFET_DLY_SHIFT)
  368. );
  369. }
  370. void bq25890_set_BATFET_RST_EN(kal_uint32 val)
  371. {
  372. bq25890_config_interface( (kal_uint8)(bq25890_CON9),
  373. (kal_uint8)(val),
  374. (kal_uint8)(CON9_BATFET_RST_EN_MASK),
  375. (kal_uint8)(CON9_BATFET_RST_EN_SHIFT)
  376. );
  377. }
  378. #if PUMPEXP_IN_LK
  379. void bq25890_pumpx_up(kal_uint32 val)
  380. {
  381. kal_uint32 ret=0;
  382. bq25890_en_pumpx(1);
  383. if (val==1) {
  384. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON9),
  385. (kal_uint8)(1),
  386. (kal_uint8)(CON9_PUMPX_UP),
  387. (kal_uint8)(CON9_PUMPX_UP_SHIFT)
  388. );
  389. } else {
  390. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON9),
  391. (kal_uint8)(1),
  392. (kal_uint8)(CON9_PUMPX_DN),
  393. (kal_uint8)(CON9_PUMPX_DN_SHIFT)
  394. );
  395. }
  396. /* Input current limit = 400 mA, changes after port detection*/
  397. bq25890_set_iinlim(8);
  398. /* CC mode current = 2048 mA*/
  399. bq25890_set_ichg(0x20);
  400. msleep(3000);
  401. }
  402. #endif
  403. //CONA----------------------------------------------------
  404. void bq25890_set_boost_ilim(kal_uint32 val)
  405. {
  406. kal_uint32 ret=0;
  407. ret=bq25890_config_interface( (kal_uint8)(bq25890_CONA),
  408. (kal_uint8)(val),
  409. (kal_uint8)(CONA_BOOST_ILIM_MASK),
  410. (kal_uint8)(CONA_BOOST_ILIM_SHIFT)
  411. );
  412. }
  413. void bq25890_set_boost_vlim(kal_uint32 val)
  414. {
  415. kal_uint32 ret=0;
  416. ret=bq25890_config_interface( (kal_uint8)(bq25890_CONA),
  417. (kal_uint8)(val),
  418. (kal_uint8)(CONA_BOOST_VLIM_MASK),
  419. (kal_uint8)(CONA_BOOST_VLIM_SHIFT)
  420. );
  421. }
  422. //CONB----------------------------------------------------
  423. kal_uint32 bq25890_get_vbus_state(void )
  424. {
  425. kal_uint32 ret=0;
  426. kal_uint8 val=0;
  427. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  428. (&val),
  429. (kal_uint8)(CONB_VBUS_STAT_MASK),
  430. (kal_uint8)(CONB_VBUS_STAT_SHIFT)
  431. );
  432. return val;
  433. }
  434. kal_uint32 bq25890_get_chrg_state(void )
  435. {
  436. kal_uint32 ret=0;
  437. kal_uint8 val=0;
  438. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  439. (&val),
  440. (kal_uint8)(CONB_CHRG_STAT_MASK),
  441. (kal_uint8)(CONB_CHRG_STAT_SHIFT)
  442. );
  443. return val;
  444. }
  445. kal_uint32 bq25890_get_pg_state(void )
  446. {
  447. kal_uint32 ret=0;
  448. kal_uint8 val=0;
  449. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  450. (&val),
  451. (kal_uint8)(CONB_PG_STAT_MASK),
  452. (kal_uint8)(CONB_PG_STAT_SHIFT)
  453. );
  454. return val;
  455. }
  456. kal_uint32 bq25890_get_sdp_state(void )
  457. {
  458. kal_uint32 ret=0;
  459. kal_uint8 val=0;
  460. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  461. (&val),
  462. (kal_uint8)(CONB_SDP_STAT_MASK),
  463. (kal_uint8)(CONB_SDP_STAT_SHIFT)
  464. );
  465. return val;
  466. }
  467. kal_uint32 bq25890_get_vsys_state(void )
  468. {
  469. kal_uint32 ret=0;
  470. kal_uint8 val=0;
  471. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  472. (&val),
  473. (kal_uint8)(CONB_VSYS_STAT_MASK),
  474. (kal_uint8)(CONB_VSYS_STAT_SHIFT)
  475. );
  476. return val;
  477. }
  478. //CON0C----------------------------------------------------
  479. kal_uint32 bq25890_get_wdt_state(void )
  480. {
  481. kal_uint32 ret=0;
  482. kal_uint8 val=0;
  483. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  484. (&val),
  485. (kal_uint8)(CONB_WATG_STAT_MASK),
  486. (kal_uint8)(CONB_WATG_STAT_SHIFT)
  487. );
  488. return val;
  489. }
  490. kal_uint32 bq25890_get_boost_state(void )
  491. {
  492. kal_uint32 ret=0;
  493. kal_uint8 val=0;
  494. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  495. (&val),
  496. (kal_uint8)(CONB_BOOST_STAT_MASK),
  497. (kal_uint8)(CONB_BOOST_STAT_SHIFT)
  498. );
  499. return val;
  500. }
  501. kal_uint32 bq25890_get_chrg_fault_state(void)
  502. {
  503. kal_uint32 ret=0;
  504. kal_uint8 val=0;
  505. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  506. (&val),
  507. (kal_uint8)(CONB_CHRG_STAT_MASK),
  508. (kal_uint8)(CONB_CHRG_STAT_SHIFT)
  509. );
  510. return val;
  511. }
  512. kal_uint32 bq25890_get_bat_state(void)
  513. {
  514. kal_uint32 ret=0;
  515. kal_uint8 val=0;
  516. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  517. (&val),
  518. (kal_uint8)(CONB_BAT_STAT_MASK),
  519. (kal_uint8)(CONB_BAT_STAT_SHIFT)
  520. );
  521. return val;
  522. }
  523. //COND
  524. void bq25890_set_FORCE_VINDPM(kal_uint32 val)
  525. {
  526. kal_uint32 ret=0;
  527. ret=bq25890_config_interface( (kal_uint8)(bq25890_COND),
  528. (kal_uint8)(val),
  529. (kal_uint8)(COND_FORCE_VINDPM_MASK),
  530. (kal_uint8)(COND_FORCE_VINDPM_SHIFT)
  531. );
  532. return val;
  533. }
  534. void bq25890_set_VINDPM(kal_uint32 val)
  535. {
  536. kal_uint32 ret=0;
  537. ret=bq25890_config_interface( (kal_uint8)(bq25890_COND),
  538. (kal_uint8)(val),
  539. (kal_uint8)(COND_VINDPM_MASK),
  540. (kal_uint8)(COND_VINDPM_SHIFT)
  541. );
  542. return val;
  543. }
  544. //CON12
  545. kal_uint32 bq25890_get_ichg(void )
  546. {
  547. kal_uint32 ret=0;
  548. kal_uint8 val=0;
  549. ret=bq25890_read_interface( (kal_uint8)(bq25890_CON12),
  550. (&val),
  551. (kal_uint8)(CONB_ICHG_STAT_MASK),
  552. (kal_uint8)(CONB_ICHG_STAT_SHIFT)
  553. );
  554. return val;
  555. }
  556. //CON13 ///
  557. kal_uint32 bq25890_get_idpm_state(void )
  558. {
  559. kal_uint32 ret=0;
  560. kal_uint8 val=0;
  561. ret=bq25890_read_interface( (kal_uint8)(bq25890_CON13),
  562. (&val),
  563. (kal_uint8)(CONB_IDPM_STAT_MASK),
  564. (kal_uint8)(CONB_IDPM_STAT_SHIFT)
  565. );
  566. return val;
  567. }
  568. /**********************************************************
  569. *
  570. * [Internal Function]
  571. *
  572. *********************************************************/
  573. void bq25890_dump_register(void)
  574. {
  575. kal_uint8 i=0;
  576. dprintf(CRITICAL, "[bq25890] ");
  577. bq25890_ADC_start(0x1);
  578. for (i=0; i<bq25890_REG_NUM; i++) {
  579. bq25890_read_byte(i, &bq25890_reg[i]);
  580. dprintf(CRITICAL, "[0x%x]=0x%x\n", i, bq25890_reg[i]);
  581. }
  582. dprintf(CRITICAL, "\n");
  583. }
  584. void bq25890_hw_init(void)
  585. {
  586. bq25890_wd_reset(1); // wdt reset
  587. bq25890_otg_en(0); // Disable OTG boost
  588. bq25890_en_chg_timer(1); // Disable Safty timer
  589. bq25890_set_iterml(0x2); // ITERM = TBD 0x02=128mAi
  590. /*Set VBAT = 4.352 V*/
  591. bq25890_set_vreg(0x20);
  592. /*VBAT IR compensation*/
  593. bq25890_set_VBAT_clamp(0x7);/*4.352V + 0.224 V*/
  594. bq25890_set_VBAT_IR_compensation(0x4); /*80mohm*/
  595. /*precharge2cc voltage,BATLOWV, 3.0V*/
  596. bq25890_set_batlowv(0x1);
  597. /*PreCC mode*/
  598. /* precharge current default 0x1:128mA 0xF:1088mA
  599. * Note: 1A is forbidden for dead battery
  600. */
  601. bq25890_set_iprechg(0x1);
  602. /* ICHG 2048mA*/
  603. bq25890_set_ichg(0x20);
  604. /*Iinlim = 3.25mA*/
  605. bq25890_set_iinlim(0x3F);
  606. //bq25890_set_vindpm_off(0); // VINDPM_OFFSET = 0 : 4.2V ; 1 for 10.1 V
  607. //bq25890_set_vindpm_os(0x4); // VINDPM_OFFSET + CODE x 2%
  608. bq25890_set_FORCE_VINDPM(1); //1 or 0 for absolute or relative vth
  609. bq25890_set_VINDPM(0x13); //4.5V
  610. /*Thermal regulation : TBD*/
  611. //bq25890_set_ts_en(0);
  612. bq25890_set_en_hiz(0x0);
  613. //if(get_mt6351_pmic_chip_version() < PMIC6351_E3_CID_CODE)
  614. //bq25890_set_vbreg(0x19); //TBD battery regulation
  615. //else
  616. //bq25890_set_vbreg(0x23); //TBD battery regulation
  617. }
  618. static CHARGER_TYPE g_chr_type_num = CHARGER_UNKNOWN;
  619. int hw_charging_get_charger_type(void);
  620. extern int g_std_ac_large_current_en;
  621. void bq25890_charging_enable(kal_uint32 bEnable)
  622. {
  623. if (KAL_TRUE == bEnable)
  624. bq25890_chg_en(0x1); // charger enable
  625. else
  626. bq25890_chg_en(0); // charger disable
  627. dprintf(CRITICAL, "[BATTERY:bq24196] charger enable/disable %d !\r\n", bEnable);
  628. #if 0
  629. int temp_CC_value = 0;
  630. kal_int32 bat_val = 0;
  631. if (CHARGER_UNKNOWN == g_chr_type_num && KAL_TRUE == upmu_is_chr_det()) {
  632. hw_charging_get_charger_type();
  633. dprintf(CRITICAL, "[BATTERY:bq25896] charger type: %d\n", g_chr_type_num);
  634. }
  635. bat_val = get_i_sense_volt(1);
  636. if (g_chr_type_num == STANDARD_CHARGER) {
  637. if (g_std_ac_large_current_en==1) {
  638. temp_CC_value = 2000;
  639. bq25890_set_iinlim(0x28); //IN current limit at 2A
  640. if (bat_val < PRECC_BATVOL)
  641. bq25890_set_ichg(0x0); //Pre-Charging Current Limit at 500ma
  642. else
  643. bq25890_set_ichg(0x18); //Fast Charging Current Limit at 2A
  644. } else {
  645. temp_CC_value = 1200;
  646. bq25890_set_iinlim(0x4); //IN current limit at 1200mA or 1.5mA for bq24196
  647. if (bat_val < PRECC_BATVOL)
  648. bq25890_set_ichg(0x0); //Pre-Charging Current Limit at 500ma
  649. else
  650. bq25890_set_ichg(0x8); //Fast Charging Current Limit at 1A
  651. }
  652. } else if (g_chr_type_num == STANDARD_HOST \
  653. || g_chr_type_num == CHARGING_HOST \
  654. || g_chr_type_num == NONSTANDARD_CHARGER) {
  655. temp_CC_value = 500;
  656. bq25890_set_iinlim(0x2); //IN current limit at 500mA
  657. bq25890_set_ichg(0); //Fast Charging Current Limit at 500mA
  658. } else {
  659. temp_CC_value = 500;
  660. bq25890_set_iinlim(0x2); //IN current limit at 500mA
  661. bq25890_set_ichg(0); //Fast Charging Current Limit at 500mA
  662. }
  663. if (KAL_TRUE == bEnable)
  664. bq25890_chg_en(0x1); // charger enable
  665. else
  666. bq25890_chg_en(0); // charger disable
  667. bq25890_wd_reset(1);
  668. dprintf(INFO, "[BATTERY:bq24196] bq24196_set_ac_current(), CC value(%dmA) \r\n", temp_CC_value);
  669. dprintf(INFO, "[BATTERY:bq24196] charger enable/disable %d !\r\n", bEnable);
  670. #endif
  671. }
  672. #if defined(CONFIG_POWER_EXT)
  673. int hw_charging_get_charger_type(void)
  674. {
  675. g_chr_type_num = STANDARD_HOST;
  676. return STANDARD_HOST;
  677. }
  678. #else
  679. extern void Charger_Detect_Init(void);
  680. extern void Charger_Detect_Release(void);
  681. extern void mdelay (unsigned long msec);
  682. extern void pmic_set_register_value(PMU_FLAGS_LIST_ENUM flagname,kal_uint32 val);
  683. extern kal_uint16 pmic_get_register_value(PMU_FLAGS_LIST_ENUM flagname);
  684. static void hw_bc11_dump_register(void)
  685. {
  686. dprintf(INFO, "Reg[0x%x]=0x%x,Reg[0x%x]=0x%x\n",
  687. MT6351_CHR_CON20, upmu_get_reg_value(MT6351_CHR_CON20),
  688. MT6351_CHR_CON21, upmu_get_reg_value(MT6351_CHR_CON21)
  689. );
  690. }
  691. static void hw_bc11_init(void)
  692. {
  693. mdelay(300);
  694. #if CHARGER_DETECTION
  695. Charger_Detect_Init();
  696. #endif
  697. //RG_bc11_BIAS_EN=1
  698. pmic_set_register_value(MT6351_PMIC_RG_BC11_BIAS_EN, 0x1);//mt6351_upmu_set_rg_bc11_bias_en(0x1);
  699. //RG_bc11_VSRC_EN[1:0]=00
  700. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x0);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  701. //RG_bc11_VREF_VTH = [1:0]=00
  702. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  703. //RG_bc11_CMP_EN[1.0] = 00
  704. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  705. //RG_bc11_IPU_EN[1.0] = 00
  706. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  707. //RG_bc11_IPD_EN[1.0] = 00
  708. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  709. //bc11_RST=1
  710. pmic_set_register_value(MT6351_PMIC_RG_BC11_RST, 0x1);//mt6351_upmu_set_rg_bc11_rst(0x1);
  711. //bc11_BB_CTRL=1
  712. pmic_set_register_value(MT6351_PMIC_RG_BC11_BB_CTRL, 0x1);//mt6351_upmu_set_rg_bc11_bb_ctrl(0x1);
  713. mdelay(50);
  714. if (g_log_en>1) {
  715. dprintf(INFO, "hw_bc11_init() \r\n");
  716. hw_bc11_dump_register();
  717. }
  718. }
  719. static U32 hw_bc11_DCD(void)
  720. {
  721. U32 wChargerAvail = 0;
  722. //RG_bc11_IPU_EN[1.0] = 10
  723. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x2);
  724. //RG_bc11_IPD_EN[1.0] = 01
  725. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  726. //RG_bc11_VREF_VTH = [1:0]=01
  727. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x1);//mt6351_upmu_set_rg_bc11_vref_vth(0x1);
  728. //RG_bc11_CMP_EN[1.0] = 10
  729. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x2);//mt6351_upmu_set_rg_bc11_cmp_en(0x2);
  730. mdelay(80);
  731. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  732. if (g_log_en>1) {
  733. dprintf(INFO, "hw_bc11_DCD() \r\n");
  734. hw_bc11_dump_register();
  735. }
  736. //RG_bc11_IPU_EN[1.0] = 00
  737. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  738. //RG_bc11_IPD_EN[1.0] = 00
  739. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  740. //RG_bc11_CMP_EN[1.0] = 00
  741. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  742. //RG_bc11_VREF_VTH = [1:0]=00
  743. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  744. return wChargerAvail;
  745. }
  746. static U32 hw_bc11_stepA1(void)
  747. {
  748. U32 wChargerAvail = 0;
  749. //RG_bc11_IPD_EN[1.0] = 01
  750. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  751. //RG_bc11_VREF_VTH = [1:0]=00
  752. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  753. //RG_bc11_CMP_EN[1.0] = 01
  754. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  755. mdelay(80);
  756. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  757. if (g_log_en>1) {
  758. dprintf(INFO, "hw_bc11_stepA1() \r\n");
  759. hw_bc11_dump_register();
  760. }
  761. //RG_bc11_IPD_EN[1.0] = 00
  762. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  763. //RG_bc11_CMP_EN[1.0] = 00
  764. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  765. return wChargerAvail;
  766. }
  767. static U32 hw_bc11_stepA2(void)
  768. {
  769. U32 wChargerAvail = 0;
  770. //RG_bc11_VSRC_EN[1.0] = 10
  771. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x2);//mt6351_upmu_set_rg_bc11_vsrc_en(0x2);
  772. //RG_bc11_IPD_EN[1:0] = 01
  773. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  774. //RG_bc11_VREF_VTH = [1:0]=00
  775. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  776. //RG_bc11_CMP_EN[1.0] = 01
  777. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  778. mdelay(80);
  779. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  780. if (g_log_en>1) {
  781. dprintf(INFO, "hw_bc11_stepA2() \r\n");
  782. hw_bc11_dump_register();
  783. }
  784. //RG_bc11_VSRC_EN[1:0]=00
  785. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x2);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  786. //RG_bc11_IPD_EN[1.0] = 00
  787. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  788. //RG_bc11_CMP_EN[1.0] = 00
  789. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  790. return wChargerAvail;
  791. }
  792. static U32 hw_bc11_stepB2(void)
  793. {
  794. U32 wChargerAvail = 0;
  795. //RG_bc11_IPU_EN[1:0]=10
  796. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x2);//mt6351_upmu_set_rg_bc11_ipu_en(0x2);
  797. //RG_bc11_VREF_VTH = [1:0]=01
  798. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x1);//mt6351_upmu_set_rg_bc11_vref_vth(0x1);
  799. //RG_bc11_CMP_EN[1.0] = 01
  800. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  801. mdelay(80);
  802. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  803. if (g_log_en>1) {
  804. dprintf(INFO, "hw_bc11_stepB2() \r\n");
  805. hw_bc11_dump_register();
  806. }
  807. //RG_bc11_IPU_EN[1.0] = 00
  808. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  809. //RG_bc11_CMP_EN[1.0] = 00
  810. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  811. //RG_bc11_VREF_VTH = [1:0]=00
  812. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0); //mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  813. return wChargerAvail;
  814. }
  815. static void hw_bc11_done(void)
  816. {
  817. //RG_bc11_VSRC_EN[1:0]=00
  818. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x0);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  819. //RG_bc11_VREF_VTH = [1:0]=0
  820. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  821. //RG_bc11_CMP_EN[1.0] = 00
  822. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  823. //RG_bc11_IPU_EN[1.0] = 00
  824. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  825. //RG_bc11_IPD_EN[1.0] = 00
  826. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  827. //RG_bc11_BIAS_EN=0
  828. pmic_set_register_value(MT6351_PMIC_RG_BC11_BIAS_EN, 0x0);//mt6351_upmu_set_rg_bc11_bias_en(0x0);
  829. #if CHARGER_DETECTION
  830. Charger_Detect_Release();
  831. #endif
  832. if (g_log_en>1) {
  833. dprintf(INFO, "hw_bc11_done() \r\n");
  834. hw_bc11_dump_register();
  835. }
  836. }
  837. int hw_charging_get_charger_type(void)
  838. {
  839. if (CHARGER_UNKNOWN != g_chr_type_num)
  840. return g_chr_type_num;
  841. /********* Step initial ***************/
  842. hw_bc11_init();
  843. /********* Step DCD ***************/
  844. if (1 == hw_bc11_DCD()) {
  845. /********* Step A1 ***************/
  846. if (1 == hw_bc11_stepA1()) {
  847. g_chr_type_num = APPLE_2_1A_CHARGER;
  848. dprintf(INFO, "step A1 : Apple 2.1A CHARGER!\r\n");
  849. } else {
  850. g_chr_type_num = NONSTANDARD_CHARGER;
  851. dprintf(INFO, "step A1 : Non STANDARD CHARGER!\r\n");
  852. }
  853. } else {
  854. /********* Step A2 ***************/
  855. if (1 == hw_bc11_stepA2()) {
  856. /********* Step B2 ***************/
  857. if (1 == hw_bc11_stepB2()) {
  858. g_chr_type_num = STANDARD_CHARGER;
  859. dprintf(INFO, "step B2 : STANDARD CHARGER!\r\n");
  860. } else {
  861. g_chr_type_num = CHARGING_HOST;
  862. dprintf(INFO, "step B2 : Charging Host!\r\n");
  863. }
  864. } else {
  865. g_chr_type_num = STANDARD_HOST;
  866. dprintf(INFO, "step A2 : Standard USB Host!\r\n");
  867. }
  868. }
  869. /********* Finally setting *******************************/
  870. hw_bc11_done();
  871. return g_chr_type_num;
  872. }
  873. void pumpex_reset_adapter(void)
  874. {
  875. bq25890_set_iinlim(0x00);
  876. mdelay(250);
  877. dprintf(CRITICAL, "PE+ adapter reset back to 5v.\r\n");
  878. }
  879. void pumpex_reset_adapter_enble(int en)
  880. {
  881. if(en == 1)
  882. bq25890_set_iinlim(0x00);
  883. else
  884. bq25890_set_iinlim(0x3F);
  885. }
  886. #endif