platform.c 32 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <debug.h>
  32. #include <stdlib.h>
  33. #include <string.h>
  34. #include <video.h>
  35. #include <dev/uart.h>
  36. #include <arch/arm.h>
  37. #include <arch/arm/mmu.h>
  38. #include <arch/ops.h>
  39. #include <target/board.h>
  40. #include <platform/mt_reg_base.h>
  41. #include <platform/mt_disp_drv.h>
  42. #include <platform/disp_drv.h>
  43. #include <platform/boot_mode.h>
  44. #include <platform/mt_logo.h>
  45. #include <platform/partition.h>
  46. #include <env.h>
  47. #include <platform/mt_gpio.h>
  48. #include <platform/mt_pmic.h>
  49. #include <platform/mt_pmic_wrap_init.h>
  50. #include <platform/mt_i2c.h>
  51. #include <platform/mtk_key.h>
  52. #include <platform/mt_rtc.h>
  53. #include <platform/mt_leds.h>
  54. #include <platform/upmu_common.h>
  55. #include <platform/mtk_wdt.h>
  56. #include <platform/disp_drv_platform.h>
  57. #include <platform/sec_devinfo.h> // for internal_get_devinfo_with_index()
  58. #include <plinfo.h> // for plinfo_get_brom_header_block_size()
  59. #include <libfdt.h>
  60. #include <mt_gic.h> // for platform_init_interrupts()
  61. #include <mt_boot.h> // for bldr_load_dtb()
  62. #include <platform.h> // for platform_uninit()
  63. #include <mtk_smi.h> // for smi_apply_register_setting()
  64. #include <platform/verified_boot.h> // for seclib_set_oemkey(), sec_logo_check()
  65. #include <mtk_dcm.h> // for mt_dcm_init()
  66. #include <plat_debug_interface.h> // for mt_secure_call()
  67. #include <dev/aee_platform_debug.h> // for platform_lastpc_postinit()
  68. #include <profiling.h>
  69. #include <pal_assert.h>
  70. int init_rpmb_sharemem(); // FIXME!!! #include <xxx> // for init_rpmb_sharemem()
  71. #include <platform/mt_gpt.h> // for get_timer()
  72. #include <fdt_op.h>
  73. #include <verified_boot_common.h>
  74. #define DEVAPC_TURN_ON 1
  75. #ifdef MTK_AB_OTA_UPDATER
  76. #include "bootctrl.h"
  77. #endif
  78. #if defined(MTK_SECURITY_SW_SUPPORT)
  79. #include "oemkey.h"
  80. #endif
  81. #ifdef MTK_UFS_SUPPORT
  82. #include "ufs_aio_interface.h"
  83. #endif
  84. #ifdef MTK_SECURITY_SW_SUPPORT
  85. extern u8 g_oemkey[OEM_PUBK_SZ];
  86. #endif
  87. #ifdef LK_DL_CHECK
  88. /*block if check dl fail*/
  89. #undef LK_DL_CHECK_BLOCK_LEVEL
  90. #endif
  91. extern void platform_early_init_timer();
  92. extern void jump_da(u32 addr, u32 arg1, u32 arg2);
  93. extern int i2c_hw_init(void);
  94. extern int mboot_common_load_logo(unsigned long logo_addr, char* filename);
  95. extern int sec_func_init(u64 pl_start_addr);
  96. extern int sec_usbdl_enabled (void);
  97. extern void mtk_wdt_disable(void);
  98. extern void platform_deinit_interrupts(void);
  99. extern int mmc_get_dl_info(void);
  100. extern int mmc_legacy_init(int);
  101. extern void platform_clear_cache_retention_select(void);
  102. extern unsigned int crypto_hw_engine_disable(void);
  103. #ifdef MTK_AEE_PLATFORM_DEBUG_SUPPORT
  104. extern void latch_lastbus_init(void);
  105. #endif
  106. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  107. extern kal_bool is_low_battery(kal_int32 val);
  108. extern int hw_charging_get_charger_type(void);
  109. #endif
  110. extern void lk_register_wdt_callback(void);
  111. void config_shared_SRAM_size(void);
  112. extern int dev_info_nr_cpu(void);
  113. extern void mt_pll_turn_off(void);
  114. struct mmu_initial_mapping mmu_initial_mappings[] = {
  115. {
  116. .phys = (uint64_t)0,
  117. .virt = (uint32_t)0,
  118. .size = 0x40000000,
  119. .flags = MMU_MEMORY_TYPE_STRONGLY_ORDERED | MMU_MEMORY_AP_P_RW_U_NA,
  120. .name = "mcusys"
  121. },
  122. {
  123. .phys = (uint64_t)MEMBASE,
  124. .virt = (uint32_t)MEMBASE,
  125. .size = ROUNDUP(MEMSIZE, SECTION_SIZE),
  126. .flags = MMU_MEMORY_TYPE_NORMAL_WRITE_BACK | MMU_MEMORY_AP_P_RW_U_NA,
  127. .name = "ram"
  128. },
  129. {
  130. .phys = (uint64_t)CFG_BOOTIMG_LOAD_ADDR,
  131. .virt = (uint32_t)CFG_BOOTIMG_LOAD_ADDR,
  132. .size = 256*MB,
  133. .flags = MMU_MEMORY_TYPE_NORMAL_WRITE_BACK | MMU_MEMORY_AP_P_RW_U_NA,
  134. .name = "bootimg"
  135. },
  136. {
  137. .phys = (uint64_t)SCRATCH_ADDR,
  138. .virt = (uint32_t)SCRATCH_ADDR,
  139. .size = SCRATCH_SIZE,
  140. .flags = MMU_MEMORY_TYPE_NORMAL_WRITE_BACK | MMU_MEMORY_AP_P_RW_U_NA,
  141. .name = "download"
  142. },
  143. /* null entry to terminate the list */
  144. { 0 }
  145. };
  146. BOOT_ARGUMENT *g_boot_arg;
  147. BOOT_ARGUMENT boot_addr;
  148. int g_nr_bank;
  149. BI_DRAM bi_dram[MAX_NR_BANK];
  150. unsigned int g_fb_base;
  151. unsigned int g_fb_size;
  152. static int g_dram_init_ret;
  153. static unsigned int bootarg_addr;
  154. static unsigned int bootarg_size;
  155. extern unsigned int logo_lk_t;
  156. extern unsigned int boot_time;
  157. int dram_init(void)
  158. {
  159. int i;
  160. struct boot_tag *tags;
  161. /* Get parameters from pre-loader. Get as early as possible
  162. * The address of BOOT_ARGUMENT_LOCATION will be used by Linux later
  163. * So copy the parameters from BOOT_ARGUMENT_LOCATION to LK's memory region
  164. */
  165. g_boot_arg = &boot_addr;
  166. bootarg_addr = BOOT_ARGUMENT_LOCATION;
  167. bootarg_size = 0;
  168. if (*(unsigned int *)BOOT_ARGUMENT_LOCATION == BOOT_ARGUMENT_MAGIC) {
  169. memcpy(g_boot_arg, (void*)BOOT_ARGUMENT_LOCATION, sizeof(BOOT_ARGUMENT));
  170. bootarg_size = sizeof(BOOT_ARGUMENT);
  171. } else {
  172. g_boot_arg->maggic_number = BOOT_ARGUMENT_MAGIC;
  173. for (tags = (void *)BOOT_ARGUMENT_LOCATION; tags->hdr.size; tags = boot_tag_next(tags)) {
  174. switch (tags->hdr.tag) {
  175. case BOOT_TAG_BOOT_REASON:
  176. g_boot_arg->boot_reason = tags->u.boot_reason.boot_reason;
  177. break;
  178. case BOOT_TAG_BOOT_MODE:
  179. g_boot_arg->boot_mode = tags->u.boot_mode.boot_mode;
  180. break;
  181. case BOOT_TAG_META_COM:
  182. g_boot_arg->meta_com_type = tags->u.meta_com.meta_com_type;
  183. g_boot_arg->meta_com_id = tags->u.meta_com.meta_com_id;
  184. g_boot_arg->meta_uart_port = tags->u.meta_com.meta_uart_port;
  185. g_boot_arg->meta_log_disable = tags->u.meta_com.meta_log_disable;
  186. break;
  187. case BOOT_TAG_LOG_COM:
  188. g_boot_arg->log_port = tags->u.log_com.log_port;
  189. g_boot_arg->log_baudrate = tags->u.log_com.log_baudrate;
  190. g_boot_arg->log_enable = tags->u.log_com.log_enable;
  191. g_boot_arg->log_dynamic_switch = tags->u.log_com.log_dynamic_switch;
  192. break;
  193. case BOOT_TAG_MEM:
  194. g_boot_arg->dram_rank_num = tags->u.mem.dram_rank_num;
  195. for (i = 0; i < (int)(tags->u.mem.dram_rank_num); i++) {
  196. g_boot_arg->dram_rank_size[i] = tags->u.mem.dram_rank_size[i];
  197. }
  198. g_boot_arg->mblock_info = tags->u.mem.mblock_info;
  199. g_boot_arg->orig_dram_info = tags->u.mem.orig_dram_info;
  200. g_boot_arg->lca_reserved_mem = tags->u.mem.lca_reserved_mem;
  201. g_boot_arg->tee_reserved_mem = tags->u.mem.tee_reserved_mem;
  202. break;
  203. case BOOT_TAG_MD_INFO:
  204. for (i = 0; i < 4; i++) {
  205. g_boot_arg->md_type[i] = tags->u.md_info.md_type[i];
  206. }
  207. break;
  208. case BOOT_TAG_BOOT_TIME:
  209. g_boot_arg->boot_time = tags->u.boot_time.boot_time;
  210. break;
  211. case BOOT_TAG_DA_INFO:
  212. memcpy(&g_boot_arg->da_info, &tags->u.da_info.da_info, sizeof(da_info_t));
  213. break;
  214. case BOOT_TAG_SEC_INFO:
  215. memcpy(&g_boot_arg->sec_limit, &tags->u.sec_info.sec_limit, sizeof(SEC_LIMIT));
  216. break;
  217. case BOOT_TAG_PART_NUM:
  218. g_boot_arg->part_num = tags->u.part_num.part_num;
  219. break;
  220. case BOOT_TAG_PART_INFO:
  221. g_boot_arg->part_info = tags->u.part_info.part_info; /* only copy the pointer but the contains*/
  222. break;
  223. case BOOT_TAG_EFLAG:
  224. g_boot_arg->e_flag = tags->u.eflag.e_flag;
  225. break;
  226. case BOOT_TAG_DDR_RESERVE:
  227. g_boot_arg->ddr_reserve_enable = tags->u.ddr_reserve.ddr_reserve_enable;
  228. g_boot_arg->ddr_reserve_success = tags->u.ddr_reserve.ddr_reserve_success;
  229. g_boot_arg->ddr_reserve_ready = tags->u.ddr_reserve.ddr_reserve_ready;
  230. break;
  231. case BOOT_TAG_DRAM_BUF:
  232. g_boot_arg->dram_buf_size = tags->u.dram_buf.dram_buf_size;
  233. break;
  234. case BOOT_TAG_SRAM_INFO:
  235. g_boot_arg->non_secure_sram_addr = tags->u.sram_info.non_secure_sram_addr;
  236. g_boot_arg->non_secure_sram_size = tags->u.sram_info.non_secure_sram_size;
  237. break;
  238. case BOOT_TAG_PLAT_DBG_INFO:
  239. g_boot_arg->plat_dbg_info_max = tags->u.plat_dbg_info.info_max;
  240. if (g_boot_arg->plat_dbg_info_max > INFO_TYPE_MAX)
  241. g_boot_arg->plat_dbg_info_max = INFO_TYPE_MAX;
  242. for (i = 0; i < g_boot_arg->plat_dbg_info_max; i++) {
  243. g_boot_arg->plat_dbg_info[i].key = tags->u.plat_dbg_info.info[i].key;
  244. g_boot_arg->plat_dbg_info[i].base = tags->u.plat_dbg_info.info[i].base;
  245. g_boot_arg->plat_dbg_info[i].size = tags->u.plat_dbg_info.info[i].size;
  246. }
  247. break;
  248. case BOOT_TAG_PTP:
  249. memcpy(&g_boot_arg->ptp_volt_info, &tags->u.ptp_volt.ptp_volt_info, sizeof(ptp_info_t));
  250. break;
  251. case BOOT_TAG_EMI_INFO:
  252. memcpy(&(g_boot_arg->emi_info), &(tags->u.emi_info), sizeof(emi_info_t));
  253. break;
  254. case BOOT_TAG_IMGVER_INFO:
  255. g_boot_arg->pl_imgver_status = tags->u.imgver_info.pl_imgver_status;
  256. break;
  257. case BOOT_TAG_MAX_CPUS:
  258. g_boot_arg->max_cpus = tags->u.max_cpus.max_cpus;
  259. break;
  260. case BOOT_TAG_BAT_INFO:
  261. g_boot_arg->boot_voltage = tags->u.bat_info.boot_voltage;
  262. g_boot_arg->shutdown_time= tags->u.bat_info.shutdown_time;
  263. break;
  264. case BOOT_TAG_RAM_CONSOLE_INFO:
  265. g_boot_arg->ram_console_sram_addr = tags->u.ram_console_info.sram_addr;
  266. g_boot_arg->ram_console_sram_size = tags->u.ram_console_info.sram_size;
  267. g_boot_arg->ram_console_def_type = tags->u.ram_console_info.def_type;
  268. g_boot_arg->ram_console_memory_info_offset = tags->u.ram_console_info.memory_info_offset;
  269. break;
  270. case BOOT_TAG_SOC_ID:
  271. memcpy(g_boot_arg->socid, tags->u.socid.id, SOC_ID_LEN);
  272. break;
  273. default:
  274. break;
  275. }
  276. bootarg_size += tags->hdr.size;
  277. }
  278. }
  279. g_nr_bank = g_boot_arg->dram_rank_num;
  280. if (g_nr_bank == 0 || g_nr_bank > MAX_NR_BANK) {
  281. g_dram_init_ret = -1;
  282. //dprintf(CRITICAL, "[LK ERROR] DRAM bank number is not correct!!!");
  283. //while (1) ;
  284. return -1;
  285. }
  286. #ifndef CUSTOM_CONFIG_MAX_DRAM_SIZE
  287. /* return the actual DRAM info */
  288. for (i = 0; i < (int)(g_boot_arg->mblock_info.mblock_num); i++) {
  289. bi_dram[i].start = g_boot_arg->mblock_info.mblock[i].start;
  290. bi_dram[i].size = g_boot_arg->mblock_info.mblock[i].size;
  291. }
  292. //#elif (CUSTOM_CONFIG_MAX_DRAM_SIZE < 0x10000000)
  293. //#error "DRAM size < 0x10000000" /* DRAM is less than 256MB, trigger build error */
  294. #else
  295. #endif
  296. return 0;
  297. }
  298. unsigned int platform_get_bootarg_addr(void)
  299. {
  300. return bootarg_addr;
  301. }
  302. unsigned int platform_get_bootarg_size(void)
  303. {
  304. return bootarg_size;
  305. }
  306. /*******************************************************
  307. * Routine: memory_size
  308. * Description: return DRAM size to LCM driver
  309. ******************************************************/
  310. u32 ddr_enable_4gb(void)
  311. {
  312. u32 status;
  313. #define INFRA_MISC (INFRACFG_AO_BASE + 0x0F00)
  314. #define INFRA_4GB_EN (1 << 13)
  315. #define PERI_MISC (PERICFG_BASE + 0x0208)
  316. #define PERI_4GB_EN (1 << 15)
  317. status = ((DRV_Reg32(INFRA_MISC) & INFRA_4GB_EN) && (DRV_Reg32(PERI_MISC) & PERI_4GB_EN)) ? 1 : 0;
  318. dprintf(CRITICAL, "%s() status=%u\n", __func__, status);
  319. return status;
  320. }
  321. u64 physical_memory_size(void)
  322. {
  323. int i;
  324. unsigned long long size = 0;
  325. for (i = 0; i < (int)(g_boot_arg->orig_dram_info.rank_num); i++) {
  326. size += g_boot_arg->orig_dram_info.rank_info[i].size;
  327. }
  328. return size;
  329. }
  330. u32 memory_size(void)
  331. {
  332. unsigned long long size = physical_memory_size();
  333. while (((unsigned long long)DRAM_PHY_ADDR + size) > 0x100000000ULL) {
  334. size -= (unsigned long long)(1024*1024*1024);
  335. }
  336. return (unsigned int)size;
  337. }
  338. void sw_env()
  339. {
  340. #ifdef LK_DL_CHECK
  341. #if defined(MTK_EMMC_SUPPORT) || defined(MTK_UFS_SUPPORT)
  342. int dl_status = 0;
  343. dl_status = mmc_get_dl_info();
  344. dprintf(INFO, "mt65xx_sw_env--dl_status: %d\n", dl_status);
  345. if (dl_status != 0) {
  346. video_printf("=> TOOL DL image Fail!\n");
  347. dprintf(CRITICAL, "TOOL DL image Fail\n");
  348. #ifdef LK_DL_CHECK_BLOCK_LEVEL
  349. dprintf(CRITICAL, "uboot is blocking by dl info\n");
  350. while (1) ;
  351. #endif
  352. }
  353. #endif
  354. #endif
  355. #ifndef MACH_FPGA_NO_DISPLAY
  356. #ifndef USER_BUILD
  357. switch (g_boot_mode) {
  358. case META_BOOT:
  359. video_printf(" => META MODE\n");
  360. break;
  361. case FACTORY_BOOT:
  362. video_printf(" => FACTORY MODE\n");
  363. break;
  364. case RECOVERY_BOOT:
  365. video_printf(" => RECOVERY MODE\n");
  366. break;
  367. case SW_REBOOT:
  368. //video_printf(" => SW RESET\n");
  369. break;
  370. case NORMAL_BOOT:
  371. //if(g_boot_arg->boot_reason != BR_RTC && get_env("hibboot") != NULL && atoi(get_env("hibboot")) == 1)
  372. if (get_env("hibboot") != NULL && atoi(get_env("hibboot")) == 1)
  373. video_printf(" => HIBERNATION BOOT\n");
  374. else
  375. video_printf(" => NORMAL BOOT\n");
  376. break;
  377. case ADVMETA_BOOT:
  378. video_printf(" => ADVANCED META MODE\n");
  379. break;
  380. case ATE_FACTORY_BOOT:
  381. video_printf(" => ATE FACTORY MODE\n");
  382. break;
  383. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  384. case KERNEL_POWER_OFF_CHARGING_BOOT:
  385. video_printf(" => POWER OFF CHARGING MODE\n");
  386. break;
  387. case LOW_POWER_OFF_CHARGING_BOOT:
  388. video_printf(" => LOW POWER OFF CHARGING MODE\n");
  389. break;
  390. #endif
  391. case ALARM_BOOT:
  392. video_printf(" => ALARM BOOT\n");
  393. break;
  394. case FASTBOOT:
  395. video_printf(" => FASTBOOT mode...\n");
  396. break;
  397. default:
  398. video_printf(" => UNKNOWN BOOT\n");
  399. }
  400. return;
  401. #endif
  402. #ifdef USER_BUILD
  403. /* it's ok to display META MODE since it already verfied by preloader */
  404. if (g_boot_mode == META_BOOT)
  405. video_printf(" => META MODE\n");
  406. if (g_boot_mode == FASTBOOT)
  407. video_printf(" => FASTBOOT mode...\n");
  408. return;
  409. #endif
  410. #endif
  411. }
  412. extern uint64_t ld_tt_l1[4];
  413. void platform_init_mmu(void)
  414. {
  415. /* configure available RAM banks */
  416. dram_init();
  417. /* Long-descriptor translation with lpae enable */
  418. arm_mmu_lpae_init();
  419. struct mmu_initial_mapping *m = mmu_initial_mappings;
  420. for (uint i = 0; i < countof(mmu_initial_mappings); i++, m++) {
  421. arch_mmu_map(m->phys, m->virt, m->flags, m->size);
  422. }
  423. arch_enable_mmu(); //enable mmu after setup page table to avoid cpu prefetch which may bring on emi violation
  424. }
  425. /******************************************************************************
  426. ******************************************************************************/
  427. void init_storage(void)
  428. {
  429. #ifdef LK_PROFILING
  430. unsigned int time_nand_emmc = get_timer(0);
  431. #endif
  432. #if defined(MTK_EMMC_SUPPORT)
  433. mmc_legacy_init(1);
  434. #elif defined(MTK_UFS_SUPPORT)
  435. ufs_lk_init();
  436. #else
  437. #ifndef MACH_FPGA
  438. nand_init();
  439. nand_driver_test();
  440. #endif
  441. #endif
  442. #if defined(MTK_UFS_SUPPORT)
  443. init_rpmb_sharemem();
  444. #endif
  445. #ifdef LK_PROFILING
  446. dprintf(CRITICAL, "[PROFILE] ------- NAND/EMMC init takes %d ms --------\n",
  447. (int)get_timer(time_nand_emmc));
  448. #endif
  449. }
  450. /******************************************************************************
  451. ******************************************************************************/
  452. void platform_early_init(void)
  453. {
  454. #ifdef LK_PROFILING
  455. unsigned int time_wdt_early_init;
  456. unsigned int time_init_devinfo_data;
  457. unsigned int time_pmic_init;
  458. unsigned int time_platform_early_init;
  459. time_platform_early_init = get_timer(0);
  460. #endif
  461. lk_register_wdt_callback();
  462. /* initialize the uart */
  463. uart_init_early();
  464. #ifdef LK_PROFILING
  465. time_init_devinfo_data = get_timer(0);
  466. #endif
  467. init_devinfo_data();
  468. #ifdef LK_PROFILING
  469. dprintf(CRITICAL, "[PROFILE] ------- Devinfo Init takes %d ms -------- \n", (int)get_timer(time_init_devinfo_data));
  470. #endif
  471. platform_init_interrupts();
  472. platform_early_init_timer();
  473. #if !defined(USE_DTB_NO_DWS) && !defined(MACH_FPGA)
  474. mt_gpio_set_default();
  475. #endif // !defined(USE_DTB_NO_DWS) && !defined(MACH_FPGA)
  476. dprintf(SPEW, "bootarg_addr: 0x%x, bootarg_size: 0x%x\n", platform_get_bootarg_addr(), platform_get_bootarg_size());
  477. if (g_dram_init_ret < 0) {
  478. dprintf(CRITICAL, "[LK ERROR] DRAM bank number is not correct!!!\n");
  479. while (1) ;
  480. }
  481. //i2c_v1_init();
  482. #ifdef LK_PROFILING
  483. time_wdt_early_init = get_timer(0);
  484. #endif
  485. mtk_wdt_init();
  486. #ifdef LK_PROFILING
  487. dprintf(CRITICAL, "[PROFILE] ------- WDT Init takes %d ms -------- \n", (int)get_timer(time_wdt_early_init));
  488. #endif
  489. //i2c init
  490. i2c_hw_init();
  491. #ifdef MACH_FPGA
  492. mtk_timer_init(); // GPT4 will be initialized at PL after
  493. mtk_wdt_disable(); // WDT will be triggered when uncompressing linux image on FPGA
  494. #endif
  495. pwrap_init_lk();
  496. #ifdef LK_PROFILING
  497. time_pmic_init = get_timer(0);
  498. #endif
  499. #if !defined(MACH_FPGA) && !defined(NO_PMIC)
  500. pmic_init();
  501. #endif
  502. /*
  503. // Workaround by Weiqi
  504. mt6331_upmu_set_rg_vgp1_en(1);
  505. mt6331_upmu_set_rg_vcam_io_en(1);
  506. */
  507. #ifdef LK_PROFILING
  508. dprintf(CRITICAL, "[PROFILE] ------- pmic_init takes %d ms -------- \n", (int)get_timer(time_pmic_init));
  509. #endif
  510. #ifdef LK_PROFILING
  511. dprintf(CRITICAL, "[PROFILE] ------- platform_early_init takes %d ms -------- \n", (int)get_timer(time_platform_early_init));
  512. #endif
  513. }
  514. extern void mt65xx_bat_init(void);
  515. extern bool mtk_bat_allow_backlight_enable(void);
  516. #if defined (MTK_KERNEL_POWER_OFF_CHARGING)
  517. int kernel_charging_boot(void)
  518. {
  519. if ((g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT || g_boot_mode == LOW_POWER_OFF_CHARGING_BOOT) && upmu_is_chr_det() == KAL_TRUE) {
  520. dprintf(INFO,"[%s] Kernel Power Off Charging with Charger/Usb \n", __func__);
  521. return 1;
  522. } else if ((g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT || g_boot_mode == LOW_POWER_OFF_CHARGING_BOOT) && upmu_is_chr_det() == KAL_FALSE) {
  523. dprintf(INFO,"[%s] Kernel Power Off Charging without Charger/Usb \n", __func__);
  524. return -1;
  525. } else
  526. return 0;
  527. }
  528. #endif
  529. static void lk_vb_init(void)
  530. {
  531. u64 pl_start_addr = 0;
  532. PROFILING_START("lk_vb_init");
  533. #ifdef MTK_SECURITY_SW_SUPPORT
  534. #ifdef MTK_VER_SIMPLE_TEST
  535. u32 ret = 0;
  536. ret = sec_mtk_internal_ver_test(MTK_VER_SIMPLE_TEST);
  537. if (ret)
  538. assert(0);
  539. #endif
  540. #ifdef MTK_OTP_FRAMEWORK_V2
  541. enable_anti_rollback_v2_framework();
  542. #endif
  543. /* get preloader start address */
  544. plinfo_get_brom_header_block_size(&pl_start_addr);
  545. /* initialize security library */
  546. sec_func_init(pl_start_addr);
  547. seclib_set_oemkey(g_oemkey, OEM_PUBK_SZ);
  548. #endif
  549. PROFILING_END();
  550. }
  551. static void lk_vb_vfy_logo(void)
  552. {
  553. /* bypass logo vfy in fast meta mode */
  554. if(g_boot_mode == META_BOOT)
  555. return;
  556. #ifdef MTK_SECURITY_SW_SUPPORT
  557. /* Verify logo before use it */
  558. if ( 0 != img_auth_stor("logo", "logo", 0x0) ) {
  559. dprintf(CRITICAL,"<ASSERT> %s:line %d\n",__FILE__,__LINE__);
  560. PAL_ASSERT(0);
  561. }
  562. #endif
  563. }
  564. void platform_init(void)
  565. {
  566. #ifdef LK_PROFILING
  567. unsigned int time_led_init;
  568. unsigned int time_env;
  569. unsigned int time_disp_init;
  570. unsigned int time_load_logo;
  571. unsigned int time_backlight;
  572. unsigned int time_boot_mode;
  573. #ifdef LK_PROFILING
  574. unsigned int disp_update;
  575. #endif
  576. unsigned int time_bat_init;
  577. unsigned int time_RTC_boot_Check;
  578. unsigned int time_show_logo;
  579. unsigned int time_sw_env;
  580. unsigned int time_platform_init;
  581. time_platform_init = get_timer(0);
  582. #endif
  583. bool bearly_backlight_on = false;
  584. dprintf(CRITICAL, "platform_init()\n");
  585. init_storage();
  586. lk_vb_init();
  587. extern void dummy_ap_entry(void)__attribute__((weak)); /* This is empty function for normal load */
  588. if (dummy_ap_entry)
  589. dummy_ap_entry();
  590. #ifdef MTK_AB_OTA_UPDATER
  591. /* get A/B system parameter before load dtb from boot image */
  592. get_AB_OTA_param();
  593. #endif
  594. /* The device tree should be loaded as early as possible. */
  595. load_device_tree();
  596. #if defined(USE_DTB_NO_DWS) && !defined(MACH_FPGA)
  597. mt_gpio_set_default();
  598. #endif // defined(USE_DTB_NO_DWS) && !defined(MACH_FPGA)
  599. #ifndef MACH_FPGA
  600. #ifdef LK_PROFILING
  601. time_led_init = get_timer(0);
  602. #endif
  603. leds_init();
  604. #ifdef LK_PROFILING
  605. dprintf(CRITICAL, "[PROFILE] ------- led init takes %d ms -------- \n", (int)get_timer(time_led_init));
  606. #endif
  607. #endif
  608. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  609. if ((g_boot_arg->boot_reason == BR_USB) && (upmu_is_chr_det() == KAL_FALSE)) {
  610. dprintf(INFO, "[%s] Unplugged Charger/Usb between Pre-loader and Uboot in Kernel Charging Mode, Power Off \n", __func__);
  611. mt6575_power_off();
  612. }
  613. #endif
  614. #ifdef LK_PROFILING
  615. time_env = get_timer(0);
  616. #endif
  617. env_init();
  618. print_env();
  619. #ifdef LK_PROFILING
  620. dprintf(CRITICAL, "[PROFILE] ------- ENV init takes %d ms -------- \n", (int)get_timer(time_env));
  621. #endif
  622. #ifdef LK_PROFILING
  623. time_disp_init = get_timer(0);
  624. #endif
  625. /* initialize the frame buffet information */
  626. g_fb_size = mt_disp_get_vram_size();
  627. #if 0
  628. g_fb_base = memory_size() - g_fb_size + DRAM_PHY_ADDR;
  629. #else
  630. #if 0
  631. if (g_is_64bit_kernel) {
  632. g_fb_base = mblock_reserve(&g_boot_arg->mblock_info, g_fb_size, 0x200000, 0x100000000, RANKMAX);
  633. g_fb_base = ALIGN_TO(g_fb_base,0x200000); // size 2MB align
  634. } else {
  635. g_fb_base = mblock_reserve(&g_boot_arg->mblock_info, g_fb_size, 0x100000, 0x100000000, RANKMAX);
  636. }
  637. #else
  638. g_fb_base = mblock_reserve_ext(&g_boot_arg->mblock_info, g_fb_size, 0x10000, 0x80000000, 0, "framebuffer");
  639. #endif
  640. if (!g_fb_base) {
  641. dprintf(CRITICAL, "reserve framebuffer failed\n");
  642. }
  643. #endif
  644. dprintf(CRITICAL, "FB base = 0x%x, FB size = 0x%x (%d)\n", g_fb_base, g_fb_size, g_fb_size);
  645. #if defined(MTK_SMI_SUPPORT) && !defined(MACH_FPGA)
  646. /* write SMI non on-the-fly register before DISP init */
  647. smi_apply_register_setting();
  648. #endif
  649. #ifndef MACH_FPGA_NO_DISPLAY
  650. mt_disp_init((void *)g_fb_base);
  651. #ifdef LK_PROFILING
  652. dprintf(CRITICAL, "[PROFILE] ------- disp init takes %d ms -------- \n", (int)get_timer(time_disp_init));
  653. #endif
  654. drv_video_init();
  655. #endif
  656. /*for kpd pmic mode setting*/
  657. set_kpd_pmic_mode();
  658. #ifndef MACH_FPGA
  659. #ifdef LK_PROFILING
  660. time_boot_mode = get_timer(0);
  661. #endif
  662. #if !defined(NO_BOOT_MODE_SEL)
  663. boot_mode_select();
  664. #endif
  665. #ifdef MTK_USB2JTAG_SUPPORT
  666. if (g_boot_mode != FASTBOOT) {
  667. extern void usb2jtag_init(void);
  668. usb2jtag_init();
  669. }
  670. #endif
  671. #ifdef MTK_AEE_PLATFORM_DEBUG_SUPPORT
  672. /* init lastbus: MUST call after kedump (in boot_mode_select) */
  673. latch_lastbus_init();
  674. #endif
  675. #ifdef LK_PROFILING
  676. dprintf(CRITICAL, "[PROFILE] ------- boot mode select takes %d ms -------- \n", (int)get_timer(time_boot_mode));
  677. #endif
  678. #endif
  679. #ifndef MACH_FPGA_NO_DISPLAY
  680. /* fast meta mode */
  681. if(g_boot_mode != META_BOOT){
  682. #ifdef LK_PROFILING
  683. time_load_logo = get_timer(0);
  684. #endif
  685. mboot_common_load_logo((unsigned long)mt_get_logo_db_addr_pa(), "logo");
  686. #ifdef LK_PROFILING
  687. dprintf(CRITICAL, "[PROFILE] ------- load_logo takes %d ms -------- \n", (int)get_timer(time_load_logo));
  688. #endif
  689. } else {
  690. /* Indicate logo lib that logo partition is not loaded */
  691. enable_logo(0);
  692. }
  693. #endif
  694. lk_vb_vfy_logo();
  695. /*Show download logo & message on screen */
  696. if (g_boot_arg->boot_mode == DOWNLOAD_BOOT) {
  697. dprintf(CRITICAL, "[LK] boot mode is DOWNLOAD_BOOT\n");
  698. #ifndef MACH_FPGA_NO_DISPLAY
  699. mt_disp_show_boot_logo();
  700. #endif
  701. video_printf(" => Downloading...\n");
  702. dprintf(CRITICAL, "enable backlight after show bootlogo! \n");
  703. #ifndef MACH_FPGA
  704. mt65xx_backlight_on();
  705. #endif
  706. #ifndef MACH_FPGA_NO_DISPLAY
  707. /* pwm need display sof */
  708. mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
  709. #endif
  710. mtk_wdt_disable(); //Disable wdt before jump to DA
  711. platform_uninit();
  712. #ifdef HAVE_CACHE_PL310
  713. l2_disable();
  714. #endif
  715. arch_disable_cache(UCACHE);
  716. arch_disable_mmu();
  717. #ifdef ENABLE_L2_SHARING
  718. config_shared_SRAM_size();
  719. #endif
  720. jump_da(g_boot_arg->da_info.addr, g_boot_arg->da_info.arg1, g_boot_arg->da_info.arg2);
  721. }
  722. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  723. else if (g_boot_mode != ALARM_BOOT && g_boot_mode != FASTBOOT && g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT && mtk_bat_allow_backlight_enable()) {
  724. #ifndef MACH_FPGA_NO_DISPLAY
  725. /* fast meta mode */
  726. if(g_boot_mode != META_BOOT){
  727. #ifdef LK_PROFILING
  728. time_show_logo = get_timer(0);
  729. #endif
  730. mt_disp_show_boot_logo();
  731. #ifdef LK_PROFILING
  732. dprintf(CRITICAL, "[PROFILE] ------- show logo takes %d ms -------- \n", (int)get_timer(time_show_logo));
  733. #endif
  734. }
  735. #endif // MACH_FPGA_NO_DISPLAY
  736. #ifndef MACH_FPGA
  737. #ifdef LK_PROFILING
  738. time_backlight = get_timer(0);
  739. #endif
  740. mt65xx_backlight_on();
  741. #ifdef LK_PROFILING
  742. dprintf(CRITICAL, "[PROFILE] ------- backlight takes %d ms -------- \n", (int)get_timer(time_backlight));
  743. #endif
  744. #endif // MACH_FPGA
  745. #ifndef MACH_FPGA_NO_DISPLAY
  746. /* fast meta mode */
  747. if(g_boot_mode != META_BOOT){
  748. #ifdef LK_PROFILING
  749. disp_update = get_timer(0);
  750. #endif
  751. mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
  752. #ifdef LK_PROFILING
  753. dprintf(CRITICAL, "[PROFILE] ------- disp_update takes %d ms -------- \n", (int)get_timer(disp_update));
  754. #endif
  755. }
  756. #endif // MACH_FPGA_NO_DISPLAY
  757. bearly_backlight_on = true;
  758. dprintf(INFO, "backlight enabled before battery init\n");
  759. logo_lk_t = ((unsigned int)get_timer(boot_time));
  760. }
  761. #endif // MTK_KERNEL_POWER_OFF_CHARGING
  762. #ifdef LK_PROFILING
  763. time_bat_init = get_timer(0);
  764. #endif
  765. #if !defined(MACH_FPGA)
  766. #if !defined(NO_PLL_TURN_OFF)
  767. mt_pll_turn_off();
  768. #endif
  769. #if !defined(NO_DCM)
  770. if (mt_dcm_init())
  771. dprintf(CRITICAL, "mt_dcm_init fail\n");
  772. #endif
  773. #if !defined(NO_BAT_INIT)
  774. mt65xx_bat_init();
  775. #endif
  776. #endif
  777. #ifdef LK_PROFILING
  778. dprintf(CRITICAL, "[PROFILE] ------- battery init takes %d ms -------- \n", (int)get_timer(time_bat_init));
  779. #endif
  780. #ifndef CFG_POWER_CHARGING
  781. #ifdef LK_PROFILING
  782. time_RTC_boot_Check = get_timer(0);
  783. #endif
  784. /* NOTE: if define CFG_POWER_CHARGING, will rtc_boot_check() in mt65xx_bat_init() */
  785. rtc_boot_check(false);
  786. #ifdef LK_PROFILING
  787. dprintf(CRITICAL, "[PROFILE] ------- RTC boot check Init takes %d ms -------- \n", (int)get_timer(time_RTC_boot_Check));
  788. #endif
  789. #endif
  790. #ifdef LK_PROFILING
  791. time_show_logo = get_timer(0);
  792. #endif
  793. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  794. if (kernel_charging_boot() == 1) {
  795. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  796. CHARGER_TYPE CHR_Type_num = CHARGER_UNKNOWN;
  797. CHR_Type_num = hw_charging_get_charger_type();
  798. if ((g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) ||
  799. ((CHR_Type_num != STANDARD_HOST) && (CHR_Type_num != NONSTANDARD_CHARGER))) {
  800. #endif
  801. mt_disp_power(TRUE);
  802. #ifndef MACH_FPGA_NO_DISPLAY
  803. mt_disp_show_low_battery();
  804. #endif
  805. mt65xx_leds_brightness_set(6, 110);
  806. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  807. }
  808. #endif
  809. } else if (g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) {
  810. /* fast meta mode */
  811. if(g_boot_mode != META_BOOT)
  812. if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT) && !bearly_backlight_on) {
  813. #ifndef MACH_FPGA_NO_DISPLAY
  814. mt_disp_show_boot_logo();
  815. #endif
  816. }
  817. }
  818. #else
  819. /* fast meta mode */
  820. if(g_boot_mode != META_BOOT)
  821. if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT) && !bearly_backlight_on) {
  822. #ifndef MACH_FPGA_NO_DISPLAY
  823. mt_disp_show_boot_logo();
  824. #endif
  825. }
  826. #endif
  827. #ifdef LK_PROFILING
  828. if (!bearly_backlight_on)
  829. dprintf(CRITICAL, "[PROFILE] ------- show logo takes %d ms -------- \n", (int)get_timer(time_show_logo));
  830. #endif
  831. #ifdef LK_PROFILING
  832. time_backlight = get_timer(0);
  833. #endif
  834. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  835. if (!is_low_battery(0)) {
  836. #endif
  837. #ifndef MACH_FPGA
  838. mt65xx_backlight_on();
  839. #endif
  840. #ifdef LK_PROFILING
  841. if (!bearly_backlight_on)
  842. dprintf(CRITICAL, "[PROFILE] ------- backlight takes %d ms -------- \n", (int)get_timer(time_backlight));
  843. #endif
  844. //pwm need display sof
  845. #ifndef MACH_FPGA_NO_DISPLAY
  846. #ifdef LK_PROFILING
  847. disp_update = get_timer(0);
  848. #endif
  849. mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
  850. if (!bearly_backlight_on)
  851. logo_lk_t = ((unsigned int)get_timer(boot_time));
  852. #ifdef LK_PROFILING
  853. if (!bearly_backlight_on)
  854. dprintf(CRITICAL, "[PROFILE] ------- disp_update takes %d ms -------- \n", (int)get_timer(disp_update));
  855. #endif
  856. #endif
  857. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  858. }
  859. #endif
  860. #ifndef MACH_FPGA
  861. #ifdef LK_PROFILING
  862. time_sw_env = get_timer(0);
  863. #endif
  864. sw_env();
  865. #ifdef LK_PROFILING
  866. dprintf(CRITICAL, "[PROFILE] ------- sw_env takes %d ms -------- \n", (int)get_timer(time_sw_env));
  867. #endif
  868. #endif
  869. #ifdef LK_PROFILING
  870. dprintf(CRITICAL, "[PROFILE] ------- platform_init takes %d ms -------- \n", (int)get_timer(time_platform_init));
  871. #endif
  872. }
  873. void platform_uninit(void)
  874. {
  875. #ifndef MACH_FPGA
  876. leds_deinit();
  877. platform_lastpc_postinit();
  878. #endif
  879. platform_deinit_interrupts();
  880. return;
  881. }
  882. #ifdef ENABLE_L2_SHARING
  883. #define ADDR_CA7L_CACHE_CONFIG_MP(x) (CA7MCUCFG_BASE + 0x200 * x)
  884. #define L2C_SIZE_CFG_OFFSET 8
  885. #define L2C_SHARE_EN_OFFSET 12
  886. /* 4'b1111: 2048KB(not support)
  887. * 4'b0111: 1024KB(not support)
  888. * 4'b0011: 512KB
  889. * 4'b0001: 256KB
  890. * 4'b0000: 128KB (not support)
  891. */
  892. int is_l2_need_config(void)
  893. {
  894. volatile unsigned int cache_cfg, addr;
  895. addr = ADDR_CA7L_CACHE_CONFIG_MP(0);
  896. cache_cfg = DRV_Reg32(addr);
  897. cache_cfg = cache_cfg >> L2C_SIZE_CFG_OFFSET;
  898. /* only read 256KB need to be config.*/
  899. if ((cache_cfg &(0x7)) == 0x1) {
  900. return 1;
  901. }
  902. return 0;
  903. }
  904. void cluster_l2_share_enable(int cluster)
  905. {
  906. volatile unsigned int cache_cfg, addr;
  907. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  908. /* set L2C size to 256KB */
  909. cache_cfg = DRV_Reg32(addr);
  910. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  911. cache_cfg |= 0x1 << L2C_SIZE_CFG_OFFSET;
  912. /* enable L2C_share_en. Sram only for other to use*/
  913. cache_cfg |= (0x1 << L2C_SHARE_EN_OFFSET);
  914. DRV_WriteReg32(addr, cache_cfg);
  915. }
  916. void cluster_l2_share_disable(int cluster)
  917. {
  918. volatile unsigned int cache_cfg, addr;
  919. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  920. /* set L2C size to 512KB */
  921. cache_cfg = DRV_Reg32(addr);
  922. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  923. cache_cfg |= 0x3 << L2C_SIZE_CFG_OFFSET;
  924. DRV_WriteReg32(addr, cache_cfg);
  925. /* disable L2C_share_en. Sram only for cpu to use*/
  926. cache_cfg &= ~(0x1 << L2C_SHARE_EN_OFFSET);
  927. DRV_WriteReg32(addr, cache_cfg);
  928. }
  929. /* config L2 cache and sram to its size */
  930. void config_L2_size(void)
  931. {
  932. int cluster;
  933. if (is_l2_need_config()) {
  934. /*
  935. * Becuase mcu config is protected.
  936. * only can write in secutity mode
  937. */
  938. if (dev_info_nr_cpu() == 6) {
  939. cluster_l2_share_disable(0);
  940. cluster_l2_share_enable(1);
  941. }
  942. else {
  943. for (cluster = 0; cluster < 2; cluster++) {
  944. cluster_l2_share_disable(cluster);
  945. }
  946. }
  947. }
  948. }
  949. /* config SRAM back from L2 cache for DA relocation */
  950. void config_shared_SRAM_size(void)
  951. {
  952. int cluster;
  953. if (is_l2_need_config()) {
  954. /*
  955. * Becuase mcu config is protected.
  956. * only can write in secutity mode
  957. */
  958. for (cluster = 0; cluster < 2; cluster++) {
  959. cluster_l2_share_enable(cluster);
  960. }
  961. }
  962. }
  963. #endif
  964. void platform_sec_post_init(void)
  965. {
  966. unsigned int ret = 0;
  967. /* Lock Device APC in LK */
  968. dprintf(CRITICAL, "[DEVAPC] sec_post_init\n");
  969. ret = crypto_hw_engine_disable();
  970. if (ret) {
  971. dprintf(CRITICAL, "[SEC] crypto engine HW disable fail\n");
  972. }
  973. #if DEVAPC_TURN_ON
  974. dprintf(CRITICAL, "[DEVAPC] platform_sec_post_init - SMC call to ATF from LK\n");
  975. mt_secure_call(0x82000101, 0, 0, 0);
  976. #endif
  977. }
  978. u32 get_devinfo_with_index(u32 index)
  979. {
  980. return internal_get_devinfo_with_index(index);
  981. }
  982. int platform_skip_hibernation(void)
  983. {
  984. switch (g_boot_arg->boot_reason) {
  985. #if 0 // let schedule power on to go hiberantion bootup process
  986. case BR_RTC:
  987. #endif
  988. case BR_WDT:
  989. case BR_WDT_BY_PASS_PWK:
  990. case BR_WDT_SW:
  991. case BR_WDT_HW:
  992. return 1;
  993. }
  994. return 0;
  995. }
  996. int is_meta_log_disable(void)
  997. {
  998. return g_boot_arg->meta_log_disable;
  999. }