ddp_misc.c 6.6 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #define LOG_TAG "MISC"
  32. #include <platform/ddp_reg.h>
  33. #include <platform/ddp_misc.h>
  34. #include <platform/ddp_log.h>
  35. #include <debug.h>
  36. void ddp_bypass_color(int idx, unsigned int width, unsigned int height, void * handle)
  37. {
  38. DDPDBG("bypass color\n");
  39. DISP_REG_SET(NULL,DISP_COLOR_CFG_MAIN, 1<<7); //bypass color engine
  40. DISP_REG_SET(NULL,DISP_COLOR_INTERNAL_IP_WIDTH, width); //bypass color engine
  41. DISP_REG_SET(NULL,DISP_COLOR_INTERNAL_IP_HEIGHT, height); //bypass color engine
  42. DISP_REG_SET(NULL,DISP_COLOR_START, 0x1); // start
  43. }
  44. void ddp_bypass_ccorr(unsigned int width, unsigned int height, void * handle)
  45. {
  46. DDPDBG("bypass ccorr\n");
  47. DISP_REG_MASK(NULL,DISP_REG_CCORR_CFG, 1, 1);
  48. DISP_REG_SET(NULL,DISP_REG_CCORR_SIZE, (width<<16)|height); //bypass color engine
  49. DISP_REG_SET(NULL,DISP_REG_CCORR_EN, 1);
  50. }
  51. void ddp_bypass_aal(unsigned int width, unsigned int height, void * handle)
  52. {
  53. DDPDBG("bypass aal\n");
  54. DISP_REG_SET_FIELD(handle,CFG_FLD_RELAY_MODE, DISP_AAL_CFG, 0x1); //relay_mode
  55. DISP_REG_SET(NULL,DISP_AAL_SIZE, (width<<16)|height); //bypass color engine
  56. DISP_REG_SET(handle,DISP_AAL_EN, 0x1); //bypass mode
  57. }
  58. void ddp_bypass_gamma(unsigned int width, unsigned int height, void * handle)
  59. {
  60. DDPDBG("bypass gamma\n");
  61. DISP_REG_MASK(NULL,DISP_REG_GAMMA_CFG, 1, 1);
  62. DISP_REG_SET(NULL,DISP_REG_GAMMA_SIZE, (width<<16)|height); //bypass color engine
  63. DISP_REG_SET(handle,DISP_REG_GAMMA_EN, 0x1); //bypass mode
  64. }
  65. static int config_color(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  66. {
  67. int color_idx;
  68. if (module == DISP_MODULE_COLOR0)
  69. color_idx = 0;
  70. else
  71. color_idx = 1;
  72. DDPDBG("config color dirty = %d\n", pConfig->dst_dirty);
  73. if (!pConfig->dst_dirty) {
  74. return 0;
  75. }
  76. ddp_bypass_color(color_idx,pConfig->dst_w, pConfig->dst_h,cmdq);
  77. return 0;
  78. }
  79. static int config_ccorr(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  80. {
  81. DDPDBG("config ccorr dirty = %d\n", pConfig->dst_dirty);
  82. if (!pConfig->dst_dirty) {
  83. return 0;
  84. }
  85. ddp_bypass_ccorr(pConfig->dst_w, pConfig->dst_h,cmdq);
  86. return 0;
  87. }
  88. static int config_aal(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  89. {
  90. DDPDBG("config aal dirty = %d\n", pConfig->dst_dirty);
  91. if (!pConfig->dst_dirty) {
  92. return 0;
  93. }
  94. ddp_bypass_aal(pConfig->dst_w, pConfig->dst_h,cmdq);
  95. return 0;
  96. }
  97. static int config_gamma(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  98. {
  99. DDPDBG("config gamma dirty = %d\n", pConfig->dst_dirty);
  100. if (!pConfig->dst_dirty) {
  101. return 0;
  102. }
  103. ddp_bypass_gamma(pConfig->dst_w, pConfig->dst_h,cmdq);
  104. return 0;
  105. }
  106. static int clock_on(DISP_MODULE_ENUM module,void * handle)
  107. {
  108. ddp_enable_module_clock(module);
  109. return 0;
  110. }
  111. static int clock_off(DISP_MODULE_ENUM module,void * handle)
  112. {
  113. ddp_disable_module_clock(module);
  114. return 0;
  115. }
  116. ///////////////////////////////////////////////////////////
  117. // color
  118. DDP_MODULE_DRIVER ddp_driver_color = {
  119. .init = clock_on,
  120. .deinit = clock_off,
  121. .config = config_color,
  122. .start = NULL,
  123. .trigger = NULL,
  124. .stop = NULL,
  125. .reset = NULL,
  126. .power_on = clock_on,
  127. .power_off = clock_off,
  128. .is_idle = NULL,
  129. .is_busy = NULL,
  130. .dump_info = NULL,
  131. .bypass = NULL,
  132. .build_cmdq = NULL,
  133. .set_lcm_utils = NULL,
  134. };
  135. // ccorr
  136. DDP_MODULE_DRIVER ddp_driver_ccorr = {
  137. .init = clock_on,
  138. .deinit = clock_off,
  139. .config = config_ccorr,
  140. .start = NULL,
  141. .trigger = NULL,
  142. .stop = NULL,
  143. .reset = NULL,
  144. .power_on = clock_on,
  145. .power_off = clock_off,
  146. .is_idle = NULL,
  147. .is_busy = NULL,
  148. .dump_info = NULL,
  149. .bypass = NULL,
  150. .build_cmdq = NULL,
  151. .set_lcm_utils = NULL,
  152. };
  153. // aal
  154. DDP_MODULE_DRIVER ddp_driver_aal = {
  155. .init = clock_on,
  156. .deinit = clock_off,
  157. .config = config_aal,
  158. .start = NULL,
  159. .trigger = NULL,
  160. .stop = NULL,
  161. .reset = NULL,
  162. .power_on = clock_on,
  163. .power_off = clock_off,
  164. .is_idle = NULL,
  165. .is_busy = NULL,
  166. .dump_info = NULL,
  167. .bypass = NULL,
  168. .build_cmdq = NULL,
  169. .set_lcm_utils = NULL,
  170. };
  171. // gamma
  172. DDP_MODULE_DRIVER ddp_driver_gamma = {
  173. .init = clock_on,
  174. .deinit = clock_off,
  175. .config = config_gamma,
  176. .start = NULL,
  177. .trigger = NULL,
  178. .stop = NULL,
  179. .reset = NULL,
  180. .power_on = clock_on,
  181. .power_off = clock_off,
  182. .is_idle = NULL,
  183. .is_busy = NULL,
  184. .dump_info = NULL,
  185. .bypass = NULL,
  186. .build_cmdq = NULL,
  187. .set_lcm_utils = NULL,
  188. };