primary_display.c 35 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <video_fb.h>
  32. #include <video.h>
  33. #include <target/board.h>
  34. #include <env.h>
  35. #include "lcm_drv.h"
  36. #include <string.h>
  37. #include <stdlib.h>
  38. #include <platform/mt_gpt.h>
  39. #include <platform/disp_drv_platform.h>
  40. #include <platform/disp_drv_log.h>
  41. #include <platform/boot_mode.h>
  42. #include <platform/primary_display.h>
  43. #include <platform/disp_lcm.h>
  44. //#include<linux/timer.h>
  45. #define DDP_LK_BOOT
  46. #ifndef HZ
  47. #define HZ 100
  48. #endif
  49. #ifdef DDP_LK_BOOT
  50. typedef void * cmdqRecHandle;
  51. #endif
  52. #define ALIGN_TO(x, n) \
  53. (((x) + ((n) - 1)) & ~((n) - 1))
  54. int primary_display_use_cmdq = CMDQ_DISABLE;
  55. int primary_display_use_m4u = 0;
  56. DISP_PRIMARY_PATH_MODE primary_display_mode = DIRECT_LINK_MODE;
  57. static UINT32 disp_fb_bpp = 32; ///ARGB8888
  58. static UINT32 disp_fb_pages = 3; ///double buffer
  59. static UINT32 display_init;
  60. //DDP_SCENARIO_ENUM ddp_scenario = DDP_SCENARIO_RDMA1_DISP;
  61. extern int ddp_dsi_set_lcm_utils(DISP_MODULE_ENUM module, LCM_DRIVER *lcm_drv);
  62. extern int ddp_dsi_dump(DISP_MODULE_ENUM module, int level);
  63. extern void disp_path_clock_on(char *str);
  64. typedef struct _disp_dfo_item {
  65. char name[32];
  66. int value;
  67. } disp_dfo_item_t;
  68. static disp_dfo_item_t disp_dfo_setting[] = {
  69. {"LCM_FAKE_WIDTH", 0},
  70. {"LCM_FAKE_HEIGHT", 0},
  71. {"DISP_DEBUG_SWITCH", 0}
  72. };
  73. typedef struct {
  74. int state;
  75. int need_trigger_overlay;
  76. DISP_PRIMARY_PATH_MODE mode;
  77. unsigned int last_vsync_tick;
  78. #ifndef DDP_LK_BOOT
  79. struct mutex lock;
  80. #endif
  81. disp_lcm_handle * plcm;
  82. cmdqRecHandle cmdq_handle_config;
  83. cmdqRecHandle cmdq_handle_trigger;
  84. disp_path_handle dpmgr_handle;
  85. disp_path_handle ovl2mem_path_handle;
  86. } display_primary_path_context;
  87. #define pgc _get_context()
  88. static display_primary_path_context* _get_context(void)
  89. {
  90. static int is_context_inited = 0;
  91. static display_primary_path_context g_context;
  92. if (!is_context_inited) {
  93. memset((void*)&g_context, 0, sizeof(display_primary_path_context));
  94. is_context_inited = 1;
  95. }
  96. return &g_context;
  97. }
  98. static void _primary_path_lock(void)
  99. {
  100. #ifndef DDP_LK_BOOT
  101. disp_sw_mutex_lock(&(pgc->lock));
  102. #endif
  103. }
  104. static void _primary_path_unlock(void)
  105. {
  106. #ifndef DDP_LK_BOOT
  107. disp_sw_mutex_unlock(&(pgc->lock));
  108. #endif
  109. }
  110. static DISP_MODULE_ENUM _get_dst_module_by_lcm(disp_lcm_handle *plcm)
  111. {
  112. if (plcm == NULL) {
  113. DISPERR("plcm is null\n");
  114. return DISP_MODULE_UNKNOWN;
  115. }
  116. if (plcm->params->type == LCM_TYPE_DSI) {
  117. if (plcm->lcm_if_id == LCM_INTERFACE_DSI0) {
  118. return DISP_MODULE_DSI0;
  119. } else if (plcm->lcm_if_id == LCM_INTERFACE_DSI1) {
  120. return DISP_MODULE_DSI1;
  121. } else if (plcm->lcm_if_id == LCM_INTERFACE_DSI_DUAL) {
  122. return DISP_MODULE_DSIDUAL;
  123. } else {
  124. return DISP_MODULE_DSI0;
  125. }
  126. } else if (plcm->params->type == LCM_TYPE_DPI) {
  127. return DISP_MODULE_DPI;
  128. } else {
  129. DISPERR("can't find primary path dst module\n");
  130. return DISP_MODULE_UNKNOWN;
  131. }
  132. }
  133. static int _build_path_direct_link(void)
  134. {
  135. int ret = 0;
  136. DISP_MODULE_ENUM dst_module = 0;
  137. DISPFUNC();
  138. pgc->mode = DIRECT_LINK_MODE;
  139. pgc->dpmgr_handle = dpmgr_create_path(DDP_SCENARIO_PRIMARY_DISP, pgc->cmdq_handle_config);
  140. if (pgc->dpmgr_handle) {
  141. DISPCHECK("dpmgr create path SUCCESS(0x%08x)\n", (unsigned int)pgc->dpmgr_handle);
  142. } else {
  143. DISPCHECK("dpmgr create path FAIL\n");
  144. return -1;
  145. }
  146. dst_module = _get_dst_module_by_lcm(pgc->plcm);
  147. dpmgr_path_set_dst_module(pgc->dpmgr_handle, dst_module);
  148. DISPCHECK("dpmgr set dst module FINISHED(%s)\n", ddp_get_module_name(dst_module));
  149. dpmgr_set_lcm_utils(pgc->dpmgr_handle, pgc->plcm->drv);
  150. return ret;
  151. }
  152. static int _build_path_decouple(void)
  153. {
  154. return 0;
  155. }
  156. static int _build_path_single_layer(void)
  157. {
  158. return 0;
  159. }
  160. static int _build_path_debug_rdma1_dsi0(void)
  161. {
  162. int ret = 0;
  163. DISP_MODULE_ENUM dst_module = 0;
  164. DISPFUNC();
  165. pgc->mode = DEBUG_RDMA1_DSI0_MODE;
  166. pgc->dpmgr_handle = dpmgr_create_path(DDP_SCENARIO_SUB_RDMA1_DISP, pgc->cmdq_handle_config);
  167. if (pgc->dpmgr_handle) {
  168. DISPCHECK("dpmgr create path SUCCESS(0x%08x)\n", (unsigned int)pgc->dpmgr_handle);
  169. } else {
  170. DISPCHECK("dpmgr create path FAIL\n");
  171. return -1;
  172. }
  173. dst_module = _get_dst_module_by_lcm(pgc->plcm);
  174. dpmgr_path_set_dst_module(pgc->dpmgr_handle, dst_module);
  175. DISPCHECK("dpmgr set dst module FINISHED(%s)\n", ddp_get_module_name(dst_module));
  176. dpmgr_set_lcm_utils(pgc->dpmgr_handle, pgc->plcm->drv);
  177. return ret;
  178. }
  179. static void _build_cmdq_trigger_loop(void)
  180. {
  181. #ifndef DDP_LK_BOOT
  182. int ret = 0;
  183. cmdqRecCreate(CMDQ_SCENARIO_TRIGGER_LOOP, &(pgc->cmdq_handle_trigger));
  184. DISPMSG("primary path trigger thread cmd handle=0x%08x\n", pgc->cmdq_handle_trigger);
  185. cmdqRecReset(pgc->cmdq_handle_trigger);
  186. if (primary_display_is_video_mode()) {
  187. // wait and clear stream_done
  188. ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_EVENT_MUTEX0_STREAM_EOF);
  189. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,CMDQ_AFTER_STREAM_EOF);
  190. //ret = cmdqRecSetEventToken(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_CONFIG_ALLOW);
  191. } else {
  192. // only in DSI Command mode we need to wait these
  193. ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_CONFIG_DIRTY);
  194. // no internal te on fpga now.
  195. //ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_EVENT_MDP_DSI0_TE_SOF);
  196. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,CMDQ_BEFORE_STREAM_SOF);
  197. // block config threads, we'll about to update frame
  198. ret = cmdqRecClearEventToken(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_CONFIG_ALLOW);
  199. // only in DSI command mode we need to enable mutex explicitly
  200. // WRITE mutex enable
  201. dpmgr_path_trigger(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,primary_display_use_cmdq);
  202. //ret = cmdqRecWrite(pgc->cmdq_handle_trigger, (unsigned int)(DISP_REG_CONFIG_MUTEX_EN(0))&0x1fffffff, 1, ~0);
  203. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,CMDQ_WAIT_STREAM_EOF_EVENT);
  204. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,CMDQ_CHECK_IDLE_AFTER_STREAM_EOF);
  205. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,CMDQ_AFTER_STREAM_EOF);
  206. //ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_EVENT_DISP_RDMA0_EOF);
  207. // polling DSI idle
  208. //ret = cmdqRecPoll(pgc->cmdq_handle_trigger, 0x1401b00c, 0, 0x80000000);
  209. // polling wdma frame done
  210. //ret = cmdqRecPoll(pgc->cmdq_handle_trigger, 0x140060A0, 1, 0x1);
  211. ret = cmdqRecSetEventToken(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_CONFIG_ALLOW);
  212. /*********************/
  213. /***build cmdq finished***/
  214. /*********************/
  215. // TODO:
  216. // cmdqRecDumphandle(pgc->cmdq_handle_trigger);
  217. // RUN forever!!!!
  218. BUG_ON(ret < 0);
  219. }
  220. #endif
  221. }
  222. static void _start_cmdq_trigger_loop(void)
  223. {
  224. #ifndef DDP_LK_BOOT
  225. int ret = 0;
  226. // this should be called only once because trigger loop will nevet stop
  227. cmdqCoreSetEvent(CMDQ_SYNC_TOKEN_CONFIG_ALLOW);
  228. ret = cmdqRecStartLoop(pgc->cmdq_handle_trigger);
  229. #endif
  230. }
  231. static void _set_cmdq_config_handle_dirty(void)
  232. {
  233. #ifndef DDP_LK_BOOT
  234. ddp_insert_config_dirty_rec(pgc->cmdq_handle_config);
  235. cmdqRecFlush(pgc->cmdq_handle_config);
  236. #endif
  237. }
  238. static void _reset_cmdq_config_handle(void)
  239. {
  240. #ifndef DDP_LK_BOOT
  241. cmdqRecReset(pgc->cmdq_handle_config);
  242. ddp_insert_config_allow_rec(pgc->cmdq_handle_config);
  243. #endif
  244. }
  245. static int _convert_disp_input_to_rdma(RDMA_CONFIG_STRUCT *dst, disp_input_config* src)
  246. {
  247. if (src && dst) {
  248. dst->inputFormat = src->fmt;
  249. dst->address = src->addr;
  250. dst->width = src->src_w;
  251. dst->height = src->src_h;
  252. dst->pitch = src->src_pitch;
  253. return 0;
  254. } else {
  255. DISPERR("src(0x%08x) or dst(0x%08x) is null\n", (unsigned int)src, (unsigned int)dst);
  256. return -1;
  257. }
  258. }
  259. static int _convert_disp_input_to_ovl(OVL_CONFIG_STRUCT *dst, disp_input_config* src)
  260. {
  261. if (src && dst) {
  262. dst->layer = src->layer;
  263. dst->layer_en = src->layer_en;
  264. dst->fmt = src->fmt;
  265. dst->addr = src->addr;
  266. dst->vaddr = src->vaddr;
  267. dst->src_x = src->src_x;
  268. dst->src_y = src->src_y;
  269. dst->src_w = src->src_w;
  270. dst->src_h = src->src_h;
  271. dst->src_pitch = src->src_pitch;
  272. dst->dst_x = src->dst_x;
  273. dst->dst_y = src->dst_y;
  274. dst->dst_w = src->dst_w;
  275. dst->dst_h = src->dst_h;
  276. dst->keyEn = src->keyEn;
  277. dst->key = src->key;
  278. dst->aen = src->aen;
  279. dst->alpha = src->alpha;
  280. dst->isDirty = src->isDirty;
  281. dst->buff_idx = src->buff_idx;
  282. dst->identity = src->identity;
  283. dst->connected_type = src->connected_type;
  284. dst->security = src->security;
  285. return 0;
  286. } else {
  287. DISPERR("src(0x%08x) or dst(0x%08x) is null\n", (unsigned int)src, (unsigned int)dst);
  288. return -1;
  289. }
  290. }
  291. void _dump_lcm_info_by_video_printf(void)
  292. {
  293. LCM_DRIVER *l = NULL;
  294. LCM_PARAMS *p = NULL;
  295. disp_lcm_handle *plcm = pgc->plcm;
  296. if (plcm == NULL) {
  297. DISPERR("plcm is null\n");
  298. return;
  299. }
  300. l = plcm->drv;
  301. p = plcm->params;
  302. if (l && p) {
  303. video_printf("[LCM], name: %s\n", l->name);
  304. video_printf("[LCM] resolution: %d x %d\n", p->width, p->height);
  305. video_printf("[LCM] physical size: %d x %d\n", p->physical_width, p->physical_height);
  306. video_printf("[LCM] physical size: %d x %d\n", p->physical_width, p->physical_height);
  307. switch (p->lcm_if) {
  308. case LCM_INTERFACE_DSI0:
  309. video_printf("[LCM] interface: DSI0\n");
  310. break;
  311. case LCM_INTERFACE_DSI1:
  312. video_printf("[LCM] interface: DSI1\n");
  313. break;
  314. case LCM_INTERFACE_DPI0:
  315. video_printf("[LCM] interface: DPI0\n");
  316. break;
  317. case LCM_INTERFACE_DPI1:
  318. video_printf("[LCM] interface: DPI1\n");
  319. break;
  320. case LCM_INTERFACE_DBI0:
  321. video_printf("[LCM] interface: DBI0\n");
  322. break;
  323. default:
  324. video_printf("[LCM] interface: unknown\n");
  325. break;
  326. }
  327. switch (p->type) {
  328. case LCM_TYPE_DBI:
  329. video_printf("[LCM] Type: DBI\n");
  330. break;
  331. case LCM_TYPE_DSI:
  332. video_printf("[LCM] Type: DSI\n");
  333. break;
  334. case LCM_TYPE_DPI:
  335. video_printf("[LCM] Type: DPI\n");
  336. break;
  337. default:
  338. video_printf("[LCM] TYPE: unknown\n");
  339. break;
  340. }
  341. if (p->type == LCM_TYPE_DSI) {
  342. switch (p->dsi.mode) {
  343. case CMD_MODE:
  344. video_printf("[LCM] DSI Mode: CMD_MODE\n");
  345. break;
  346. case SYNC_PULSE_VDO_MODE:
  347. video_printf("[LCM] DSI Mode: SYNC_PULSE_VDO_MODE\n");
  348. break;
  349. case SYNC_EVENT_VDO_MODE:
  350. video_printf("[LCM] DSI Mode: SYNC_EVENT_VDO_MODE\n");
  351. break;
  352. case BURST_VDO_MODE:
  353. video_printf("[LCM] DSI Mode: BURST_VDO_MODE\n");
  354. break;
  355. default:
  356. video_printf("[LCM] DSI Mode: Unknown\n");
  357. break;
  358. }
  359. }
  360. if (p->type == LCM_TYPE_DSI) {
  361. video_printf("[LCM] LANE_NUM: %d,data_format: %d\n",
  362. p->dsi.LANE_NUM,p->dsi.data_format.format);
  363. #ifdef MY_TODO
  364. #error
  365. #endif
  366. video_printf("[LCM] vact: %d, vbp: %d, vfp: %d, vact_line: %d,"
  367. "hact: %d, hbp: %d, hfp: %d, hblank: %d\n",
  368. p->dsi.vertical_sync_active,
  369. p->dsi.vertical_backporch,
  370. p->dsi.vertical_frontporch,
  371. p->dsi.vertical_active_line,
  372. p->dsi.horizontal_sync_active,
  373. p->dsi.horizontal_backporch,
  374. p->dsi.horizontal_frontporch,
  375. p->dsi.horizontal_blanking_pixel);
  376. video_printf("[LCM] pll_select: %d, pll_div1: %d,"
  377. " pll_div2: %d, fbk_div: %d,fbk_sel: %d, rg_bir: %d\n",
  378. p->dsi.pll_select,
  379. p->dsi.pll_div1,
  380. p->dsi.pll_div2,
  381. p->dsi.fbk_div,
  382. p->dsi.fbk_sel,
  383. p->dsi.rg_bir);
  384. video_printf("[LCM] rg_bic: %d, rg_bp: %d, PLL_CLOCK: %d,"
  385. " dsi_clock: %d, ssc_range: %d, ssc_disable: %d,"
  386. " compatibility_for_nvk: %d, cont_clock: %d\n",
  387. p->dsi.rg_bic,
  388. p->dsi.rg_bp,
  389. p->dsi.PLL_CLOCK,
  390. p->dsi.dsi_clock,
  391. p->dsi.ssc_range,
  392. p->dsi.ssc_disable,
  393. p->dsi.compatibility_for_nvk,
  394. p->dsi.cont_clock);
  395. video_printf("[LCM] lcm_ext_te_enable: %d,"
  396. " noncont_clock: %d, noncont_clock_period: %d\n",
  397. p->dsi.lcm_ext_te_enable,
  398. p->dsi.noncont_clock,
  399. p->dsi.noncont_clock_period);
  400. }
  401. }
  402. return;
  403. }
  404. unsigned int mt_disp_parse_dfo_setting(void)
  405. {
  406. unsigned int i, j=0 ;
  407. char tmp[11];
  408. char *buffer = NULL;
  409. char *ptr = NULL;
  410. buffer = (char *)get_env("DFO");
  411. DISPMSG("env buffer = %s\n", buffer);
  412. if (buffer != NULL) {
  413. for (i = 0; i< (sizeof(disp_dfo_setting)/sizeof(disp_dfo_item_t)); i++) {
  414. j = 0;
  415. memset((void*)tmp, 0, sizeof(tmp)/sizeof(tmp[0]));
  416. ptr = strstr(buffer, disp_dfo_setting[i].name);
  417. if (ptr == NULL) continue;
  418. DISPMSG("disp_dfo_setting[%d].name = [%s]\n", i, ptr);
  419. do {} while ((*ptr++) != ',');
  420. do {tmp[j++] = *ptr++;}
  421. while (*ptr != ',' && j < sizeof(tmp)/sizeof(tmp[0]));
  422. disp_dfo_setting[i].value = atoi((const char*)tmp);
  423. DISPMSG("disp_dfo_setting[%d].name = [%s|%d]\n", i, tmp, disp_dfo_setting[i].value);
  424. }
  425. } else {
  426. DISPMSG("env buffer = NULL\n");
  427. }
  428. return 0;
  429. }
  430. int mt_disp_get_dfo_setting(const char *string, unsigned int *value)
  431. {
  432. char *disp_name;
  433. int disp_value;
  434. unsigned int i = 0;
  435. if (string == NULL)
  436. return -1;
  437. for (i=0; i<(sizeof(disp_dfo_setting)/sizeof(disp_dfo_item_t)); i++) {
  438. disp_name = disp_dfo_setting[i].name;
  439. disp_value = disp_dfo_setting[i].value;
  440. if (!strcmp(disp_name, string)) {
  441. *value = disp_value;
  442. DISPMSG("%s = [DEC]%d [HEX]0x%08x\n", disp_name, disp_value, disp_value);
  443. return 0;
  444. }
  445. }
  446. return 0;
  447. }
  448. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  449. int primary_display_is_lcm_connected(void)
  450. {
  451. return pgc->plcm->is_connected;
  452. }
  453. const char* primary_display_get_lcm_name(void)
  454. {
  455. return disp_lcm_get_name(pgc->plcm);
  456. }
  457. int primary_display_change_lcm_resolution(unsigned int width, unsigned int height)
  458. {
  459. if (pgc->plcm) {
  460. DISPMSG("LCM Resolution will be changed, original: %dx%d, now: %dx%d\n", pgc->plcm->params->width, pgc->plcm->params->height, width, height);
  461. // align with 4 is the minimal check, to ensure we can boot up into kernel, and could modify dfo setting again using meta tool
  462. // otherwise we will have a panic in lk(root cause unknown).
  463. if (width >pgc->plcm->params->width || height > pgc->plcm->params->height || width == 0 || height == 0 || width %4 || height %2) {
  464. DISPERR("Invalid resolution: %dx%d\n", width, height);
  465. return -1;
  466. }
  467. if (primary_display_is_video_mode()) {
  468. DISPERR("Warning!!!Video Mode can't support multiple resolution!\n");
  469. return -1;
  470. }
  471. pgc->plcm->params->width = width;
  472. pgc->plcm->params->height = height;
  473. return 0;
  474. } else {
  475. return -1;
  476. }
  477. }
  478. int primary_display_init(char *lcm_name)
  479. {
  480. DISPFUNC();
  481. DISP_STATUS ret = DISP_STATUS_OK;
  482. LCM_PARAMS *lcm_param = NULL;
  483. dpmgr_init();
  484. #ifndef DDP_LK_BOOT
  485. mutex_init(&(pgc->lock));
  486. #endif
  487. _primary_path_lock();
  488. if (pgc->plcm == NULL)
  489. pgc->plcm = disp_lcm_probe(lcm_name, LCM_INTERFACE_NOTDEFINED);
  490. if (pgc->plcm == NULL) {
  491. DISPCHECK("disp_lcm_probe returns null\n");
  492. ret = DISP_STATUS_ERROR;
  493. goto done;
  494. } else {
  495. DISPCHECK("disp_lcm_probe SUCCESS\n");
  496. }
  497. lcm_param = disp_lcm_get_params(pgc->plcm);
  498. if (lcm_param == NULL) {
  499. DISPERR("get lcm params FAILED\n");
  500. ret = DISP_STATUS_ERROR;
  501. goto done;
  502. }
  503. if (primary_display_mode == DIRECT_LINK_MODE) {
  504. _build_path_direct_link();
  505. DISPCHECK("primary display is DIRECT LINK MODE\n");
  506. } else if (primary_display_mode == DECOUPLE_MODE) {
  507. _build_path_decouple();
  508. DISPCHECK("primary display is DECOUPLE MODE\n");
  509. } else if (primary_display_mode == SINGLE_LAYER_MODE) {
  510. _build_path_single_layer();
  511. DISPCHECK("primary display is SINGLE LAYER MODE\n");
  512. } else if (primary_display_mode == DEBUG_RDMA1_DSI0_MODE) {
  513. _build_path_debug_rdma1_dsi0();
  514. DISPCHECK("primary display is DEBUG RDMA1 DSI0 MODE\n");
  515. } else {
  516. DISPCHECK("primary display mode is WRONG\n");
  517. }
  518. _build_cmdq_trigger_loop();
  519. DISPCHECK("primary display BUILD cmdq trigger loop finished\n");
  520. _start_cmdq_trigger_loop();
  521. DISPCHECK("primary display START cmdq trigger loop finished\n");
  522. dpmgr_path_set_video_mode(pgc->dpmgr_handle, primary_display_is_video_mode());
  523. dpmgr_path_init(pgc->dpmgr_handle, CMDQ_DISABLE);
  524. disp_ddp_path_config data_config;
  525. memset((void*)&data_config, 0, sizeof(disp_ddp_path_config));
  526. memcpy(&(data_config.dsi_config), &(lcm_param->dsi), sizeof(LCM_DSI_PARAMS));
  527. #if defined(MTK_ROUND_CORNER_SUPPORT) && defined(DISP_HW_RC)
  528. memcpy(&(data_config.round_corner_params), &(lcm_param->round_corner_params), sizeof(LCM_ROUND_CORNER));
  529. #endif
  530. data_config.dst_w = disp_lcm_width(pgc->plcm);
  531. data_config.dst_h = disp_lcm_height(pgc->plcm);
  532. if (lcm_param->type == LCM_TYPE_DSI) {
  533. if (lcm_param->dsi.data_format.format == LCM_DSI_FORMAT_RGB888)
  534. data_config.lcm_bpp = 24;
  535. else if (lcm_param->dsi.data_format.format == LCM_DSI_FORMAT_RGB565)
  536. data_config.lcm_bpp = 16;
  537. else if (lcm_param->dsi.data_format.format == LCM_DSI_FORMAT_RGB666)
  538. data_config.lcm_bpp = 18;
  539. } else if (lcm_param->type == LCM_TYPE_DPI) {
  540. if ( lcm_param->dpi.format == LCM_DPI_FORMAT_RGB888)
  541. data_config.lcm_bpp = 24;
  542. else if ( lcm_param->dpi.format == LCM_DPI_FORMAT_RGB565)
  543. data_config.lcm_bpp = 16;
  544. if ( lcm_param->dpi.format == LCM_DPI_FORMAT_RGB666)
  545. data_config.lcm_bpp = 18;
  546. }
  547. data_config.dst_dirty = 1;
  548. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, CMDQ_DISABLE);
  549. ret = disp_lcm_init(pgc->plcm);
  550. if (primary_display_is_video_mode()) {
  551. if (lcm_param->dsi.lfr_enable == 1) {
  552. dpmgr_map_event_to_irq(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC, DDP_IRQ_DSI0_FRAME_DONE);
  553. } else {
  554. dpmgr_map_event_to_irq(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC, DDP_IRQ_RDMA0_DONE);
  555. }
  556. } else {
  557. }
  558. dpmgr_enable_event(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC);
  559. dpmgr_enable_event(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE);
  560. pgc->state = 1;
  561. display_init = 1;
  562. done:
  563. _primary_path_unlock();
  564. return ret;
  565. }
  566. // register rdma done event
  567. int primary_display_wait_for_idle(void)
  568. {
  569. DISP_STATUS ret = DISP_STATUS_OK;
  570. DISPFUNC();
  571. _primary_path_lock();
  572. _primary_path_unlock();
  573. return ret;
  574. }
  575. int primary_display_wait_for_dump(void)
  576. {
  577. return 0;
  578. }
  579. static long int get_current_time_us(void)
  580. {
  581. return get_timer(0);
  582. }
  583. int priamry_display_wait_for_vsync(void)
  584. {
  585. int ret = 0;
  586. ret = dpmgr_wait_event(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC);
  587. if (ret == -2) {
  588. DISPCHECK("vsync for primary display path not enabled yet\n");
  589. return -1;
  590. }
  591. // pgc->last_vsync_tick = get_current_time_us();
  592. pgc->last_vsync_tick = 0;
  593. return 0;
  594. }
  595. int primary_display_suspend(void)
  596. {
  597. DISP_STATUS ret = DISP_STATUS_OK;
  598. if (display_init == 0) {
  599. dprintf(CRITICAL, "skip primary_display_suspend() before init\n");
  600. return -1;
  601. }
  602. DISPFUNC();
  603. _primary_path_lock();
  604. disp_lcm_suspend(pgc->plcm);
  605. dpmgr_path_stop(pgc->dpmgr_handle, CMDQ_DISABLE);
  606. dpmgr_path_power_off(pgc->dpmgr_handle, CMDQ_DISABLE);
  607. #ifndef DDP_LK_BOOT
  608. cmdqRecStopLoop(pgc->cmdq_handle_trigger);
  609. #endif
  610. pgc->state = 0;
  611. _primary_path_unlock();
  612. return ret;
  613. }
  614. int primary_display_resume(void)
  615. {
  616. DISP_STATUS ret = DISP_STATUS_OK;
  617. DISPFUNC();
  618. _primary_path_lock();
  619. disp_path_clock_on("Primary Display Path");
  620. pgc->state = 1;
  621. _primary_path_unlock();
  622. return ret;
  623. }
  624. int primary_display_is_alive(void)
  625. {
  626. unsigned int temp = 0;
  627. DISPFUNC();
  628. _primary_path_lock();
  629. temp = pgc->state;
  630. _primary_path_unlock();
  631. return temp;
  632. }
  633. int primary_display_is_sleepd(void)
  634. {
  635. unsigned int temp = 0;
  636. DISPFUNC();
  637. _primary_path_lock();
  638. temp = !pgc->state;
  639. _primary_path_unlock();
  640. return temp;
  641. }
  642. #if defined(MTK_ROUND_CORNER_SUPPORT) && !defined(DISP_HW_RC)
  643. LCM_ROUND_CORNER *primary_display_get_corner_params(void)
  644. {
  645. if (pgc->plcm == NULL) {
  646. return NULL;
  647. }
  648. if (pgc->plcm->params) {
  649. return &(pgc->plcm->params->round_corner_params);
  650. } else {
  651. DISPERR("lcm_params is null!\n");
  652. return NULL;
  653. }
  654. }
  655. int disp_get_round_corner_size(void)
  656. {
  657. LCM_ROUND_CORNER *corner_params = primary_display_get_corner_params();
  658. int pitch = DISP_GetScreenWidth();
  659. int size = 0;
  660. if (corner_params->round_corner_en) {
  661. if (corner_params)
  662. size = corner_params->h * pitch * 2 * 2;
  663. else
  664. DISPERR("corner_params is null!\n");
  665. }
  666. return size;
  667. }
  668. #endif
  669. int primary_display_get_width(void)
  670. {
  671. if (pgc->plcm == NULL) {
  672. pgc->plcm = disp_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  673. DISPDBG("lcm handle is null, after probe:0x%08x\n", (unsigned int)pgc->plcm);
  674. if (pgc->plcm == NULL)
  675. return 0;
  676. }
  677. if (pgc->plcm->params) {
  678. return pgc->plcm->params->width;
  679. } else {
  680. DISPERR("lcm_params is null!\n");
  681. return 0;
  682. }
  683. }
  684. int primary_display_get_height(void)
  685. {
  686. if (pgc->plcm == NULL) {
  687. pgc->plcm = disp_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  688. DISPDBG("lcm handle is null, after probe:0x%08x\n", (unsigned int)pgc->plcm);
  689. if (pgc->plcm == NULL)
  690. return 0;
  691. }
  692. if (pgc->plcm->params) {
  693. return pgc->plcm->params->height;
  694. } else {
  695. DISPERR("lcm_params is null!\n");
  696. return 0;
  697. }
  698. }
  699. int primary_display_get_bpp(void)
  700. {
  701. return 32;
  702. }
  703. int primary_display_get_info(void *dispif_info)
  704. {
  705. #if 0
  706. memset((void*)dispif_info, 0, sizeof(mtk_dispif_info_t));
  707. switch (pgc->lcm_param->type) {
  708. case LCM_TYPE_DBI: {
  709. dispif_info->displayType = DISPIF_TYPE_DBI;
  710. dispif_info->displayMode = DISPIF_MODE_COMMAND;
  711. dispif_info->isHwVsyncAvailable = 1;
  712. DISPMSG("DISP Info: DBI, CMD Mode, HW Vsync enable\n");
  713. break;
  714. }
  715. case LCM_TYPE_DPI: {
  716. dispif_info->displayType = DISPIF_TYPE_DPI0;
  717. dispif_info->displayMode = DISPIF_MODE_VIDEO;
  718. dispif_info->isHwVsyncAvailable = 1;
  719. DISPMSG("DISP Info: DPI, VDO Mode, HW Vsync enable\n");
  720. break;
  721. }
  722. case LCM_TYPE_DSI: {
  723. dispif_info->displayType = DISPIF_TYPE_DSI0;
  724. if (pgc->lcm_param->dsi.mode == CMD_MODE) {
  725. dispif_info->displayMode = DISPIF_MODE_COMMAND;
  726. dispif_info->isHwVsyncAvailable = 1;
  727. DISPMSG("DISP Info: DSI, CMD Mode, HW Vsync enable\n");
  728. } else {
  729. dispif_info->displayMode = DISPIF_MODE_VIDEO;
  730. dispif_info->isHwVsyncAvailable = 1;
  731. DISPMSG("DISP Info: DSI, VDO Mode, HW Vsync enable\n");
  732. }
  733. break;
  734. }
  735. default:
  736. break;
  737. }
  738. #ifdef MY_TODO
  739. #error
  740. if (disp_if_drv->get_panel_color_format()) {
  741. switch (disp_if_drv->get_panel_color_format()) {
  742. case PANEL_COLOR_FORMAT_RGB565:
  743. dispif_info->displayFormat = DISPIF_FORMAT_RGB565;
  744. case PANEL_COLOR_FORMAT_RGB666:
  745. dispif_info->displayFormat = DISPIF_FORMAT_RGB666;
  746. case PANEL_COLOR_FORMAT_RGB888:
  747. dispif_info->displayFormat = DISPIF_FORMAT_RGB888;
  748. default:
  749. break;
  750. }
  751. }
  752. #endif
  753. dispif_info->displayWidth = primary_display_get_width();
  754. dispif_info->displayHeight = primary_display_get_height();
  755. #ifdef MY_TODO
  756. #error
  757. dispif_info->vsyncFPS = lcd_fps;
  758. #endif
  759. if (dispif_info->displayWidth * dispif_info->displayHeight <= 240*432) {
  760. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  761. } else if (dispif_info->displayWidth * dispif_info->displayHeight <= 320*480) {
  762. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  763. } else if (dispif_info->displayWidth * dispif_info->displayHeight <= 480*854) {
  764. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  765. } else {
  766. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  767. }
  768. dispif_info->isConnected = 1;
  769. #ifdef MY_TODO
  770. #error
  771. {
  772. LCM_PARAMS lcm_params_temp;
  773. memset((void*)&lcm_params_temp, 0, sizeof(lcm_params_temp));
  774. if (lcm_drv) {
  775. lcm_drv->get_params(&lcm_params_temp);
  776. dispif_info->lcmOriginalWidth = lcm_params_temp.width;
  777. dispif_info->lcmOriginalHeight = lcm_params_temp.height;
  778. DISPMSG("DISP Info: LCM Panel Original Resolution(For DFO Only): %d x %d\n", dispif_info->lcmOriginalWidth, dispif_info->lcmOriginalHeight);
  779. } else {
  780. DISPMSG("DISP Info: Fatal Error!!, lcm_drv is null\n");
  781. }
  782. }
  783. #endif
  784. #endif
  785. return 0;
  786. }
  787. int primary_display_get_pages(void)
  788. {
  789. return 3;
  790. }
  791. int primary_display_config_output()
  792. {
  793. return 0;
  794. }
  795. int primary_display_diagnose(void)
  796. {
  797. int ret = 0;
  798. dpmgr_check_status(pgc->dpmgr_handle);
  799. return ret;
  800. }
  801. int primary_display_trigger(int blocking)
  802. {
  803. int ret = 0;
  804. DISPFUNC();
  805. int x=0, y=0;
  806. int width = 0, height =0;
  807. x = disp_lcm_x(pgc->plcm);
  808. y = disp_lcm_y(pgc->plcm);
  809. width = disp_lcm_width(pgc->plcm);
  810. height = disp_lcm_height(pgc->plcm);
  811. _primary_path_lock();
  812. if (pgc->mode == DIRECT_LINK_MODE || pgc->mode == SINGLE_LAYER_MODE) {
  813. if (dpmgr_path_is_busy(pgc->dpmgr_handle)) {
  814. if (primary_display_is_video_mode()) {
  815. _primary_path_unlock();
  816. return 0;
  817. }
  818. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*1);
  819. }
  820. DISPCHECK("trigger mode: %s\n", (pgc->mode == DIRECT_LINK_MODE)?"DIRECT_LINK":"SINGLE_LAYER");
  821. disp_lcm_update(pgc->plcm, x, y, width, height, 0);
  822. dpmgr_path_start(pgc->dpmgr_handle, primary_display_use_cmdq);
  823. if (primary_display_use_cmdq == CMDQ_DISABLE) {
  824. dpmgr_path_trigger(pgc->dpmgr_handle, NULL,primary_display_use_cmdq);
  825. }
  826. //_set_cmdq_config_handle_dirty();
  827. //_reset_cmdq_config_handle();
  828. //if(blocking)
  829. {
  830. //dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*2);
  831. }
  832. } else if (pgc->mode == DECOUPLE_MODE) {
  833. DISPCHECK("trigger mode: DECOUPLE\n");
  834. if (pgc->need_trigger_overlay) {
  835. dpmgr_path_trigger(pgc->ovl2mem_path_handle, NULL,primary_display_use_cmdq);
  836. if (blocking) {
  837. dpmgr_wait_event_timeout(pgc->ovl2mem_path_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*2);
  838. }
  839. } else {
  840. if (dpmgr_path_is_busy(pgc->dpmgr_handle) == 0) {
  841. // this request of trigger should be called by AAL or ovl2mem done event
  842. disp_lcm_update(pgc->plcm, x, y, width, height, 0);
  843. dpmgr_path_start(pgc->dpmgr_handle, primary_display_use_cmdq);
  844. }
  845. _set_cmdq_config_handle_dirty();
  846. _reset_cmdq_config_handle();
  847. if (blocking) {
  848. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*2);
  849. }
  850. }
  851. } else if (pgc->mode == DEBUG_RDMA1_DSI0_MODE) {
  852. if (!primary_display_is_video_mode() && dpmgr_path_is_busy(pgc->dpmgr_handle) == 0) {
  853. DISPCHECK("trigger mode: DEBUG_RDMA1_DSI0\n");
  854. disp_lcm_update(pgc->plcm, x, y, width, height, 0);
  855. dpmgr_path_start(pgc->dpmgr_handle, CMDQ_DISABLE);
  856. dpmgr_path_trigger(pgc->dpmgr_handle, NULL,primary_display_use_cmdq);
  857. }
  858. if (blocking) {
  859. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*5);
  860. }
  861. } else {
  862. DISPCHECK("primary display mode is WRONG(%d)\n", (unsigned int)pgc->mode);
  863. }
  864. _primary_path_unlock();
  865. /* comment for performance issue */
  866. #if 0
  867. primary_display_diagnose();
  868. #endif
  869. return ret;
  870. }
  871. int primary_display_config_input(disp_input_config* input)
  872. {
  873. int ret = 0;
  874. DISPFUNC();
  875. disp_ddp_path_config data_config;
  876. // all dirty should be cleared in dpmgr_path_get_last_config()
  877. memcpy((void*)&data_config, (void*)dpmgr_path_get_last_config(pgc->dpmgr_handle), sizeof(disp_ddp_path_config));
  878. // no need do this dirty = 0; dpmgr_path_get_last_config do this.
  879. data_config.dst_dirty = 0;
  880. data_config.ovl_dirty = 0;
  881. data_config.rdma_dirty = 0;
  882. data_config.wdma_dirty = 0;
  883. _primary_path_lock();
  884. if (pgc->mode == DIRECT_LINK_MODE || pgc->mode == DECOUPLE_MODE) {
  885. if (dpmgr_path_is_busy(pgc->dpmgr_handle)) {
  886. if (primary_display_is_video_mode()) {
  887. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*1);
  888. }
  889. }
  890. ret = _convert_disp_input_to_ovl(&(data_config.ovl_config[input->layer]), input);
  891. data_config.ovl_dirty = 1;
  892. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, primary_display_use_cmdq);
  893. // this is used for decouple mode, to indicate whether we need to trigger ovl
  894. pgc->need_trigger_overlay = 1;
  895. } else if (pgc->mode == SINGLE_LAYER_MODE) {
  896. ret = _convert_disp_input_to_rdma(&data_config.rdma_config, input);
  897. data_config.rdma_dirty= 1;
  898. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, primary_display_use_cmdq);
  899. } else if (pgc->mode == DEBUG_RDMA1_DSI0_MODE) {
  900. ret = _convert_disp_input_to_rdma(&(data_config.rdma_config), input);
  901. data_config.rdma_dirty= 1;
  902. if (primary_display_is_video_mode() && dpmgr_path_is_busy(pgc->dpmgr_handle) == 1) {
  903. // TODO: should use wait_event_timeout_or_idle
  904. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*5);
  905. }
  906. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, CMDQ_DISABLE);
  907. } else {
  908. DISPCHECK("primary display mode is WRONG(%d)\n", (unsigned int)pgc->mode);
  909. }
  910. _primary_path_unlock();
  911. return ret;
  912. }
  913. int primary_display_is_video_mode(void)
  914. {
  915. //we should store the video/cmd mode in runtime, because will support cmd/vdo dynamic switch
  916. return disp_lcm_is_video_mode(pgc->plcm);
  917. }
  918. int primary_display_get_vsync_interval(void)
  919. {
  920. int ret = 0;
  921. unsigned int time0 = 0;
  922. unsigned int time1 = 0;
  923. unsigned int lcd_time = 0;
  924. pgc->plcm->is_connected = false;
  925. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  926. if (ret <= 0)
  927. goto fail;
  928. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  929. if (ret <= 0)
  930. goto fail;
  931. // because we are polling irq status, so the first event should be ignored
  932. time0 = gpt4_tick2time_us(gpt4_get_current_tick());
  933. //DISPMSG("vsync signaled:%d\n", gpt4_tick2time_us(gpt4_get_current_tick()));
  934. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  935. if (ret <= 0)
  936. goto fail;
  937. //DISPMSG("vsync signaled:%d\n", gpt4_tick2time_us(gpt4_get_current_tick()));
  938. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  939. if (ret > 0) {
  940. time1 = gpt4_tick2time_us(gpt4_get_current_tick());
  941. } else
  942. goto fail;
  943. lcd_time = (time1 - time0)/2;
  944. pgc->plcm->is_connected = true;
  945. if (0 != lcd_time)
  946. return (100000000/lcd_time);
  947. else
  948. return (6000);
  949. fail:
  950. DISPERR("wait event fail\n");
  951. return 0;
  952. }
  953. int primary_display_setbacklight(unsigned int level)
  954. {
  955. DISPMSG("lk %s level=%d\n",__func__,level);
  956. int ret=0;
  957. if (pgc->dpmgr_handle == NULL) {
  958. DISPCHECK("lk set backlight early!\n");
  959. return 0;
  960. }
  961. if (dpmgr_path_is_busy(pgc->dpmgr_handle)) {
  962. DISPCHECK("primary display path is busy\n");
  963. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*1);
  964. DISPCHECK("wait frame done ret:%d\n", ret);
  965. }
  966. disp_lcm_set_backlight(pgc->plcm,level);
  967. return 0;
  968. }
  969. /////////////////////////////////////////////////////////////////////////////////////////////////////////////
  970. /***********************/
  971. /*****Legacy DISP API*****/
  972. /***********************/
  973. UINT32 DISP_GetScreenWidth(void)
  974. {
  975. return primary_display_get_width();
  976. }
  977. UINT32 DISP_GetScreenHeight(void)
  978. {
  979. return primary_display_get_height();
  980. }
  981. UINT32 DISP_GetActiveHeight(void)
  982. {
  983. if (pgc->plcm == NULL) {
  984. pgc->plcm = disp_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  985. DISPERR("lcm handle is null, after probe:0x%08x\n", (unsigned int)pgc->plcm);
  986. if (pgc->plcm == NULL)return 0;
  987. }
  988. if (pgc->plcm->params) {
  989. return pgc->plcm->params->physical_height;
  990. } else {
  991. DISPERR("lcm_params is null!\n");
  992. return 0;
  993. }
  994. }
  995. UINT32 DISP_GetActiveWidth(void)
  996. {
  997. if (pgc->plcm == NULL) {
  998. pgc->plcm = disp_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  999. DISPERR("lcm handle is null, after probe:0x%08x\n", (unsigned int)pgc->plcm);
  1000. if (pgc->plcm == NULL)return 0;
  1001. }
  1002. if (pgc->plcm->params) {
  1003. return pgc->plcm->params->physical_width;
  1004. } else {
  1005. DISPERR("lcm_params is null!\n");
  1006. return 0;
  1007. }
  1008. }
  1009. int primary_display_capture_framebuffer(unsigned int *pbuf)
  1010. {
  1011. return 0;
  1012. }
  1013. UINT32 DISP_GetPanelBPP(void)
  1014. {
  1015. #if 0
  1016. PANEL_COLOR_FORMAT fmt;
  1017. disp_drv_init_context();
  1018. if (disp_if_drv->get_panel_color_format == NULL) {
  1019. return DISP_STATUS_NOT_IMPLEMENTED;
  1020. }
  1021. fmt = disp_if_drv->get_panel_color_format();
  1022. switch (fmt) {
  1023. case PANEL_COLOR_FORMAT_RGB332:
  1024. return 8;
  1025. case PANEL_COLOR_FORMAT_RGB444:
  1026. return 12;
  1027. case PANEL_COLOR_FORMAT_RGB565:
  1028. return 16;
  1029. case PANEL_COLOR_FORMAT_RGB666:
  1030. return 18;
  1031. case PANEL_COLOR_FORMAT_RGB888:
  1032. return 24;
  1033. default:
  1034. return 0;
  1035. }
  1036. #endif
  1037. return 0;
  1038. }
  1039. UINT32 DISP_GetScreenBpp(void)
  1040. {
  1041. return disp_fb_bpp;
  1042. }
  1043. UINT32 DISP_GetPages(void)
  1044. {
  1045. return disp_fb_pages; // Double Buffers
  1046. }
  1047. // could we use the same header file between lk/kernel to avoid definition non-match issue?
  1048. #define DAL_BPP (2)
  1049. #define DAL_WIDTH (DISP_GetScreenWidth())
  1050. #define DAL_HEIGHT (DISP_GetScreenHeight())
  1051. UINT32 DAL_GetLayerSize(void)
  1052. {
  1053. return DAL_WIDTH * DAL_HEIGHT * DAL_BPP + 4096;
  1054. }
  1055. UINT32 DISP_GetFBRamSize(void)
  1056. {
  1057. return ALIGN_TO(DISP_GetScreenWidth(), MTK_FB_ALIGNMENT) * ALIGN_TO(DISP_GetScreenHeight(), MTK_FB_ALIGNMENT) * ((DISP_GetScreenBpp() + 7) >> 3) * DISP_GetPages();
  1058. }
  1059. unsigned int DISP_GetVRamSize(void)
  1060. {
  1061. static UINT32 vramSize = 0;
  1062. unsigned int fb_ram_size =0;
  1063. //FB RAM(n blocks)+(Assert layer size)
  1064. if (0 == vramSize) {
  1065. vramSize = DISP_GetFBRamSize();
  1066. DISPDBG("^^ DISP_GetFBRamSize: %u bytes\n", vramSize);
  1067. fb_ram_size = vramSize;
  1068. vramSize += DAL_GetLayerSize();
  1069. DISPDBG("^^ DAL_GetLayerSize: %u bytes\n", vramSize-fb_ram_size);
  1070. #if defined(MTK_ROUND_CORNER_SUPPORT) && !defined(DISP_HW_RC)
  1071. fb_ram_size = vramSize;
  1072. vramSize += disp_get_round_corner_size();
  1073. DISPDBG("^^ round corner Size: %u bytes\n", vramSize-fb_ram_size);
  1074. #endif
  1075. #if 0
  1076. if (g_is_64bit_kernel) {
  1077. vramSize = ALIGN_TO(vramSize, 0x400000); // both start addr and size needs 2MB align, so size must 4MB align
  1078. } else {
  1079. vramSize = ALIGN_TO(vramSize, 0x100000); // both start addr and size needs 2MB align, so size must 4MB align
  1080. }
  1081. #else
  1082. vramSize = ALIGN_TO(vramSize, 0x10000); // just align to 64KB is OK
  1083. #endif
  1084. DISPDBG("^^ DISP_GetVRamSize: %u bytes\n", vramSize);
  1085. }
  1086. return vramSize;
  1087. }