mtk-lk/scripts/MT6755_FPGA_DDR.cmm

&NR_RNKS=2
; EMI setting
if &NR_RNKS==2
(
D.S SD:0x10203000 %LE %LONG 0x0002A302; EMI_CONA
;D.S SD:0x10203000 %LE %LONG 0x0002A352; EMI_CONA
)
else
(
D.S SD:0x10203000 %LE %LONG 0x00002112; EMI_CONA
)
D.S SD:0x10203060 %LE %LONG 0x00000400; EMI_CONM
;D.S SD:0x102030E8 %LE %LONG 0x00000800; EMI_DFTB
;D.S SD:0x10203000 %LE %LONG 0x0002A35A; EMI_CONA
;D.S SD:0x10203060 %LE %LONG 0x00000700; EMI_CONM
;D.S SD:0x10203140 %LE %LONG 0x10402488; EMI_ARBI
;D.S SD:0x10203100 %LE %LONG 0x4010580e; EMI_ARBA
;D.S SD:0x10203110 %LE %LONG 0xffff5803; EMI_ARBC
;D.S SD:0x10203118 %LE %LONG 0x0601580e; EMI_ARBD
;D.S SD:0x10203120 %LE %LONG 0x40405003; EMI_ARBE
;D.S SD:0x10203128 %LE %LONG 0x8080500f; EMI_ARBF
;D.S SD:0x10203130 %LE %LONG 0x8080500f; EMI_ARBG
;D.S SD:0x10203148 %LE %LONG 0x00464f2f; EMI_ARBJ
;D.S SD:0x10203150 %LE %LONG 0x00720038; EMI_ARBK
;D.S SD:0x10203158 %LE %LONG 0x0808084d; EMI_SLCT

; DDRPHY setting
if &NR_RNKS==2
(
D.S SD:0x10213110 %LE %LONG 0x00051192;
)
else
(
D.S SD:0x10213110 %LE %LONG 0x00051180;
)
D.S SD:0x10213048 %LE %LONG 0x0000110d;
D.S SD:0x102130D8 %LE %LONG 0x00500900;
D.S SD:0x102130E4 %LE %LONG 0x00000001;
D.S SD:0x1021308c %LE %LONG 0x00000001;
D.S SD:0x10213090 %LE %LONG 0x00000000;
D.S SD:0x10213094 %LE %LONG 0x80000000;
D.S SD:0x102130DC %LE %LONG 0x83004004;
D.S SD:0x102130E0 %LE %LONG 0x01004004;
D.S SD:0x102130F0 %LE %LONG 0x00000000;
D.S SD:0x102130F4 %LE %LONG 0x01000000;
D.S SD:0x10213168 %LE %LONG 0x00000080;
D.S SD:0x102130D8 %LE %LONG 0x00700900;
D.S SD:0x10213004 %LE %LONG 0xF00487A2;
D.S SD:0x1021307C %LE %LONG 0x900641c0;
D.S SD:0x10213028 %LE %LONG 0xF1200F01;
D.S SD:0x102131E0 %LE %LONG 0x3001ebff;
D.S SD:0x10213158 %LE %LONG 0x00000000;
D.S SD:0x102130e4 %LE %LONG 0x00000005;
wait 1.ms
D.S SD:0x10213088 %LE %LONG 0x0000003F;
;D.S SD:0x100F11E4 %LE %LONG 0x00000001;
;D.S SD:0x100F11E4 %LE %LONG 0x00000000;
wait 1.ms
D.S SD:0x10213088 %LE %LONG 0x00FF000A;
;D.S SD:0x100F11E4 %LE %LONG 0x00000001;
;D.S SD:0x100F11E4 %LE %LONG 0x00000000;
wait 1.ms
D.S SD:0x10213088 %LE %LONG 0x00320001;
;D.S SD:0x100F11E4 %LE %LONG 0x00000001;
;D.S SD:0x100F11E4 %LE %LONG 0x00000000;
wait 1.ms
D.S SD:0x10213088 %LE %LONG 0x00020002;
;D.S SD:0x100F11E4 %LE %LONG 0x00000001;
;D.S SD:0x100F11E4 %LE %LONG 0x00001100;
wait 1.ms
;D.S SD:0x10213110 %LE %LONG 0x00111190;
D.S SD:0x102130E4 %LE %LONG 0x00000001;
D.S SD:0x10213084 %LE %LONG 0x00000a56;
D.S SD:0x1021300C %LE %LONG 0x00000000;
D.S SD:0x10213000 %LE %LONG 0x45D84408;
D.S SD:0x10213044 %LE %LONG 0xa8080401;
D.S SD:0x102131E8 %LE %LONG 0x00000510;
D.S SD:0x10213008 %LE %LONG 0x03406340;
D.S SD:0x10213010 %LE %LONG 0x00000000;
D.S SD:0x102130F8 %LE %LONG 0xEDCB000F;
D.S SD:0x102130FC %LE %LONG 0x27010000;

; DRAMC setting
if &NR_RNKS==2
(
D.S SD:0x10214110 %LE %LONG 0x00051192;
)
else
(
D.S SD:0x10214110 %LE %LONG 0x00051180;
)
D.S SD:0x10214048 %LE %LONG 0x0000110d;
D.S SD:0x102140D8 %LE %LONG 0x00500900;
D.S SD:0x102140E4 %LE %LONG 0x00000001;
D.S SD:0x1021408c %LE %LONG 0x00000001;
D.S SD:0x10214090 %LE %LONG 0x00000000;
D.S SD:0x10214094 %LE %LONG 0x80000000;
D.S SD:0x102140DC %LE %LONG 0x83004004;
D.S SD:0x102140E0 %LE %LONG 0x01004004;
D.S SD:0x102140F0 %LE %LONG 0x00000000;
D.S SD:0x102140F4 %LE %LONG 0x01000000;
D.S SD:0x10214168 %LE %LONG 0x00000080;
D.S SD:0x102140D8 %LE %LONG 0x00700900;
D.S SD:0x10214004 %LE %LONG 0xF00487A2;
D.S SD:0x1021407C %LE %LONG 0x900641c0;
D.S SD:0x10214028 %LE %LONG 0xF1200F01;
D.S SD:0x102141E0 %LE %LONG 0x3001ebff;
D.S SD:0x10214158 %LE %LONG 0x00000000;
D.S SD:0x102140e4 %LE %LONG 0x00000005;
;wait 1.ms
D.S SD:0x10214088 %LE %LONG 0x0000003F;
D.S SD:0x102141E4 %LE %LONG 0x00000001;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
;wait 1.ms
D.S SD:0x10214088 %LE %LONG 0x00FF000A;
D.S SD:0x102141E4 %LE %LONG 0x00000001;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
;wait 1.ms
D.S SD:0x10214088 %LE %LONG 0x00320001;
D.S SD:0x102141E4 %LE %LONG 0x00000001;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
;wait 1.ms
D.S SD:0x10214088 %LE %LONG 0x00020002;
D.S SD:0x102141E4 %LE %LONG 0x00000001;
D.S SD:0x102141E4 %LE %LONG 0x00001100;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
D.S SD:0x102141E4 %LE %LONG 0x00000000;
;wait 1.ms
;D.S SD:0x10214110 %LE %LONG 0x00111190;
D.S SD:0x102140E4 %LE %LONG 0x00000001;
D.S SD:0x10214084 %LE %LONG 0x00000a56;
D.S SD:0x1021400C %LE %LONG 0x00000000;
D.S SD:0x10214000 %LE %LONG 0x45D84408;
D.S SD:0x10214044 %LE %LONG 0xa8080401;
D.S SD:0x102141E8 %LE %LONG 0x00000510;
D.S SD:0x10214008 %LE %LONG 0x03406340;
D.S SD:0x10214010 %LE %LONG 0x00000000;
D.S SD:0x102140F8 %LE %LONG 0xEDCB000F;
D.S SD:0x102140FC %LE %LONG 0x27010000;