ram_console.c 18 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2016. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <stdio.h>
  32. #include <stdlib.h> // for ALIGN()
  33. #include <string.h>
  34. #include <arch/arm/mmu.h>
  35. #include <platform/boot_mode.h>
  36. #include <platform/ram_console.h>
  37. #include <libfdt.h>
  38. #define RAM_CONSOLE_SIG (0x43474244) /* DBGC */
  39. #define MOD "RAM_CONSOLE"
  40. struct ram_console_buffer {
  41. u32 sig;
  42. /* for size comptible */
  43. u32 off_pl;
  44. u32 off_lpl; /* last preloader */
  45. u32 sz_pl;
  46. u32 off_lk;
  47. u32 off_llk; /* last lk */
  48. u32 sz_lk;
  49. u32 padding[2]; /* size = 2 * 16 = 32 byte */
  50. u32 dump_step;
  51. u32 sz_buffer;
  52. u32 off_linux;
  53. u32 off_console;
  54. u32 padding2[3];
  55. };
  56. #define RAM_CONSOLE_LK_SIZE 16
  57. struct reboot_reason_lk {
  58. u32 last_func[RAM_CONSOLE_LK_SIZE];
  59. };
  60. struct reboot_reason_pl {
  61. u32 wdt_status;
  62. u32 last_func[0];
  63. };
  64. struct reboot_reason_kernel {
  65. u32 fiq_step;
  66. /* 0xaeedeadX: X=1 (HWT), X=2 (KE), X=3 (nested panic) */
  67. /* details see enum AEE_EXP_TYPE_NUM in ram_console_common.h */
  68. u32 exp_type;
  69. u32 others[0];
  70. };
  71. enum CUR_BOOT_TYPE {
  72. BOOT_NORMAL = 0,
  73. BOOT_ABNORMAL,
  74. BOOT_INVALID
  75. };
  76. static int cur_boot = BOOT_INVALID;
  77. extern int sLOG(char *fmt, ...);
  78. #define LOG(fmt, ...) \
  79. do { \
  80. sLOG(fmt, ##__VA_ARGS__); \
  81. printf(fmt, ##__VA_ARGS__); \
  82. } while(0)
  83. static struct ram_console_buffer *ram_console = NULL;
  84. static uint32_t ram_console_size;
  85. extern BOOT_ARGUMENT *g_boot_arg;
  86. static void ram_console_fatal(const char *str)
  87. {
  88. LOG("%s. FATAL:%s\n", MOD, str);
  89. while(1)
  90. ;
  91. }
  92. static void ram_console_memory_info_valid(struct ram_console_memory_info *memory_info)
  93. {
  94. if (memory_info->magic1 != MEM_MAGIC1 || memory_info->magic2 != MEM_MAGIC2) {
  95. LOG("%s. passed arg magic:[0x%x, 0x%x] mismatch\n", MOD, memory_info->magic1, memory_info->magic2);
  96. ram_console_fatal("illegal magic number");
  97. }
  98. }
  99. static void ram_console_atag_valid(void)
  100. {
  101. u32 sram_addr;
  102. u32 sram_size;
  103. u32 def_type;
  104. u32 memory_info_offset;
  105. if (g_boot_arg != NULL) {
  106. sram_addr = g_boot_arg->ram_console_sram_addr;
  107. sram_size = g_boot_arg->ram_console_sram_size;
  108. def_type = g_boot_arg->ram_console_def_type;
  109. memory_info_offset = g_boot_arg->ram_console_memory_info_offset;
  110. if (def_type != RAM_CONSOLE_DEF_SRAM && def_type != RAM_CONSOLE_DEF_DRAM)
  111. ram_console_fatal("unknown def type");
  112. if (sram_addr == 0 || sram_size == 0)
  113. ram_console_fatal("sram addr size zero");
  114. if (memory_info_offset <= sram_size)
  115. ram_console_fatal("memory offset invalid value");
  116. } else {
  117. ram_console_fatal("unexpected g_boot_arg null pointer");
  118. }
  119. }
  120. static struct ram_console_memory_info *ram_console_atag_memory_info(void)
  121. {
  122. u32 sram_addr;
  123. u32 memory_info_offset;
  124. struct ram_console_memory_info *memory_info = NULL;
  125. ram_console_atag_valid();
  126. sram_addr = g_boot_arg->ram_console_sram_addr;
  127. memory_info_offset = g_boot_arg->ram_console_memory_info_offset;
  128. memory_info = (struct ram_console_memory_info *)(sram_addr + memory_info_offset);
  129. ram_console_memory_info_valid(memory_info);
  130. return memory_info;
  131. }
  132. extern bool cmdline_append(const char *append_string);
  133. static void ram_console_ptr_init_by_atag(void)
  134. {
  135. struct ram_console_memory_info *memory_info = NULL;
  136. u32 sram_addr;
  137. u32 sram_size;
  138. u32 def_type;
  139. u32 memory_info_offset;
  140. char cmd_buf[256];
  141. if (g_boot_arg == NULL)
  142. ram_console_fatal("unexpected g_boot_arg null pointer");
  143. sram_addr = g_boot_arg->ram_console_sram_addr;
  144. sram_size = g_boot_arg->ram_console_sram_size;
  145. def_type = g_boot_arg->ram_console_def_type;
  146. memory_info_offset = g_boot_arg->ram_console_memory_info_offset;
  147. LOG("%s. boot_arg(PL2LK): sram_addr:0x%x, sram_size:0x%x, def_type:0x%x, memory_info_offset:0x%x\n", MOD, sram_addr, sram_size, def_type, memory_info_offset);
  148. memory_info = ram_console_atag_memory_info();
  149. if (def_type == RAM_CONSOLE_DEF_SRAM) {
  150. ram_console = (struct ram_console_buffer *)sram_addr;
  151. ram_console_size = sram_size;
  152. } else if (def_type == RAM_CONSOLE_DEF_DRAM) {
  153. ram_console = (struct ram_console_buffer *)memory_info->dram_addr;
  154. ram_console_size = memory_info->dram_size;
  155. #ifdef MTK_3LEVEL_PAGETABLE
  156. {
  157. uint32_t start = (uint32_t)ram_console;
  158. arch_mmu_map(ROUNDDOWN((uint64_t)start, PAGE_SIZE), ROUNDDOWN((uint32_t)start, PAGE_SIZE),
  159. MMU_MEMORY_TYPE_NORMAL_WRITE_BACK | MMU_MEMORY_AP_P_RW_U_NA, ROUNDUP(ram_console_size, PAGE_SIZE));
  160. }
  161. #endif
  162. } else {
  163. ram_console_fatal("unknown def type");
  164. }
  165. if (ram_console->sig != RAM_CONSOLE_SIG) {
  166. LOG("%s. %s(0x%x) sig %x mismatch\n", MOD, (def_type == RAM_CONSOLE_DEF_SRAM) ? "sram" : "dram", (unsigned int)ram_console, ram_console->sig);
  167. ram_console_fatal("sig mismatch");
  168. }
  169. memset(cmd_buf, 0x0, sizeof(cmd_buf));
  170. snprintf(cmd_buf, 256,
  171. "ramoops.mem_address=0x%x ramoops.mem_size=0x%x ramoops.pmsg_size=0x%x ramoops.console_size=0x%x",
  172. memory_info->pstore_addr, memory_info->pstore_size,
  173. memory_info->pstore_pmsg_size, memory_info->pstore_console_size);
  174. cmdline_append(cmd_buf);
  175. }
  176. void ram_console_init(void)
  177. {
  178. int i;
  179. struct reboot_reason_lk *rr_lk;
  180. ram_console_ptr_init_by_atag();
  181. if (ram_console) {
  182. LOG("%s. start: %p, size: 0x%x\n", MOD, ram_console, ram_console_size);
  183. } else {
  184. LOG("%s. sig not match\n", MOD);
  185. return;
  186. }
  187. ram_console->off_lk = ram_console->off_lpl + ALIGN(ram_console->sz_pl, 64);
  188. ram_console->off_llk = ram_console->off_lk + ALIGN(sizeof(struct reboot_reason_lk), 64);
  189. ram_console->sz_lk = sizeof(struct reboot_reason_lk);
  190. if (ram_console->sz_lk == sizeof(struct reboot_reason_lk) && (ram_console->off_lk + ram_console->sz_lk == ram_console->off_llk)) {
  191. LOG("%s. lk last status: ", MOD);
  192. rr_lk = (void*)ram_console + ram_console->off_lk;
  193. for (i = 0; i < RAM_CONSOLE_LK_SIZE; i++) {
  194. LOG("0x%x ", rr_lk->last_func[i]);
  195. }
  196. LOG("\n");
  197. memcpy((void*)ram_console + ram_console->off_llk, (void*)ram_console + ram_console->off_lk, ram_console->sz_lk);
  198. } else {
  199. LOG("%s. lk size mismatch %x + %x != %x\n", MOD, ram_console->sz_lk, ram_console->off_lk, ram_console->off_llk);
  200. ram_console->sz_lk = sizeof(struct reboot_reason_lk);
  201. }
  202. ram_console->off_linux = ram_console->off_llk + ALIGN(ram_console->sz_lk, 64);
  203. }
  204. #define RE_BOOT_BY_WDT_SW 2
  205. #define RE_BOOT_NORMAL_BOOT 0
  206. #define RE_BOOT_BY_EINT 256/*we can find the definition from preloader ,this value should sync with preloader incase issue happened*/
  207. #define RE_BOOT_BY_SYSRST 512/*we can find the definition from preloader ,this value should sync with preloader incase issue happened*/
  208. #ifdef MTK_PMIC_FULL_RESET
  209. #define RE_BOOT_FULL_PMIC 0x800
  210. #endif
  211. #define U_VAR(type) rc_##type
  212. static unsigned int U_VAR(wdt_status), U_VAR(fiq_step), U_VAR(exp_type);
  213. static bool U_VAR(set_flag) = false;
  214. bool ram_console_reboot_by_mrdump_key(void)
  215. {
  216. unsigned int wdt_status;
  217. wdt_status = ((struct reboot_reason_pl*)((void*)ram_console + ram_console->off_pl))->wdt_status;
  218. return ((wdt_status & RE_BOOT_BY_EINT)|(wdt_status & RE_BOOT_BY_SYSRST))?true:false;
  219. }
  220. #ifdef MTK_PMIC_FULL_RESET
  221. bool ram_console_reboot_by_cold_reset(void)
  222. {
  223. unsigned int wdt_status;
  224. wdt_status = ((struct reboot_reason_pl*)((void*)ram_console + ram_console->off_pl))->wdt_status;
  225. return (wdt_status & RE_BOOT_FULL_PMIC) ? true : false;
  226. }
  227. #endif
  228. bool ram_console_get_wdt_status(unsigned int *wdt_status)
  229. {
  230. if (wdt_status && U_VAR(set_flag)) {
  231. *wdt_status = U_VAR(wdt_status);
  232. return true;
  233. }
  234. return false;
  235. }
  236. bool ram_console_get_fiq_step(unsigned int *fiq_step)
  237. {
  238. if (fiq_step && U_VAR(set_flag)) {
  239. *fiq_step = U_VAR(fiq_step);
  240. return true;
  241. }
  242. return false;
  243. }
  244. bool ram_console_get_exp_type(unsigned int *exp_type)
  245. {
  246. if (exp_type && U_VAR(set_flag)) {
  247. *exp_type = U_VAR(exp_type);
  248. return true;
  249. }
  250. return false;
  251. }
  252. bool ram_console_set_exp_type(unsigned int exp_type)
  253. {
  254. bool ret = false;
  255. if (ram_console && ram_console->off_linux &&
  256. (ram_console->off_linux == (ram_console->off_llk + ALIGN(ram_console->sz_lk, 64))) &&
  257. (ram_console->off_pl == sizeof(struct ram_console_buffer))) {
  258. if (exp_type < 16) {
  259. exp_type = exp_type ^ RAM_CONSOLE_EXP_TYPE_MAGIC;
  260. ((struct reboot_reason_kernel*)((void*)ram_console + ram_console->off_linux))->exp_type = exp_type;
  261. ret = true;
  262. } else {
  263. LOG("%s. set exp type failed: off_linux:0x%x, off_llk:0x%x, off_pl:0x%x, exp type:%d\n", MOD, ram_console->off_linux, ram_console->off_llk, ram_console->off_pl, exp_type);
  264. }
  265. }
  266. return ret;
  267. }
  268. /*
  269. * struct last_reboot_reason is defined at [kernel/drivers/misc/mediatek/ram_console/mtk_ram_console.c]
  270. * if you need to access struct members in LK, this struct must be sync-ed with kernel code.
  271. */
  272. struct last_reboot_reason {
  273. uint32_t fiq_step;
  274. /* 0xaeedeadX: X=1 (HWT), X=2 (KE), X=3 (nested panic) */
  275. uint32_t exp_type;
  276. uint64_t kaslr_offset;
  277. uint64_t ram_console_buffer_addr;
  278. };
  279. static struct last_reboot_reason* krbr;
  280. bool ram_console_get_kaslr_offset(uint64_t* kaslr_offset)
  281. {
  282. if (krbr && U_VAR(set_flag)) {
  283. if (krbr->kaslr_offset == 0xecab1e) {
  284. *kaslr_offset = 0;
  285. return false;
  286. }
  287. if (krbr->kaslr_offset == 0xd15ab1e) {
  288. *kaslr_offset = 0;
  289. } else {
  290. *kaslr_offset = krbr->kaslr_offset;
  291. }
  292. return true;
  293. }
  294. return false;
  295. }
  296. bool ram_console_is_abnormal_boot(void)
  297. {
  298. unsigned int fiq_step, wdt_status, exp_type;
  299. int reinit_flag = 0;
  300. if (!ram_console) {
  301. ram_console_ptr_init_by_atag();
  302. reinit_flag = 1;
  303. }
  304. if (ram_console && ram_console->off_linux &&
  305. (ram_console->off_linux == (ram_console->off_llk + ALIGN(ram_console->sz_lk, 64))) &&
  306. (ram_console->off_pl == sizeof(struct ram_console_buffer))) {
  307. wdt_status = ((struct reboot_reason_pl*)((void*)ram_console + ram_console->off_pl))->wdt_status;
  308. krbr = ((struct last_reboot_reason*)((void*)ram_console + ram_console->off_linux));
  309. fiq_step = ((struct reboot_reason_kernel*)((void*)ram_console + ram_console->off_linux))->fiq_step;
  310. exp_type = ((struct reboot_reason_kernel*)((void*)ram_console + ram_console->off_linux))->exp_type;
  311. LOG("%s. wdt_status 0x%x, fiq_step 0x%x, exp_type 0x%x\n", MOD, wdt_status, fiq_step, RAM_CONSOLE_EXP_TYPE_DEC(exp_type));
  312. if (fiq_step != 0 && (exp_type ^ RAM_CONSOLE_EXP_TYPE_MAGIC) >= 16) {
  313. fiq_step = 0;
  314. ((struct reboot_reason_kernel*)((void*)ram_console + ram_console->off_linux))->fiq_step = fiq_step;
  315. }
  316. U_VAR(wdt_status) = wdt_status;
  317. U_VAR(fiq_step) = fiq_step;
  318. U_VAR(exp_type) = RAM_CONSOLE_EXP_TYPE_DEC(exp_type);
  319. U_VAR(set_flag) = true;
  320. LOG("%s. set reboot reason info done\n", MOD);
  321. #ifdef MTK_PMIC_FULL_RESET
  322. if ((fiq_step == 0 && (wdt_status == RE_BOOT_BY_WDT_SW || wdt_status == RE_BOOT_FULL_PMIC)) || (wdt_status == RE_BOOT_NORMAL_BOOT))
  323. #else
  324. if ((fiq_step == 0 && wdt_status == RE_BOOT_BY_WDT_SW) || (wdt_status == RE_BOOT_NORMAL_BOOT))
  325. #endif
  326. return false;
  327. else
  328. return true;
  329. } else {
  330. if (ram_console) {
  331. LOG("%s. set reboot reason info failed: off_linux:0x%x, off_llk:0x%x, off_pl:0x%x, reinit flag:%d\n", MOD, ram_console->off_linux, ram_console->off_llk, ram_console->off_pl, reinit_flag);
  332. } else {
  333. LOG("%s. ram console buffer NULL\n", MOD);
  334. }
  335. }
  336. return false;
  337. }
  338. /*
  339. * The return value of ram_console_is_abnoraml_boot() maybe changed if
  340. * ram_console was restored by kedump_restore_mem(). So we recored the value
  341. * in cur_boot before ram_console restored.
  342. * The current_is_abnormal_boot() would return the value of cur_boot.
  343. */
  344. int current_is_abnormal_boot(void)
  345. {
  346. if (cur_boot == BOOT_NORMAL || cur_boot == BOOT_ABNORMAL)
  347. return cur_boot;
  348. cur_boot = ram_console_is_abnormal_boot() ? BOOT_ABNORMAL : BOOT_NORMAL;
  349. return cur_boot;
  350. }
  351. bool ram_console_should_restore(struct ram_console_buffer *tmp_ram_console)
  352. {
  353. unsigned int fiq_step, wdt_status, exp_type;
  354. if (cur_boot != BOOT_NORMAL && cur_boot != BOOT_ABNORMAL)
  355. cur_boot = ram_console_is_abnormal_boot() ? BOOT_ABNORMAL : BOOT_NORMAL;
  356. if (U_VAR(set_flag) && tmp_ram_console && tmp_ram_console->off_linux &&
  357. (tmp_ram_console->off_linux == (tmp_ram_console->off_llk + ALIGN(tmp_ram_console->sz_lk, 64))) &&
  358. (tmp_ram_console->off_pl == sizeof(struct ram_console_buffer))) {
  359. wdt_status = ((struct reboot_reason_pl*)((void*)tmp_ram_console + tmp_ram_console->off_pl))->wdt_status;
  360. fiq_step = ((struct reboot_reason_kernel*)((void*)tmp_ram_console + tmp_ram_console->off_linux))->fiq_step;
  361. exp_type = RAM_CONSOLE_EXP_TYPE_DEC(((struct reboot_reason_kernel *)((void *)tmp_ram_console + tmp_ram_console->off_linux))->exp_type);
  362. if ((wdt_status != 0 && wdt_status != U_VAR(wdt_status)) ||
  363. (fiq_step != 0 && fiq_step != U_VAR(fiq_step)) ||
  364. (exp_type != 0 && exp_type != U_VAR(exp_type))) {
  365. return true;
  366. }
  367. }
  368. return false;
  369. }
  370. void ram_console_lk_save(unsigned int val, int index)
  371. {
  372. struct reboot_reason_lk *rr_lk;
  373. if (ram_console && ram_console->off_lk < ram_console_size) {
  374. rr_lk = (void*)ram_console + ram_console->off_lk;
  375. if (index < RAM_CONSOLE_LK_SIZE)
  376. rr_lk->last_func[index] = val;
  377. }
  378. }
  379. /* default can be either sram or dram */
  380. void ram_console_addr_size(unsigned int *addr, unsigned int *size)
  381. {
  382. if (addr == NULL || size == NULL) {
  383. LOG("%s. get ram console default info args invalid\n", MOD);
  384. return;
  385. }
  386. *addr = (unsigned int)ram_console;
  387. *size = ram_console_size;
  388. }
  389. void ram_console_sram_addr_size(unsigned int *addr, unsigned int *size)
  390. {
  391. if (addr == NULL || size == NULL) {
  392. LOG("%s. get ram console sram info args invalid\n", MOD);
  393. return;
  394. }
  395. ram_console_atag_valid();
  396. *addr = g_boot_arg->ram_console_sram_addr;
  397. *size = g_boot_arg->ram_console_sram_size;
  398. }
  399. u32 ram_console_def_memory(void)
  400. {
  401. ram_console_atag_valid();
  402. return g_boot_arg->ram_console_def_type;
  403. }
  404. u32 ram_console_sram_offset(void)
  405. {
  406. ram_console_atag_valid();
  407. return g_boot_arg->ram_console_memory_info_offset;
  408. }
  409. void sram_plat_dbg_info_addr_size(unsigned int *addr, unsigned int *size)
  410. {
  411. struct ram_console_memory_info *memory_info = NULL;
  412. if (addr == NULL || size == NULL) {
  413. LOG("%s. get plat dbg info args invalid\n", MOD);
  414. return;
  415. }
  416. memory_info = ram_console_atag_memory_info();
  417. *addr = memory_info->sram_plat_dbg_info_addr;
  418. *size = memory_info->sram_plat_dbg_info_size;
  419. }
  420. void sram_log_store_addr_size(unsigned int *addr, unsigned int *size)
  421. {
  422. struct ram_console_memory_info *memory_info = NULL;
  423. if (addr == NULL || size == NULL) {
  424. LOG("%s. get log_store info args invalid\n", MOD);
  425. return;
  426. }
  427. memory_info = ram_console_atag_memory_info();
  428. *addr = memory_info->sram_log_store_addr;
  429. *size = memory_info->sram_log_store_size;
  430. }
  431. void sram_mrdump_addr_size(unsigned int *addr, unsigned int *size)
  432. {
  433. struct ram_console_memory_info *memory_info = NULL;
  434. if (addr == NULL || size == NULL) {
  435. LOG("%s. get mrdump info args invalid\n", MOD);
  436. return;
  437. }
  438. memory_info = ram_console_atag_memory_info();
  439. *addr = memory_info->mrdump_addr;
  440. *size = memory_info->mrdump_size;
  441. }
  442. void pstore_addr_size(unsigned int *addr, unsigned int *size)
  443. {
  444. struct ram_console_memory_info *memory_info = NULL;
  445. if (addr == NULL || size == NULL) {
  446. LOG("%s. get pstore info args invalid\n", MOD);
  447. return;
  448. }
  449. memory_info = ram_console_atag_memory_info();
  450. *addr = memory_info->pstore_addr;
  451. *size = memory_info->pstore_size;
  452. }
  453. void mrdump_mini_header_addr_size(unsigned int *addr, unsigned int *size)
  454. {
  455. struct ram_console_memory_info *memory_info = NULL;
  456. if (addr == NULL || size == NULL) {
  457. LOG("%s. get minirdump header info args invalid\n", MOD);
  458. return;
  459. }
  460. memory_info = ram_console_atag_memory_info();
  461. *addr = memory_info->mrdump_mini_header_addr;
  462. *size = memory_info->mrdump_mini_header_size;
  463. }
  464. void ram_console_dts_written(void *fdt)
  465. {
  466. unsigned int addr = 0;
  467. unsigned int size = 0;
  468. unsigned int def_type = 0;
  469. unsigned int memory_info_offset = 0;
  470. unsigned int *ptemp;
  471. unsigned int buf[4];
  472. int offset;
  473. int ret;
  474. offset = fdt_path_offset(fdt, "/chosen");
  475. if (offset < 0) {
  476. LOG("%s. get /chosen offset failed(%d)\n", MOD, offset);
  477. ram_console_fatal("get /chosen offset failed");
  478. return;
  479. }
  480. ptemp = (unsigned int *)buf;
  481. ram_console_sram_addr_size(&addr, &size);
  482. *ptemp = addr;
  483. *(ptemp + 1) = size;
  484. def_type = ram_console_def_memory();
  485. *(ptemp + 2) = def_type;
  486. memory_info_offset = ram_console_sram_offset();
  487. *(ptemp + 3) = memory_info_offset;
  488. LOG("%s. [0x%x,0x%x,0x%x,0x%x]\n", MOD, *ptemp, *(ptemp + 1),
  489. *(ptemp + 2), *(ptemp + 3));
  490. ret = fdt_setprop(fdt, offset, "ram_console", buf, (4 * sizeof(*ptemp)));
  491. if (ret)
  492. ram_console_fatal("dts written failed");
  493. sram_log_store_addr_size(&addr, &size);
  494. *ptemp = addr;
  495. *(ptemp + 1) = size;
  496. LOG("%s. log_store [0x%x,0x%x]\n", MOD, *ptemp, *(ptemp + 1));
  497. ret = fdt_setprop(fdt, offset, "log_store", buf, (2 * sizeof(*ptemp)));
  498. if (ret)
  499. ram_console_fatal("log_store dts written failed");
  500. }
  501. void ram_console_set_dump_step(unsigned int step)
  502. {
  503. if (ram_console) {
  504. ram_console->dump_step = step;
  505. }
  506. }
  507. int ram_console_get_dump_step()
  508. {
  509. if (ram_console)
  510. return ram_console->dump_step;
  511. else {
  512. LOG("%s. ram_console not ready\n", MOD);
  513. return 0;
  514. }
  515. }