exceptions.S 5.0 KB

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  1. /*
  2. * Copyright (c) 2008 Travis Geiselbrecht
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining
  5. * a copy of this software and associated documentation files
  6. * (the "Software"), to deal in the Software without restriction,
  7. * including without limitation the rights to use, copy, modify, merge,
  8. * publish, distribute, sublicense, and/or sell copies of the Software,
  9. * and to permit persons to whom the Software is furnished to do so,
  10. * subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be
  13. * included in all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  18. * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
  19. * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  20. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  21. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  22. */
  23. #include <asm.h>
  24. FUNCTION(arm_undefined)
  25. stmfd sp!, { r0-r12, r14 }
  26. sub sp, sp, #12
  27. mov r0, sp
  28. mrs r1, spsr
  29. stmia r0, { r1, r13-r14 }^
  30. b arm_undefined_handler
  31. b .
  32. FUNCTION(arm_syscall)
  33. stmfd sp!, { r0-r12, r14 }
  34. sub sp, sp, #12
  35. mov r0, sp
  36. mrs r1, spsr
  37. stmia r0, { r1, r13-r14 }^
  38. b arm_syscall_handler
  39. b .
  40. FUNCTION(arm_prefetch_abort)
  41. stmfd sp!, { r0-r12, r14 }
  42. sub sp, sp, #12
  43. mov r0, sp
  44. mrs r1, spsr
  45. stmia r0, { r1, r13-r14 }^
  46. b arm_prefetch_abort_handler
  47. b .
  48. FUNCTION(arm_data_abort)
  49. stmfd sp!, { r0-r12, r14 }
  50. sub sp, sp, #12
  51. mov r0, sp
  52. mrs r1, spsr
  53. stmia r0, { r1, r13-r14 }^
  54. b arm_data_abort_handler
  55. b .
  56. FUNCTION(arm_reserved)
  57. b .
  58. FUNCTION(arm_irq)
  59. /* XXX only deals with interrupting supervisor mode */
  60. /* save r4-r6 and use as a temporary place to save while we switch into supervisor mode */
  61. stmia r13, { r4-r6 }
  62. mov r4, r13
  63. sub r5, lr, #4
  64. mrs r6, spsr
  65. /* move into supervisor mode. irq/fiq disabled */
  66. msr cpsr_c, #(3<<6 | 0x13)
  67. /* save the return address */
  68. stmfd sp!, { r5 }
  69. /* save C trashed regs, supervisor lr */
  70. stmfd sp!, { r0-r3, r12, lr }
  71. /* save spsr */
  72. stmfd sp!, { r6 }
  73. /* restore r4-r6 */
  74. ldmia r4, { r4-r6 }
  75. /* increment the global critical section count */
  76. ldr r1, =critical_section_count
  77. ldr r0, [r1]
  78. add r0, r0, #1
  79. str r0, [r1]
  80. /* call into higher level code */
  81. mov r0, sp /* iframe */
  82. bl platform_irq
  83. /* reschedule if the handler returns nonzero */
  84. cmp r0, #0
  85. blne thread_preempt
  86. /* decrement the global critical section count */
  87. ldr r1, =critical_section_count
  88. ldr r0, [r1]
  89. sub r0, r0, #1
  90. str r0, [r1]
  91. /* restore spsr */
  92. ldmfd sp!, { r0 }
  93. msr spsr_cxsf, r0
  94. /* restore back to where we came from */
  95. ldmfd sp!, { r0-r3, r12, lr, pc }^
  96. .bss
  97. .align 2
  98. .global irq_save_spot
  99. irq_save_spot:
  100. .word 0 /* r4 */
  101. .word 0 /* r5 */
  102. .word 0 /* r6 */
  103. .text
  104. FUNCTION(arm_fiq)
  105. sub lr, lr, #4
  106. stmfd sp!, { r0-r3, r12, lr }
  107. bl platform_fiq
  108. ldmfd sp!, { r0-r3, r12, pc }^
  109. .ltorg
  110. .text
  111. #ifndef MTK_SMC_ID_MGMT
  112. .text
  113. FUNCTION(jumparch64_smc)
  114. push {r4}
  115. mov r4, r3
  116. mov r3, r2
  117. mov r2, r1
  118. mov r1, r0
  119. ldr r0, =0x82000115 /*r0: ATF Function ID, please check MTK_SIP_KERNEL_BOOT_AARCH32 in vendor/arm/atf/include/bl31/services/sip_svc.h*/
  120. smc #0
  121. pop {r4}
  122. b .
  123. .text
  124. FUNCTION(dapc_smc)
  125. mov r3, r2
  126. mov r2, r1
  127. mov r1, r0
  128. ldr r0, =0x82000101 /*please check MTK_SIP_LK_DAPC_INIT_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  129. smc #0
  130. bx lr
  131. .text
  132. FUNCTION(md_reg_write_smc)
  133. push {r4}
  134. mov r4, r3
  135. mov r3, r2
  136. mov r2, r1
  137. mov r1, r0
  138. ldr r0, =0x82000102 /*please check MTK_SIP_LK_LTE_REG_WRITE_TH_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  139. smc #0
  140. pop {r4}
  141. bx lr
  142. .text
  143. FUNCTION(rpmb_init)
  144. ldr r0, =0x82000103 /*please check MTK_SIP_LK_RPMB_INIT_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  145. smc #0
  146. bx lr
  147. .text
  148. FUNCTION(rpmb_uninit)
  149. ldr r0, =0x82000104 /*please check MTK_SIP_LK_RPMB_UNINIT_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  150. smc #0
  151. bx lr
  152. .text
  153. FUNCTION(rpmb_hmac)
  154. mov r2, r1
  155. mov r1, r0
  156. ldr r0, =0x82000105 /*please check MTK_SIP_LK_RPMB_HMAC_AARCH32 in vendor/arm/atf-1.0/include/bl31/services/sip_svc.h*/
  157. smc #0
  158. bx lr
  159. .text
  160. FUNCTION(crypto_hw_init)
  161. mov r2, r1
  162. mov r1, r0
  163. ldr r0, =0x8200010B
  164. smc #0
  165. bx lr
  166. .text
  167. FUNCTION(crypto_hw_disable)
  168. ldr r0, =0x8200010C
  169. smc #0
  170. bx lr
  171. .text
  172. FUNCTION(sha256atf_init)
  173. ldr r0, =0x8200010D
  174. smc #0
  175. bx lr
  176. .text
  177. FUNCTION(sha256atf_process)
  178. mov r2, r1
  179. mov r1, r0
  180. ldr r0, =0x8200010E
  181. smc #0
  182. bx lr
  183. .text
  184. FUNCTION(sha256atf_done)
  185. ldr r0, =0x8200010F
  186. smc #0
  187. bx lr
  188. .text
  189. FUNCTION(get_rnd)
  190. push {r4}
  191. mov r4, r0
  192. ldr r0, =0x82000110
  193. smc #0
  194. str r1, [r4]
  195. pop {r4}
  196. bx lr
  197. .text
  198. FUNCTION(mt_secure_call)
  199. smc #0
  200. bx lr
  201. #endif