EK79007_WSVGALNL_DSI_VDO.c 12 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. #ifndef BUILD_LK
  36. #include <linux/string.h>
  37. #else
  38. #include <string.h>
  39. #endif
  40. #ifdef BUILD_LK
  41. #include <platform/mt_gpio.h>
  42. #include <platform/mt_i2c.h>
  43. #include <platform/mt_pmic.h>
  44. #elif (defined BUILD_UBOOT)
  45. #include <asm/arch/mt6577_gpio.h>
  46. #else
  47. #include <mach/mt_gpio.h>
  48. #include <mach/mt_pm_ldo.h>
  49. #endif
  50. #include "lcm_drv.h"
  51. #ifndef BUILD_LK
  52. static bool fgisFirst = TRUE;
  53. #endif
  54. // ---------------------------------------------------------------------------
  55. // Local Constants
  56. // ---------------------------------------------------------------------------
  57. #define FRAME_WIDTH (1024)
  58. #define FRAME_HEIGHT (600)
  59. // ---------------------------------------------------------------------------
  60. // Local Variables
  61. // ---------------------------------------------------------------------------
  62. static LCM_UTIL_FUNCS lcm_util = {0};
  63. #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
  64. #define UDELAY(n) (lcm_util.udelay(n))
  65. #define MDELAY(n) (lcm_util.mdelay(n))
  66. #ifdef GPIO_LCM_PWR_EN
  67. #define GPIO_LCD_PWR_EN GPIO_LCM_PWR_EN
  68. #else
  69. #define GPIO_LCD_PWR_EN 0xFFFFFFFF
  70. #endif
  71. #ifdef GPIO_LCM_RST
  72. #define GPIO_LCD_RST GPIO_LCM_RST
  73. #else
  74. #define GPIO_LCD_RST 0xFFFFFFFF
  75. #endif
  76. #ifdef GPIO_LCM_BL_EN
  77. #define GPIO_LCD_BL_EN GPIO_LCM_BL_EN
  78. #else
  79. #define GPIO_LCD_BL_EN 0xFFFFFFFF
  80. #endif
  81. // ---------------------------------------------------------------------------
  82. // Local Functions
  83. // ---------------------------------------------------------------------------
  84. #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  85. #define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  86. #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
  87. #define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  88. #define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd)
  89. #define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
  90. #define LCM_DSI_CMD_MODE 0
  91. #define REGFLAG_DELAY 0XFFE
  92. #define REGFLAG_END_OF_TABLE 0xFFF // END OF REGISTERS MARKER
  93. struct LCM_setting_table
  94. {
  95. unsigned cmd;
  96. unsigned char count;
  97. unsigned char para_list[64];
  98. };
  99. static struct LCM_setting_table lcm_initialization_setting[] =
  100. {
  101. {0x25,1,{0x55}},
  102. {0x36,1,{0x01}},
  103. //{0x25,1,{0x00}},
  104. {0xB1,1,{0x30}},
  105. {0xB2,1,{0x10}},
  106. {0x80,1,{0x47}},
  107. {0x81,1,{0x40}},
  108. {0x82,1,{0x04}},
  109. {0x83,1,{0x77}},
  110. {0x84,1,{0x0f}},
  111. {0x85,1,{0x70}},
  112. {0x86,1,{0x70}},
  113. //{0x25,1,{0x00}},
  114. //{0x11,1,{0x00}},
  115. {REGFLAG_DELAY,150,{}},
  116. //{0x29,1,{0x00}},
  117. //{REGFLAG_DELAY,70,{}},
  118. {REGFLAG_END_OF_TABLE, 0x00, {}},
  119. };
  120. static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
  121. {
  122. unsigned int i;
  123. for(i = 0; i < count; i++) {
  124. unsigned cmd;
  125. cmd = table[i].cmd;
  126. switch (cmd) {
  127. case REGFLAG_DELAY :
  128. MDELAY(table[i].count);
  129. break;
  130. case REGFLAG_END_OF_TABLE :
  131. break;
  132. default:
  133. dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
  134. }
  135. }
  136. }
  137. // ---------------------------------------------------------------------------
  138. // LCM Driver Implementations
  139. // ---------------------------------------------------------------------------
  140. static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
  141. {
  142. memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
  143. }
  144. static void lcm_get_params(LCM_PARAMS *params)
  145. {
  146. memset(params, 0, sizeof(LCM_PARAMS));
  147. params->type = LCM_TYPE_DSI;
  148. params->width = FRAME_WIDTH;
  149. params->height = FRAME_HEIGHT;
  150. #if (LCM_DSI_CMD_MODE)
  151. params->dsi.mode = CMD_MODE;
  152. #else
  153. params->dsi.mode = BURST_VDO_MODE; //SYNC_EVENT_VDO_MODE; //SYNC_PULSE_VDO_MODE;
  154. #endif
  155. // DSI
  156. /* Command mode setting */
  157. // Three lane or Four lane
  158. params->dsi.LANE_NUM = LCM_TWO_LANE;
  159. //The following defined the fomat for data coming from LCD engine.
  160. params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
  161. params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
  162. params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
  163. params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
  164. // Highly depends on LCD driver capability.
  165. // Not support in MT6573
  166. params->dsi.packet_size=256;
  167. // Video mode setting
  168. params->dsi.intermediat_buffer_num = 0;
  169. params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888;
  170. params->dsi.word_count=FRAME_WIDTH*3;
  171. params->dsi.vertical_sync_active = 10;
  172. params->dsi.vertical_backporch = 8;
  173. params->dsi.vertical_frontporch = 6;
  174. params->dsi.vertical_active_line = FRAME_HEIGHT;
  175. params->dsi.horizontal_sync_active = 10;
  176. params->dsi.horizontal_backporch = 60;
  177. params->dsi.horizontal_frontporch = 60;
  178. params->dsi.horizontal_blanking_pixel = 60;
  179. params->dsi.horizontal_active_pixel = FRAME_WIDTH;
  180. // Bit rate calculation
  181. // Every lane speed
  182. //params->dsi.pll_div1=0; // div1=0,1,2,3;div1_real=1,2,4,4
  183. //params->dsi.pll_div2=0; // div2=0,1,2,3;div1_real=1,2,4,4
  184. //params->dsi.fbk_div =0x12; // fref=26MHz, fvco=fref*(fbk_div+1)*2/(div1_real*div2_real)
  185. params->dsi.cont_clock = 1;
  186. params->dsi.ssc_disable = 0;
  187. params->dsi.PLL_CLOCK = 300;
  188. }
  189. static void lcm_set_gpio_output(unsigned int GPIO, unsigned int output)
  190. {
  191. mt_set_gpio_mode(GPIO, GPIO_MODE_00);
  192. mt_set_gpio_dir(GPIO, GPIO_DIR_OUT);
  193. mt_set_gpio_out(GPIO, (output>0)? GPIO_OUT_ONE: GPIO_OUT_ZERO);
  194. }
  195. static void lcm_initial_registers(void)
  196. {
  197. /*unsigned int data_array[16];
  198. data_array[0]= 0x10b11500;
  199. dsi_set_cmdq(data_array, 1, 1);
  200. data_array[0]= 0x10b21500;
  201. dsi_set_cmdq(data_array, 1, 1);
  202. data_array[0]= 0x47801500;
  203. dsi_set_cmdq(data_array, 1, 1);
  204. data_array[0]= 0x40811500;
  205. dsi_set_cmdq(data_array, 1, 1);
  206. data_array[0]= 0x04821500;
  207. dsi_set_cmdq(data_array, 1, 1);
  208. data_array[0]= 0x77831500;
  209. dsi_set_cmdq(data_array, 1, 1);
  210. data_array[0]= 0x0f841500;
  211. dsi_set_cmdq(data_array, 1, 1);
  212. data_array[0]= 0x55871500; //0x5a871500;
  213. dsi_set_cmdq(data_array, 1, 1);
  214. data_array[0]= 0x01361500;
  215. dsi_set_cmdq(data_array, 1, 1); */
  216. }
  217. static void lcm_init(void)
  218. {
  219. #ifdef BUILD_LK
  220. printf("[LK/LCM] lcm_init() enter\n");
  221. lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ZERO);
  222. //MDELAY(50);
  223. //VGP1 1.8V
  224. upmu_set_rg_vgp1_vosel(0x3);
  225. upmu_set_rg_vgp1_en(0x1);
  226. MDELAY(10);
  227. lcm_set_gpio_output(GPIO_LCD_RST, GPIO_OUT_ONE);
  228. MDELAY(10);
  229. lcm_set_gpio_output(GPIO_LCD_RST, GPIO_OUT_ZERO);
  230. MDELAY(20);
  231. lcm_set_gpio_output(GPIO_LCD_RST, GPIO_OUT_ONE);
  232. MDELAY(10);
  233. lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
  234. MDELAY(200);
  235. push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
  236. lcm_set_gpio_output(GPIO_LCD_BL_EN, GPIO_OUT_ONE);
  237. #else
  238. printk("[Kernel/LCM] lcm_init() enter\n");
  239. //lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ZERO);
  240. //MDELAY(10);
  241. //hwPowerOn(MT65XX_POWER_LDO_VGP6, VOL_1800, "LCM");
  242. //MDELAY(10);
  243. //lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
  244. //MDELAY(300);
  245. #endif
  246. //lcm_initial_registers();
  247. }
  248. static void lcm_suspend(void)
  249. {
  250. #ifdef BUILD_LK
  251. printf("[LK/LCM] lcm_suspend() enter\n");
  252. //lcm_set_gpio_output(GPIO_LCD_PWR_EN,GPIO_OUT_ZERO);
  253. //MDELAY(100);
  254. //VGP1 1.8V
  255. //upmu_set_rg_vgp1_vosel(0x0);
  256. //upmu_set_rg_vgp1_en(0x0);
  257. //MDELAY(50);
  258. #else
  259. printk("[Kernel/LCM] lcm_suspend() enter\n");
  260. lcm_set_gpio_output(GPIO_LCD_BL_EN, GPIO_OUT_ZERO);
  261. MDELAY(10);
  262. if(fgisFirst == TRUE)
  263. {
  264. fgisFirst = FALSE;
  265. hwPowerOn(MT6323_POWER_LDO_VGP1, VOL_1800, "LCM");
  266. }
  267. hwPowerDown(MT6323_POWER_LDO_VGP1, "LCM");
  268. MDELAY(10);
  269. lcm_set_gpio_output(GPIO_LCD_PWR_EN,GPIO_OUT_ZERO);
  270. MDELAY(10);
  271. lcm_set_gpio_output(GPIO_LCD_RST,GPIO_OUT_ZERO);
  272. //MDELAY(100);
  273. #endif
  274. }
  275. static void lcm_resume(void)
  276. {
  277. #ifdef BUILD_LK
  278. printf("[LK/LCM] lcm_resume() enter\n");
  279. //lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ZERO);
  280. //MDELAY(50);
  281. //VGP1 1.8V
  282. //upmu_set_rg_vgp1_vosel(0x3);
  283. //upmu_set_rg_vgp1_en(0x1);
  284. //MDELAY(10);
  285. //lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
  286. //MDELAY(300);
  287. #else
  288. printk("[Kernel/LCM] lcm_resume() enter\n");
  289. hwPowerOn(MT6323_POWER_LDO_VGP1, VOL_1800, "LCM");
  290. MDELAY(5);
  291. //lcm_set_gpio_output(GPIO_LCD_RST, GPIO_OUT_ONE);
  292. //MDELAY(20);
  293. lcm_set_gpio_output(GPIO_LCD_RST, GPIO_OUT_ZERO);
  294. MDELAY(20);
  295. lcm_set_gpio_output(GPIO_LCD_RST, GPIO_OUT_ONE);
  296. MDELAY(10);
  297. lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
  298. MDELAY(20);
  299. push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
  300. lcm_set_gpio_output(GPIO_LCD_BL_EN, GPIO_OUT_ONE);
  301. printk("[Kernel/LCM] lcm_resume() end\n");
  302. //MDELAY(10);
  303. #endif
  304. }
  305. #if (LCM_DSI_CMD_MODE)
  306. static void lcm_update(unsigned int x, unsigned int y, unsigned int width, unsigned int height)
  307. {
  308. unsigned int x0 = x;
  309. unsigned int y0 = y;
  310. unsigned int x1 = x0 + width - 1;
  311. unsigned int y1 = y0 + height - 1;
  312. unsigned char x0_MSB = ((x0>>8)&0xFF);
  313. unsigned char x0_LSB = (x0&0xFF);
  314. unsigned char x1_MSB = ((x1>>8)&0xFF);
  315. unsigned char x1_LSB = (x1&0xFF);
  316. unsigned char y0_MSB = ((y0>>8)&0xFF);
  317. unsigned char y0_LSB = (y0&0xFF);
  318. unsigned char y1_MSB = ((y1>>8)&0xFF);
  319. unsigned char y1_LSB = (y1&0xFF);
  320. unsigned int data_array[16];
  321. data_array[0]= 0x00053902;
  322. data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
  323. data_array[2]= (x1_LSB);
  324. dsi_set_cmdq(data_array, 3, 1);
  325. data_array[0]= 0x00053902;
  326. data_array[1]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
  327. data_array[2]= (y1_LSB);
  328. dsi_set_cmdq(data_array, 3, 1);
  329. data_array[0]= 0x00290508; //HW bug, so need send one HS packet
  330. dsi_set_cmdq(data_array, 1, 1);
  331. data_array[0]= 0x002c3909;
  332. dsi_set_cmdq(data_array, 1, 0);
  333. }
  334. #endif
  335. LCM_DRIVER ek79007_wsvgalnl_dsi_vdo_lcm_drv =
  336. {
  337. .name = "EK79007_WSVGALNL_DSI_VDO",
  338. .set_util_funcs = lcm_set_util_funcs,
  339. .get_params = lcm_get_params,
  340. .init = lcm_init,
  341. .suspend = lcm_suspend,
  342. .resume = lcm_resume,
  343. // .init_power = lcm_power,
  344. #if (LCM_DSI_CMD_MODE)
  345. .update = lcm_update,
  346. #endif
  347. };