lcm_drv.h 25 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #ifndef __LCM_DRV_H__
  32. #define __LCM_DRV_H__
  33. #include <platform/mt_gpio.h>
  34. #include <platform/mt_i2c.h>
  35. #include <platform/mt_pmic.h>
  36. #include <string.h>
  37. /* --------------------------------------------------------------------------- */
  38. #ifndef ARY_SIZE
  39. #define ARY_SIZE(x) (sizeof((x)) / sizeof((x[0])))
  40. #endif
  41. /* --------------------------------------------------------------------------- */
  42. /* common enumerations */
  43. typedef enum {
  44. LCM_TYPE_DBI = 0,
  45. LCM_TYPE_DPI,
  46. LCM_TYPE_DSI
  47. } LCM_TYPE;
  48. typedef enum {
  49. LCM_CTRL_NONE = 0,
  50. LCM_CTRL_SERIAL_DBI,
  51. LCM_CTRL_PARALLEL_DBI,
  52. LCM_CTRL_GPIO
  53. } LCM_CTRL;
  54. typedef enum {
  55. LCM_POLARITY_RISING = 0,
  56. LCM_POLARITY_FALLING = 1
  57. } LCM_POLARITY;
  58. typedef enum {
  59. LCM_CLOCK_PHASE_0 = 0,
  60. LCM_CLOCK_PHASE_90 = 1
  61. } LCM_CLOCK_PHASE;
  62. typedef enum {
  63. LCM_COLOR_ORDER_RGB = 0,
  64. LCM_COLOR_ORDER_BGR = 1
  65. } LCM_COLOR_ORDER;
  66. typedef enum {
  67. LCM_DRIVING_CURRENT_DEFAULT,
  68. LCM_DRIVING_CURRENT_8MA = (1 << 0),
  69. LCM_DRIVING_CURRENT_4MA = (1 << 1),
  70. LCM_DRIVING_CURRENT_2MA = (1 << 2),
  71. LCM_DRIVING_CURRENT_SLEW_CNTL = (1 << 3),
  72. LCM_DRIVING_CURRENT_6575_4MA = (1 << 4),
  73. LCM_DRIVING_CURRENT_6575_8MA = (3 << 4),
  74. LCM_DRIVING_CURRENT_6575_12MA = (2 << 4),
  75. LCM_DRIVING_CURRENT_6575_16MA = (4 << 4),
  76. LCM_DRIVING_CURRENT_6MA,
  77. LCM_DRIVING_CURRENT_10MA,
  78. LCM_DRIVING_CURRENT_12MA,
  79. LCM_DRIVING_CURRENT_14MA,
  80. LCM_DRIVING_CURRENT_16MA,
  81. LCM_DRIVING_CURRENT_20MA,
  82. LCM_DRIVING_CURRENT_24MA,
  83. LCM_DRIVING_CURRENT_28MA,
  84. LCM_DRIVING_CURRENT_32MA
  85. } LCM_DRIVING_CURRENT;
  86. typedef enum {
  87. LCM_INTERFACE_NOTDEFINED = 0,
  88. LCM_INTERFACE_DSI0,
  89. LCM_INTERFACE_DSI1,
  90. LCM_INTERFACE_DSI_DUAL,
  91. LCM_INTERFACE_DPI0,
  92. LCM_INTERFACE_DPI1,
  93. LCM_INTERFACE_DBI0
  94. } LCM_INTERFACE_ID;
  95. typedef enum {
  96. LCM_IOCTL_NULL = 0,
  97. } LCM_IOCTL;
  98. /* DBI related enumerations */
  99. typedef enum {
  100. LCM_DBI_CLOCK_FREQ_104M = 0,
  101. LCM_DBI_CLOCK_FREQ_52M,
  102. LCM_DBI_CLOCK_FREQ_26M,
  103. LCM_DBI_CLOCK_FREQ_13M,
  104. LCM_DBI_CLOCK_FREQ_7M
  105. } LCM_DBI_CLOCK_FREQ;
  106. typedef enum {
  107. LCM_DBI_DATA_WIDTH_8BITS = 0,
  108. LCM_DBI_DATA_WIDTH_9BITS = 1,
  109. LCM_DBI_DATA_WIDTH_16BITS = 2,
  110. LCM_DBI_DATA_WIDTH_18BITS = 3,
  111. LCM_DBI_DATA_WIDTH_24BITS = 4,
  112. LCM_DBI_DATA_WIDTH_32BITS = 5
  113. } LCM_DBI_DATA_WIDTH;
  114. typedef enum {
  115. LCM_DBI_CPU_WRITE_8_BITS = 8,
  116. LCM_DBI_CPU_WRITE_16_BITS = 16,
  117. LCM_DBI_CPU_WRITE_32_BITS = 32,
  118. } LCM_DBI_CPU_WRITE_BITS;
  119. typedef enum {
  120. LCM_DBI_FORMAT_RGB332 = 0,
  121. LCM_DBI_FORMAT_RGB444 = 1,
  122. LCM_DBI_FORMAT_RGB565 = 2,
  123. LCM_DBI_FORMAT_RGB666 = 3,
  124. LCM_DBI_FORMAT_RGB888 = 4
  125. } LCM_DBI_FORMAT;
  126. typedef enum {
  127. LCM_DBI_TRANS_SEQ_MSB_FIRST = 0,
  128. LCM_DBI_TRANS_SEQ_LSB_FIRST = 1
  129. } LCM_DBI_TRANS_SEQ;
  130. typedef enum {
  131. LCM_DBI_PADDING_ON_LSB = 0,
  132. LCM_DBI_PADDING_ON_MSB = 1
  133. } LCM_DBI_PADDING;
  134. typedef enum {
  135. LCM_DBI_TE_MODE_DISABLED = 0,
  136. LCM_DBI_TE_MODE_VSYNC_ONLY = 1,
  137. LCM_DBI_TE_MODE_VSYNC_OR_HSYNC = 2,
  138. } LCM_DBI_TE_MODE;
  139. typedef enum {
  140. LCM_DBI_TE_VS_WIDTH_CNT_DIV_8 = 0,
  141. LCM_DBI_TE_VS_WIDTH_CNT_DIV_16 = 1,
  142. LCM_DBI_TE_VS_WIDTH_CNT_DIV_32 = 2,
  143. LCM_DBI_TE_VS_WIDTH_CNT_DIV_64 = 3,
  144. } LCM_DBI_TE_VS_WIDTH_CNT_DIV;
  145. /* DPI related enumerations */
  146. typedef enum {
  147. LCM_DPI_FORMAT_RGB565 = 0,
  148. LCM_DPI_FORMAT_RGB666 = 1,
  149. LCM_DPI_FORMAT_RGB888 = 2
  150. } LCM_DPI_FORMAT;
  151. typedef enum {
  152. LCM_SERIAL_CLOCK_FREQ_104M = 0,
  153. LCM_SERIAL_CLOCK_FREQ_26M,
  154. LCM_SERIAL_CLOCK_FREQ_52M
  155. } LCM_SERIAL_CLOCK_FREQ;
  156. typedef enum {
  157. LCM_SERIAL_CLOCK_DIV_2 = 0,
  158. LCM_SERIAL_CLOCK_DIV_4 = 1,
  159. LCM_SERIAL_CLOCK_DIV_8 = 2,
  160. LCM_SERIAL_CLOCK_DIV_16 = 3,
  161. } LCM_SERIAL_CLOCK_DIV;
  162. /* DSI related enumerations */
  163. typedef enum {
  164. CMD_MODE = 0,
  165. SYNC_PULSE_VDO_MODE = 1,
  166. SYNC_EVENT_VDO_MODE = 2,
  167. BURST_VDO_MODE = 3
  168. } LCM_DSI_MODE_CON;
  169. typedef enum {
  170. LCM_ONE_LANE = 1,
  171. LCM_TWO_LANE = 2,
  172. LCM_THREE_LANE = 3,
  173. LCM_FOUR_LANE = 4,
  174. } LCM_LANE_NUM;
  175. typedef enum {
  176. /*
  177. LCM_DSI_FORMAT_RGB565 = 0,
  178. LCM_DSI_FORMAT_RGB666 = 1,
  179. LCM_DSI_FORMAT_RGB888 = 2
  180. */
  181. LCM_DSI_FORMAT_RGB565 = 0,
  182. LCM_DSI_FORMAT_RGB666_LOOSELY = 1,
  183. LCM_DSI_FORMAT_RGB666 = 2,
  184. LCM_DSI_FORMAT_RGB888 = 3,
  185. LCM_DSI_FORMAT_RGB101010 = 4
  186. } LCM_DSI_FORMAT;
  187. typedef enum {
  188. LCM_DSI_TRANS_SEQ_MSB_FIRST = 0,
  189. LCM_DSI_TRANS_SEQ_LSB_FIRST = 1
  190. } LCM_DSI_TRANS_SEQ;
  191. typedef enum {
  192. LCM_DSI_PADDING_ON_LSB = 0,
  193. LCM_DSI_PADDING_ON_MSB = 1
  194. } LCM_DSI_PADDING;
  195. typedef enum {
  196. LCM_PACKED_PS_16BIT_RGB565 = 0,
  197. LCM_LOOSELY_PS_18BIT_RGB666 = 1,
  198. LCM_PACKED_PS_24BIT_RGB888 = 2,
  199. LCM_PACKED_PS_18BIT_RGB666 = 3
  200. } LCM_PS_TYPE;
  201. typedef enum {
  202. LCM_DSI_6589_PLL_CLOCK_NULL = 0,
  203. LCM_DSI_6589_PLL_CLOCK_201_5 = 1,
  204. LCM_DSI_6589_PLL_CLOCK_208 = 2,
  205. LCM_DSI_6589_PLL_CLOCK_214_5 = 3,
  206. LCM_DSI_6589_PLL_CLOCK_221 = 4,
  207. LCM_DSI_6589_PLL_CLOCK_227_5 = 5,
  208. LCM_DSI_6589_PLL_CLOCK_234 = 6,
  209. LCM_DSI_6589_PLL_CLOCK_240_5 = 7,
  210. LCM_DSI_6589_PLL_CLOCK_247 = 8,
  211. LCM_DSI_6589_PLL_CLOCK_253_5 = 9,
  212. LCM_DSI_6589_PLL_CLOCK_260 = 10,
  213. LCM_DSI_6589_PLL_CLOCK_266_5 = 11,
  214. LCM_DSI_6589_PLL_CLOCK_273 = 12,
  215. LCM_DSI_6589_PLL_CLOCK_279_5 = 13,
  216. LCM_DSI_6589_PLL_CLOCK_286 = 14,
  217. LCM_DSI_6589_PLL_CLOCK_292_5 = 15,
  218. LCM_DSI_6589_PLL_CLOCK_299 = 16,
  219. LCM_DSI_6589_PLL_CLOCK_305_5 = 17,
  220. LCM_DSI_6589_PLL_CLOCK_312 = 18,
  221. LCM_DSI_6589_PLL_CLOCK_318_5 = 19,
  222. LCM_DSI_6589_PLL_CLOCK_325 = 20,
  223. LCM_DSI_6589_PLL_CLOCK_331_5 = 21,
  224. LCM_DSI_6589_PLL_CLOCK_338 = 22,
  225. LCM_DSI_6589_PLL_CLOCK_344_5 = 23,
  226. LCM_DSI_6589_PLL_CLOCK_351 = 24,
  227. LCM_DSI_6589_PLL_CLOCK_357_5 = 25,
  228. LCM_DSI_6589_PLL_CLOCK_364 = 26,
  229. LCM_DSI_6589_PLL_CLOCK_370_5 = 27,
  230. LCM_DSI_6589_PLL_CLOCK_377 = 28,
  231. LCM_DSI_6589_PLL_CLOCK_383_5 = 29,
  232. LCM_DSI_6589_PLL_CLOCK_390 = 30,
  233. LCM_DSI_6589_PLL_CLOCK_396_5 = 31,
  234. LCM_DSI_6589_PLL_CLOCK_403 = 32,
  235. LCM_DSI_6589_PLL_CLOCK_409_5 = 33,
  236. LCM_DSI_6589_PLL_CLOCK_416 = 34,
  237. LCM_DSI_6589_PLL_CLOCK_422_5 = 35,
  238. LCM_DSI_6589_PLL_CLOCK_429 = 36,
  239. LCM_DSI_6589_PLL_CLOCK_435_5 = 37,
  240. LCM_DSI_6589_PLL_CLOCK_442 = 38,
  241. LCM_DSI_6589_PLL_CLOCK_448_5 = 39,
  242. LCM_DSI_6589_PLL_CLOCK_455 = 40,
  243. LCM_DSI_6589_PLL_CLOCK_461_5 = 41,
  244. LCM_DSI_6589_PLL_CLOCK_468 = 42,
  245. LCM_DSI_6589_PLL_CLOCK_474_5 = 43,
  246. LCM_DSI_6589_PLL_CLOCK_481 = 44,
  247. LCM_DSI_6589_PLL_CLOCK_487_5 = 45,
  248. LCM_DSI_6589_PLL_CLOCK_494 = 46,
  249. LCM_DSI_6589_PLL_CLOCK_500_5 = 47,
  250. LCM_DSI_6589_PLL_CLOCK_507 = 48,
  251. LCM_DSI_6589_PLL_CLOCK_513_5 = 49,
  252. LCM_DSI_6589_PLL_CLOCK_520 = 50,
  253. } LCM_DSI_PLL_CLOCK;
  254. /* --------------------------------------------------------------------------- */
  255. typedef struct {
  256. LCM_COLOR_ORDER color_order;
  257. LCM_DBI_TRANS_SEQ trans_seq;
  258. LCM_DBI_PADDING padding;
  259. LCM_DBI_FORMAT format;
  260. LCM_DBI_DATA_WIDTH width;
  261. } LCM_DBI_DATA_FORMAT;
  262. typedef struct {
  263. LCM_POLARITY cs_polarity;
  264. LCM_POLARITY clk_polarity;
  265. LCM_CLOCK_PHASE clk_phase;
  266. unsigned int is_non_dbi_mode;
  267. LCM_SERIAL_CLOCK_FREQ clock_base;
  268. LCM_SERIAL_CLOCK_DIV clock_div;
  269. /* //////////////////////////////////MT6575 added params, and if lcm driver is for 6575, only care these below params */
  270. unsigned int css;
  271. unsigned int csh;
  272. unsigned int rd_1st;
  273. unsigned int rd_2nd;
  274. unsigned int wr_1st;
  275. unsigned int wr_2nd;
  276. unsigned int sif_3wire;
  277. unsigned int sif_sdi;
  278. LCM_POLARITY sif_1st_pol;
  279. LCM_POLARITY sif_sck_def;
  280. unsigned int sif_div2;
  281. unsigned int sif_hw_cs;
  282. /* ////////////////////////////////// */
  283. } LCM_DBI_SERIAL_PARAMS;
  284. typedef struct {
  285. /* timing parameters */
  286. unsigned int write_setup;
  287. unsigned int write_hold;
  288. unsigned int write_wait;
  289. unsigned int read_setup;
  290. unsigned int read_hold;
  291. unsigned int read_latency;
  292. unsigned int wait_period;
  293. /*only for 6575 */
  294. unsigned int cs_high_width;
  295. } LCM_DBI_PARALLEL_PARAMS;
  296. typedef struct {
  297. LCM_COLOR_ORDER color_order;
  298. LCM_DSI_TRANS_SEQ trans_seq;
  299. LCM_DSI_PADDING padding;
  300. LCM_DSI_FORMAT format;
  301. } LCM_DSI_DATA_FORMAT;
  302. typedef struct {
  303. LCM_DSI_MODE_CON mode;
  304. unsigned int cmd_if;
  305. unsigned int addr;
  306. unsigned int val[4];
  307. } LCM_DSI_MODE_SWITCH_CMD;
  308. typedef struct {
  309. unsigned int compress_ratio;
  310. unsigned int lr_mode_en;
  311. unsigned int vlc_disable;
  312. unsigned int vlc_config;
  313. } LCM_UFOE_CONFIG_PARAMS;
  314. /* --------------------------------------------------------------------------- */
  315. typedef struct {
  316. /* common parameters for serial & parallel interface */
  317. unsigned int port;
  318. LCM_DBI_CLOCK_FREQ clock_freq;
  319. LCM_DBI_DATA_WIDTH data_width;
  320. LCM_DBI_DATA_FORMAT data_format;
  321. LCM_DBI_CPU_WRITE_BITS cpu_write_bits;
  322. LCM_DRIVING_CURRENT io_driving_current;
  323. LCM_DRIVING_CURRENT msb_io_driving_current;
  324. LCM_DRIVING_CURRENT ctrl_io_driving_current;
  325. /* tearing control */
  326. LCM_DBI_TE_MODE te_mode;
  327. LCM_POLARITY te_edge_polarity;
  328. unsigned int te_hs_delay_cnt;
  329. unsigned int te_vs_width_cnt;
  330. LCM_DBI_TE_VS_WIDTH_CNT_DIV te_vs_width_cnt_div;
  331. /* particular parameters for serial & parallel interface */
  332. LCM_DBI_SERIAL_PARAMS serial;
  333. LCM_DBI_PARALLEL_PARAMS parallel;
  334. } LCM_DBI_PARAMS;
  335. typedef struct {
  336. /*
  337. Pixel Clock Frequency = 26MHz * mipi_pll_clk_div1
  338. / (mipi_pll_clk_ref + 1)
  339. / (2 * mipi_pll_clk_div2)
  340. / dpi_clk_div
  341. */
  342. unsigned int mipi_pll_clk_ref; /* 0..1 */
  343. unsigned int mipi_pll_clk_div1; /* 0..63 */
  344. unsigned int mipi_pll_clk_div2; /* 0..15 */
  345. unsigned int mipi_pll_clk_fbk_div; /* PCLK=> 8: 26MHz, 10: 35MHz, 12: 40MHz */
  346. unsigned int dpi_clk_div; /* 2..32 */
  347. unsigned int dpi_clk_duty; /* (dpi_clk_div - 1) .. 31 */
  348. unsigned int PLL_CLOCK;
  349. unsigned int dpi_clock;
  350. unsigned int ssc_disable;
  351. unsigned int ssc_range;
  352. unsigned int width;
  353. unsigned int height;
  354. unsigned int bg_width;
  355. unsigned int bg_height;
  356. /* polarity parameters */
  357. LCM_POLARITY clk_pol;
  358. LCM_POLARITY de_pol;
  359. LCM_POLARITY vsync_pol;
  360. LCM_POLARITY hsync_pol;
  361. /* timing parameters */
  362. unsigned int hsync_pulse_width;
  363. unsigned int hsync_back_porch;
  364. unsigned int hsync_front_porch;
  365. unsigned int vsync_pulse_width;
  366. unsigned int vsync_back_porch;
  367. unsigned int vsync_front_porch;
  368. /* output format parameters */
  369. LCM_DPI_FORMAT format;
  370. LCM_COLOR_ORDER rgb_order;
  371. unsigned int is_serial_output;
  372. unsigned int i2x_en;
  373. unsigned int i2x_edge;
  374. unsigned int embsync;
  375. unsigned int lvds_tx_en;
  376. unsigned int bit_swap;
  377. /* intermediate buffers parameters */
  378. unsigned int intermediat_buffer_num; /* 2..3 */
  379. /* iopad parameters */
  380. LCM_DRIVING_CURRENT io_driving_current;
  381. LCM_DRIVING_CURRENT msb_io_driving_current;
  382. LCM_DRIVING_CURRENT lsb_io_driving_current;
  383. LCM_DRIVING_CURRENT ctrl_io_driving_current;
  384. } LCM_DPI_PARAMS;
  385. /* --------------------------------------------------------------------------- */
  386. typedef struct {
  387. unsigned char cmd;
  388. unsigned char count;
  389. unsigned char para_list[2];
  390. } LCM_esd_check_item;
  391. typedef enum {
  392. DUAL_DSI_NONE = 0x0,
  393. DUAL_DSI_CMD = 0x1,
  394. DUAL_DSI_VDO = 0x2,
  395. } DUAL_DSI_TYPE;
  396. typedef enum {
  397. MIPITX_PHY_LANE_0 = 0,
  398. MIPITX_PHY_LANE_1,
  399. MIPITX_PHY_LANE_2,
  400. MIPITX_PHY_LANE_3,
  401. MIPITX_PHY_LANE_CK,
  402. MIPITX_PHY_LANE_RX,
  403. MIPITX_PHY_LANE_NUM
  404. } MIPITX_PHY_LANE_SWAP;
  405. typedef enum {
  406. MIPITX_PHY_PORT_0 = 0,
  407. MIPITX_PHY_PORT_1,
  408. MIPITX_PHY_PORT_NUM
  409. } MIPITX_PHY_PORT;
  410. typedef struct {
  411. unsigned int ver; /* [7:4] major [3:0] minor */
  412. unsigned int slice_width;
  413. unsigned int bit_per_pixel;
  414. unsigned int slice_mode;
  415. unsigned int rgb_swap;
  416. unsigned int dsc_cfg;
  417. unsigned int dsc_line_buf_depth;
  418. unsigned int bit_per_channel;
  419. unsigned int rct_on;
  420. unsigned int bp_enable;
  421. unsigned int pic_height; /* need to check */
  422. unsigned int pic_width; /* need to check */
  423. unsigned int slice_height;
  424. unsigned int chunk_size;
  425. unsigned int dec_delay;
  426. unsigned int xmit_delay;
  427. unsigned int scale_value;
  428. unsigned int increment_interval;
  429. unsigned int line_bpg_offset;
  430. unsigned int decrement_interval;
  431. unsigned int nfl_bpg_offset;
  432. unsigned int slice_bpg_offset;
  433. unsigned int initial_offset;
  434. unsigned int final_offset;
  435. unsigned int flatness_minqp;
  436. unsigned int flatness_maxqp;
  437. unsigned int rc_model_size;
  438. unsigned int rc_edge_factor;
  439. unsigned int rc_quant_incr_limit0;
  440. unsigned int rc_quant_incr_limit1;
  441. unsigned int rc_tgt_offset_hi;
  442. unsigned int rc_tgt_offset_lo;
  443. } LCM_DSC_CONFIG_PARAMS;
  444. typedef struct {
  445. LCM_DSI_MODE_CON mode;
  446. LCM_DSI_MODE_CON switch_mode;
  447. unsigned int DSI_WMEM_CONTI;
  448. unsigned int DSI_RMEM_CONTI;
  449. unsigned int VC_NUM;
  450. LCM_LANE_NUM LANE_NUM;
  451. LCM_DSI_DATA_FORMAT data_format;
  452. /* intermediate buffers parameters */
  453. unsigned int intermediat_buffer_num; /* 2..3 */
  454. LCM_PS_TYPE PS;
  455. unsigned int word_count;
  456. unsigned int packet_size;
  457. unsigned int packet_size_mult;
  458. unsigned int vertical_sync_active;
  459. unsigned int vertical_backporch;
  460. unsigned int vertical_frontporch;
  461. unsigned int vertical_frontporch_for_low_power;
  462. unsigned int vertical_active_line;
  463. unsigned int horizontal_sync_active;
  464. unsigned int horizontal_backporch;
  465. unsigned int horizontal_frontporch;
  466. unsigned int horizontal_blanking_pixel;
  467. unsigned int horizontal_active_pixel;
  468. unsigned int horizontal_bllp;
  469. unsigned int line_byte;
  470. unsigned int horizontal_sync_active_byte;
  471. unsigned int horizontal_backporch_byte;
  472. unsigned int horizontal_frontporch_byte;
  473. unsigned int rgb_byte;
  474. unsigned int horizontal_sync_active_word_count;
  475. unsigned int horizontal_backporch_word_count;
  476. unsigned int horizontal_frontporch_word_count;
  477. unsigned char HS_TRAIL;
  478. unsigned char HS_ZERO;
  479. unsigned char HS_PRPR;
  480. unsigned char LPX;
  481. unsigned char TA_SACK;
  482. unsigned char TA_GET;
  483. unsigned char TA_SURE;
  484. unsigned char TA_GO;
  485. unsigned char CLK_TRAIL;
  486. unsigned char CLK_ZERO;
  487. unsigned char LPX_WAIT;
  488. unsigned char CONT_DET;
  489. unsigned char CLK_HS_PRPR;
  490. unsigned char CLK_HS_POST;
  491. unsigned char DA_HS_EXIT;
  492. unsigned char CLK_HS_EXIT;
  493. unsigned int pll_select;
  494. unsigned int pll_div1;
  495. unsigned int pll_div2;
  496. unsigned int fbk_div;
  497. unsigned int fbk_sel;
  498. unsigned int rg_bir;
  499. unsigned int rg_bic;
  500. unsigned int rg_bp;
  501. unsigned int PLL_CLOCK; /* PLL_CLOCK = (int) PLL_CLOCK */
  502. unsigned int data_rate; /* data_rate = PLL_CLOCK x 2 */
  503. unsigned int dsi_clock;
  504. unsigned int ssc_disable;
  505. unsigned int ssc_range;
  506. unsigned int compatibility_for_nvk;
  507. unsigned int cont_clock;
  508. unsigned int ufoe_enable;
  509. unsigned int dsc_enable;
  510. unsigned int bdg_ssc_disable;
  511. unsigned int bdg_dsc_enable;
  512. LCM_UFOE_CONFIG_PARAMS ufoe_params;
  513. LCM_DSC_CONFIG_PARAMS dsc_params;
  514. unsigned int edp_panel;
  515. unsigned int customization_esd_check_enable;
  516. unsigned int esd_check_enable;
  517. unsigned int lcm_int_te_monitor;
  518. unsigned int lcm_int_te_period;
  519. unsigned int lcm_ext_te_monitor;
  520. unsigned int lcm_ext_te_enable;
  521. unsigned int noncont_clock;
  522. unsigned int noncont_clock_period;
  523. unsigned int clk_lp_per_line_enable;
  524. LCM_esd_check_item lcm_esd_check_table[3];
  525. unsigned int switch_mode_enable;
  526. DUAL_DSI_TYPE dual_dsi_type;
  527. unsigned int lane_swap_en;
  528. MIPITX_PHY_LANE_SWAP lane_swap[MIPITX_PHY_PORT_NUM][MIPITX_PHY_LANE_NUM];
  529. unsigned int vertical_vfp_lp;
  530. unsigned int PLL_CLOCK_lp;
  531. unsigned int ulps_sw_enable;
  532. unsigned int null_packet_en;
  533. unsigned int mixmode_enable;
  534. unsigned int mixmode_mipi_clock;
  535. unsigned int pwm_fps;
  536. unsigned int fps;
  537. unsigned int vact_fps;
  538. unsigned int send_frame_enable;
  539. unsigned int lfr_enable;
  540. unsigned int lfr_mode;
  541. unsigned int lfr_type;
  542. unsigned int lfr_skip_num;
  543. unsigned int ext_te_edge;
  544. unsigned int eint_disable;
  545. unsigned int IsCphy;
  546. unsigned int PHY_SEL0;
  547. unsigned int PHY_SEL1;
  548. unsigned int PHY_SEL2;
  549. unsigned int PHY_SEL3;
  550. unsigned int dynamic_switch_mipi;
  551. unsigned int vertical_sync_active_dyn;
  552. unsigned int vertical_backporch_dyn;
  553. unsigned int vertical_frontporch_dyn;
  554. unsigned int vertical_active_line_dyn;
  555. unsigned int horizontal_sync_active_dyn;
  556. unsigned int horizontal_backporch_dyn;
  557. unsigned int horizontal_frontporch_dyn;
  558. unsigned int horizontal_active_pixel_dyn;
  559. unsigned int PLL_CLOCK_dyn; /* PLL_CLOCK = (int) PLL_CLOCK */
  560. unsigned int data_rate_dyn; /* data_rate = PLL_CLOCK x 2 */
  561. } LCM_DSI_PARAMS;
  562. /* --------------------------------------------------------------------------- */
  563. typedef struct {
  564. unsigned int round_corner_en;
  565. unsigned int is_notch;
  566. unsigned int full_content;
  567. unsigned int w;
  568. unsigned int h;
  569. unsigned int w_bot;
  570. unsigned int h_bot;
  571. unsigned int tp_size;
  572. unsigned int bt_size;
  573. void *lt_addr;
  574. void *rt_addr;
  575. void *lb_addr;
  576. void *rb_addr;
  577. } LCM_ROUND_CORNER;
  578. typedef struct {
  579. LCM_TYPE type;
  580. LCM_CTRL ctrl; /* ! how to control LCM registers */
  581. LCM_INTERFACE_ID lcm_if;
  582. LCM_INTERFACE_ID lcm_cmd_if;
  583. /* common parameters */
  584. unsigned int lcm_x;
  585. unsigned int lcm_y;
  586. unsigned int width;
  587. unsigned int height;
  588. unsigned int virtual_width;
  589. unsigned int virtual_height;
  590. unsigned int io_select_mode; /* DBI or DPI should select IO mode according to chip spec */
  591. /* particular parameters */
  592. LCM_DBI_PARAMS dbi;
  593. LCM_DPI_PARAMS dpi;
  594. LCM_DSI_PARAMS dsi;
  595. unsigned int physical_width;
  596. unsigned int physical_height;
  597. unsigned int od_table_size;
  598. void *od_table;
  599. #ifdef MTK_ROUND_CORNER_SUPPORT
  600. LCM_ROUND_CORNER round_corner_params;
  601. #endif
  602. } LCM_PARAMS;
  603. #ifndef MAX
  604. #define MAX(x, y) (((x) >= (y)) ? (x) : (y))
  605. #endif /* MAX */
  606. #ifndef MIN
  607. #define MIN(x, y) (((x) <= (y)) ? (x) : (y))
  608. #endif /* MIN */
  609. #define INIT_SIZE (640)
  610. #define COMPARE_ID_SIZE (32)
  611. #define SUSPEND_SIZE (32)
  612. #define BACKLIGHT_SIZE (32)
  613. #define BACKLIGHT_CMDQ_SIZE (32)
  614. #define MAX_SIZE (MAX(MAX(MAX(MAX(INIT_SIZE, COMPARE_ID_SIZE), SUSPEND_SIZE), BACKLIGHT_SIZE), \
  615. BACKLIGHT_CMDQ_SIZE))
  616. typedef struct {
  617. char data;
  618. char padding[131];
  619. } LCM_DATA_T1;
  620. typedef struct {
  621. char cmd;
  622. char data;
  623. char padding[130];
  624. } LCM_DATA_T2;
  625. typedef struct {
  626. char cmd;
  627. char size;
  628. char data[128];
  629. char padding[2];
  630. } LCM_DATA_T3;
  631. typedef struct {
  632. char cmd;
  633. char location;
  634. char data;
  635. char padding[129];
  636. } LCM_DATA_T4;
  637. typedef struct {
  638. char size;
  639. char cmd[128];
  640. char padding[3];
  641. } LCM_DATA_T5;
  642. typedef struct {
  643. char func;
  644. char type;
  645. char size;
  646. char padding;
  647. union {
  648. LCM_DATA_T1 data_t1;
  649. LCM_DATA_T2 data_t2;
  650. LCM_DATA_T3 data_t3;
  651. LCM_DATA_T4 data_t4;
  652. LCM_DATA_T5 data_t5;
  653. };
  654. } LCM_DATA;
  655. typedef struct {
  656. unsigned int parsing;
  657. unsigned int id;
  658. unsigned int init_size;
  659. unsigned int compare_id_size;
  660. unsigned int suspend_size;
  661. unsigned int backlight_size;
  662. unsigned int backlight_cmdq_size;
  663. LCM_PARAMS params;
  664. LCM_DATA init[INIT_SIZE];
  665. LCM_DATA compare_id[COMPARE_ID_SIZE];
  666. LCM_DATA suspend[SUSPEND_SIZE];
  667. LCM_DATA backlight[BACKLIGHT_SIZE];
  668. LCM_DATA backlight_cmdq[BACKLIGHT_CMDQ_SIZE];
  669. } LCM_DTS;
  670. /* --------------------------------------------------------------------------- */
  671. #define REGFLAG_ESCAPE_ID (0x00)
  672. #define REGFLAG_DELAY_MS_V3 (0xFF)
  673. typedef struct {
  674. unsigned char id;
  675. unsigned char cmd;
  676. unsigned char count;
  677. unsigned char para_list[128];
  678. } LCM_setting_table_V3;
  679. /*
  680. * dtype ---- data type
  681. * vc ---- virtual channel
  682. * dlen ---- data length
  683. * link_state ---- HS:0 LP:1
  684. * payload ---- payload
  685. */
  686. struct dsi_cmd_desc {
  687. unsigned int dtype;
  688. unsigned int vc;
  689. unsigned int dlen;
  690. unsigned int link_state;
  691. char *payload;
  692. };
  693. typedef struct {
  694. void (*set_reset_pin) (unsigned int value);
  695. void (*set_chip_select) (unsigned int value);
  696. int (*set_gpio_out) (unsigned int gpio, unsigned int value);
  697. void (*udelay) (unsigned int us);
  698. void (*mdelay) (unsigned int ms);
  699. void (*rar) (unsigned int ms);
  700. void (*send_cmd) (unsigned int cmd);
  701. void (*send_data) (unsigned int data);
  702. unsigned int (*read_data) (void);
  703. void (*dsi_set_cmdq_V3) (LCM_setting_table_V3 *para_list, unsigned int size,
  704. unsigned char force_update);
  705. void (*dsi_set_cmdq_V2) (unsigned cmd, unsigned char count, unsigned char *para_list,
  706. unsigned char force_update);
  707. void (*dsi_set_cmdq) (unsigned int *pdata, unsigned int queue_size,
  708. unsigned char force_update);
  709. void (*dsi_set_null) (unsigned cmd, unsigned char count, unsigned char *para_list,
  710. unsigned char force_update);
  711. void (*dsi_write_cmd) (unsigned int cmd);
  712. void (*dsi_write_regs) (unsigned int addr, unsigned int *para, unsigned int nums);
  713. unsigned int (*dsi_read_reg) (void);
  714. unsigned int (*dsi_dcs_read_lcm_reg) (unsigned char cmd);
  715. unsigned int (*dsi_dcs_read_lcm_reg_v2) (unsigned char cmd, unsigned char *buffer,
  716. unsigned char buffer_size);
  717. void (*wait_transfer_done) (void);
  718. /** FIXME: GPIO mode should not be configured in lcm driver
  719. REMOVE ME after GPIO customization is done
  720. */
  721. int (*set_gpio_mode) (unsigned int pin, unsigned int mode);
  722. int (*set_gpio_dir) (unsigned int pin, unsigned int dir);
  723. int (*set_gpio_pull_enable) (unsigned int pin, unsigned char pull_en);
  724. long (*set_gpio_lcd_enp_bias)(unsigned int value);
  725. void (*dsi_set_cmdq_V11) (void *cmdq, unsigned int *pdata, unsigned int queue_size,
  726. unsigned char force_update);
  727. void (*dsi_set_cmdq_V22) (void *cmdq, unsigned cmd, unsigned char count,
  728. unsigned char *para_list, unsigned char force_update);
  729. void (*dsi_swap_port) (int swap);
  730. void (*dsi_set_cmdq_V23) (void *cmdq, unsigned cmd, unsigned char count, unsigned char *para_list, unsigned char force_update); /* dual */
  731. void (*mipi_dsi_cmds_tx)(void *cmdq, struct dsi_cmd_desc *cmds);
  732. unsigned int (*mipi_dsi_cmds_rx)(char *out,
  733. struct dsi_cmd_desc *cmds, unsigned int len);
  734. } LCM_UTIL_FUNCS;
  735. typedef enum {
  736. LCM_DRV_IOCTL_ENABLE_CMD_MODE = 0x100,
  737. } LCM_DRV_IOCTL_CMD;
  738. typedef struct {
  739. const char *name;
  740. void (*set_util_funcs) (const LCM_UTIL_FUNCS *util);
  741. void (*get_params) (LCM_PARAMS *params);
  742. void (*init) (void);
  743. void (*suspend) (void);
  744. void (*resume) (void);
  745. /* for power-on sequence refinement */
  746. void (*init_power) (void);
  747. void (*suspend_power) (void);
  748. void (*resume_power) (void);
  749. void (*update) (unsigned int x, unsigned int y, unsigned int width, unsigned int height);
  750. unsigned int (*compare_id) (void);
  751. void (*parse_dts)(const LCM_DTS *DTS, unsigned char force_update);
  752. /* /////////////////////////CABC backlight related function */
  753. void (*set_backlight) (unsigned int level);
  754. void (*set_backlight_cmdq) (void *handle, unsigned int level);
  755. void (*set_pwm) (unsigned int divider);
  756. unsigned int (*get_pwm) (unsigned int divider);
  757. void (*set_backlight_mode) (unsigned int mode);
  758. /* ///////////////////////// */
  759. int (*adjust_fps) (void *cmdq, int fps);
  760. /* ///////////ESD_RECOVERY////////////////////// */
  761. unsigned int (*esd_check) (void);
  762. unsigned int (*esd_recover) (void);
  763. unsigned int (*check_status) (void);
  764. unsigned int (*ata_check) (unsigned char *buffer);
  765. void (*read_fb) (unsigned char *buffer);
  766. int (*ioctl) (LCM_DRV_IOCTL_CMD cmd, unsigned int data);
  767. /* /////////////////////////////////////////////// */
  768. void (*enter_idle)(void);
  769. void (*exit_idle)(void);
  770. void (*change_fps)(unsigned int mode);
  771. /* //switch mode */
  772. void *(*switch_mode) (int mode);
  773. void (*set_cmd) (void *handle, int *mode, unsigned int cmd_num);
  774. void (*set_lcm_cmd) (void *handle, unsigned int *lcm_cmd, unsigned int *lcm_count,
  775. unsigned int *lcm_value);
  776. /* /////////////PWM///////////////////////////// */
  777. void (*set_pwm_for_mix) (int enable);
  778. } LCM_DRIVER;
  779. /* --------------------------------------------------------------------------- */
  780. /* LCM Driver Functions */
  781. /* --------------------------------------------------------------------------- */
  782. const LCM_DRIVER *LCM_GetDriver(void);
  783. unsigned char which_lcd_module_triple(void);
  784. #endif /* __LCM_DRV_H__ */