otm9605a_qhd_dsi_vdo.c 22 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2013. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver's
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. /*****************************************************************************
  36. * Copyright Statement:
  37. * --------------------
  38. * This software is protected by Copyright and the information contained
  39. * herein is confidential. The software may not be copied and the information
  40. * contained herein may not be used or disclosed except with the written
  41. * permission of MediaTek Inc. (C) 2008
  42. *
  43. * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  44. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  45. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
  46. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  47. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  48. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  49. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  50. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  51. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
  52. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
  53. * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
  54. * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
  55. *
  56. * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
  57. * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  58. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  59. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
  60. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  61. *
  62. * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
  63. * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
  64. * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
  65. * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
  66. * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
  67. *
  68. *****************************************************************************/
  69. #ifdef BUILD_LK
  70. #include <string.h>
  71. #include <mt_gpio.h>
  72. #include <platform/mt_pmic.h>
  73. #elif defined(BUILD_UBOOT)
  74. #include <asm/arch/mt_gpio.h>
  75. #else
  76. #include <linux/string.h>
  77. #include <mach/mt_gpio.h>
  78. #include <mach/mt_pm_ldo.h>
  79. #endif
  80. #include "lcm_drv.h"
  81. #include <cust_gpio_usage.h>
  82. #if defined(BUILD_LK)
  83. #define LCM_PRINT printf
  84. #elif defined(BUILD_UBOOT)
  85. #define LCM_PRINT printf
  86. #else
  87. #define LCM_PRINT printk
  88. #endif
  89. // ---------------------------------------------------------------------------
  90. // Local Constants
  91. // ---------------------------------------------------------------------------
  92. // pixel
  93. #define FRAME_WIDTH (540)
  94. #define FRAME_HEIGHT (960)
  95. // physical dimension
  96. #define PHYSICAL_WIDTH (68)
  97. #define PHYSICAL_HIGHT (121)
  98. #define LCM_ID (0x40)
  99. #define LCM_DSI_CMD_MODE 0
  100. #define REGFLAG_DELAY 0xAB
  101. #define REGFLAG_END_OF_TABLE 0xAA // END OF REGISTERS MARKER
  102. /*
  103. DSV power +5V,-5v
  104. */
  105. #ifndef GPIO_DSV_AVDD_EN
  106. #define GPIO_DSV_AVDD_EN (GPIO41 | 0x80000000)
  107. #define GPIO_DSV_AVDD_EN_M_GPIO GPIO_MODE_00
  108. #define GPIO_DSV_AVDD_EN_M_KROW GPIO_MODE_06
  109. #define GPIO_DSV_AVDD_EN_M_PWM GPIO_MODE_05
  110. #endif
  111. #ifndef GPIO_DSV_AVEE_EN
  112. #define GPIO_DSV_AVEE_EN (GPIO42 | 0x80000000)
  113. #define GPIO_DSV_AVEE_EN_M_GPIO GPIO_MODE_00
  114. #define GPIO_DSV_AVEE_EN_M_KROW GPIO_MODE_06
  115. #define GPIO_DSV_AVEE_EN_M_PWM GPIO_MODE_05
  116. #endif
  117. #ifndef GPIO_LCM_PWR
  118. #define GPIO_LCM_PWR (GPIO115 | 0x80000000)
  119. #endif
  120. #ifndef GPIO_LCM_PWR_M_GPIO
  121. #define GPIO_LCM_PWR_M_GPIO GPIO_MODE_00
  122. #endif
  123. #ifndef GPIO_DSV_EN
  124. #define GPIO_DSV_EN (GPIO42 | 0x80000000)
  125. #endif
  126. #ifndef GPIO_DSV_EN_M_GPIO
  127. #define GPIO_DSV_EN_M_GPIO GPIO_MODE_00
  128. #endif
  129. #ifndef GPIO_LCM_RST
  130. #define GPIO_LCM_RST (GPIO112 | 0x80000000)
  131. #endif
  132. #ifndef GPIO_LCM_RST_M_GPIO
  133. #define GPIO_LCM_RST_M_GPIO GPIO_MODE_00
  134. #endif
  135. // ---------------------------------------------------------------------------
  136. // Local Variables
  137. // ---------------------------------------------------------------------------
  138. static LCM_UTIL_FUNCS lcm_util = {0};
  139. #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
  140. #define UDELAY(n) (lcm_util.udelay(n))
  141. #define MDELAY(n) (lcm_util.mdelay(n))
  142. // ---------------------------------------------------------------------------
  143. // Local Functions
  144. // ---------------------------------------------------------------------------
  145. #define dsi_set_cmdq_V3(para_tbl, size, force_update) lcm_util.dsi_set_cmdq_V3(para_tbl, size, force_update)
  146. #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  147. #define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  148. #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
  149. #define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  150. #define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd)
  151. #define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
  152. static unsigned int need_set_lcm_addr = 1;
  153. struct LCM_setting_table {
  154. unsigned char cmd;
  155. unsigned char count;
  156. unsigned char para_list[64];
  157. };
  158. static LCM_setting_table_V3 lcm_initialization_setting_V3[] = {
  159. /*
  160. // Sleep Out
  161. {0x11, 1, {0x00}},
  162. {REGFLAG_DELAY, 120, {}},
  163. // Display ON
  164. {0x29, 1, {0x00}},
  165. {REGFLAG_END_OF_TABLE, 0x00, {}}
  166. };
  167. static struct LCM_setting_table lcm_deep_sleep_mode_in_setting[] = {
  168. // Display off sequence
  169. {0x28, 1, {0x00}},
  170. {REGFLAG_DELAY, 10, {}},
  171. ...
  172. Setting ending by predefined flag
  173. {REGFLAG_END_OF_TABLE, 0x00, {}}
  174. */
  175. {0X15, 0X00, 1, {0X00}},
  176. {0X39, 0XFF, 3, {0X96,0X05,0X01}}, //SET EXTC
  177. {0X15, 0X00, 1, {0X80}},
  178. {0X39, 0XFF, 2, {0X96,0X05}}, //SET MIPI
  179. {0X15, 0X00, 1, {0X90}},
  180. {0X39, 0XC5, 2, {0X96,0XD6}},
  181. {0X15, 0X00, 1, {0X92}},
  182. {0X15, 0XC5, 1, {0X02}},
  183. {0X15, 0X00, 1, {0X93}},
  184. {0X15, 0XC5, 1, {0X03}},
  185. {0X15, 0X00, 1, {0X94}},
  186. {0X15, 0XC5, 1, {0X55}},
  187. {0X15, 0X00, 1, {0X95}},
  188. {0X15, 0XC5, 1, {0X55}},
  189. {0X15, 0X00, 1, {0X83}},
  190. {0X15, 0XC5, 1, {0X00}},
  191. {0X15, 0X00, 1, {0X00}},
  192. {0X39, 0XD8, 2, {0X6F,0X6F}},
  193. {0X15, 0X00, 1, {0X00}},
  194. {0X15, 0XD9, 1, {0X58}},
  195. {0X15, 0X00, 1, {0X80}},
  196. {0X15, 0XC1, 1, {0X36}},
  197. {0X15, 0X00, 1, {0X81}},
  198. {0X15, 0XC1, 1, {0X55}},
  199. {0X15, 0X00, 1, {0X89}},
  200. {0X15, 0XC0, 1, {0X01}},
  201. {0X15, 0X00, 1, {0XB1}},
  202. {0X15, 0XC5, 1, {0X29}},
  203. {0X15, 0X00, 1, {0XB2}},
  204. {0X15, 0XC5, 1, {0X01}},
  205. {0X15, 0X00, 1, {0XC0}},
  206. {0X15, 0XC5, 1, {0X00}},
  207. {0X15, 0X00, 1, {0X80}},
  208. {0X15, 0XC4, 1, {0X9C}},
  209. {0X15, 0X00, 1, {0XB4}},
  210. {0X15, 0XC0, 1, {0X50}},
  211. {0X15, 0X00, 1, {0XA0}},
  212. {0X15, 0XC1, 1, {0X00}},
  213. {0X15, 0X00, 1, {0XC5}},
  214. {0X15, 0XB0, 1, {0X03}},
  215. {0X15, 0X00, 1, {0XD2}},
  216. {0X15, 0XB0, 1, {0X04}},
  217. {0X15, 0X00, 1, {0X84}},
  218. {0X15, 0XC4, 1, {0X18}},
  219. {0X15, 0X00, 1, {0X91}},
  220. {0X15, 0XC0, 1, {0X41}},
  221. {0X15, 0X00, 1, {0XB5}},
  222. {0X15, 0XC0, 1, {0X48}},
  223. {0X15, 0X00, 1, {0X80}},
  224. {0X39, 0XCE, 6, {0X8B,0X03,0X00,0X8A, //SET Display
  225. 0X03,0X00}},
  226. {0X15, 0X00, 1, {0X90}},
  227. {0X39, 0XCE, 14, {0X23,0XC2,0X00,0X23, //SET Power
  228. 0XC3,0X00,0X33,0XC5,
  229. 0X00,0X33,0XC6,0X00,
  230. 0X00,0X00}},
  231. {0X15, 0X00, 1, {0XA0}},
  232. {0X39, 0XCE, 14, {0X38,0X09,0X03,0XCA, //SET Power
  233. 0X00,0X00,0X05,0X38,
  234. 0X08,0X03,0XCB,0X00,
  235. 0X00,0X05}},
  236. {0X15, 0X00, 1, {0XB0}},
  237. {0X39, 0XCE, 14, {0X38,0X07,0X03,0XCC, //SET Power
  238. 0X00,0X00,0X05,0X38,
  239. 0X06,0X03,0XCD,0X00,
  240. 0X00,0X05}},
  241. {0X15, 0X00, 1, {0XC0}},
  242. {0X39, 0XCE, 14, {0X38,0X05,0X03,0XC6, //SET Power
  243. 0X00,0X00,0X05,0X38,
  244. 0X04,0X03,0XC7,0X00,
  245. 0X00,0X05}},
  246. {0X15, 0X00, 1, {0XD0}},
  247. {0X39, 0XCE, 14, {0X38,0X03,0X03,0XC8, //SET Power
  248. 0X00,0X00,0X05,0X38,
  249. 0X02,0X03,0XC9,0X00,
  250. 0X00,0X05}},
  251. {0X15, 0X00, 1, {0XC0}},
  252. {0X39, 0XCF, 10, {0X3D,0X3D,0X00,0X00, //SET Power
  253. 0X00,0X00,0X01,0X00,
  254. 0X00,0X00}},
  255. {0X15, 0X00, 1, {0XC0}},
  256. {0X39, 0XCB, 15, {0X00,0X00,0X04,0X04, //SET Power
  257. 0X04,0X04,0X04,0X04,
  258. 0X04,0X04,0X00,0X00,
  259. 0X04,0X00,0X00}},
  260. {0X15, 0X00, 1, {0XD0}},
  261. {0X39, 0XCB, 15, {0X00,0X00,0X00,0X00, //SET Power
  262. 0X00,0X00,0X00,0X04,
  263. 0X04,0X04,0X04,0X04,
  264. 0X04,0X04,0X04}},
  265. {0X15, 0X00, 1, {0XE0}},
  266. {0X39, 0XCB, 10, {0X00,0X00,0X04,0X00, //SET Power
  267. 0X00,0X00,0X00,0X00,
  268. 0X00,0X00}},
  269. {0X15, 0X00, 1, {0X80}},
  270. {0X39, 0XCC, 10, {0X00,0X00,0X02,0X0A, //SET Power
  271. 0X0C,0X0E,0X10,0X21,
  272. 0X22,0X06}},
  273. {0X15, 0X00, 1, {0X90}},
  274. {0X39, 0XCC, 15, {0X00,0X00,0X08,0X00, //SET Power
  275. 0X00,0X00,0X00,0X00,
  276. 0X00,0X00,0X00,0X00,
  277. 0X01,0X09,0X0B}},
  278. {0X15, 0X00, 1, {0XA0}},
  279. {0X39, 0XCC, 15, {0X0D,0X0F,0X21,0X22, //SET Power
  280. 0X05,0X00,0X00,0X07,
  281. 0X00,0X00,0X00,0X00,
  282. 0X00,0X00,0X00}},
  283. {0X15, 0X00, 1, {0XB0}},
  284. {0X39, 0XCC, 10, {0X00,0X00,0X05,0X0B, //SET Power
  285. 0X09,0X0F,0X0D,0X21,
  286. 0X22,0X01}},
  287. {0X15, 0X00, 1, {0XC0}},
  288. {0X39, 0XCC, 15, {0X00,0X00,0X07,0X00, //SET Power
  289. 0X00,0X00,0X00,0X00,
  290. 0X00,0X00,0X00,0X00,
  291. 0X06,0X0C,0X0A}},
  292. {0X15, 0X00, 1, {0XD0}},
  293. {0X39, 0XCC, 15, {0X10,0X0E,0X21,0X22, //SET Power
  294. 0X02,0X00,0X00,0X08,
  295. 0X00,0X00,0X00,0X00,
  296. 0X00,0X00,0X00}},
  297. {0X15, 0X00, 1, {0X00}},
  298. {0X39, 0XE1, 16, {0X0C,0X09,0X09,0X07, //SET Power
  299. 0X10,0X1F,0X0F,0X0F,
  300. 0X00,0X04,0X00,0X03,
  301. 0X0A,0X0C,0X0A,0X08}},
  302. {0X15, 0X00, 1, {0X00}},
  303. {0X39, 0XE2, 16, {0X04,0X07,0X0C,0X1F, //SET Power
  304. 0X06,0X1F,0X0F,0X0F,
  305. 0X00,0X04,0X04,0X09,
  306. 0X12,0X33,0X2F,0X22}},
  307. {0X15, 0X00, 1, {0X00}},
  308. {0X39, 0XFF, 3, {0X00,0X00,0X00}}, //SET EXTC
  309. };
  310. static struct LCM_setting_table __attribute__ ((unused)) lcm_backlight_level_setting[] = {
  311. {0x51, 1, {0xFF}},
  312. {REGFLAG_END_OF_TABLE, 0x00, {}}
  313. };
  314. static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
  315. {
  316. unsigned int i;
  317. for(i = 0; i < count; i++) {
  318. unsigned cmd;
  319. cmd = table[i].cmd;
  320. switch (cmd) {
  321. case REGFLAG_DELAY:
  322. MDELAY(table[i].count);
  323. break;
  324. case REGFLAG_END_OF_TABLE:
  325. break;
  326. default:
  327. dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
  328. }
  329. }
  330. LCM_PRINT("[LCD] push_table \n");
  331. }
  332. // ---------------------------------------------------------------------------
  333. // LCM Driver Implementations
  334. // ---------------------------------------------------------------------------
  335. static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
  336. {
  337. memcpy((void*)&lcm_util, (void*)util, sizeof(LCM_UTIL_FUNCS));
  338. }
  339. static void lcm_get_params(LCM_PARAMS * params)
  340. {
  341. memset(params, 0, sizeof(LCM_PARAMS));
  342. params->type = LCM_TYPE_DSI;
  343. params->width = FRAME_WIDTH;
  344. params->height = FRAME_HEIGHT;
  345. params->physical_width=PHYSICAL_WIDTH;
  346. params->physical_height=PHYSICAL_HIGHT;
  347. // enable tearing-free
  348. params->dbi.te_mode = LCM_DBI_TE_MODE_DISABLED;
  349. params->dbi.te_edge_polarity = LCM_POLARITY_RISING;
  350. #if (LCM_DSI_CMD_MODE)
  351. params->dsi.mode = CMD_MODE;
  352. #else
  353. params->dsi.mode = SYNC_PULSE_VDO_MODE;//SYNC_EVENT_VDO_MODE;
  354. #endif
  355. // DSI
  356. /* Command mode setting */
  357. params->dsi.LANE_NUM = LCM_TWO_LANE;
  358. //The following defined the fomat for data coming from LCD engine.
  359. params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
  360. params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
  361. params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
  362. params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
  363. // Highly depends on LCD driver capability.
  364. params->dsi.packet_size = 256;
  365. // Video mode setting
  366. params->dsi.intermediat_buffer_num = 2;
  367. params->dsi.PS = LCM_PACKED_PS_24BIT_RGB888;
  368. params->dsi.vertical_sync_active = 1;
  369. params->dsi.vertical_backporch = 16;
  370. params->dsi.vertical_frontporch = 15;
  371. params->dsi.vertical_active_line = FRAME_HEIGHT;
  372. params->dsi.horizontal_sync_active = 4;
  373. params->dsi.horizontal_backporch = 32;
  374. params->dsi.horizontal_frontporch = 32;
  375. params->dsi.horizontal_active_pixel = FRAME_WIDTH;
  376. // Bit rate calculation
  377. //params->dsi.pll_div1=35; // fref=26MHz, fvco=fref*(div1+1) (div1=0~63, fvco=500MHZ~1GHz)
  378. //params->dsi.pll_div2=1; // div2=0~15: fout=fvo/(2*div2)
  379. /* ESD or noise interference recovery For video mode LCM only. */
  380. // Send TE packet to LCM in a period of n frames and check the response.
  381. //params->dsi.lcm_int_te_monitor = FALSE;
  382. //params->dsi.lcm_int_te_period = 1; // Unit : frames
  383. // Need longer FP for more opportunity to do int. TE monitor applicably.
  384. //if(params->dsi.lcm_int_te_monitor)
  385. // params->dsi.vertical_frontporch *= 2;
  386. // Monitor external TE (or named VSYNC) from LCM once per 2 sec. (LCM VSYNC must be wired to baseband TE pin.)
  387. //params->dsi.lcm_ext_te_monitor = FALSE;
  388. // Non-continuous clock
  389. //params->dsi.noncont_clock = TRUE;
  390. //params->dsi.noncont_clock_period = 2; // Unit : frames
  391. // DSI MIPI Spec parameters setting
  392. /*params->dsi.HS_TRAIL = 6;
  393. params->dsi.HS_ZERO = 9;
  394. params->dsi.HS_PRPR = 5;
  395. params->dsi.LPX = 4;
  396. params->dsi.TA_SACK = 1;
  397. params->dsi.TA_GET = 20;
  398. params->dsi.TA_SURE = 6;
  399. params->dsi.TA_GO = 16;
  400. params->dsi.CLK_TRAIL = 5;
  401. params->dsi.CLK_ZERO = 18;
  402. params->dsi.LPX_WAIT = 1;
  403. params->dsi.CONT_DET = 0;
  404. params->dsi.CLK_HS_PRPR = 4;*/
  405. // Bit rate calculation
  406. params->dsi.PLL_CLOCK = 217;
  407. LCM_PRINT("[LCD] lcm_get_params \n");
  408. }
  409. static void init_lcm_registers(void)
  410. {
  411. unsigned int data_array[32];
  412. dsi_set_cmdq_V3(lcm_initialization_setting_V3, sizeof(lcm_initialization_setting_V3) / sizeof(LCM_setting_table_V3), 1);
  413. MDELAY(120);
  414. data_array[0] = 0x00110500; //Sleep Out
  415. dsi_set_cmdq(data_array, 1, 1);
  416. MDELAY(40);
  417. LCM_PRINT("[LCD] init_lcm_registers \n");
  418. }
  419. static void init_lcm_registers_added(void)
  420. {
  421. unsigned int data_array[1];
  422. data_array[0] = 0x00290500; //Display On
  423. dsi_set_cmdq(data_array, 1, 1);
  424. MDELAY(10);
  425. LCM_PRINT("[LCD] init_lcm_registers_added \n");
  426. }
  427. static void init_lcm_registers_sleep(void)
  428. {
  429. unsigned int data_array[1];
  430. MDELAY(10);
  431. data_array[0] = 0x00280500; //Display Off
  432. dsi_set_cmdq(data_array, 1, 1);
  433. MDELAY(60);
  434. LCM_PRINT("[LCD] init_lcm_registers_sleep \n");
  435. }
  436. /* vgp2 1.8v LDO enable */
  437. static void ldo_1v8io_on(void)
  438. {
  439. #ifdef BUILD_UBOOT
  440. #error "not implemeted"
  441. #elif defined(BUILD_LK)
  442. // IOVCC 1.8v LDO on
  443. upmu_set_rg_vgp2_vosel(3);
  444. upmu_set_rg_vgp2_en(1);
  445. #else
  446. hwPowerOn(MT6323_POWER_LDO_VGP2, VOL_1800, "1V8_LCD_VIO_MTK_S");
  447. #endif
  448. }
  449. /* vgp2 1.8v LDO disable */
  450. static void ldo_1v8io_off(void)
  451. {
  452. #ifdef BUILD_UBOOT
  453. #error "not implemeted"
  454. #elif defined(BUILD_LK)
  455. upmu_set_rg_vgp2_en(0);
  456. #else
  457. hwPowerDown(MT6323_POWER_LDO_VGP2, "1V8_LCD_VIO_MTK_S");
  458. #endif
  459. }
  460. static void ldo_ext_3v0_on(void)
  461. {
  462. #if 1 // L80P_FIX
  463. #ifdef BUILD_UBOOT
  464. #error "not implemeted"
  465. #elif defined(BUILD_LK)
  466. upmu_set_rg_vcam_af_vosel(5);
  467. upmu_set_rg_vcam_af_en(1);
  468. #else
  469. hwPowerOn(MT6323_POWER_LDO_VCAM_AF, VOL_2800, "2V8_LCD_VCC_MTK_S");
  470. #endif
  471. #else
  472. mt_set_gpio_mode(GPIO_LCM_PWR, GPIO_LCM_PWR_M_GPIO);
  473. mt_set_gpio_pull_enable(GPIO_LCM_PWR, GPIO_PULL_ENABLE);
  474. mt_set_gpio_dir(GPIO_LCM_PWR, GPIO_DIR_OUT);
  475. mt_set_gpio_out(GPIO_LCM_PWR, GPIO_OUT_ONE);
  476. #endif
  477. }
  478. static void ldo_ext_3v0_off(void)
  479. {
  480. #if 1 // L80P_FIX
  481. #ifdef BUILD_UBOOT
  482. #error "not implemeted"
  483. #elif defined(BUILD_LK)
  484. upmu_set_rg_vcam_af_en(0);
  485. #else
  486. hwPowerDown(MT6323_POWER_LDO_VCAM_AF, "2V8_LCD_VCC_MTK_S");
  487. #endif
  488. #else
  489. mt_set_gpio_mode(GPIO_LCM_PWR, GPIO_LCM_PWR_M_GPIO);
  490. mt_set_gpio_pull_enable(GPIO_LCM_PWR, GPIO_PULL_ENABLE);
  491. mt_set_gpio_dir(GPIO_LCM_PWR, GPIO_DIR_OUT);
  492. mt_set_gpio_out(GPIO_LCM_PWR, GPIO_OUT_ZERO);
  493. #endif
  494. }
  495. /*
  496. DSV power +5V,-5v
  497. */
  498. static void ldo_p5m5_dsv_3v0_on(void)
  499. {
  500. #if 0
  501. mt_set_gpio_mode(GPIO_DSV_EN, GPIO_DSV_EN_M_GPIO);
  502. mt_set_gpio_pull_enable(GPIO_DSV_EN, GPIO_PULL_ENABLE);
  503. mt_set_gpio_dir(GPIO_DSV_EN, GPIO_DIR_OUT);
  504. mt_set_gpio_out(GPIO_DSV_EN, GPIO_OUT_ONE);
  505. #else
  506. mt_set_gpio_mode(GPIO_DSV_AVDD_EN, GPIO_DSV_AVDD_EN_M_GPIO);
  507. mt_set_gpio_pull_enable(GPIO_DSV_AVDD_EN, GPIO_PULL_ENABLE);
  508. mt_set_gpio_dir(GPIO_DSV_AVDD_EN, GPIO_DIR_OUT);
  509. mt_set_gpio_mode(GPIO_DSV_AVEE_EN, GPIO_DSV_AVEE_EN_M_GPIO);
  510. mt_set_gpio_pull_enable(GPIO_DSV_AVEE_EN, GPIO_PULL_ENABLE);
  511. mt_set_gpio_dir(GPIO_DSV_AVEE_EN, GPIO_DIR_OUT);
  512. mt_set_gpio_out(GPIO_DSV_AVDD_EN, GPIO_OUT_ONE);
  513. MDELAY(1);
  514. mt_set_gpio_out(GPIO_DSV_AVEE_EN, GPIO_OUT_ONE);
  515. #endif
  516. }
  517. static void ldo_p5m5_dsv_3v0_off(void)
  518. {
  519. #if 0
  520. mt_set_gpio_mode(GPIO_DSV_EN, GPIO_DSV_EN_M_GPIO);
  521. mt_set_gpio_pull_enable(GPIO_DSV_EN, GPIO_PULL_ENABLE);
  522. mt_set_gpio_dir(GPIO_DSV_EN, GPIO_DIR_OUT);
  523. mt_set_gpio_out(GPIO_DSV_EN, GPIO_OUT_ZERO);
  524. #else
  525. mt_set_gpio_mode(GPIO_DSV_AVDD_EN, GPIO_DSV_AVDD_EN_M_GPIO);
  526. mt_set_gpio_pull_enable(GPIO_DSV_AVDD_EN, GPIO_PULL_ENABLE);
  527. mt_set_gpio_dir(GPIO_DSV_AVDD_EN, GPIO_DIR_OUT);
  528. mt_set_gpio_mode(GPIO_DSV_AVEE_EN, GPIO_DSV_AVEE_EN_M_GPIO);
  529. mt_set_gpio_pull_enable(GPIO_DSV_AVEE_EN, GPIO_PULL_ENABLE);
  530. mt_set_gpio_dir(GPIO_DSV_AVEE_EN, GPIO_DIR_OUT);
  531. mt_set_gpio_out(GPIO_DSV_AVDD_EN, GPIO_OUT_ZERO);
  532. MDELAY(1);
  533. mt_set_gpio_out(GPIO_DSV_AVEE_EN, GPIO_OUT_ZERO);
  534. #endif
  535. }
  536. static void reset_lcd_module(unsigned char reset)
  537. {
  538. mt_set_gpio_mode(GPIO_LCM_RST, GPIO_LCM_RST_M_GPIO);
  539. mt_set_gpio_pull_enable(GPIO_LCM_RST, GPIO_PULL_ENABLE);
  540. mt_set_gpio_dir(GPIO_LCM_RST, GPIO_DIR_OUT);
  541. if(reset){
  542. mt_set_gpio_out(GPIO_LCM_RST, GPIO_OUT_ZERO);
  543. MDELAY(50);
  544. }else{
  545. mt_set_gpio_out(GPIO_LCM_RST, GPIO_OUT_ONE);
  546. }
  547. }
  548. static void lcm_init(void)
  549. {
  550. #if defined(BUILD_LK)
  551. ldo_p5m5_dsv_3v0_off();
  552. #endif
  553. /*
  554. / Power IOVCC > VCI On
  555. / vgp2 1.8v LDO enable
  556. / gpio pin for external LDO enable
  557. / delay 1ms
  558. */
  559. ldo_1v8io_on();
  560. //External LDO 3.0v on
  561. //ldo_ext_3v0_on();
  562. ldo_p5m5_dsv_3v0_on();
  563. /*
  564. / reset pin High > delay 1ms > Low > delay 1ms > High
  565. / LCD RESET PIN
  566. */
  567. SET_RESET_PIN(1);
  568. MDELAY(1);
  569. SET_RESET_PIN(0);
  570. MDELAY(1);
  571. SET_RESET_PIN(1);
  572. MDELAY(50);
  573. init_lcm_registers(); //SET EXTC ~ sleep out register
  574. MDELAY(80);
  575. init_lcm_registers_added(); //Display On
  576. need_set_lcm_addr = 1;
  577. LCM_PRINT("[LCD] lcm_init \n");
  578. }
  579. static void lcm_suspend(void)
  580. {
  581. init_lcm_registers_sleep();
  582. //dsv low
  583. ldo_p5m5_dsv_3v0_off();
  584. SET_RESET_PIN(0);
  585. MDELAY(20);
  586. //VCI/IOVCC off
  587. ldo_1v8io_off();
  588. //ldo_ext_3v0_off();
  589. LCM_PRINT("[LCD] lcm_suspend \n");
  590. }
  591. static void lcm_resume(void)
  592. {
  593. lcm_init();
  594. need_set_lcm_addr = 1;
  595. LCM_PRINT("[LCD] lcm_resume \n");
  596. }
  597. static void lcm_esd_recover(void)
  598. {
  599. lcm_suspend();
  600. lcm_resume();
  601. LCM_PRINT("[LCD] lcm_esd_recover \n");
  602. }
  603. static void lcm_update(unsigned int x, unsigned int y,
  604. unsigned int width, unsigned int height)
  605. {
  606. unsigned int x0 = x;
  607. unsigned int y0 = y;
  608. unsigned int x1 = x0 + width - 1;
  609. unsigned int y1 = y0 + height - 1;
  610. unsigned char x0_MSB = ((x0>>8)&0xFF);
  611. unsigned char x0_LSB = (x0&0xFF);
  612. unsigned char x1_MSB = ((x1>>8)&0xFF);
  613. unsigned char x1_LSB = (x1&0xFF);
  614. unsigned char y0_MSB = ((y0>>8)&0xFF);
  615. unsigned char y0_LSB = (y0&0xFF);
  616. unsigned char y1_MSB = ((y1>>8)&0xFF);
  617. unsigned char y1_LSB = (y1&0xFF);
  618. unsigned int data_array[16];
  619. // need update at the first time
  620. if(need_set_lcm_addr)
  621. {
  622. data_array[0]= 0x00053902;
  623. data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
  624. data_array[2]= (x1_LSB);
  625. dsi_set_cmdq(data_array, 3, 1);
  626. data_array[0]= 0x00053902;
  627. data_array[1]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
  628. data_array[2]= (y1_LSB);
  629. dsi_set_cmdq(data_array, 3, 1);
  630. need_set_lcm_addr = 0;
  631. }
  632. data_array[0]= 0x002c3909;
  633. dsi_set_cmdq(data_array, 1, 0);
  634. LCM_PRINT("[LCD] lcm_update \n");
  635. }
  636. static unsigned int lcm_compare_id(void)
  637. {
  638. return 1;
  639. }
  640. // ---------------------------------------------------------------------------
  641. // Get LCM Driver Hooks
  642. // ---------------------------------------------------------------------------
  643. LCM_DRIVER otm9605a_qhd_dsi_vdo_drv = {
  644. .name = "otm9605a_qhd_dsi_vdo",
  645. .set_util_funcs = lcm_set_util_funcs,
  646. .get_params = lcm_get_params,
  647. .init = lcm_init,
  648. .suspend = lcm_suspend,
  649. .resume = lcm_resume,
  650. .compare_id = lcm_compare_id,
  651. .update = lcm_update,
  652. #if (!defined(BUILD_UBOOT) && !defined(BUILD_LK))
  653. .esd_recover = lcm_esd_recover,
  654. #endif
  655. };