dramc_v1.c 5.0 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2017. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. *
  31. * The following software/firmware and/or related documentation ("MediaTek Software")
  32. * have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
  33. * applicable license agreements with MediaTek Inc.
  34. */
  35. #include <platform/boot_mode.h>
  36. #include <libfdt.h>
  37. #include <debug.h>
  38. extern BOOT_ARGUMENT *g_boot_arg;
  39. int set_fdt_dramc(void *fdt)
  40. {
  41. int ret = 0;
  42. int offset;
  43. unsigned int i;
  44. unsigned int dram_type;
  45. unsigned int support_ch_cnt;
  46. unsigned int ch_cnt;
  47. unsigned int rk_cnt;
  48. unsigned int mr_cnt;
  49. unsigned int freq_cnt;
  50. unsigned int rk_size[DRAMC_MAX_RK];
  51. unsigned int mr_info[DRAMC_MR_CNT * 2];
  52. unsigned int freq_step[DRAMC_FREQ_CNT];
  53. if (!fdt)
  54. return -1;
  55. offset = fdt_path_offset(fdt, "/dramc");
  56. if (offset < 0) {
  57. offset = fdt_path_offset(fdt, "/soc/dramc");
  58. if(offset < 0){
  59. dprintf(INFO, "[%s] get_path_offset fail\n", __func__);
  60. return offset;
  61. }
  62. }
  63. dram_type = cpu_to_fdt32((unsigned int)(g_boot_arg->emi_info.dram_type));
  64. support_ch_cnt = cpu_to_fdt32((unsigned int)(g_boot_arg->emi_info.support_ch_cnt));
  65. ch_cnt = cpu_to_fdt32((unsigned int)(g_boot_arg->emi_info.ch_cnt));
  66. rk_cnt = cpu_to_fdt32((unsigned int)(g_boot_arg->emi_info.rk_cnt));
  67. mr_cnt = cpu_to_fdt32((unsigned int)(g_boot_arg->emi_info.mr_cnt));
  68. freq_cnt = cpu_to_fdt32((unsigned int)(g_boot_arg->emi_info.freq_cnt));
  69. /* unit of rank size: 1Gb (128MB) */
  70. for (i = 0; i < DRAMC_MAX_RK; i++) {
  71. if (i < rk_cnt) {
  72. rk_size[i] = (g_boot_arg->emi_info.rk_size[i] >> 27) & 0xFFFFFFFF;
  73. rk_size[i] = cpu_to_fdt32(rk_size[i]);
  74. } else {
  75. rk_size[i] = cpu_to_fdt32(0);
  76. }
  77. }
  78. for (i = 0; i < DRAMC_MR_CNT; i++) {
  79. if (i < mr_cnt) {
  80. mr_info[i * 2] = cpu_to_fdt32(
  81. (unsigned int)(g_boot_arg->emi_info.mr_info[i].mr_index));
  82. mr_info[i * 2 + 1] = cpu_to_fdt32(
  83. (unsigned int)(g_boot_arg->emi_info.mr_info[i].mr_value));
  84. } else {
  85. mr_info[i * 2] = cpu_to_fdt32(0);
  86. mr_info[i * 2 + 1] = cpu_to_fdt32(0);
  87. }
  88. }
  89. for (i = 0; i < DRAMC_FREQ_CNT; i++) {
  90. if (i < freq_cnt) {
  91. freq_step[i] = (unsigned int)(g_boot_arg->emi_info.freq_step[i]);
  92. freq_step[i] = cpu_to_fdt32(freq_step[i]);
  93. }else {
  94. freq_step[i] = cpu_to_fdt32(0);
  95. }
  96. }
  97. /* pass parameter to kernel */
  98. ret = fdt_setprop(fdt, offset, "dram_type", &dram_type, sizeof(dram_type));
  99. if (ret < 0)
  100. return ret;
  101. ret = fdt_setprop(fdt, offset, "support_ch_cnt", &support_ch_cnt, sizeof(support_ch_cnt));
  102. if (ret < 0)
  103. return ret;
  104. ret = fdt_setprop(fdt, offset, "ch_cnt", &ch_cnt, sizeof(ch_cnt));
  105. if (ret < 0)
  106. return ret;
  107. ret = fdt_setprop(fdt, offset, "rk_cnt", &rk_cnt, sizeof(rk_cnt));
  108. if (ret < 0)
  109. return ret;
  110. ret = fdt_setprop(fdt, offset, "mr_cnt", &mr_cnt, sizeof(mr_cnt));
  111. if (ret < 0)
  112. return ret;
  113. ret = fdt_setprop(fdt, offset, "freq_cnt", &freq_cnt, sizeof(freq_cnt));
  114. if (ret < 0)
  115. return ret;
  116. ret = fdt_setprop(fdt, offset, "rk_size", rk_size, sizeof(rk_size));
  117. if (ret < 0)
  118. return ret;
  119. ret = fdt_setprop(fdt, offset, "mr", mr_info, sizeof(mr_info));
  120. if (ret < 0)
  121. return ret;
  122. ret = fdt_setprop(fdt, offset, "freq_step", freq_step, sizeof(freq_step));
  123. return ret;
  124. }