platform.c 35 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <debug.h>
  32. #include <stdlib.h>
  33. #include <string.h>
  34. #include <video.h>
  35. #include <dev/uart.h>
  36. #include <arch/arm.h>
  37. #include <arch/arm/mmu.h>
  38. #include <arch/ops.h>
  39. #include <target/board.h>
  40. #include <platform/mt_reg_base.h>
  41. #include <platform/mt_disp_drv.h>
  42. #include <platform/disp_drv.h>
  43. #include <platform/primary_display.h>
  44. #include <platform/boot_mode.h>
  45. #include <platform/mt_logo.h>
  46. #include <platform/partition.h>
  47. #include <env.h>
  48. #include <platform/mt_gpio.h>
  49. #include <platform/mt_pmic.h>
  50. #include <platform/mt_pmic_wrap_init.h>
  51. #include <platform/mt_i2c.h>
  52. #include <platform/mtk_key.h>
  53. #include <platform/mt_rtc.h>
  54. #include <platform/mt_leds.h>
  55. #include <platform/upmu_common.h>
  56. #ifdef CFG_MTK_WDT_COMMON
  57. #include <mtk_wdt.h>
  58. #else
  59. #include <platform/mtk_wdt.h>
  60. #endif
  61. #include <platform/disp_drv_platform.h>
  62. #include <plinfo.h> // for plinfo_get_brom_header_block_size()
  63. #include <libfdt.h>
  64. // #include <mt_gic.h> // for platform_init_interrupts()
  65. #include <mt_boot.h> // for bldr_load_dtb()
  66. #include <platform.h> // for platform_uninit()
  67. #include <platform/verified_boot.h>
  68. #include <load_vfy_boot.h>
  69. #include <fdt_op.h>
  70. #include <pal_assert.h>
  71. #include <profiling.h>
  72. #include <recovery.h>
  73. #if defined(MTK_SECURITY_SW_SUPPORT)
  74. #include "oemkey.h"
  75. #endif
  76. #if defined(MTK_AB_OTA_UPDATER)
  77. #include <bootctrl.h>
  78. #endif
  79. #ifdef MTK_SECURITY_SW_SUPPORT
  80. extern u8 g_oemkey[OEM_PUBK_SZ];
  81. #endif
  82. #ifdef LK_DL_CHECK
  83. /*block if check dl fail*/
  84. #undef LK_DL_CHECK_BLOCK_LEVEL
  85. #endif
  86. extern void platform_early_init_timer();
  87. extern void jump_da(u32 addr, u32 arg1, u32 arg2);
  88. extern int i2c_hw_init(void);
  89. extern int mboot_common_load_logo(unsigned long logo_addr, char* filename);
  90. extern void mtk_wdt_disable(void);
  91. extern void platform_deinit_interrupts(void);
  92. extern int mmc_get_dl_info(void);
  93. extern int mmc_legacy_init(int);
  94. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  95. extern kal_bool is_low_battery(kal_int32 val);
  96. extern int hw_charging_get_charger_type(void);
  97. #endif
  98. #ifdef MTK_MT8193_SUPPORT
  99. extern int mt8193_init(void);
  100. #endif
  101. void config_shared_SRAM_size(void);
  102. extern int dev_info_nr_cpu(void);
  103. BOOT_ARGUMENT *g_boot_arg;
  104. BOOT_ARGUMENT boot_addr;
  105. int g_nr_bank;
  106. BI_DRAM bi_dram[MAX_NR_BANK];
  107. unsigned int g_fb_base;
  108. unsigned int g_fb_size;
  109. static int g_dram_init_ret;
  110. static unsigned int bootarg_addr;
  111. static unsigned int bootarg_size;
  112. extern unsigned int logo_lk_t;
  113. extern unsigned int boot_time;
  114. /******************************************************************************
  115. ******************************************************************************/
  116. int dram_init(void)
  117. {
  118. int i;
  119. struct boot_tag *tags;
  120. /* Get parameters from pre-loader. Get as early as possible
  121. * The address of BOOT_ARGUMENT_LOCATION will be used by Linux later
  122. * So copy the parameters from BOOT_ARGUMENT_LOCATION to LK's memory region
  123. */
  124. g_boot_arg = &boot_addr;
  125. bootarg_addr = BOOT_ARGUMENT_LOCATION;
  126. bootarg_size = 0;
  127. if (*(unsigned int *)BOOT_ARGUMENT_LOCATION == BOOT_ARGUMENT_MAGIC) {
  128. memcpy(g_boot_arg, (void*)BOOT_ARGUMENT_LOCATION, sizeof(BOOT_ARGUMENT));
  129. bootarg_size = sizeof(BOOT_ARGUMENT);
  130. } else {
  131. g_boot_arg->maggic_number = BOOT_ARGUMENT_MAGIC;
  132. for (tags = (void *)BOOT_ARGUMENT_LOCATION; tags->hdr.size; tags = boot_tag_next(tags)) {
  133. switch (tags->hdr.tag) {
  134. case BOOT_TAG_BOOT_REASON:
  135. g_boot_arg->boot_reason = tags->u.boot_reason.boot_reason;
  136. break;
  137. case BOOT_TAG_BOOT_MODE:
  138. g_boot_arg->boot_mode = tags->u.boot_mode.boot_mode;
  139. break;
  140. case BOOT_TAG_META_COM:
  141. g_boot_arg->meta_com_type = tags->u.meta_com.meta_com_type;
  142. g_boot_arg->meta_com_id = tags->u.meta_com.meta_com_id;
  143. g_boot_arg->meta_uart_port = tags->u.meta_com.meta_uart_port;
  144. break;
  145. case BOOT_TAG_LOG_COM:
  146. g_boot_arg->log_port = tags->u.log_com.log_port;
  147. g_boot_arg->log_baudrate = tags->u.log_com.log_baudrate;
  148. g_boot_arg->log_enable = tags->u.log_com.log_enable;
  149. break;
  150. case BOOT_TAG_MEM:
  151. g_boot_arg->dram_rank_num = tags->u.mem.dram_rank_num;
  152. for (i = 0; i < (int)(tags->u.mem.dram_rank_num); i++) {
  153. g_boot_arg->dram_rank_size[i] = tags->u.mem.dram_rank_size[i];
  154. }
  155. g_boot_arg->mblock_info = tags->u.mem.mblock_info;
  156. g_boot_arg->orig_dram_info = tags->u.mem.orig_dram_info;
  157. g_boot_arg->lca_reserved_mem = tags->u.mem.lca_reserved_mem;
  158. g_boot_arg->tee_reserved_mem = tags->u.mem.tee_reserved_mem;
  159. break;
  160. case BOOT_TAG_MD_INFO:
  161. for (i = 0; i < 4; i++) {
  162. g_boot_arg->md_type[i] = tags->u.md_info.md_type[i];
  163. }
  164. break;
  165. case BOOT_TAG_BOOT_TIME:
  166. g_boot_arg->boot_time = tags->u.boot_time.boot_time;
  167. break;
  168. case BOOT_TAG_DA_INFO:
  169. memcpy(&g_boot_arg->da_info, &tags->u.da_info.da_info, sizeof(da_info_t));
  170. break;
  171. case BOOT_TAG_SEC_INFO:
  172. memcpy(&g_boot_arg->sec_limit, &tags->u.sec_info.sec_limit, sizeof(SEC_LIMIT));
  173. break;
  174. case BOOT_TAG_PART_NUM:
  175. g_boot_arg->part_num = tags->u.part_num.part_num;
  176. break;
  177. case BOOT_TAG_PART_INFO:
  178. g_boot_arg->part_info = tags->u.part_info.part_info; /* only copy the pointer but the contains*/
  179. break;
  180. case BOOT_TAG_EFLAG:
  181. g_boot_arg->e_flag = tags->u.eflag.e_flag;
  182. break;
  183. case BOOT_TAG_DDR_RESERVE:
  184. g_boot_arg->ddr_reserve_enable = tags->u.ddr_reserve.ddr_reserve_enable;
  185. g_boot_arg->ddr_reserve_success = tags->u.ddr_reserve.ddr_reserve_success;
  186. g_boot_arg->ddr_reserve_ready = tags->u.ddr_reserve.ddr_reserve_ready;
  187. break;
  188. case BOOT_TAG_DRAM_BUF:
  189. g_boot_arg->dram_buf_size = tags->u.dram_buf.dram_buf_size;
  190. break;
  191. case BOOT_TAG_SRAM_INFO:
  192. g_boot_arg->non_secure_sram_addr = tags->u.sram_info.non_secure_sram_addr;
  193. g_boot_arg->non_secure_sram_size = tags->u.sram_info.non_secure_sram_size;
  194. break;
  195. case BOOT_TAG_PTP:
  196. memcpy(&g_boot_arg->ptp_volt_info, &tags->u.ptp_volt.ptp_volt_info, sizeof(ptp_info_t));
  197. break;
  198. case BOOT_TAG_PL_VERSION:
  199. memcpy(&g_boot_arg->pl_version, &tags->u.pl_version.pl_version, sizeof(tags->u.pl_version.pl_version));
  200. break;
  201. case BOOT_TAG_RAM_CONSOLE_INFO:
  202. g_boot_arg->ram_console_sram_addr = tags->u.ram_console_info.sram_addr;
  203. g_boot_arg->ram_console_sram_size = tags->u.ram_console_info.sram_size;
  204. g_boot_arg->ram_console_def_type = tags->u.ram_console_info.def_type;
  205. g_boot_arg->ram_console_memory_info_offset = tags->u.ram_console_info.memory_info_offset;
  206. break;
  207. default:
  208. break;
  209. }
  210. bootarg_size += tags->hdr.size;
  211. }
  212. }
  213. #ifdef MACH_FPGA
  214. g_nr_bank = 2;
  215. bi_dram[0].start = DRAM_PHY_ADDR + RIL_SIZE;
  216. bi_dram[0].size = (256 * 1024 * 1024) - RIL_SIZE;
  217. bi_dram[1].start = bi_dram[0].start + bi_dram[0].size;
  218. bi_dram[1].size = (256 * 1024 * 1024);
  219. #else
  220. g_nr_bank = g_boot_arg->dram_rank_num;
  221. if (g_nr_bank == 0 || g_nr_bank > MAX_NR_BANK) {
  222. g_dram_init_ret = -1;
  223. //dprintf(CRITICAL, "[LK ERROR] DRAM bank number is not correct!!!");
  224. //while (1) ;
  225. return -1;
  226. }
  227. /* return the actual DRAM info */
  228. for (i = 0; i < (int)(g_boot_arg->mblock_info.mblock_num); i++) {
  229. bi_dram[i].start = g_boot_arg->mblock_info.mblock[i].start;
  230. bi_dram[i].size = g_boot_arg->mblock_info.mblock[i].size;
  231. }
  232. #endif
  233. return 0;
  234. }
  235. unsigned int platform_get_bootarg_addr(void)
  236. {
  237. return bootarg_addr;
  238. }
  239. unsigned int platform_get_bootarg_size(void)
  240. {
  241. return bootarg_size;
  242. }
  243. /*******************************************************
  244. * Routine: memory_size
  245. * Description: return DRAM size to LCM driver
  246. ******************************************************/
  247. u64 physical_memory_size(void)
  248. {
  249. int i;
  250. unsigned long long size = 0;
  251. for (i = 0; i < (int)(g_boot_arg->orig_dram_info.rank_num); i++) {
  252. size += g_boot_arg->orig_dram_info.rank_info[i].size;
  253. }
  254. return size;
  255. }
  256. u32 memory_size(void)
  257. {
  258. unsigned long long size = physical_memory_size();
  259. while (((unsigned long long)DRAM_PHY_ADDR + size) > 0x100000000ULL) {
  260. size -= (unsigned long long)(1024*1024*1024);
  261. }
  262. return (unsigned int)size;
  263. }
  264. void sw_env()
  265. {
  266. #ifdef LK_DL_CHECK
  267. #ifdef MTK_EMMC_SUPPORT
  268. int dl_status = 0;
  269. dl_status = mmc_get_dl_info();
  270. dprintf(INFO, "mt65xx_sw_env--dl_status: %d\n", dl_status);
  271. if (dl_status != 0) {
  272. video_printf("=> TOOL DL image Fail!\n");
  273. dprintf(CRITICAL, "TOOL DL image Fail\n");
  274. #ifdef LK_DL_CHECK_BLOCK_LEVEL
  275. dprintf(CRITICAL, "uboot is blocking by dl info\n");
  276. while (1) ;
  277. #endif
  278. }
  279. #endif
  280. #endif
  281. #ifndef USER_BUILD
  282. switch (g_boot_mode) {
  283. case META_BOOT:
  284. video_printf(" => META MODE\n");
  285. break;
  286. case FACTORY_BOOT:
  287. video_printf(" => FACTORY MODE\n");
  288. break;
  289. case RECOVERY_BOOT:
  290. video_printf(" => RECOVERY MODE\n");
  291. break;
  292. case SW_REBOOT:
  293. //video_printf(" => SW RESET\n");
  294. break;
  295. case NORMAL_BOOT:
  296. //if(g_boot_arg->boot_reason != BR_RTC && get_env("hibboot") != NULL && atoi(get_env("hibboot")) == 1)
  297. if (get_env("hibboot") != NULL && atoi(get_env("hibboot")) == 1)
  298. video_printf(" => HIBERNATION BOOT\n");
  299. else
  300. video_printf(" => NORMAL BOOT\n");
  301. break;
  302. case ADVMETA_BOOT:
  303. video_printf(" => ADVANCED META MODE\n");
  304. break;
  305. case ATE_FACTORY_BOOT:
  306. video_printf(" => ATE FACTORY MODE\n");
  307. break;
  308. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  309. case KERNEL_POWER_OFF_CHARGING_BOOT:
  310. video_printf(" => POWER OFF CHARGING MODE\n");
  311. break;
  312. case LOW_POWER_OFF_CHARGING_BOOT:
  313. video_printf(" => LOW POWER OFF CHARGING MODE\n");
  314. break;
  315. #endif
  316. case ALARM_BOOT:
  317. video_printf(" => ALARM BOOT\n");
  318. break;
  319. case FASTBOOT:
  320. video_printf(" => FASTBOOT mode...\n");
  321. break;
  322. default:
  323. video_printf(" => UNKNOWN BOOT\n");
  324. }
  325. return;
  326. #endif
  327. #ifdef USER_BUILD
  328. if (g_boot_mode == FASTBOOT)
  329. video_printf(" => FASTBOOT mode...\n");
  330. return;
  331. #endif
  332. }
  333. void platform_init_mmu_mappings(void)
  334. {
  335. unsigned int addr;
  336. unsigned int dram_size = 0;
  337. dram_init();
  338. arm_mmu_init();
  339. dram_size = physical_memory_size();
  340. /* map dram region */
  341. for (addr = 0; addr < dram_size; addr += (1024*1024)) {
  342. /*virtual to physical 1-1 mapping*/
  343. arm_mmu_map_section(bi_dram[0].start+addr,bi_dram[0].start+addr, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE);
  344. }
  345. /* ummap TEE memory regoin */
  346. if (g_boot_arg->tee_reserved_mem.size != 0) {
  347. u64 j, k;
  348. k = g_boot_arg->tee_reserved_mem.start;
  349. j = ROUNDUP(g_boot_arg->tee_reserved_mem.size, 1024*1024);
  350. for (; j > 0; j -= (1024*1024)) {
  351. arm_mmu_map_section((uintptr_t)k , (uintptr_t)k, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN);
  352. k += (1024*1024);
  353. }
  354. }
  355. arch_enable_mmu(); //enable mmu after setup page table to avoid cpu prefetch which may bring on emi violation
  356. }
  357. /******************************************************************************
  358. ******************************************************************************/
  359. static void lk_set_sw_segment_code(void)
  360. {
  361. #if defined (MTK_EFUSE_DOWNGRADE)
  362. set_sw_segment_code();
  363. #endif
  364. }
  365. /******************************************************************************
  366. ******************************************************************************/
  367. static void lk_dummy_ap_entry(void)
  368. {
  369. #ifdef DUMMY_AP
  370. dummy_ap_entry();
  371. #endif
  372. }
  373. /******************************************************************************
  374. ******************************************************************************/
  375. static void lk_init_storage(void)
  376. {
  377. #ifdef LK_PROFILING
  378. unsigned int time_nand_emmc = get_timer(0);
  379. #endif // LK_PROFILING
  380. #ifdef MTK_EMMC_SUPPORT
  381. mmc_legacy_init(1);
  382. #else
  383. #ifndef MACH_FPGA
  384. nand_init();
  385. nand_driver_test();
  386. #endif // MACH_FPGA
  387. #endif // MTK_EMMC_SUPPORT
  388. #ifdef LK_PROFILING
  389. dprintf(CRITICAL, "[PROFILE] NAND/EMMC init takes %d ms\n", (int)get_timer(time_nand_emmc));
  390. #endif // LK_PROFILING
  391. }
  392. /******************************************************************************
  393. ******************************************************************************/
  394. static void lk_get_AB_OTA_param(void)
  395. {
  396. #ifdef MTK_AB_OTA_UPDATER
  397. /* get A/B system parameter before load dtb from boot image */
  398. get_AB_OTA_param();
  399. #endif
  400. }
  401. /******************************************************************************
  402. * FIXME:
  403. * 1. Read RTC register, load "boot"/"recovery dtb according to register value.
  404. * 2. If no RTC bit set, load "boot" dtb.
  405. * 3. If no RTC bit set and no "boot" partition, load "recovery" dtb.
  406. * 4. Consider to make use of (or integrate with) meta_detection(). (Optional)
  407. ******************************************************************************/
  408. static void lk_load_device_tree(void)
  409. {
  410. char *part_name = "boot";
  411. #if !defined(NO_BOOT_MODE_SEL)
  412. if (Check_RTC_Recovery_Mode() || recovery_check_command_trigger ())
  413. part_name = "recovery";
  414. else
  415. part_name = "boot";
  416. #endif
  417. #if defined(CFG_DTB_EARLY_LOADER_SUPPORT)
  418. if (bldr_load_dtb(part_name) < 0)
  419. dprintf(CRITICAL, "Error: %s failed\n", __func__);
  420. #endif // CFG_DTB_EARLY_LOADER_SUPPORT
  421. }
  422. /******************************************************************************
  423. ******************************************************************************/
  424. static void lk_init_leds(void)
  425. {
  426. #ifdef LK_PROFILING
  427. unsigned int time_led_init = get_timer(0);
  428. #endif // LK_PROFILING
  429. #ifndef MACH_FPGA
  430. leds_init();
  431. #endif
  432. #ifdef LK_PROFILING
  433. dprintf(CRITICAL, "[PROFILE] led init takes %d ms\n", (int)get_timer(time_led_init));
  434. #endif // LK_PROFILING
  435. }
  436. /******************************************************************************
  437. ******************************************************************************/
  438. static void lk_init_env(void)
  439. {
  440. #ifdef LK_PROFILING
  441. unsigned int time_env = get_timer(0);
  442. #endif // LK_PROFILING
  443. env_init();
  444. print_env();
  445. #ifdef MTK_USB2JTAG_SUPPORT
  446. extern void usb2jtag_init(void);
  447. usb2jtag_init();
  448. #endif // MTK_USB2JTAG_SUPPORT
  449. #ifdef LK_PROFILING
  450. dprintf(CRITICAL, "[PROFILE] ENV init takes %d ms\n", (int)get_timer(time_env));
  451. #endif // LK_PROFILING
  452. }
  453. /******************************************************************************
  454. ******************************************************************************/
  455. static void lk_mt65xx_backlight_on(void)
  456. {
  457. #ifdef LK_PROFILING
  458. unsigned int time_backlight = get_timer(0);
  459. #endif // LK_PROFILING
  460. #ifndef MACH_FPGA
  461. mt65xx_backlight_on();
  462. #endif // MACH_FPGA
  463. #ifdef LK_PROFILING
  464. dprintf(CRITICAL, "[PROFILE] backlight takes %d ms\n", (int)get_timer(time_backlight));
  465. #endif // LK_PROFILING
  466. }
  467. /******************************************************************************
  468. * It can be regarded that users will see the logo on the display after the
  469. * function mt_disp_update() finishes its execution regardless video mode or
  470. * command mode in the display driver.
  471. ******************************************************************************/
  472. static void lk_mt_disp_update(void)
  473. {
  474. #ifdef LK_PROFILING
  475. unsigned int disp_update = get_timer(0);
  476. #endif // LK_PROFILING
  477. #ifndef MACH_FPGA_NO_DISPLAY
  478. //pwm need display sof
  479. mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
  480. #endif // MACH_FPGA_NO_DISPLAY
  481. #ifdef LK_PROFILING
  482. dprintf(CRITICAL, "[PROFILE] disp_update takes %d ms\n", (int)get_timer(disp_update));
  483. #endif // LK_PROFILING
  484. }
  485. /******************************************************************************
  486. ******************************************************************************/
  487. static void lk_init_display(void)
  488. {
  489. #ifdef LK_PROFILING
  490. unsigned int time_disp_init = get_timer(0);
  491. #endif // LK_PROFILING
  492. /* initialize the frame buffet information */
  493. #ifndef MACH_FPGA_NO_DISPLAY
  494. g_fb_size = mt_disp_get_vram_size();
  495. #else
  496. g_fb_size = 0x1000000;
  497. #endif // MACH_FPGA_NO_DISPLAY
  498. g_fb_base = mblock_reserve(&g_boot_arg->mblock_info, g_fb_size, 0x10000, 0x100000000, RANKMAX);
  499. if (!g_fb_base) {
  500. dprintf(CRITICAL, "Error: g_fb_base is NULL!\n");
  501. }
  502. dprintf(CRITICAL, "FB base = 0x%x, FB size = %d\n", g_fb_base, g_fb_size);
  503. #ifndef MACH_FPGA_NO_DISPLAY
  504. mt_disp_init((void *)g_fb_base);
  505. /* show black picture fisrtly in case of backlight is on before nothing is drawed*/
  506. mt_disp_fill_rect(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT, 0x0);
  507. lk_mt_disp_update();
  508. #ifdef LK_PROFILING
  509. dprintf(CRITICAL, "[PROFILE] disp init takes %d ms\n", (int)get_timer(time_disp_init));
  510. #endif // LK_PROFILING
  511. drv_video_init();
  512. #endif // MACH_FPGA_NO_DISPLAY
  513. }
  514. /******************************************************************************
  515. * VB: verified boot
  516. ******************************************************************************/
  517. static void lk_vb_init(void)
  518. {
  519. #ifdef MTK_SECURITY_SW_SUPPORT
  520. u64 pl_start_addr = 0;
  521. plinfo_get_brom_header_block_size(&pl_start_addr);
  522. #ifdef LK_PROFILING
  523. unsigned int time_vb_init = get_timer(0);
  524. #endif // LK_PROFILING
  525. /* initialize security library */
  526. sec_func_init(pl_start_addr);
  527. seclib_set_oemkey(g_oemkey, OEM_PUBK_SZ);
  528. #ifdef LK_PROFILING
  529. dprintf(CRITICAL,"[PROFILE] vb init takes %d ms\n", (int)get_timer(time_vb_init));
  530. #endif // LK_PROFILING
  531. #endif // MTK_SECURITY_SW_SUPPORT
  532. }
  533. /******************************************************************************
  534. * VB: verified boot
  535. ******************************************************************************/
  536. static void lk_vb_flow(void)
  537. {
  538. #ifdef MTK_SECURITY_SW_SUPPORT
  539. #ifdef LK_PROFILING
  540. unsigned int time_vb_flow = get_timer(0);
  541. #endif // LK_PROFILING
  542. if (0 != img_auth_stor(SBOOT_PART_LOGO_NAME, NULL)) {
  543. dprintf(CRITICAL, "<ASSERT> %s:line %d\n", __FILE__, __LINE__);
  544. PAL_ASSERT(0);
  545. }
  546. if (DTBO_FROM_STANDALONE == get_dtbo_src()) {
  547. if (0 != img_auth_stor(get_dtbo_part_name(), NULL)) {
  548. dprintf(CRITICAL, "<ASSERT> %s:line %d\n", __FILE__, __LINE__);
  549. PAL_ASSERT(0);
  550. }
  551. }
  552. #ifdef LK_PROFILING
  553. dprintf(CRITICAL,"[PROFILE] vb flow takes %d ms\n", (int)get_timer(time_vb_flow));
  554. #endif // LK_PROFILING
  555. #endif // MTK_SECURITY_SW_SUPPORT
  556. }
  557. /******************************************************************************
  558. * DA: Download Agent
  559. ******************************************************************************/
  560. static void lk_verify_da(void)
  561. {
  562. #ifdef MTK_SECURITY_SW_SUPPORT
  563. /* verify da before jumping to da*/
  564. if (sec_usbdl_enabled()) {
  565. u8 *da_addr = (u8*)g_boot_arg->da_info.addr;
  566. u32 da_len = g_boot_arg->da_info.len;
  567. u32 sig_len = g_boot_arg->da_info.sig_len;
  568. u8 *sig_addr = (unsigned char *)da_addr + (da_len - sig_len);
  569. if (da_len == 0 || sig_len == 0) {
  570. dprintf(INFO, "[LK] da argument is invalid\n");
  571. dprintf(INFO, "da_addr = 0x%x\n", (int)da_addr);
  572. dprintf(INFO, "da_len = 0x%x\n", da_len);
  573. dprintf(INFO, "sig_len = 0x%x\n", sig_len);
  574. }
  575. if (sec_usbdl_verify_da(da_addr, (da_len - sig_len), sig_addr, sig_len)) {
  576. /* da verify fail */
  577. video_printf(" => Not authenticated tool, download stop...\n");
  578. PAL_ASSERT(0);
  579. }
  580. } else
  581. #endif // MTK_SECURITY_SW_SUPPORT
  582. {
  583. dprintf(INFO, " DA verification disabled...\n");
  584. }
  585. }
  586. /******************************************************************************
  587. ******************************************************************************/
  588. static void lk_boot_mode_select(void)
  589. {
  590. #ifndef MACH_FPGA
  591. #ifdef LK_PROFILING
  592. unsigned int time_boot_mode = get_timer(0);
  593. #endif // LK_PROFILING
  594. boot_mode_select();
  595. #ifdef LK_PROFILING
  596. dprintf(CRITICAL, "[PROFILE] boot mode select takes %d ms\n", (int)get_timer(time_boot_mode));
  597. #endif // LK_PROFILING
  598. #endif // MACH_FPGA
  599. }
  600. /******************************************************************************
  601. ******************************************************************************/
  602. static void lk_load_logo(void)
  603. {
  604. #ifndef MACH_FPGA_NO_DISPLAY
  605. #ifdef LK_PROFILING
  606. unsigned int time_load_logo = get_timer(0);
  607. #endif // LK_PROFILING
  608. mboot_common_load_logo((unsigned long)mt_get_logo_db_addr_pa(), "logo");
  609. #ifdef LK_PROFILING
  610. dprintf(CRITICAL, "[PROFILE] load_logo takes %d ms\n", (int)get_timer(time_load_logo));
  611. #endif // LK_PROFILING
  612. #endif // MACH_FPGA_NO_DISPLAY
  613. }
  614. /******************************************************************************
  615. ******************************************************************************/
  616. static void lk_display_show_logo(void)
  617. {
  618. #ifdef LK_PROFILING
  619. unsigned int time_show_logo = get_timer(0);
  620. #endif // LK_PROFILING
  621. #ifndef MACH_FPGA_NO_DISPLAY
  622. mt_disp_show_boot_logo();
  623. #endif // MACH_FPGA_NO_DISPLAY
  624. logo_lk_t = ((unsigned int)get_timer(boot_time));
  625. #ifdef LK_PROFILING
  626. dprintf(CRITICAL, "[PROFILE] show logo takes %d ms\n", (int)get_timer(time_show_logo));
  627. #endif // LK_PROFILING
  628. }
  629. /******************************************************************************
  630. ******************************************************************************/
  631. static void lk_l2_disable(void)
  632. {
  633. #ifdef HAVE_CACHE_PL310
  634. l2_disable();
  635. #endif
  636. }
  637. /******************************************************************************
  638. ******************************************************************************/
  639. static void lk_config_shared_SRAM_size(void)
  640. {
  641. #ifdef ENABLE_L2_SHARING
  642. config_shared_SRAM_size();
  643. #endif
  644. }
  645. extern void mt65xx_bat_init(void); // FIXME: include the correct header file!
  646. /******************************************************************************
  647. ******************************************************************************/
  648. static void lk_init_battery(void)
  649. {
  650. #ifdef LK_PROFILING
  651. unsigned int time_bat_init = get_timer(0);
  652. #endif
  653. mt65xx_bat_init();
  654. #ifdef LK_PROFILING
  655. dprintf(CRITICAL, "[PROFILE] battery init takes %d ms\n", (int)get_timer(time_bat_init));
  656. #endif
  657. }
  658. /******************************************************************************
  659. ******************************************************************************/
  660. static void lk_rtc_boot_check(bool flag)
  661. {
  662. #ifndef CFG_POWER_CHARGING
  663. #ifdef LK_PROFILING
  664. unsigned int time_RTC_boot_Check = get_timer(0);
  665. #endif // LK_PROFILING
  666. /* NOTE: if define CFG_POWER_CHARGING, will rtc_boot_check() in mt65xx_bat_init() */
  667. rtc_boot_check(flag);
  668. #ifdef LK_PROFILING
  669. dprintf(CRITICAL, "[PROFILE] RTC boot check Init takes %d ms\n", (int)get_timer(time_RTC_boot_Check));
  670. #endif // LK_PROFILING
  671. #endif // CFG_POWER_CHARGING
  672. }
  673. /******************************************************************************
  674. ******************************************************************************/
  675. static void lk_sw_env(void)
  676. {
  677. #ifndef MACH_FPGA
  678. #ifdef LK_PROFILING
  679. unsigned int time_sw_env = get_timer(0);
  680. #endif // LK_PROFILING
  681. sw_env();
  682. #ifdef LK_PROFILING
  683. dprintf(CRITICAL, "[PROFILE] sw_env takes %d ms\n", (int)get_timer(time_sw_env));
  684. #endif // LK_PROFILING
  685. #endif // MACH_FPGA
  686. }
  687. /******************************************************************************
  688. ******************************************************************************/
  689. void platform_init_mmu(void)
  690. {
  691. unsigned long long addr;
  692. unsigned int vaddr;
  693. unsigned long long dram_size;
  694. /* configure available RAM banks */
  695. dram_init();
  696. dram_size = physical_memory_size();
  697. if (((unsigned long long)DRAM_PHY_ADDR + dram_size) <= 0x100000000ULL) {
  698. arm_mmu_init();
  699. /* map dram region */
  700. for (addr = 0; addr < dram_size; addr += (1024*1024)) {
  701. /*virtual to physical 1-1 mapping*/
  702. arm_mmu_map_section(bi_dram[0].start+addr, bi_dram[0].start+addr, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE);
  703. }
  704. /* ummap TEE memory regoin */
  705. if (g_boot_arg->tee_reserved_mem.size != 0) {
  706. u64 j, k;
  707. k = g_boot_arg->tee_reserved_mem.start;
  708. j = ROUNDUP(g_boot_arg->tee_reserved_mem.size, 1024*1024);
  709. for (; j > 0; j -= (1024*1024)) {
  710. arm_mmu_map_section((uintptr_t)k , (uintptr_t)k, MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN);
  711. k += (1024*1024);
  712. }
  713. }
  714. } else {
  715. arm_mmu_lpae_init();
  716. /* map dram region */
  717. for (addr = 0; addr < dram_size; addr += (unsigned long long)(1024*1024*1024)) {
  718. vaddr = (bi_dram[0].start + addr < 0x100000000ULL) ? (unsigned int)(bi_dram[0].start + addr) : (0xC0000000);
  719. arm_mmu_map_block(bi_dram[0].start+addr, vaddr, LPAE_MMU_MEMORY_TYPE_NORMAL_WRITE_BACK);
  720. }
  721. /* ummap TEE memory regoin */
  722. if (g_boot_arg->tee_reserved_mem.size != 0) {
  723. u64 j, k;
  724. k = g_boot_arg->tee_reserved_mem.start;
  725. j = ROUNDUP(g_boot_arg->tee_reserved_mem.size, 0x40000000ULL);
  726. for (; j > 0; j -= 0x40000000ULL) {
  727. arm_mmu_map_block((uintptr_t)k , (uintptr_t)k, LPAE_MMU_MEMORY_TYPE_NORMAL_WRITE_BACK | LPAE_MMU_MEMORY_XN);
  728. k += 0x40000000ULL;
  729. }
  730. }
  731. }
  732. arch_enable_mmu(); //enable mmu after setup page table to avoid cpu prefetch which may bring on emi violation
  733. }
  734. void platform_early_init(void)
  735. {
  736. #ifdef LK_PROFILING
  737. unsigned int time_wdt_early_init;
  738. unsigned int time_pmic_init;
  739. unsigned int time_platform_early_init;
  740. #endif
  741. platform_init_interrupts();
  742. platform_early_init_timer();
  743. #if defined(MACH_FPGA) || defined(SB_LK_BRINGUP)
  744. mtk_timer_init(); // GPT4 will be initialized at PL after
  745. #endif
  746. #ifdef LK_PROFILING
  747. time_platform_early_init = get_timer(0);
  748. #endif
  749. #ifndef MACH_FPGA
  750. #ifndef DUMMY_AP
  751. mt_gpio_set_default();
  752. #endif
  753. #endif
  754. /* initialize the uart */
  755. uart_init_early();
  756. dprintf(SPEW, "bootarg_addr: 0x%x, bootarg_size: 0x%x\n", platform_get_bootarg_addr(), platform_get_bootarg_size());
  757. if (g_dram_init_ret < 0) {
  758. dprintf(CRITICAL, "[LK ERROR] DRAM bank number is not correct!!!\n");
  759. while (1) ;
  760. }
  761. //i2c_v1_init();
  762. #ifdef LK_PROFILING
  763. time_wdt_early_init = get_timer(0);
  764. #endif
  765. mtk_wdt_init();
  766. #ifdef LK_PROFILING
  767. dprintf(CRITICAL, "[PROFILE] WDT Init takes %d ms\n", (int)get_timer(time_wdt_early_init));
  768. #endif
  769. //i2c init
  770. i2c_hw_init();
  771. #if defined(MACH_FPGA) || defined(SB_LK_BRINGUP)
  772. //mtk_timer_init(); // GPT4 will be initialized at PL after
  773. mtk_wdt_disable(); // WDT will be triggered when uncompressing linux image on FPGA
  774. *(volatile unsigned int *)0x10212000 = 0x22000064;
  775. #endif
  776. #if MTK_MT8193_SUPPORT
  777. mt8193_init();
  778. #endif
  779. // Workaround by Peng
  780. //pwrap_init_lk();
  781. //pwrap_init_for_early_porting();
  782. #ifdef LK_PROFILING
  783. time_pmic_init = get_timer(0);
  784. #endif
  785. pmic_init();
  786. /*
  787. // Workaround by Weiqi
  788. mt6331_upmu_set_rg_vgp1_en(1);
  789. mt6331_upmu_set_rg_vcam_io_en(1);
  790. */
  791. #ifdef LK_PROFILING
  792. dprintf(CRITICAL, "[PROFILE] pmic_init takes %d ms\n", (int)get_timer(time_pmic_init));
  793. #endif
  794. #ifdef LK_PROFILING
  795. dprintf(CRITICAL, "[PROFILE] platform_early_init takes %d ms\n", (int)get_timer(time_platform_early_init));
  796. #endif
  797. }
  798. extern bool mtk_bat_allow_backlight_enable(void);
  799. #if defined (MTK_KERNEL_POWER_OFF_CHARGING)
  800. int kernel_charging_boot(void)
  801. {
  802. if ((g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT || g_boot_mode == LOW_POWER_OFF_CHARGING_BOOT) && upmu_is_chr_det() == KAL_TRUE) {
  803. dprintf(INFO,"[%s] Kernel Power Off Charging with Charger/Usb \n", __func__);
  804. return 1;
  805. } else if ((g_boot_mode == KERNEL_POWER_OFF_CHARGING_BOOT || g_boot_mode == LOW_POWER_OFF_CHARGING_BOOT) && upmu_is_chr_det() == KAL_FALSE) {
  806. dprintf(INFO,"[%s] Kernel Power Off Charging without Charger/Usb \n", __func__);
  807. return -1;
  808. } else
  809. return 0;
  810. }
  811. #endif
  812. #if defined (MTK_EFUSE_DOWNGRADE)
  813. extern u32 get_devinfo_with_index(u32);
  814. extern void set_thermal_option(u32);
  815. int set_sw_segment_code(void)
  816. {
  817. u32 segment_code = get_devinfo_with_index(47) >> 25;
  818. dprintf(CRITICAL, "OLD get_devinfo_with_index=0x%x\n", segment_code);
  819. switch(segment_code){
  820. case 0x52:
  821. set_thermal_option(0x4A);
  822. break;
  823. case 0x53:
  824. set_thermal_option(0x4B);
  825. break;
  826. case 0x41:
  827. set_thermal_option(0x49);
  828. break;
  829. }
  830. dprintf(CRITICAL, "NEW get_devinfo_with_index=0x%x\n", (get_devinfo_with_index(47)>>25));
  831. return 0;
  832. }
  833. #endif
  834. void platform_init(void)
  835. {
  836. #ifdef LK_PROFILING
  837. unsigned int time_platform_init = get_timer(0);
  838. #endif
  839. bool bearly_backlight_on = false;
  840. dprintf(CRITICAL," ==LK info ==\n");
  841. dprintf(CRITICAL," chip_code[0x%x]\n", mt_get_chip_hw_code());
  842. dprintf(CRITICAL," chip_ver[0x%x]\n", mt_get_chip_sw_ver());
  843. dprintf(CRITICAL," ==LK info ==\n");
  844. dprintf(CRITICAL, "platform_init()\n");
  845. lk_set_sw_segment_code();
  846. lk_dummy_ap_entry();
  847. lk_init_storage();
  848. lk_get_AB_OTA_param();
  849. lk_load_device_tree();
  850. lk_init_leds();
  851. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  852. if ((g_boot_arg->boot_reason == BR_USB) && (upmu_is_chr_det() == KAL_FALSE)) {
  853. dprintf(INFO, "[%s] Unplugged Charger/Usb between Pre-loader and Uboot in Kernel Charging Mode, Power Off \n", __func__);
  854. mt6575_power_off();
  855. }
  856. #endif
  857. lk_init_env();
  858. lk_init_display();
  859. lk_vb_init();
  860. lk_vb_flow();
  861. /*for kpd pmic mode setting*/
  862. set_kpd_pmic_mode();
  863. lk_boot_mode_select();
  864. #ifdef CFG_MTK_WDT_COMMON
  865. PROFILING_START("wdt_check_exception");
  866. wdt_check_exception();
  867. PROFILING_END();
  868. #endif //CFG_MTK_WDT_COMMON
  869. /* If RECOVERY_AS_BOOT is enabled, there is no recovery partition. */
  870. #if defined(CFG_DTB_EARLY_LOADER_SUPPORT) && !defined(RECOVERY_AS_BOOT)
  871. /* reload dtb when boot mode = recovery */
  872. if ((g_boot_mode == RECOVERY_BOOT) && (get_recovery_dtbo_loaded() != 1)){
  873. if (bldr_load_dtb("recovery") < 0)
  874. dprintf(CRITICAL, "bldr_load_dtb fail\n");
  875. }
  876. #endif // CFG_DTB_EARLY_LOADER_SUPPORT
  877. lk_load_logo();
  878. /*Show download logo & message on screen */
  879. if (g_boot_arg->boot_mode == DOWNLOAD_BOOT) {
  880. dprintf(CRITICAL, "[LK] boot mode is DOWNLOAD_BOOT\n");
  881. lk_verify_da();
  882. lk_display_show_logo();
  883. video_printf(" => Downloading...\n");
  884. dprintf(CRITICAL, "enable backlight after show bootlogo! \n");
  885. lk_mt65xx_backlight_on();
  886. mtk_wdt_disable(); //Disable wdt before jump to DA
  887. platform_uninit();
  888. lk_l2_disable();
  889. arch_disable_cache(UCACHE);
  890. arch_disable_mmu();
  891. lk_config_shared_SRAM_size();
  892. jump_da(g_boot_arg->da_info.addr, g_boot_arg->da_info.arg1, g_boot_arg->da_info.arg2);
  893. }
  894. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  895. else if (g_boot_mode != ALARM_BOOT && g_boot_mode != FASTBOOT && g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT && mtk_bat_allow_backlight_enable()) {
  896. lk_display_show_logo();
  897. lk_mt65xx_backlight_on();
  898. lk_mt_disp_update();
  899. bearly_backlight_on = true;
  900. dprintf(INFO, "backlight enabled before battery init\n");
  901. }
  902. #endif // MTK_KERNEL_POWER_OFF_CHARGING
  903. lk_init_battery();
  904. lk_rtc_boot_check(false);
  905. #ifdef MTK_KERNEL_POWER_OFF_CHARGING
  906. if (kernel_charging_boot() == 1) {
  907. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  908. CHARGER_TYPE CHR_Type_num = CHARGER_UNKNOWN;
  909. CHR_Type_num = hw_charging_get_charger_type();
  910. if ((g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) ||
  911. ((CHR_Type_num != STANDARD_HOST) && (CHR_Type_num != NONSTANDARD_CHARGER))) {
  912. #endif
  913. mt_disp_power(TRUE);
  914. mt_disp_show_low_battery();
  915. mt65xx_leds_brightness_set(6, 110);
  916. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  917. }
  918. #endif
  919. } else if (g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) {
  920. if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT) && !bearly_backlight_on) {
  921. lk_display_show_logo();
  922. }
  923. }
  924. #else
  925. if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT) && !bearly_backlight_on) {
  926. lk_display_show_logo();
  927. }
  928. #endif // MTK_KERNEL_POWER_OFF_CHARGING
  929. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  930. if (!is_low_battery(0)) {
  931. #endif
  932. lk_mt65xx_backlight_on();
  933. lk_mt_disp_update();
  934. #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY
  935. }
  936. #endif
  937. lk_sw_env();
  938. #ifdef LK_PROFILING
  939. dprintf(CRITICAL, "[PROFILE] platform_init takes %d ms\n", (int)get_timer(time_platform_init));
  940. #endif
  941. }
  942. /******************************************************************************
  943. ******************************************************************************/
  944. void platform_uninit(void)
  945. {
  946. #ifndef MACH_FPGA
  947. leds_deinit();
  948. #endif
  949. platform_deinit_interrupts();
  950. return;
  951. }
  952. #ifdef ENABLE_L2_SHARING
  953. #define ADDR_CA7L_CACHE_CONFIG_MP(x) (CA7MCUCFG_BASE + 0x200 * x)
  954. #define L2C_SIZE_CFG_OFFSET 8
  955. #define L2C_SHARE_EN_OFFSET 12
  956. /* 4'b1111: 2048KB(not support)
  957. * 4'b0111: 1024KB(not support)
  958. * 4'b0011: 512KB
  959. * 4'b0001: 256KB
  960. * 4'b0000: 128KB (not support)
  961. */
  962. int is_l2_need_config(void)
  963. {
  964. volatile unsigned int cache_cfg, addr;
  965. addr = ADDR_CA7L_CACHE_CONFIG_MP(0);
  966. cache_cfg = DRV_Reg32(addr);
  967. cache_cfg = cache_cfg >> L2C_SIZE_CFG_OFFSET;
  968. /* only read 256KB need to be config.*/
  969. if ((cache_cfg &(0x7)) == 0x1) {
  970. return 1;
  971. }
  972. return 0;
  973. }
  974. void cluster_l2_share_enable(int cluster)
  975. {
  976. volatile unsigned int cache_cfg, addr;
  977. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  978. /* set L2C size to 256KB */
  979. cache_cfg = DRV_Reg32(addr);
  980. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  981. cache_cfg |= 0x1 << L2C_SIZE_CFG_OFFSET;
  982. /* enable L2C_share_en. Sram only for other to use*/
  983. cache_cfg |= (0x1 << L2C_SHARE_EN_OFFSET);
  984. DRV_WriteReg32(addr, cache_cfg);
  985. }
  986. void cluster_l2_share_disable(int cluster)
  987. {
  988. volatile unsigned int cache_cfg, addr;
  989. addr = ADDR_CA7L_CACHE_CONFIG_MP(cluster);
  990. /* set L2C size to 512KB */
  991. cache_cfg = DRV_Reg32(addr);
  992. cache_cfg &= (~0x7) << L2C_SIZE_CFG_OFFSET;
  993. cache_cfg |= 0x3 << L2C_SIZE_CFG_OFFSET;
  994. DRV_WriteReg32(addr, cache_cfg);
  995. /* disable L2C_share_en. Sram only for cpu to use*/
  996. cache_cfg &= ~(0x1 << L2C_SHARE_EN_OFFSET);
  997. DRV_WriteReg32(addr, cache_cfg);
  998. }
  999. /* config L2 cache and sram to its size */
  1000. void config_L2_size(void)
  1001. {
  1002. int cluster;
  1003. if (is_l2_need_config()) {
  1004. /*
  1005. * Becuase mcu config is protected.
  1006. * only can write in secutity mode
  1007. */
  1008. if (dev_info_nr_cpu() == 6) {
  1009. cluster_l2_share_disable(0);
  1010. cluster_l2_share_enable(1);
  1011. }
  1012. else {
  1013. for (cluster = 0; cluster < 2; cluster++) {
  1014. cluster_l2_share_disable(cluster);
  1015. }
  1016. }
  1017. }
  1018. }
  1019. /* config SRAM back from L2 cache for DA relocation */
  1020. void config_shared_SRAM_size(void)
  1021. {
  1022. int cluster;
  1023. if (is_l2_need_config()) {
  1024. /*
  1025. * Becuase mcu config is protected.
  1026. * only can write in secutity mode
  1027. */
  1028. for (cluster = 0; cluster < 2; cluster++) {
  1029. cluster_l2_share_enable(cluster);
  1030. }
  1031. }
  1032. }
  1033. #endif
  1034. int platform_skip_hibernation(void)
  1035. {
  1036. switch (g_boot_arg->boot_reason) {
  1037. #if 0 // let schedule power on to go hiberantion bootup process
  1038. case BR_RTC:
  1039. #endif
  1040. case BR_WDT:
  1041. case BR_WDT_BY_PASS_PWK:
  1042. case BR_WDT_SW:
  1043. case BR_WDT_HW:
  1044. return 1;
  1045. }
  1046. return 0;
  1047. }