gpio_init.c 9.5 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <platform/gpio.h>
  32. #if !defined(FPGA_PLATFORM)
  33. #include <cust_power.h>
  34. #include <cust_gpio_boot.h>
  35. #endif
  36. #include <platform/mt_reg_base.h>
  37. #include <debug.h>
  38. #define GPIO_INIT_DEBUG
  39. /*----------------------------------------------------------------------------*/
  40. #define GPIOTAG "[GPIO] "
  41. #define GPIODBG(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  42. #define GPIOERR(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  43. #define GPIOVER(fmt, arg...) dprintf(INFO, GPIOTAG "%s: " fmt, __FUNCTION__ ,##arg)
  44. #define GPIO_WR32(addr, data) DRV_WriteReg32(addr,data)
  45. #define GPIO_RD32(addr) DRV_Reg32(addr)
  46. #define ADDR_BIT 0
  47. #define VAL_BIT 1
  48. #define MASK_BIT 2
  49. /*----------------------------------------------------------------------------*/
  50. #ifdef FPGA_PLATFORM
  51. void mt_gpio_set_default(void)
  52. {
  53. return;
  54. }
  55. #else
  56. #include <platform/gpio_init.h>
  57. void mt_gpio_set_default_chip(void)
  58. {
  59. unsigned pin = 0;
  60. for (pin = 0; pin < MT_GPIO_BASE_MAX; pin++) {
  61. /* set GPIOx_MODE*/
  62. mt_set_gpio_mode(0x80000000 + pin , gpio_array[pin].mode);
  63. /* set GPIOx_DIR*/
  64. if (gpio_array[pin].dir != 0xFF)
  65. mt_set_gpio_dir(0x80000000 + pin, gpio_array[pin].dir);
  66. /* set GPIOx_PULL*/
  67. if (gpio_array[pin].pull != 0xFF)
  68. mt_set_gpio_pull_select(0x80000000 + pin, gpio_array[pin].pull);
  69. /* set GPIOx_PULLEN*/
  70. if (gpio_array[pin].pullen != 0xFF)
  71. mt_set_gpio_pull_enable(0x80000000 + pin , gpio_array[pin].pullen);
  72. /* set GPIOx_DATAOUT*/
  73. if (gpio_array[pin].dataout != 0xFF)
  74. mt_set_gpio_out(0x80000000 + pin, gpio_array[pin].dataout);
  75. /* set GPIO0_SMT */
  76. if (gpio_array[pin].smt != 0xFF)
  77. mt_set_gpio_smt(0x80000000 + pin, gpio_array[pin].smt);
  78. }
  79. }
  80. void mt_gpio_set_driving(void)
  81. {
  82. #if 0
  83. u32 val;
  84. u32 mask;
  85. /* [MT6571] for MD BSI request */
  86. mask = 0x3000;
  87. val = GPIO_RD32(IO_CFG_T_BASE+0xF0);
  88. val &= ~(mask);
  89. val |= (0x0000 & mask);
  90. GPIO_WR32(IO_CFG_T_BASE+0xF0, val);
  91. /* [MT6571] end */
  92. /* [MT6571] for desense request (AUD IO) */
  93. mask = 0x30;
  94. val = GPIO_RD32(IO_CFG_L_BASE+0xA0);
  95. val &= ~(mask);
  96. val |= (0x00 & mask);
  97. GPIO_WR32(IO_CFG_L_BASE+0xA0, val);
  98. /* [MT6571] end */
  99. #endif
  100. }
  101. void mt_gpio_set_power(u8 mc1_power,u8 mc2_power, u8 sim1_power, u8 sim2_power)
  102. {
  103. #if 0
  104. u32 reg=0;
  105. //sim1
  106. if (sim1_power == GPIO_VIO28) {
  107. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  108. //reg |= (0x6000);
  109. GPIO_WR32(IOCFG_0_BASE+0x0c28, reg);
  110. } else {
  111. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  112. reg &= ~(0x3f<<12);
  113. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  114. }
  115. //sim2
  116. if (sim2_power == GPIO_VIO28) {
  117. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  118. //reg |= 0x0c;
  119. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  120. } else {
  121. reg = GPIO_RD32(IOCFG_0_BASE+0x050);
  122. reg &= ~(0x3f<<6);
  123. GPIO_WR32(IOCFG_0_BASE+0x050, reg);
  124. }
  125. #endif
  126. }
  127. /*FIX ME: create a customized file for platform-specific operations */
  128. void mt_gpio_set_avoid_leakage(void)
  129. {
  130. #if 0
  131. #ifdef MTK_EMMC_SUPPORT
  132. GPIO_WR32(IO_CFG_B_BASE+0x58, 0x220000);
  133. #endif
  134. #endif
  135. }
  136. void mt_gpio_set_default(void)
  137. {
  138. //mt_gpio_set_avoid_leakage();
  139. mt_gpio_set_default_chip();
  140. //mt_gpio_set_driving();
  141. //mt_gpio_set_power();
  142. return;
  143. }
  144. /*----------------------------------------------------------------------------*/
  145. #if CHECK_POINT_TEST
  146. #if defined(GPIO_INIT_DEBUG)
  147. static GPIO_REGS saved;
  148. #endif
  149. void mt_gpio_checkpoint_save(void)
  150. {
  151. #if defined(GPIO_INIT_DEBUG)
  152. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  153. GPIO_REGS *cur = &saved;
  154. int idx;
  155. memset(cur, 0x00, sizeof(*cur));
  156. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++)
  157. cur->dir[idx].val = GPIO_RD32(&pReg->dir[idx]);
  158. #if 0
  159. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++)
  160. cur->pullen[idx].val = GPIO_RD32(&pReg->pullen[idx]);
  161. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++)
  162. cur->pullsel[idx].val =GPIO_RD32(&pReg->pullsel[idx]);
  163. #endif
  164. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++)
  165. cur->dout[idx].val = GPIO_RD32(&pReg->dout[idx]);
  166. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++)
  167. cur->mode[idx].val = GPIO_RD32(&pReg->mode[idx]);
  168. #endif
  169. }
  170. /*----------------------------------------------------------------------------*/
  171. EXPORT_SYMBOL(mt_gpio_checkpoint_save);
  172. /*----------------------------------------------------------------------------*/
  173. void mt_gpio_dump_diff(GPIO_REGS* pre, GPIO_REGS* cur)
  174. {
  175. #if defined(GPIO_INIT_DEBUG)
  176. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  177. int idx;
  178. unsigned char* p = (unsigned char*)pre;
  179. unsigned char* q = (unsigned char*)cur;
  180. GPIOVER("------ dumping difference between %p and %p ------\n", pre, cur);
  181. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++) {
  182. if (pre->dir[idx].val != cur->dir[idx].val)
  183. GPIOVER("diff: dir[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->dir[idx].val, cur->dir[idx].val);
  184. }
  185. #if 0
  186. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++) {
  187. if (pre->pullen[idx].val != cur->pullen[idx].val)
  188. GPIOVER("diff: pullen[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->pullen[idx].val, cur->pullen[idx].val);
  189. }
  190. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++) {
  191. if (pre->pullsel[idx].val != cur->pullsel[idx].val)
  192. GPIOVER("diff: pullsel[%2d]: 0x%08X <=> 0x%08X\n", idx, pre->pullsel[idx].val, cur->pullsel[idx].val);
  193. }
  194. #endif
  195. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++) {
  196. if (pre->dout[idx].val != cur->dout[idx].val)
  197. GPIOVER("diff: dout[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->dout[idx].val, cur->dout[idx].val);
  198. }
  199. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++) {
  200. if (pre->mode[idx].val != cur->mode[idx].val)
  201. GPIOVER("diff: mode[%2d] : 0x%08X <=> 0x%08X\n", idx, pre->mode[idx].val, cur->mode[idx].val);
  202. }
  203. for (idx = 0; idx < sizeof(*pre); idx++) {
  204. if (p[idx] != q[idx])
  205. GPIOVER("diff: raw[%2d]: 0x%02X <=> 0x%02X\n", idx, p[idx], q[idx]);
  206. }
  207. GPIOVER("memcmp(%p, %p, %d) = %d\n", p, q, sizeof(*pre), memcmp(p, q, sizeof(*pre)));
  208. GPIOVER("------ dumping difference end --------------------------------\n");
  209. #endif
  210. }
  211. /*----------------------------------------------------------------------------*/
  212. void mt_gpio_checkpoint_compare(void)
  213. {
  214. #if defined(GPIO_INIT_DEBUG)
  215. GPIO_REGS *pReg = (GPIO_REGS*)(GPIO_BASE);
  216. GPIO_REGS latest;
  217. GPIO_REGS *cur = &latest;
  218. int idx;
  219. memset(cur, 0x00, sizeof(*cur));
  220. for (idx = 0; idx < sizeof(pReg->dir)/sizeof(pReg->dir[0]); idx++)
  221. cur->dir[idx].val = GPIO_RD32(&pReg->dir[idx]);
  222. #if 0
  223. for (idx = 0; idx < sizeof(pReg->pullen)/sizeof(pReg->pullen[0]); idx++)
  224. cur->pullen[idx].val = GPIO_RD32(&pReg->pullen[idx]);
  225. for (idx = 0; idx < sizeof(pReg->pullsel)/sizeof(pReg->pullsel[0]); idx++)
  226. cur->pullsel[idx].val =GPIO_RD32(&pReg->pullsel[idx]);
  227. #endif
  228. for (idx = 0; idx < sizeof(pReg->dout)/sizeof(pReg->dout[0]); idx++)
  229. cur->dout[idx].val = GPIO_RD32(&pReg->dout[idx]);
  230. for (idx = 0; idx < sizeof(pReg->mode)/sizeof(pReg->mode[0]); idx++)
  231. cur->mode[idx].val = GPIO_RD32(&pReg->mode[idx]);
  232. //mt_gpio_dump_diff(&latest, &saved);
  233. //GPIODBG("memcmp(%p, %p, %d) = %d\n", &latest, &saved, sizeof(GPIO_REGS), memcmp(&latest, &saved, sizeof(GPIO_REGS)));
  234. if (memcmp(&latest, &saved, sizeof(GPIO_REGS))) {
  235. GPIODBG("checkpoint compare fail!!\n");
  236. GPIODBG("dump checkpoint....\n");
  237. //mt_gpio_dump(&saved);
  238. GPIODBG("\n\n");
  239. GPIODBG("dump current state\n");
  240. //mt_gpio_dump(&latest);
  241. GPIODBG("\n\n");
  242. mt_gpio_dump_diff(&saved, &latest);
  243. //WARN_ON(1);
  244. } else {
  245. GPIODBG("checkpoint compare success!!\n");
  246. }
  247. #endif
  248. }
  249. /*----------------------------------------------------------------------------*/
  250. EXPORT_SYMBOL(mt_gpio_checkpoint_compare);
  251. /*----------------------------------------------------------------------------*/
  252. #endif
  253. #endif