ddp_misc.c 7.9 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #define LOG_TAG "MISC"
  32. #include <platform/ddp_reg.h>
  33. #include <platform/ddp_misc.h>
  34. #include <platform/disp_drv_platform.h>
  35. #include <debug.h>
  36. void ddp_bypass_color(int idx, unsigned int width, unsigned int height, void * handle)
  37. {
  38. dprintf(CRITICAL, "bypass color\n");
  39. DISP_REG_SET(NULL,DISP_COLOR_CFG_MAIN, 1<<7); //bypass color engine
  40. DISP_REG_SET(NULL,DISP_COLOR_INTERNAL_IP_WIDTH, width); //bypass color engine
  41. DISP_REG_SET(NULL,DISP_COLOR_INTERNAL_IP_HEIGHT, height); //bypass color engine
  42. DISP_REG_SET(NULL,DISP_COLOR_START, 0x1); // start
  43. }
  44. void ddp_bypass_ccorr(unsigned int width, unsigned int height, void * handle)
  45. {
  46. dprintf(CRITICAL, "bypass ccorr\n");
  47. DISP_REG_MASK(NULL,DISP_REG_CCORR_CFG, 1, 1);
  48. DISP_REG_SET(NULL,DISP_REG_CCORR_SIZE, (width<<16)|height); //bypass color engine
  49. DISP_REG_SET(NULL,DISP_REG_CCORR_EN, 1);
  50. }
  51. static int ddp_ccorr_start(DISP_MODULE_ENUM module, void *handle)
  52. {
  53. #ifdef LK_BYPASS_SHADOW_REG
  54. DISP_REG_SET_FIELD(handle, FLD_CCORR_BYPASS_SHADOW,
  55. DISP_REG_CCORR_SHADOW_CTRL, 0x1);
  56. DISP_REG_SET_FIELD(handle, FLD_CCORR_READ_WRK_REG,
  57. DISP_REG_CCORR_SHADOW_CTRL, 0x1);
  58. #endif
  59. return 0;
  60. }
  61. static int ddp_aal_start(DISP_MODULE_ENUM module, void *handle)
  62. {
  63. #ifdef LK_BYPASS_SHADOW_REG
  64. DISP_REG_SET_FIELD(handle, FLD_AAL_BYPASS_SHADOW,
  65. DISP_REG_AAL_SHADOW_CTRL, 0x1);
  66. DISP_REG_SET_FIELD(handle, FLD_AAL_READ_WRK_REG,
  67. DISP_REG_AAL_SHADOW_CTRL, 0x1);
  68. #endif
  69. return 0;
  70. }
  71. void ddp_bypass_aal(unsigned int width, unsigned int height, void * handle)
  72. {
  73. dprintf(CRITICAL, "bypass aal\n");
  74. DISP_REG_SET_FIELD(handle,CFG_FLD_RELAY_MODE, DISP_AAL_CFG, 0x1); //relay_mode
  75. DISP_REG_SET(NULL,DISP_AAL_SIZE, (width<<16)|height); //bypass color engine
  76. DISP_REG_SET(handle,DISP_AAL_EN, 0x1); //bypass mode
  77. }
  78. void ddp_bypass_gamma(unsigned int width, unsigned int height, void * handle)
  79. {
  80. dprintf(CRITICAL, "bypass gamma\n");
  81. DISP_REG_MASK(NULL,DISP_REG_GAMMA_CFG, 1, 1);
  82. DISP_REG_SET(NULL,DISP_REG_GAMMA_SIZE, (width<<16)|height); //bypass color engine
  83. DISP_REG_SET(handle,DISP_REG_GAMMA_EN, 0x1); //bypass mode
  84. }
  85. static int ddp_gamma_start(DISP_MODULE_ENUM module, void *handle)
  86. {
  87. #ifdef LK_BYPASS_SHADOW_REG
  88. DISP_REG_SET_FIELD(handle, FLD_GAMMA_BYPASS_SHADOW,
  89. DISP_REG_GAMMA_SHADOW_CTRL, 0x1);
  90. DISP_REG_SET_FIELD(handle, FLD_GAMMA_READ_WRK_REG,
  91. DISP_REG_GAMMA_SHADOW_CTRL, 0x1);
  92. #endif
  93. return 0;
  94. }
  95. static int ddp_color_start(DISP_MODULE_ENUM module, void *handle)
  96. {
  97. #ifdef LK_BYPASS_SHADOW_REG
  98. DISP_REG_SET_FIELD(handle, FLD_COLOR_BYPASS_SHADOW,
  99. DISP_REG_COLOR_SHADOW_CTRL, 0x1);
  100. DISP_REG_SET_FIELD(handle, FLD_COLOR_READ_WRK_REG,
  101. DISP_REG_COLOR_SHADOW_CTRL, 0x1);
  102. #endif
  103. return 0;
  104. }
  105. static int config_color(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  106. {
  107. int color_idx;
  108. if (module == DISP_MODULE_COLOR0)
  109. color_idx = 0;
  110. else
  111. color_idx = 1;
  112. dprintf(CRITICAL, "config color dirty = %d\n", pConfig->dst_dirty);
  113. if (!pConfig->dst_dirty) {
  114. return 0;
  115. }
  116. ddp_bypass_color(color_idx,pConfig->dst_w, pConfig->dst_h,cmdq);
  117. return 0;
  118. }
  119. static int config_ccorr(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  120. {
  121. dprintf(CRITICAL, "config ccorr dirty = %d\n", pConfig->dst_dirty);
  122. if (!pConfig->dst_dirty) {
  123. return 0;
  124. }
  125. ddp_bypass_ccorr(pConfig->dst_w, pConfig->dst_h,cmdq);
  126. return 0;
  127. }
  128. static int config_aal(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  129. {
  130. dprintf(CRITICAL, "config aal dirty = %d\n", pConfig->dst_dirty);
  131. if (!pConfig->dst_dirty) {
  132. return 0;
  133. }
  134. ddp_bypass_aal(pConfig->dst_w, pConfig->dst_h,cmdq);
  135. return 0;
  136. }
  137. static int config_gamma(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void* cmdq)
  138. {
  139. dprintf(CRITICAL, "config gamma dirty = %d\n", pConfig->dst_dirty);
  140. if (!pConfig->dst_dirty) {
  141. return 0;
  142. }
  143. ddp_bypass_gamma(pConfig->dst_w, pConfig->dst_h,cmdq);
  144. return 0;
  145. }
  146. static int clock_on(DISP_MODULE_ENUM module,void * handle)
  147. {
  148. ddp_enable_module_clock(module);
  149. return 0;
  150. }
  151. static int clock_off(DISP_MODULE_ENUM module,void * handle)
  152. {
  153. ddp_disable_module_clock(module);
  154. return 0;
  155. }
  156. ///////////////////////////////////////////////////////////
  157. // color
  158. DDP_MODULE_DRIVER ddp_driver_color = {
  159. .init = clock_on,
  160. .deinit = clock_off,
  161. .config = config_color,
  162. .start = ddp_color_start,
  163. .trigger = NULL,
  164. .stop = NULL,
  165. .reset = NULL,
  166. .power_on = clock_on,
  167. .power_off = clock_off,
  168. .is_idle = NULL,
  169. .is_busy = NULL,
  170. .dump_info = NULL,
  171. .bypass = NULL,
  172. .build_cmdq = NULL,
  173. .set_lcm_utils = NULL,
  174. };
  175. // ccorr
  176. DDP_MODULE_DRIVER ddp_driver_ccorr = {
  177. .init = clock_on,
  178. .deinit = clock_off,
  179. .config = config_ccorr,
  180. .start = ddp_ccorr_start,
  181. .trigger = NULL,
  182. .stop = NULL,
  183. .reset = NULL,
  184. .power_on = clock_on,
  185. .power_off = clock_off,
  186. .is_idle = NULL,
  187. .is_busy = NULL,
  188. .dump_info = NULL,
  189. .bypass = NULL,
  190. .build_cmdq = NULL,
  191. .set_lcm_utils = NULL,
  192. };
  193. // aal
  194. DDP_MODULE_DRIVER ddp_driver_aal = {
  195. .init = clock_on,
  196. .deinit = clock_off,
  197. .config = config_aal,
  198. .start = ddp_aal_start,
  199. .trigger = NULL,
  200. .stop = NULL,
  201. .reset = NULL,
  202. .power_on = clock_on,
  203. .power_off = clock_off,
  204. .is_idle = NULL,
  205. .is_busy = NULL,
  206. .dump_info = NULL,
  207. .bypass = NULL,
  208. .build_cmdq = NULL,
  209. .set_lcm_utils = NULL,
  210. };
  211. // gamma
  212. DDP_MODULE_DRIVER ddp_driver_gamma = {
  213. .init = clock_on,
  214. .deinit = clock_off,
  215. .config = config_gamma,
  216. .start = ddp_gamma_start,
  217. .trigger = NULL,
  218. .stop = NULL,
  219. .reset = NULL,
  220. .power_on = clock_on,
  221. .power_off = clock_off,
  222. .is_idle = NULL,
  223. .is_busy = NULL,
  224. .dump_info = NULL,
  225. .bypass = NULL,
  226. .build_cmdq = NULL,
  227. .set_lcm_utils = NULL,
  228. };