mt_pmic.c 16 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <platform/mt_typedefs.h>
  32. #include <platform/mt_reg_base.h>
  33. #include <platform/mt_pmic.h>
  34. #include <platform/mt_rtc.h>
  35. #include <platform/mt_gpt.h>
  36. #include <platform/mt_pmic_wrap_init.h>
  37. #include <platform/primary_display.h>
  38. #include <printf.h>
  39. #include <platform/upmu_hw.h>
  40. #include <platform/upmu_common.h>
  41. #include <platform/sec_devinfo.h>
  42. #ifdef MTK_CHARGER_NEW_ARCH
  43. #include <mtk_charger.h>
  44. #endif
  45. #include "log_store_lk.h"
  46. //==============================================================================
  47. // Global variable
  48. //==============================================================================
  49. int Enable_PMIC_LOG = 1;
  50. CHARGER_TYPE g_ret = CHARGER_UNKNOWN;
  51. int g_charger_in_flag = 0;
  52. int g_first_check = 0;
  53. unsigned int g_is_smart_rst;
  54. unsigned int g_has_bat_removed;
  55. extern int g_R_BAT_SENSE;
  56. extern int g_R_I_SENSE;
  57. extern int g_R_CHARGER_1;
  58. extern int g_R_CHARGER_2;
  59. //==============================================================================
  60. // PMIC-AUXADC related define
  61. //==============================================================================
  62. #define VOLTAGE_FULL_RANGE 1800
  63. #define ADC_PRECISE 32768 // 15 bits
  64. //==============================================================================
  65. // PMIC-AUXADC global variable
  66. //==============================================================================
  67. kal_int32 count_time_out = 100;
  68. void pmic_auxadc_debug(void);
  69. //==============================================================================
  70. // PMIC access API
  71. //==============================================================================
  72. U32 pmic_read_interface(U32 RegNum, U32 *val, U32 MASK, U32 SHIFT)
  73. {
  74. U32 return_value = 0;
  75. U32 pmic_reg = 0;
  76. return_value = pwrap_read(RegNum, &pmic_reg);
  77. if (return_value != 0) {
  78. dprintf(CRITICAL, "[pmic_read_interface] Reg[0x%x]= pmic_wrap read data fail\n", RegNum);
  79. return return_value;
  80. }
  81. //dprintf(INFO, "[pmic_read_interface] Reg[%x]=0x%x\n", RegNum, pmic_reg);
  82. pmic_reg &= (MASK << SHIFT);
  83. *val = (pmic_reg >> SHIFT);
  84. //dprintf(INFO, "[pmic_read_interface] val=0x%x\n", *val);
  85. return return_value;
  86. }
  87. U32 pmic_config_interface(U32 RegNum, U32 val, U32 MASK, U32 SHIFT)
  88. {
  89. U32 return_value = 0;
  90. U32 pmic_reg = 0;
  91. return_value = pwrap_read(RegNum, &pmic_reg);
  92. if (return_value != 0) {
  93. dprintf(CRITICAL, "[pmic_config_interface] Reg[0x%x]= pmic_wrap read data fail\n", RegNum);
  94. return return_value;
  95. }
  96. //dprintf(INFO, "[pmic_config_interface] Reg[%x]=0x%x\n", RegNum, pmic_reg);
  97. pmic_reg &= ~(MASK << SHIFT);
  98. pmic_reg |= (val << SHIFT);
  99. return_value = pwrap_write(RegNum, pmic_reg);
  100. if (return_value != 0) {
  101. dprintf(CRITICAL, "[pmic_config_interface] Reg[0x%x]= pmic_wrap write data fail\n", RegNum);
  102. return return_value;
  103. }
  104. //dprintf(INFO, "[pmic_config_interface] write Reg[%x]=0x%x\n", RegNum, pmic_reg);
  105. return return_value;
  106. }
  107. U32 upmu_get_reg_value(U32 reg)
  108. {
  109. U32 ret = 0;
  110. U32 temp_val = 0;
  111. ret = pmic_read_interface(reg, &temp_val, 0xFFFF, 0x0);
  112. if (Enable_PMIC_LOG > 1)
  113. dprintf(INFO, "%d", ret);
  114. return temp_val;
  115. }
  116. U32 upmu_set_reg_value(U32 reg, U32 reg_val)
  117. {
  118. U32 ret = 0;
  119. ret = pmic_config_interface(reg, reg_val, 0xFFFF, 0x0);
  120. return ret;
  121. }
  122. //==============================================================================
  123. // PMIC Exported APIs
  124. //==============================================================================
  125. void pmic_cold_reset(void)
  126. {
  127. pmic_set_register_value(PMIC_RG_CRST, 1);
  128. }
  129. unsigned int pmic_power_hold(unsigned int hold)
  130. {
  131. if (hold > 1) {
  132. dprintf(CRITICAL, "[PMIC]POWER_HOLD hold = %d only 0 or 1\n", hold);
  133. return 1;
  134. }
  135. if (hold)
  136. dprintf(INFO, "[PMIC]POWER_HOLD ON\n");
  137. else
  138. dprintf(INFO, "[PMIC]POWER_HOLD OFF\n");
  139. /* MT6357 must keep power hold */
  140. pmic_config_interface(PMIC_RG_PWRHOLD_ADDR, hold, PMIC_RG_PWRHOLD_MASK, PMIC_RG_PWRHOLD_SHIFT);
  141. dprintf(INFO, "[PMIC]MT6357 PowerHold = 0x%x\n", pmic_get_register_value(PMIC_RG_PWRHOLD));
  142. return 0;
  143. }
  144. void vmd1_pmic_setting_on(void)
  145. {
  146. /* Vcore: 0x2D, 0.8V */
  147. /* Vmodem: 0x30, 0.8V */
  148. unsigned int vcore_vosel = 0x2D, vmodem_vosel = 0x30;
  149. /* 1.Call PMIC driver API configure VCORE voltage */
  150. pmic_set_register_value(PMIC_RG_BUCK_VCORE_VOSEL, vcore_vosel);
  151. if (pmic_get_register_value(PMIC_DA_VCORE_VOSEL) != vcore_vosel)
  152. dprintf(INFO, "vmd1_pmic_setting_on vcore vosel = 0x%x, da_vosel = 0x%x",
  153. pmic_get_register_value(PMIC_RG_BUCK_VCORE_VOSEL),
  154. pmic_get_register_value(PMIC_DA_VCORE_VOSEL));
  155. /* 2.Call PMIC driver API configure VMODEM voltage */
  156. pmic_set_register_value(PMIC_RG_BUCK_VMODEM_VOSEL, vmodem_vosel);
  157. if (pmic_get_register_value(PMIC_DA_VMODEM_VOSEL) != vcore_vosel)
  158. dprintf(INFO, "vmd1_pmic_setting_on vmodem vosel = 0x%x, da_vosel = 0x%x",
  159. pmic_get_register_value(PMIC_RG_BUCK_VMODEM_VOSEL),
  160. pmic_get_register_value(PMIC_DA_VMODEM_VOSEL));
  161. }
  162. const char *smart_reset_check(void)
  163. {
  164. if (g_is_smart_rst)
  165. return "SMART RESET: TRUE";
  166. return "SMART RESET: FALSE";
  167. }
  168. void mt_power_off(void)
  169. {
  170. #ifndef NO_POWER_OFF
  171. dprintf(CRITICAL, "mt_power_off new\n");
  172. primary_display_suspend();
  173. /*save pl lk log to analyze exception power off case */
  174. save_pllk_log();
  175. #ifdef MTK_CHARGER_NEW_ARCH
  176. charger_enable_wdt(false);
  177. #endif
  178. rtc_bbpu_power_down();
  179. #endif
  180. }
  181. //==============================================================================
  182. // PMIC Usage APIs
  183. //==============================================================================
  184. bool get_powerkey_pressed_status(void)
  185. {
  186. unsigned short val;
  187. val = pmic_get_register_value(PMIC_RG_INT_STATUS_PWRKEY);
  188. if (val)
  189. return true;
  190. return false;
  191. }
  192. void clear_powerkey_pressed_status(void)
  193. {
  194. pmic_set_register_value(PMIC_RG_INT_STATUS_PWRKEY, 1);
  195. }
  196. U32 get_pmic_chip_version(void)
  197. {
  198. U32 val = 0;
  199. val = pmic_get_register_value(PMIC_SWCID);
  200. return val;
  201. }
  202. U32 pmic_upmu_get_rgs_chrdet(void)
  203. {
  204. U32 ret = 0;
  205. U32 val = 0;
  206. ret = pmic_read_interface((U32)(PMIC_RGS_CHRDET_ADDR), (&val),
  207. (U32)(PMIC_RGS_CHRDET_MASK),
  208. (U32)(PMIC_RGS_CHRDET_SHIFT));
  209. if (ret != 0)
  210. dprintf(CRITICAL, "[%s] error return value: %d\n", __func__, ret);
  211. return val;
  212. }
  213. kal_bool upmu_is_chr_det(void)
  214. {
  215. U32 tmp32=0;
  216. #if 0
  217. tmp32 = 1; // for bring up
  218. #else
  219. tmp32 = pmic_upmu_get_rgs_chrdet();
  220. #endif
  221. dprintf(CRITICAL, "[upmu_is_chr_det] %d\n", tmp32);
  222. if (tmp32 == 0) {
  223. return KAL_FALSE;
  224. } else {
  225. return KAL_TRUE;
  226. }
  227. }
  228. /*
  229. * same as upmu_is_chr_det, this API is used for legacy mt6575_power_off
  230. * Must be removed after mt_power_off is defined
  231. */
  232. kal_bool pmic_chrdet_status(void)
  233. {
  234. return upmu_is_chr_det();
  235. }
  236. int pmic_detect_powerkey(void)
  237. {
  238. U32 ret = 0;
  239. U32 val = 0;
  240. ret = pmic_read_interface((U32)(PMIC_PWRKEY_DEB_ADDR), (&val),
  241. (U32)(PMIC_PWRKEY_DEB_MASK),
  242. (U32)(PMIC_PWRKEY_DEB_SHIFT));
  243. if (Enable_PMIC_LOG > 1)
  244. dprintf(INFO, "%d", ret);
  245. if (val == 1) {
  246. #ifndef USER_BUILD
  247. dprintf(INFO, "LK pmic powerkey Release\n");
  248. #endif
  249. return 0;
  250. } else {
  251. #ifndef USER_BUILD
  252. dprintf(INFO, "LK pmic powerkey Press\n");
  253. #endif
  254. return 1;
  255. }
  256. }
  257. int pmic_detect_homekey(void)
  258. {
  259. U32 ret = 0;
  260. U32 val = 0;
  261. ret = pmic_read_interface((U32)(PMIC_HOMEKEY_DEB_ADDR), (&val),
  262. (U32)(PMIC_HOMEKEY_DEB_MASK),
  263. (U32)(PMIC_HOMEKEY_DEB_SHIFT));
  264. if (Enable_PMIC_LOG > 1)
  265. dprintf(INFO, "%d", ret);
  266. if (val==1) {
  267. #ifndef USER_BUILD
  268. dprintf(INFO, "LK pmic HOMEKEY Release\n");
  269. #endif
  270. return 0;
  271. } else {
  272. #ifndef USER_BUILD
  273. dprintf(INFO, "LK pmic HOMEKEY Press\n");
  274. #endif
  275. return 1;
  276. }
  277. }
  278. //==============================================================================
  279. // PMIC Init Code
  280. //==============================================================================
  281. U32 pmic_init (void)
  282. {
  283. U32 ret_code = PMIC_TEST_PASS;
  284. if ((upmu_get_reg_value(MT6357_TOP_RST_STATUS) & 0x7) != 0x7)
  285. g_has_bat_removed = 1;
  286. upmu_set_reg_value(MT6357_TOP_RST_STATUS, 0x4F);
  287. if (g_has_bat_removed)
  288. cmdline_append("has_battery_removed=1");
  289. else
  290. cmdline_append("has_battery_removed=0");
  291. g_is_smart_rst = pmic_get_register_value(PMIC_JUST_SMART_RST);
  292. pmic_set_register_value(PMIC_RG_CLR_JUST_SMART_RST, 1);
  293. udelay(62);
  294. pmic_set_register_value(PMIC_RG_CLR_JUST_SMART_RST, 0);
  295. dprintf(INFO, "[pmic_init] LK Start..................\n");
  296. dprintf(INFO, "[pmic_init] MT6357 CHIP Code = 0x%x\n", get_pmic_chip_version());
  297. /*pmic_auxadc_debug(2);*/
  298. dprintf(INFO, "[pmic_init] Done\n");
  299. /*pmic_auxadc_debug(3);*/
  300. return ret_code;
  301. }
  302. //==============================================================================
  303. // PMIC API for LK : AUXADC
  304. //==============================================================================
  305. #define PMIC_AUXADC_DEBUG(_reg) \
  306. { \
  307. value = pmic_get_register_value(_reg); \
  308. dprintf(INFO, "[%s] %s = 0x%x\n", __func__, #_reg, value); \
  309. }
  310. void pmic_auxadc_debug(void)
  311. {
  312. int value;
  313. PMIC_AUXADC_DEBUG(PMIC_RG_STRUP_AUXADC_RSTB_SEL);
  314. PMIC_AUXADC_DEBUG(PMIC_RG_STRUP_AUXADC_RSTB_SW);
  315. PMIC_AUXADC_DEBUG(PMIC_RG_STRUP_AUXADC_START_SEL);
  316. PMIC_AUXADC_DEBUG(PMIC_AUXADC_MDRT_DET_EN);
  317. PMIC_AUXADC_DEBUG(PMIC_AUXADC_MDRT_DET_PRD);
  318. PMIC_AUXADC_DEBUG(PMIC_AUXADC_MDRT_DET_WKUP_EN);
  319. PMIC_AUXADC_DEBUG(PMIC_AUXADC_MDRT_DET_SRCLKEN_IND);
  320. PMIC_AUXADC_DEBUG(PMIC_AUXADC_CK_AON);
  321. PMIC_AUXADC_DEBUG(PMIC_AUXADC_DATA_REUSE_SEL);
  322. PMIC_AUXADC_DEBUG(PMIC_AUXADC_DATA_REUSE_EN);
  323. }
  324. struct pmic_auxadc_t {
  325. u8 resolution;
  326. u8 r_val;
  327. unsigned int channel_rqst;
  328. unsigned int channel_rdy;
  329. unsigned int channel_out;
  330. };
  331. struct pmic_auxadc_t pmic_auxadc_channel[] = {
  332. {15, 3, PMIC_AUXADC_RQST_CH0, /* BATADC */
  333. PMIC_AUXADC_ADC_RDY_CH0_BY_AP, PMIC_AUXADC_ADC_OUT_CH0_BY_AP},
  334. {12, 1, PMIC_AUXADC_RQST_CH2, /* VCDT */
  335. PMIC_AUXADC_ADC_RDY_CH2, PMIC_AUXADC_ADC_OUT_CH2},
  336. {12, 1, PMIC_AUXADC_RQST_CH3, /* BAT TEMP */
  337. PMIC_AUXADC_ADC_RDY_CH3, PMIC_AUXADC_ADC_OUT_CH3},
  338. {12, 1, PMIC_AUXADC_RQST_BATID, /* BATID */
  339. PMIC_AUXADC_ADC_RDY_BATID, PMIC_AUXADC_ADC_OUT_BATID},
  340. {12, 1, PMIC_AUXADC_RQST_CH11, /* VBIF */
  341. PMIC_AUXADC_ADC_RDY_CH11, PMIC_AUXADC_ADC_OUT_CH11},
  342. {12, 1, PMIC_AUXADC_RQST_CH4, /* CHIP TEMP */
  343. PMIC_AUXADC_ADC_RDY_CH4, PMIC_AUXADC_ADC_OUT_CH4},
  344. {12, 1, PMIC_AUXADC_RQST_CH4, /* DCXO */
  345. PMIC_AUXADC_ADC_RDY_DCXO_BY_AP, PMIC_AUXADC_ADC_OUT_DCXO_BY_AP},
  346. {12, 1, PMIC_AUXADC_RQST_CH5, /* ACCDET Multi-Key */
  347. PMIC_AUXADC_ADC_RDY_CH5, PMIC_AUXADC_ADC_OUT_CH5},
  348. {15, 1, PMIC_AUXADC_RQST_CH7, /* TSX */
  349. PMIC_AUXADC_ADC_RDY_CH7_BY_AP, PMIC_AUXADC_ADC_OUT_CH7_BY_AP},
  350. {12, 1, PMIC_AUXADC_RQST_CH9, /* HP OFFSET CAL */
  351. PMIC_AUXADC_ADC_RDY_CH9, PMIC_AUXADC_ADC_OUT_CH9},
  352. {15, 3, PMIC_AUXADC_RQST_CH1, /* ISENSE */
  353. PMIC_AUXADC_ADC_RDY_CH1_BY_AP, PMIC_AUXADC_ADC_OUT_CH1_BY_AP},
  354. {12, 1, PMIC_AUXADC_RQST_CH4_BY_THR1, /* TS_BUCK1 */
  355. PMIC_AUXADC_ADC_RDY_CH4_BY_THR1, PMIC_AUXADC_ADC_OUT_CH4_BY_THR1},
  356. {12, 1, PMIC_AUXADC_RQST_CH4_BY_THR2, /* TS_BUCK2 */
  357. PMIC_AUXADC_ADC_RDY_CH4_BY_THR2, PMIC_AUXADC_ADC_OUT_CH4_BY_THR2},
  358. };
  359. bool is_isense_supported(void)
  360. {
  361. /* PMIC MT6357 supports ISENSE */
  362. return true;
  363. }
  364. int pmic_get_auxadc_value(PMIC_AUXADC_LIST list)
  365. {
  366. int count = 0;
  367. signed int adc_result = 0, reg_val = 0;
  368. struct pmic_auxadc_t *auxadc_channel;
  369. if (list >= AUXADC_LIST_MAX) {
  370. dprintf(INFO, "[%s] Invalid list(%d)\n", __func__, list);
  371. return -1;
  372. }
  373. auxadc_channel = &pmic_auxadc_channel[list];
  374. if (list == AUXADC_LIST_DCXO)
  375. pmic_set_register_value(PMIC_AUXADC_DCXO_CH4_MUX_AP_SEL, 1);
  376. if (list == AUXADC_LIST_CHIP_TEMP)
  377. pmic_set_register_value(PMIC_AUXADC_DCXO_CH4_MUX_AP_SEL, 0);
  378. pmic_set_register_value(auxadc_channel->channel_rqst, 1);
  379. udelay(10);
  380. while (pmic_get_register_value(auxadc_channel->channel_rdy) != 1) {
  381. udelay(1300);
  382. if ((count++) > count_time_out) {
  383. dprintf(CRITICAL, "[%s] (%d) Time out! STA0=0x%x, STA1=0x%x, STA2=0x%x\n",
  384. __func__, list,
  385. upmu_get_reg_value(MT6357_AUXADC_STA0),
  386. upmu_get_reg_value(MT6357_AUXADC_STA1),
  387. upmu_get_reg_value(MT6357_AUXADC_STA2));
  388. dprintf(CRITICAL, "RG_AUXADC_1M_CK_PDN_HWEN=0x%x\n",
  389. pmic_get_register_value(PMIC_RG_AUXADC_1M_CK_PDN_HWEN));
  390. dprintf(CRITICAL, "RG_AUXADC_1M_CK_PDN=0x%x\n",
  391. pmic_get_register_value(PMIC_RG_AUXADC_1M_CK_PDN));
  392. dprintf(CRITICAL, "RG_AUXADC_CK_PDN_HWEN=0x%x\n",
  393. pmic_get_register_value(PMIC_RG_AUXADC_CK_PDN_HWEN));
  394. dprintf(CRITICAL, "RG_AUXADC_CK_PDN=0x%x\n",
  395. pmic_get_register_value(PMIC_RG_AUXADC_CK_PDN));
  396. dprintf(CRITICAL, "RG_AUXADC_RNG_CK_PDN_HWEN=0x%x\n",
  397. pmic_get_register_value(PMIC_RG_AUXADC_RNG_CK_PDN_HWEN));
  398. dprintf(CRITICAL, "RG_AUXADC_RNG_CK_PDN=0x%x\n",
  399. pmic_get_register_value(PMIC_RG_AUXADC_RNG_CK_PDN));
  400. dprintf(CRITICAL, "RG_AUXADC_CK_DIVSEL=0x%x\n",
  401. pmic_get_register_value(PMIC_RG_AUXADC_CK_DIVSEL));
  402. dprintf(CRITICAL, "RG_AUXADC_CK_TSTSEL=0x%x\n",
  403. pmic_get_register_value(PMIC_RG_AUXADC_CK_TSTSEL));
  404. dprintf(CRITICAL, "AUXADC_CK_AON=0x%x\n",
  405. pmic_get_register_value(PMIC_AUXADC_CK_AON));
  406. break;
  407. }
  408. }
  409. reg_val = pmic_get_register_value(auxadc_channel->channel_out);
  410. if (auxadc_channel->resolution == 12)
  411. adc_result = (reg_val * auxadc_channel->r_val *
  412. VOLTAGE_FULL_RANGE) / 4096;
  413. else if (auxadc_channel->resolution == 15)
  414. adc_result = (reg_val * auxadc_channel->r_val *
  415. VOLTAGE_FULL_RANGE) / 32768;
  416. dprintf(INFO, "[%s] reg_val = 0x%x, adc_result = %d\n",
  417. __func__, reg_val, adc_result);
  418. return adc_result;
  419. }
  420. int get_bat_sense_volt(int times)
  421. {
  422. return pmic_get_auxadc_value(AUXADC_LIST_BATADC);
  423. }
  424. int get_i_sense_volt(int times)
  425. {
  426. return pmic_get_auxadc_value(AUXADC_LIST_ISENSE);
  427. }
  428. #define R_CHARGER_1 330
  429. #define R_CHARGER_2 39
  430. int get_charger_volt(int times)
  431. {
  432. kal_int32 val;
  433. val = pmic_get_auxadc_value(AUXADC_LIST_VCDT);
  434. val = (((R_CHARGER_1+R_CHARGER_2)*100*val)/R_CHARGER_2)/100;
  435. return val;
  436. }
  437. int get_tbat_volt(int times)
  438. {
  439. return pmic_get_auxadc_value(AUXADC_LIST_BATTEMP);
  440. }
  441. #define CUST_R_SENSE 56
  442. int get_charging_current(int times)
  443. {
  444. kal_int32 ADC_I_SENSE = 1; // 1 measure time
  445. kal_int32 ADC_BAT_SENSE = 1; // 1 measure time
  446. int ICharging = 0;
  447. ADC_I_SENSE = get_i_sense_volt(1);
  448. ADC_BAT_SENSE = get_bat_sense_volt(1);
  449. ICharging = (ADC_I_SENSE - ADC_BAT_SENSE ) * 1000 / CUST_R_SENSE;
  450. return ICharging;
  451. }