external_display.c 29 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <video_fb.h>
  32. #include <target/board.h>
  33. #include <env.h>
  34. #include "lcm_drv.h"
  35. #include <string.h>
  36. #include <stdlib.h>
  37. #include <platform/mt_gpt.h>
  38. #include <platform/disp_drv_platform.h>
  39. #include <platform/disp_drv_log.h>
  40. #include <platform/boot_mode.h>
  41. #include <platform/primary_display.h>
  42. #include <platform/external_display.h>
  43. #include <platform/disp_lcm.h>
  44. //#include<linux/timer.h>
  45. #define DDP_LK_BOOT
  46. #ifndef HZ
  47. #define HZ 100
  48. #endif
  49. #ifdef DDP_LK_BOOT
  50. typedef void * cmdqRecHandle;
  51. #endif
  52. #define ALIGN_TO(x, n) \
  53. (((x) + ((n) - 1)) & ~((n) - 1))
  54. int external_display_use_cmdq = CMDQ_DISABLE;
  55. int external_display_use_m4u = 1;
  56. DISP_EXTERNAL_PATH_MODE external_display_mode = EXT_DIRECT_LINK_MODE;
  57. static UINT32 disp_fb_bpp = 32; ///ARGB8888
  58. static UINT32 disp_fb_pages = 3; ///double buffer
  59. extern int ddp_dsi_set_lcm_utils(DISP_MODULE_ENUM module, LCM_DRIVER *lcm_drv);
  60. extern int ddp_dsi_dump(DISP_MODULE_ENUM module, int level);
  61. typedef struct {
  62. int state;
  63. int need_trigger_overlay;
  64. DISP_EXTERNAL_PATH_MODE mode;
  65. unsigned int last_vsync_tick;
  66. #ifndef DDP_LK_BOOT
  67. struct mutex lock;
  68. #endif
  69. disp_lcm_handle * plcm;
  70. cmdqRecHandle cmdq_handle_config;
  71. cmdqRecHandle cmdq_handle_trigger;
  72. disp_path_handle dpmgr_handle;
  73. disp_path_handle ovl2mem_path_handle;
  74. } display_external_path_context;
  75. #define pgc _get_context()
  76. static display_external_path_context* _get_context(void)
  77. {
  78. static int is_context_inited = 0;
  79. static display_external_path_context g_context;
  80. if (!is_context_inited) {
  81. memset((void*)&g_context, 0, sizeof(g_context));
  82. is_context_inited = 1;
  83. }
  84. return &g_context;
  85. }
  86. static void _external_path_lock(void)
  87. {
  88. #ifndef DDP_LK_BOOT
  89. disp_sw_mutex_lock(&(pgc->lock));
  90. #endif
  91. }
  92. static void _external_path_unlock(void)
  93. {
  94. #ifndef DDP_LK_BOOT
  95. disp_sw_mutex_unlock(&(pgc->lock));
  96. #endif
  97. }
  98. static DISP_MODULE_ENUM _get_dst_module_by_lcm(disp_lcm_handle *plcm)
  99. {
  100. if (plcm == NULL) {
  101. DISPERR("plcm is null\n");
  102. return DISP_MODULE_UNKNOWN;
  103. }
  104. if (plcm->params->type == LCM_TYPE_DSI) {
  105. if (plcm->lcm_if_id == LCM_INTERFACE_DSI0) {
  106. return DISP_MODULE_DSI0;
  107. } else if (plcm->lcm_if_id == LCM_INTERFACE_DSI1) {
  108. return DISP_MODULE_DSI1;
  109. } else if (plcm->lcm_if_id == LCM_INTERFACE_DSI_DUAL) {
  110. return DISP_MODULE_DSIDUAL;
  111. } else {
  112. return DISP_MODULE_DSI0;
  113. }
  114. } else if (plcm->params->type == LCM_TYPE_DPI) {
  115. return DISP_MODULE_DPI;
  116. } else {
  117. DISPERR("can't find external path dst module\n");
  118. return DISP_MODULE_UNKNOWN;
  119. }
  120. }
  121. static int _build_path_direct_link(void)
  122. {
  123. int ret = 0;
  124. DISP_MODULE_ENUM dst_module = 0;
  125. DISPFUNC();
  126. pgc->mode = EXT_DIRECT_LINK_MODE;
  127. pgc->dpmgr_handle = dpmgr_create_path(DDP_SCENARIO_SECONDARY_DISP, pgc->cmdq_handle_config);
  128. if (pgc->dpmgr_handle) {
  129. DISPCHECK("dpmgr create path SUCCESS(0x%08x)\n", pgc->dpmgr_handle);
  130. } else {
  131. DISPCHECK("dpmgr create path FAIL\n");
  132. return -1;
  133. }
  134. dst_module = _get_dst_module_by_lcm(pgc->plcm);
  135. dpmgr_path_set_dst_module(pgc->dpmgr_handle, dst_module);
  136. DISPCHECK("dpmgr set dst module FINISHED(%s)\n", ddp_get_module_name(dst_module));
  137. dpmgr_set_lcm_utils(pgc->dpmgr_handle, pgc->plcm->drv);
  138. return ret;
  139. }
  140. static int _build_path_decouple(void)
  141. {
  142. return 0;
  143. }
  144. static int _build_path_single_layer(void)
  145. {
  146. return 0;
  147. }
  148. static int _build_path_debug_rdma1_dsi0(void)
  149. {
  150. return 0;
  151. }
  152. static void _build_cmdq_trigger_loop(void)
  153. {
  154. #ifndef DDP_LK_BOOT
  155. int ret = 0;
  156. cmdqRecCreate(CMDQ_SCENARIO_TRIGGER_LOOP, &(pgc->cmdq_handle_trigger));
  157. DISPMSG("external path trigger thread cmd handle=0x%08x\n", pgc->cmdq_handle_trigger);
  158. cmdqRecReset(pgc->cmdq_handle_trigger);
  159. if (external_display_is_video_mode()) {
  160. // wait and clear stream_done
  161. ret = cmdqRecWait(pgc->cmdq_handle_trigger,
  162. dpmgr_path_get_mutex(pgc->dpmgr_handle) + CMDQ_EVENT_MUTEX0_STREAM_EOF);
  163. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger, CMDQ_AFTER_STREAM_EOF);
  164. //ret = cmdqRecSetEventToken(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_CONFIG_ALLOW);
  165. } else {
  166. // only in DSI Command mode we need to wait these
  167. ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_EXT_CONFIG_DIRTY);
  168. // no internal te on fpga now.
  169. //ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_EVENT_MDP_DSI0_TE_SOF);
  170. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger, CMDQ_BEFORE_STREAM_SOF);
  171. // block config threads, we'll about to update frame
  172. ret = cmdqRecClearEventToken(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_EXT_CONFIG_ALLOW);
  173. // only in DSI command mode we need to enable mutex explicitly
  174. // WRITE mutex enable
  175. dpmgr_path_trigger(pgc->dpmgr_handle, pgc->cmdq_handle_trigger,external_display_use_cmdq);
  176. //ret = cmdqRecWrite(pgc->cmdq_handle_trigger, (unsigned int)(DISP_REG_CONFIG_MUTEX_EN(0))&0x1fffffff, 1, ~0);
  177. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger, CMDQ_WAIT_STREAM_EOF_EVENT);
  178. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger, CMDQ_CHECK_IDLE_AFTER_STREAM_EOF);
  179. dpmgr_path_build_cmdq(pgc->dpmgr_handle, pgc->cmdq_handle_trigger, CMDQ_AFTER_STREAM_EOF);
  180. //ret = cmdqRecWait(pgc->cmdq_handle_trigger, CMDQ_EVENT_DISP_RDMA0_EOF);
  181. // polling DSI idle
  182. //ret = cmdqRecPoll(pgc->cmdq_handle_trigger, 0x1401b00c, 0, 0x80000000);
  183. // polling wdma frame done
  184. //ret = cmdqRecPoll(pgc->cmdq_handle_trigger, 0x140060A0, 1, 0x1);
  185. ret = cmdqRecSetEventToken(pgc->cmdq_handle_trigger, CMDQ_SYNC_TOKEN_EXT_CONFIG_ALLOW);
  186. /*********************/
  187. /***build cmdq finished***/
  188. /*********************/
  189. // TODO:
  190. // cmdqRecDumphandle(pgc->cmdq_handle_trigger);
  191. // RUN forever!!!!
  192. BUG_ON(ret < 0);
  193. }
  194. #endif
  195. }
  196. static void _start_cmdq_trigger_loop(void)
  197. {
  198. #ifndef DDP_LK_BOOT
  199. int ret = 0;
  200. // this should be called only once because trigger loop will nevet stop
  201. cmdqCoreSetEvent(CMDQ_SYNC_TOKEN_EXT_CONFIG_ALLOW);
  202. ret = cmdqRecStartLoop(pgc->cmdq_handle_trigger);
  203. #endif
  204. }
  205. static void _set_cmdq_config_handle_dirty(void)
  206. {
  207. #ifndef DDP_LK_BOOT
  208. ddp_insert_config_dirty_rec(pgc->cmdq_handle_config);
  209. cmdqRecFlush(pgc->cmdq_handle_config);
  210. #endif
  211. }
  212. static void _reset_cmdq_config_handle(void)
  213. {
  214. #ifndef DDP_LK_BOOT
  215. cmdqRecReset(pgc->cmdq_handle_config);
  216. ddp_insert_config_allow_rec(pgc->cmdq_handle_config);
  217. #endif
  218. }
  219. static int _convert_disp_input_to_rdma(RDMA_CONFIG_STRUCT *dst, disp_input_config* src)
  220. {
  221. if (src && dst) {
  222. dst->inputFormat = src->fmt;
  223. dst->address = src->addr;
  224. dst->width = src->src_w;
  225. dst->height = src->src_h;
  226. dst->pitch = src->src_pitch;
  227. return 0;
  228. } else {
  229. DISPERR("src(0x%08x) or dst(0x%08x) is null\n", src, dst);
  230. return -1;
  231. }
  232. }
  233. static int _convert_disp_input_to_ovl(OVL_CONFIG_STRUCT *dst, disp_input_config* src)
  234. {
  235. if (src && dst) {
  236. dst->layer = src->layer;
  237. dst->layer_en = src->layer_en;
  238. dst->fmt = src->fmt;
  239. dst->addr = src->addr;
  240. dst->vaddr = src->vaddr;
  241. dst->src_x = src->src_x;
  242. dst->src_y = src->src_y;
  243. dst->src_w = src->src_w;
  244. dst->src_h = src->src_h;
  245. dst->src_pitch = src->src_pitch;
  246. dst->dst_x = src->dst_x;
  247. dst->dst_y = src->dst_y;
  248. dst->dst_w = src->dst_w;
  249. dst->dst_h = src->dst_h;
  250. dst->keyEn = src->keyEn;
  251. dst->key = src->key;
  252. dst->aen = src->aen;
  253. dst->alpha = src->alpha;
  254. dst->isDirty = src->isDirty;
  255. dst->buff_idx = src->buff_idx;
  256. dst->identity = src->identity;
  257. dst->connected_type = src->connected_type;
  258. dst->security = src->security;
  259. return 0;
  260. } else {
  261. DISPERR("src(0x%08x) or dst(0x%08x) is null\n", src, dst);
  262. return -1;
  263. }
  264. }
  265. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  266. int external_display_is_lcm_connected(void)
  267. {
  268. return pgc->plcm->is_connected;
  269. }
  270. const char* external_display_get_lcm_name(void)
  271. {
  272. return disp_lcm_get_name(pgc->plcm);
  273. }
  274. int external_display_change_lcm_resolution(unsigned int width, unsigned int height)
  275. {
  276. if (pgc->plcm) {
  277. DISPMSG("LCM Resolution will be changed, original: %dx%d, now: %dx%d\n", pgc->plcm->params->width, pgc->plcm->params->height, width, height);
  278. // align with 4 is the minimal check, to ensure we can boot up into kernel, and could modify dfo setting again using meta tool
  279. // otherwise we will have a panic in lk(root cause unknown).
  280. if (width >pgc->plcm->params->width || height > pgc->plcm->params->height || width == 0 || height == 0 || width %4 || height %2) {
  281. DISPERR("Invalid resolution: %dx%d\n", width, height);
  282. return -1;
  283. }
  284. if (external_display_is_video_mode()) {
  285. DISPERR("Warning!!!Video Mode can't support multiple resolution!\n");
  286. return -1;
  287. }
  288. pgc->plcm->params->width = width;
  289. pgc->plcm->params->height = height;
  290. return 0;
  291. } else {
  292. return -1;
  293. }
  294. }
  295. int external_display_init(char *lcm_name)
  296. {
  297. DISPFUNC();
  298. DISP_STATUS ret = DISP_STATUS_OK;
  299. DISP_MODULE_ENUM dst_module = 0;
  300. unsigned int lcm_fake_width = 0;
  301. unsigned int lcm_fake_height = 0;
  302. LCM_PARAMS *lcm_param = NULL;
  303. LCM_INTERFACE_ID lcm_id = LCM_INTERFACE_NOTDEFINED;
  304. dpmgr_init();
  305. #ifndef DDP_LK_BOOT
  306. mutex_init(&(pgc->lock));
  307. #endif
  308. _external_path_lock();
  309. if (pgc->plcm == NULL)
  310. pgc->plcm = disp_ext_lcm_probe( lcm_name, LCM_INTERFACE_NOTDEFINED);
  311. if (pgc->plcm == NULL) {
  312. DISPCHECK("disp_ext_lcm_probe returns null\n");
  313. ret = DISP_STATUS_ERROR;
  314. goto done;
  315. } else {
  316. DISPCHECK("disp_ext_lcm_probe SUCCESS\n");
  317. }
  318. lcm_param = disp_lcm_get_params(pgc->plcm);
  319. if (lcm_param == NULL) {
  320. DISPERR("get lcm params FAILED\n");
  321. ret = DISP_STATUS_ERROR;
  322. goto done;
  323. }
  324. if (external_display_mode == EXT_DIRECT_LINK_MODE) {
  325. _build_path_direct_link();
  326. DISPCHECK("external display is DIRECT LINK MODE\n");
  327. } else if (external_display_mode == EXT_DECOUPLE_MODE) {
  328. _build_path_decouple();
  329. DISPCHECK("external display is DECOUPLE MODE\n");
  330. } else if (external_display_mode == EXT_SINGLE_LAYER_MODE) {
  331. _build_path_single_layer();
  332. DISPCHECK("external display is SINGLE LAYER MODE\n");
  333. } else if (external_display_mode == EXT_DEBUG_RDMA1_DSI1_MODE) {
  334. _build_path_debug_rdma1_dsi0();
  335. DISPCHECK("external display is DEBUG RDMA1 DSI1 MODE\n");
  336. } else {
  337. DISPCHECK("external display mode is WRONG\n");
  338. }
  339. _build_cmdq_trigger_loop();
  340. DISPCHECK("external display BUILD cmdq trigger loop finished\n");
  341. _start_cmdq_trigger_loop();
  342. DISPCHECK("external display START cmdq trigger loop finished\n");
  343. dpmgr_path_set_video_mode(pgc->dpmgr_handle, external_display_is_video_mode());
  344. dpmgr_path_init(pgc->dpmgr_handle, CMDQ_DISABLE);
  345. disp_ddp_path_config data_config;
  346. memset((void*)&data_config, 0, sizeof(disp_ddp_path_config));
  347. memcpy(&(data_config.dsi_config), &(lcm_param->dsi), sizeof(LCM_DSI_PARAMS));
  348. data_config.dst_w = disp_lcm_width(pgc->plcm);
  349. data_config.dst_h = disp_lcm_height(pgc->plcm);
  350. if (lcm_param->type == LCM_TYPE_DSI) {
  351. if (lcm_param->dsi.data_format.format == LCM_DSI_FORMAT_RGB888)
  352. data_config.lcm_bpp = 24;
  353. else if (lcm_param->dsi.data_format.format == LCM_DSI_FORMAT_RGB565)
  354. data_config.lcm_bpp = 16;
  355. else if (lcm_param->dsi.data_format.format == LCM_DSI_FORMAT_RGB666)
  356. data_config.lcm_bpp = 18;
  357. } else if (lcm_param->type == LCM_TYPE_DPI) {
  358. if ( lcm_param->dpi.format == LCM_DPI_FORMAT_RGB888)
  359. data_config.lcm_bpp = 24;
  360. else if ( lcm_param->dpi.format == LCM_DPI_FORMAT_RGB565)
  361. data_config.lcm_bpp = 16;
  362. if ( lcm_param->dpi.format == LCM_DPI_FORMAT_RGB666)
  363. data_config.lcm_bpp = 18;
  364. }
  365. data_config.dst_dirty = 1;
  366. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, CMDQ_DISABLE);
  367. ret = disp_lcm_init(pgc->plcm);
  368. if (external_display_is_video_mode()) {
  369. if (lcm_param->dsi.lfr_enable == 1) {
  370. dpmgr_map_event_to_irq(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC, DDP_IRQ_DSI0_FRAME_DONE);
  371. } else {
  372. dpmgr_map_event_to_irq(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC, DDP_IRQ_RDMA0_DONE);
  373. }
  374. } else {
  375. }
  376. dpmgr_enable_event(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC);
  377. dpmgr_enable_event(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE);
  378. pgc->state = 1;
  379. done:
  380. _external_path_unlock();
  381. return ret;
  382. }
  383. // register rdma done event
  384. int external_display_wait_for_idle(void)
  385. {
  386. DISP_STATUS ret = DISP_STATUS_OK;
  387. DISPFUNC();
  388. _external_path_lock();
  389. done:
  390. _external_path_unlock();
  391. return ret;
  392. }
  393. int external_display_wait_for_dump(void)
  394. {
  395. return 0;
  396. }
  397. static long int get_current_time_us(void)
  398. {
  399. return get_timer(0);
  400. }
  401. int external_display_wait_for_vsync(void)
  402. {
  403. int ret = 0;
  404. ret = dpmgr_wait_event(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC);
  405. if (ret == -2) {
  406. DISPCHECK("vsync for external display path not enabled yet\n");
  407. return -1;
  408. }
  409. // pgc->last_vsync_tick = get_current_time_us();
  410. pgc->last_vsync_tick = 0;
  411. return 0;
  412. }
  413. int external_display_suspend(void)
  414. {
  415. DISP_STATUS ret = DISP_STATUS_OK;
  416. DISPFUNC();
  417. _external_path_lock();
  418. dpmgr_path_stop(pgc->dpmgr_handle, CMDQ_DISABLE);
  419. dpmgr_path_reset(pgc->dpmgr_handle, CMDQ_DISABLE);
  420. /* If need close the LCM, when exit lk. We need do disp_lcm_suspend */
  421. /* disp_lcm_suspend(pgc->plcm); */
  422. dpmgr_path_power_off(pgc->dpmgr_handle, CMDQ_DISABLE);
  423. #ifndef DDP_LK_BOOT
  424. cmdqRecStopLoop(pgc->cmdq_handle_trigger);
  425. #endif
  426. /* disp_path_clock_off("External Display Path"); */
  427. pgc->state = 0;
  428. done:
  429. _external_path_unlock();
  430. return ret;
  431. }
  432. int external_display_resume(void)
  433. {
  434. DISP_STATUS ret = DISP_STATUS_OK;
  435. DISPFUNC();
  436. _external_path_lock();
  437. disp_path_clock_on("External Display Path");
  438. pgc->state = 1;
  439. done:
  440. _external_path_unlock();
  441. return ret;
  442. }
  443. int external_display_is_alive(void)
  444. {
  445. unsigned int temp = 0;
  446. DISPFUNC();
  447. _external_path_lock();
  448. temp = pgc->state;
  449. _external_path_unlock();
  450. return temp;
  451. }
  452. int external_display_is_sleepd(void)
  453. {
  454. unsigned int temp = 0;
  455. DISPFUNC();
  456. _external_path_lock();
  457. temp = !pgc->state;
  458. _external_path_unlock();
  459. return temp;
  460. }
  461. int external_display_get_width(void)
  462. {
  463. if (pgc->plcm == NULL) {
  464. pgc->plcm = disp_ext_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  465. DISPMSG("lcm handle is null, after probe:0x%08x\n",pgc->plcm);
  466. if (pgc->plcm == NULL)
  467. return 0;
  468. }
  469. if (pgc->plcm->params) {
  470. return pgc->plcm->params->width;
  471. } else {
  472. DISPERR("lcm_params is null!\n");
  473. return 0;
  474. }
  475. }
  476. int external_display_get_height(void)
  477. {
  478. if (pgc->plcm == NULL) {
  479. pgc->plcm = disp_ext_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  480. DISPMSG("lcm handle is null, after probe:0x%08x\n",pgc->plcm);
  481. if (pgc->plcm == NULL)
  482. return 0;
  483. }
  484. if (pgc->plcm->params) {
  485. return pgc->plcm->params->height;
  486. } else {
  487. DISPERR("lcm_params is null!\n");
  488. return 0;
  489. }
  490. }
  491. int external_display_get_bpp(void)
  492. {
  493. return 32;
  494. }
  495. int external_display_get_info(void *dispif_info)
  496. {
  497. #if 0
  498. memset((void*)dispif_info, 0, sizeof(mtk_dispif_info_t));
  499. switch (pgc->lcm_param->type) {
  500. case LCM_TYPE_DBI: {
  501. dispif_info->displayType = DISPIF_TYPE_DBI;
  502. dispif_info->displayMode = DISPIF_MODE_COMMAND;
  503. dispif_info->isHwVsyncAvailable = 1;
  504. DISPMSG("DISP Info: DBI, CMD Mode, HW Vsync enable\n");
  505. break;
  506. }
  507. case LCM_TYPE_DPI: {
  508. dispif_info->displayType = DISPIF_TYPE_DPI0;
  509. dispif_info->displayMode = DISPIF_MODE_VIDEO;
  510. dispif_info->isHwVsyncAvailable = 1;
  511. DISPMSG("DISP Info: DPI, VDO Mode, HW Vsync enable\n");
  512. break;
  513. }
  514. case LCM_TYPE_DSI: {
  515. dispif_info->displayType = DISPIF_TYPE_DSI0;
  516. if (pgc->lcm_param->dsi.mode == CMD_MODE) {
  517. dispif_info->displayMode = DISPIF_MODE_COMMAND;
  518. dispif_info->isHwVsyncAvailable = 1;
  519. DISPMSG("DISP Info: DSI, CMD Mode, HW Vsync enable\n");
  520. } else {
  521. dispif_info->displayMode = DISPIF_MODE_VIDEO;
  522. dispif_info->isHwVsyncAvailable = 1;
  523. DISPMSG("DISP Info: DSI, VDO Mode, HW Vsync enable\n");
  524. }
  525. break;
  526. }
  527. default:
  528. break;
  529. }
  530. #ifdef MY_TODO
  531. #error
  532. if (disp_if_drv->get_panel_color_format()) {
  533. switch (disp_if_drv->get_panel_color_format()) {
  534. case PANEL_COLOR_FORMAT_RGB565:
  535. dispif_info->displayFormat = DISPIF_FORMAT_RGB565;
  536. case PANEL_COLOR_FORMAT_RGB666:
  537. dispif_info->displayFormat = DISPIF_FORMAT_RGB666;
  538. case PANEL_COLOR_FORMAT_RGB888:
  539. dispif_info->displayFormat = DISPIF_FORMAT_RGB888;
  540. default:
  541. break;
  542. }
  543. }
  544. #endif
  545. dispif_info->displayWidth = external_display_get_width();
  546. dispif_info->displayHeight = external_display_get_height();
  547. #ifdef MY_TODO
  548. #error
  549. dispif_info->vsyncFPS = lcd_fps;
  550. #endif
  551. if (dispif_info->displayWidth * dispif_info->displayHeight <= 240*432) {
  552. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  553. } else if (dispif_info->displayWidth * dispif_info->displayHeight <= 320*480) {
  554. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  555. } else if (dispif_info->displayWidth * dispif_info->displayHeight <= 480*854) {
  556. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  557. } else {
  558. dispif_info->physicalHeight= dispif_info->physicalWidth= 0;
  559. }
  560. dispif_info->isConnected = 1;
  561. #ifdef MY_TODO
  562. #error
  563. {
  564. LCM_PARAMS lcm_params_temp;
  565. memset((void*)&lcm_params_temp, 0, sizeof(lcm_params_temp));
  566. if (lcm_drv) {
  567. lcm_drv->get_params(&lcm_params_temp);
  568. dispif_info->lcmOriginalWidth = lcm_params_temp.width;
  569. dispif_info->lcmOriginalHeight = lcm_params_temp.height;
  570. DISPMSG("DISP Info: LCM Panel Original Resolution(For DFO Only): %d x %d\n", dispif_info->lcmOriginalWidth, dispif_info->lcmOriginalHeight);
  571. } else {
  572. DISPMSG("DISP Info: Fatal Error!!, lcm_drv is null\n");
  573. }
  574. }
  575. #endif
  576. #endif
  577. return 0;
  578. }
  579. int external_display_get_pages(void)
  580. {
  581. return 3;
  582. }
  583. int external_display_config_output()
  584. {
  585. return 0;
  586. }
  587. int external_display_diagnose(void)
  588. {
  589. int ret = 0;
  590. dpmgr_check_status(pgc->dpmgr_handle);
  591. return ret;
  592. }
  593. int external_display_trigger(int blocking)
  594. {
  595. int ret = 0;
  596. DISPFUNC();
  597. int x=0, y=0;
  598. int width = 0, height =0;
  599. x = disp_lcm_x(pgc->plcm);
  600. y = disp_lcm_y(pgc->plcm);
  601. width = disp_lcm_width(pgc->plcm);
  602. height = disp_lcm_height(pgc->plcm);
  603. _external_path_lock();
  604. if (pgc->mode == EXT_DIRECT_LINK_MODE || pgc->mode == EXT_SINGLE_LAYER_MODE) {
  605. if (dpmgr_path_is_busy(pgc->dpmgr_handle)) {
  606. if (external_display_is_video_mode()) {
  607. _external_path_unlock();
  608. return 0;
  609. }
  610. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*1);
  611. }
  612. DISPCHECK("trigger mode: %s\n", (pgc->mode == EXT_DIRECT_LINK_MODE)?"DIRECT_LINK":"SINGLE_LAYER");
  613. disp_lcm_update(pgc->plcm, x, y, width, height, 0);
  614. dpmgr_path_start(pgc->dpmgr_handle, external_display_use_cmdq);
  615. if (external_display_use_cmdq == CMDQ_DISABLE) {
  616. dpmgr_path_trigger(pgc->dpmgr_handle, NULL,external_display_use_cmdq);
  617. }
  618. //_set_cmdq_config_handle_dirty();
  619. //_reset_cmdq_config_handle();
  620. //if(blocking)
  621. {
  622. //dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*2);
  623. }
  624. } else if (pgc->mode == EXT_DECOUPLE_MODE) {
  625. DISPCHECK("trigger mode: DECOUPLE\n");
  626. if (pgc->need_trigger_overlay) {
  627. dpmgr_path_trigger(pgc->ovl2mem_path_handle, NULL,external_display_use_cmdq);
  628. if (blocking) {
  629. dpmgr_wait_event_timeout(pgc->ovl2mem_path_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*2);
  630. }
  631. } else {
  632. if (dpmgr_path_is_busy(pgc->dpmgr_handle) == 0) {
  633. // this request of trigger should be called by AAL or ovl2mem done event
  634. disp_lcm_update(pgc->plcm, x, y, width, height, 0);
  635. dpmgr_path_start(pgc->dpmgr_handle, external_display_use_cmdq);
  636. }
  637. _set_cmdq_config_handle_dirty();
  638. _reset_cmdq_config_handle();
  639. if (blocking) {
  640. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*2);
  641. }
  642. }
  643. } else if (pgc->mode == EXT_DEBUG_RDMA1_DSI1_MODE) {
  644. if (!external_display_is_video_mode() && dpmgr_path_is_busy(pgc->dpmgr_handle) == 0) {
  645. DISPCHECK("trigger mode: DEBUG_RDMA1_DSI0\n");
  646. disp_lcm_update(pgc->plcm, x, y, width, height, 0);
  647. dpmgr_path_start(pgc->dpmgr_handle, CMDQ_DISABLE);
  648. dpmgr_path_trigger(pgc->dpmgr_handle, NULL,external_display_use_cmdq);
  649. }
  650. if (blocking) {
  651. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*5);
  652. }
  653. } else {
  654. DISPCHECK("external display mode is WRONG(%d)\n", (unsigned int)pgc->mode);
  655. }
  656. _external_path_unlock();
  657. //external_display_diagnose();
  658. return ret;
  659. }
  660. int external_display_config_input(disp_input_config* input)
  661. {
  662. int ret = 0;
  663. int i=0;
  664. int layer =0;
  665. DISPFUNC();
  666. disp_ddp_path_config data_config;
  667. // all dirty should be cleared in dpmgr_path_get_last_config()
  668. memcpy((void*)&data_config, (void*)dpmgr_path_get_last_config(pgc->dpmgr_handle), sizeof(disp_ddp_path_config));
  669. // no need do this dirty = 0; dpmgr_path_get_last_config do this.
  670. data_config.dst_dirty = 0;
  671. data_config.ovl_dirty = 0;
  672. data_config.rdma_dirty = 0;
  673. data_config.wdma_dirty = 0;
  674. _external_path_lock();
  675. if (pgc->mode == EXT_DIRECT_LINK_MODE || pgc->mode == EXT_DECOUPLE_MODE) {
  676. if (dpmgr_path_is_busy(pgc->dpmgr_handle)) {
  677. if (external_display_is_video_mode()) {
  678. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*1);
  679. }
  680. }
  681. ret = _convert_disp_input_to_ovl(&(data_config.ovl_config[input->layer]), input);
  682. data_config.ovl_dirty = 1;
  683. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, external_display_use_cmdq);
  684. // this is used for decouple mode, to indicate whether we need to trigger ovl
  685. pgc->need_trigger_overlay = 1;
  686. } else if (pgc->mode == EXT_SINGLE_LAYER_MODE) {
  687. ret = _convert_disp_input_to_rdma(&data_config.rdma_config, input);
  688. data_config.rdma_dirty= 1;
  689. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, external_display_use_cmdq);
  690. } else if (pgc->mode == EXT_DEBUG_RDMA1_DSI1_MODE) {
  691. ret = _convert_disp_input_to_rdma(&(data_config.rdma_config), input);
  692. data_config.rdma_dirty= 1;
  693. if (external_display_is_video_mode() && dpmgr_path_is_busy(pgc->dpmgr_handle) == 1) {
  694. // TODO: should use wait_event_timeout_or_idle
  695. dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*5);
  696. }
  697. ret = dpmgr_path_config(pgc->dpmgr_handle, &data_config, CMDQ_DISABLE);
  698. } else {
  699. DISPCHECK("external display mode is WRONG(%d)\n", (unsigned int)pgc->mode);
  700. }
  701. _external_path_unlock();
  702. return ret;
  703. }
  704. int external_display_is_video_mode(void)
  705. {
  706. //we should store the video/cmd mode in runtime, because will support cmd/vdo dynamic switch
  707. return disp_lcm_is_video_mode(pgc->plcm);
  708. }
  709. int external_display_get_vsync_interval(void)
  710. {
  711. int ret = 0;
  712. unsigned int time0 = 0;
  713. unsigned int time1 = 0;
  714. unsigned int lcd_time = 0;
  715. pgc->plcm->is_connected = false;
  716. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  717. if (ret <= 0)
  718. goto fail;
  719. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  720. if (ret <= 0)
  721. goto fail;
  722. // because we are polling irq status, so the first event should be ignored
  723. time0 = gpt4_tick2time_us(gpt4_get_current_tick());
  724. //DISPMSG("vsync signaled:%d\n", gpt4_tick2time_us(gpt4_get_current_tick()));
  725. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  726. if (ret <= 0)
  727. goto fail;
  728. //DISPMSG("vsync signaled:%d\n", gpt4_tick2time_us(gpt4_get_current_tick()));
  729. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_IF_VSYNC,1000);
  730. if (ret > 0) {
  731. time1 = gpt4_tick2time_us(gpt4_get_current_tick());
  732. } else
  733. goto fail;
  734. lcd_time = (time1 - time0)/2;
  735. pgc->plcm->is_connected = true;
  736. if (0 != lcd_time)
  737. return (100000000/lcd_time);
  738. else
  739. return (6000);
  740. fail:
  741. DISPERR("wait event fail\n");
  742. return 0;
  743. }
  744. int external_display_setbacklight(unsigned int level)
  745. {
  746. DISPMSG("lk %s level=%d\n",__func__,level);
  747. int ret=0;
  748. if (pgc->dpmgr_handle == NULL) {
  749. DISPCHECK("lk set backlight early!\n");
  750. return 0;
  751. }
  752. if (dpmgr_path_is_busy(pgc->dpmgr_handle)) {
  753. DISPCHECK("external display path is busy\n");
  754. ret = dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_DONE, HZ*1);
  755. DISPCHECK("wait frame done ret:%d\n", ret);
  756. }
  757. disp_lcm_set_backlight(pgc->plcm,level);
  758. return 0;
  759. }
  760. /////////////////////////////////////////////////////////////////////////////////////////////////////////////
  761. /***********************/
  762. /*****Legacy DISP API*****/
  763. /***********************/
  764. UINT32 EXT_DISP_GetScreenWidth(void)
  765. {
  766. return external_display_get_width();
  767. }
  768. UINT32 EXT_DISP_GetScreenHeight(void)
  769. {
  770. return external_display_get_height();
  771. }
  772. UINT32 EXT_DISP_GetActiveHeight(void)
  773. {
  774. if (pgc->plcm == NULL) {
  775. pgc->plcm = disp_ext_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  776. DISPERR("lcm handle is null, after probe:0x%08x\n",pgc->plcm);
  777. if (pgc->plcm == NULL)return 0;
  778. }
  779. if (pgc->plcm->params) {
  780. return pgc->plcm->params->physical_height;
  781. } else {
  782. DISPERR("lcm_params is null!\n");
  783. return 0;
  784. }
  785. }
  786. UINT32 EXT_DISP_GetActiveWidth(void)
  787. {
  788. if (pgc->plcm == NULL) {
  789. pgc->plcm = disp_ext_lcm_probe(NULL, LCM_INTERFACE_NOTDEFINED);
  790. DISPERR("lcm handle is null, after probe:0x%08x\n",pgc->plcm);
  791. if (pgc->plcm == NULL)return 0;
  792. }
  793. if (pgc->plcm->params) {
  794. return pgc->plcm->params->physical_width;
  795. } else {
  796. DISPERR("lcm_params is null!\n");
  797. return 0;
  798. }
  799. }
  800. int external_display_capture_framebuffer(unsigned int *pbuf)
  801. {
  802. return 0;
  803. }
  804. UINT32 EXT_DISP_GetPanelBPP(void)
  805. {
  806. #if 0
  807. PANEL_COLOR_FORMAT fmt;
  808. disp_drv_init_context();
  809. if (disp_if_drv->get_panel_color_format == NULL) {
  810. return DISP_STATUS_NOT_IMPLEMENTED;
  811. }
  812. fmt = disp_if_drv->get_panel_color_format();
  813. switch (fmt) {
  814. case PANEL_COLOR_FORMAT_RGB332:
  815. return 8;
  816. case PANEL_COLOR_FORMAT_RGB444:
  817. return 12;
  818. case PANEL_COLOR_FORMAT_RGB565:
  819. return 16;
  820. case PANEL_COLOR_FORMAT_RGB666:
  821. return 18;
  822. case PANEL_COLOR_FORMAT_RGB888:
  823. return 24;
  824. default:
  825. return 0;
  826. }
  827. #endif
  828. return 0;
  829. }
  830. UINT32 EXT_DISP_GetScreenBpp(void)
  831. {
  832. return disp_fb_bpp;
  833. }
  834. UINT32 EXT_DISP_GetPages(void)
  835. {
  836. return disp_fb_pages; // Double Buffers
  837. }
  838. // could we use the same header file between lk/kernel to avoid definition non-match issue?
  839. #define DAL_BPP (2)
  840. #define EXT_DAL_WIDTH (EXT_DISP_GetScreenWidth())
  841. #define EXT_DAL_HEIGHT (EXT_DISP_GetScreenHeight())
  842. UINT32 EXT_DAL_GetLayerSize(void)
  843. {
  844. return EXT_DAL_WIDTH * EXT_DAL_HEIGHT * DAL_BPP + 4096;
  845. }
  846. UINT32 EXT_DISP_GetFBRamSize(void)
  847. {
  848. return ALIGN_TO(EXT_DISP_GetScreenWidth(), MTK_FB_ALIGNMENT) * ALIGN_TO(EXT_DISP_GetScreenHeight(), MTK_FB_ALIGNMENT) * ((EXT_DISP_GetScreenBpp() + 7) >> 3) * EXT_DISP_GetPages();
  849. }
  850. unsigned int EXT_DISP_GetVRamSize(void)
  851. {
  852. static UINT32 vramSize = 0;
  853. unsigned int fb_ram_size =0;
  854. //FB RAM(n blocks)+(Assert layer size)
  855. if (0 == vramSize) {
  856. vramSize = EXT_DISP_GetFBRamSize();
  857. DISPMSG("^^ DISP_GetFBRamSize: %u bytes\n", vramSize);
  858. fb_ram_size = vramSize;
  859. vramSize += EXT_DAL_GetLayerSize();
  860. DISPMSG("^^ DAL_GetLayerSize: %u bytes\n", vramSize-fb_ram_size);
  861. #if 0
  862. if (g_is_64bit_kernel) {
  863. vramSize = ALIGN_TO(vramSize, 0x400000); // both start addr and size needs 2MB align, so size must 4MB align
  864. } else {
  865. vramSize = ALIGN_TO(vramSize, 0x100000); // both start addr and size needs 2MB align, so size must 4MB align
  866. }
  867. #else
  868. vramSize = ALIGN_TO(vramSize, 0x10000); // just align to 64KB is OK
  869. #endif
  870. DISPMSG("^^ DISP_GetVRamSize: %u bytes\n", vramSize);
  871. }
  872. return vramSize;
  873. }