mtk-lk/platform/mt6853/mt_latch.c

/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
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*/
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*
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*/

#include <reg.h>
#include <latch.h>
#include <debug.h>
#include <mt_reg_base.h>
#include <aee_platform_debug.h>
#include <dfd.h>

static unsigned long preisys_dump_offset[] = {
	0x500, /* PERIBUS_DBG0 */
	0x504, /* PERIBUS_DBG1 */
	0x508, /* PERIBUS_DBG2 */
	0x50C, /* PERIBUS_DBG3 */
	0x510, /* PERIBUS_DBG4 */
	0x514, /* PERIBUS_DBG5 */
	0x518, /* PERIBUS_DBG6 */
	0x51C, /* PERIBUS_DBG7 */
	0x520, /* PERIBUS_DBG8 */
	0x524, /* PERIBUS_DBG9 */
	0x528, /* PERIBUS_DBG10 */
	0x52C, /* PERIBUS_DBG11 */
	0x530, /* PERIBUS_DBG12 */
	0x534, /* PERIBUS_DBG13 */
	0x538, /* PERIBUS_DBG14 */
	0x53C, /* PERIBUS_DBG15 */
	0x580, /* PERIBUS_DBG16 */
	0x584, /* PERIBUS_DBG17 */
};

int plt_lastbus_is_timeout(const struct plt_cfg_bus_latch *self)
{
	unsigned int ctrl;
	unsigned long infra_base = INFRACFG_AO_BASE;
	unsigned long peri_base = PERICFG_BASE;

	if (!self) {
		dprintf(CRITICAL, "%s:%d: self is Null\n",
			__func__, __LINE__);
		return 0;
	}

	ctrl = (readl(infra_base + self->infrasys_offsets.bus_infra_ctrl) & 0x1) |
		(readl(peri_base + self->perisys_offsets.bus_peri_r1) & 0x1);

	return ctrl;
}

int plt_infrasys_dump(const struct plt_cfg_bus_latch *self,
					 char *buf, int *wp)
{
	unsigned int i;
	unsigned long infra_base = INFRACFG_AO_BASE;
	unsigned long peri_base = PERICFG_BASE;

	if (readl(infra_base + self->infrasys_offsets.bus_infra_ctrl) & 0x1)
		*wp += snprintf(buf + *wp, LATCH_BUF_LENGTH - *wp, "[LAST BUS] INFRASYS TIMEOUT:\n");

	if (readl(peri_base + self->perisys_offsets.bus_peri_r1) & 0x1)
		*wp += snprintf(buf + *wp, LATCH_BUF_LENGTH - *wp, "[LAST BUS] PERISYS TIMEOUT:\n");

	if (self->num_infrasys_mon != 0) {
		for (i = 0; i <= self->num_infrasys_mon-1; ++i)
			*wp += snprintf(buf + *wp, LATCH_BUF_LENGTH - *wp, "%08x\n",
				       readl(infra_base + self->infrasys_offsets.bus_infra_snapshot + 4*i));
	}

	return 0;
}

int plt_perisys_dump(const struct plt_cfg_bus_latch *self,
					char *buf, int *wp)
{
	unsigned int i;
	unsigned long peri_base = PERICFG_BASE;

	if (self->num_perisys_mon != 0) {
		for (i = 0; i <= self->num_perisys_mon-1; ++i)
			*wp += snprintf(buf + *wp, LATCH_BUF_LENGTH - *wp, "%08x\n",
			               readl(peri_base + preisys_dump_offset[i]));
	}

	return 0;
}

void plt_setup_dfd_file_name(const struct plt_cfg_dfd *cfg_dfd)
{
	struct aee_db_file_info *files;

	files = get_file_info();
	strcpy(files[AEE_PLAT_DFD20].filename, "DFD.dfd");
	files[AEE_PLAT_DFD20].filesize = (unsigned int)cfg_dfd->large_buffer_length;
}

int lastbus_init_v2_init_w_clr(const struct lastbus_monitor *m)
{
	/* clear timeout status with DBG_CKEN */
	writel(0x208, m->base);

	/* de-assert clear bit with DBG_CKEN */
	writel(0x8, m->base);

	/* timeout_threshold: 200 ms */
	writel(0x3c170008, m->base);
	writel(0x3c17000c, m->base);

	return 0;

}

/*
 * XXX
 * workaround for mt6873
 * skip unnecessary timeout condition from master and slave
 *
 */
int lastbus_init_v2_infra_ao_init(const struct lastbus_monitor *m)
{
	/* clear timeout status with DBG_CKEN */
	writel(0x208, m->base);

	/* de-assert clear bit with DBG_CKEN */
	writel(0x8, m->base);

	/* disable master/slave idle */
	writel(0x1, (unsigned long)m->base + 0x004);
	writel(0x40, (unsigned long)m->base + 0x008);
	writel(0x1f86, (unsigned long)m->base + 0x00c);
	writel(0x600, (unsigned long)m->base + 0x010);

	/* timeout_threshold: 200 ms */
	writel(0x3c170008, m->base);
	writel(0x3c17000c, m->base);

	return 0;
}

int lastbus_init_v2_peri_ao_init(const struct lastbus_monitor *m)
{
	/* clear timeout status with DBG_CKEN */
	writel(0x208, m->base);

	/* de-assert clear bit with DBG_CKEN */
	writel(0x8, m->base);

	/* disable master/slave idle */
	writel(0x80000080, (unsigned long)m->base + 0x008);
	writel(0x3800001f, (unsigned long)m->base + 0x00c);

	/* timeout_threshold: 200 ms*/
	writel(0x3c170008, m->base);
	writel(0x3c17000c, m->base);

	return 0;
}

int lastbus_init_v2_fmem_ao_init(const struct lastbus_monitor *m)
{
	/* clear timeout status with DBG_CKEN */
	writel(0x208, m->base);

	/* de-assert clear bit with DBG_CKEN */
	writel(0x8, m->base);

	/* disable master/slave idle */
	writel(0x00200000, (unsigned long)m->base + 0x008);

	/* timeout_threshold: 200 ms */
	writel(0x3c170008, m->base);
	writel(0x3c71000c, m->base);

	return 0;
}

/* XXX */
#define DFD_STATUS	(0x0c53e0a4)

unsigned int plat_dfd_trigger_status(void)
{
	return readl(DFD_STATUS);

}

void plat_dump_dfd_status(void)
{
	dprintf(CRITICAL, "[dfd] dfd_trigger_status: 0x%x\n", plat_dfd_trigger_status());
}