sec_efuse.c 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123
  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <platform/mt_pmic.h>
  32. #include <platform/mtk_wdt.h>
  33. #include <platform/mt_gpt.h>
  34. #define EFUSE_PMIC_CONTROL_ENABLE 1
  35. /**************************************************************
  36. * WDT
  37. **************************************************************/
  38. void efuse_wdt_restart(void)
  39. {
  40. mtk_wdt_restart();
  41. }
  42. /****************************************************
  43. * Fsource
  44. * return 0 : success
  45. ****************************************************/
  46. U32 efuse_fsource_set(void)
  47. {
  48. U32 ret_val = 0;
  49. #if EFUSE_PMIC_CONTROL_ENABLE
  50. /* 1.8V */
  51. ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_VEFUSE_VOSEL_ADDR),
  52. (kal_uint32)(0xC),
  53. (kal_uint32)(PMIC_RG_VEFUSE_VOSEL_MASK),
  54. (kal_uint32)(PMIC_RG_VEFUSE_VOSEL_SHIFT)
  55. );
  56. /* +0mV */
  57. ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_VEFUSE_VOCAL_ADDR),
  58. (kal_uint32)(0x0),
  59. (kal_uint32)(PMIC_RG_VEFUSE_VOCAL_MASK),
  60. (kal_uint32)(PMIC_RG_VEFUSE_VOCAL_SHIFT)
  61. );
  62. /* Fsource(VEFUSE) enabled */
  63. ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
  64. (kal_uint32)(0x1),
  65. (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
  66. (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
  67. );
  68. mdelay(10);
  69. #endif
  70. return ret_val;
  71. }
  72. U32 efuse_fsource_close(void)
  73. {
  74. U32 ret_val = 0;
  75. #if EFUSE_PMIC_CONTROL_ENABLE
  76. /* Fsource(VEFUSE) disable */
  77. ret_val |= pmic_config_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
  78. (kal_uint32)(0x0),
  79. (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
  80. (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
  81. );
  82. mdelay(10);
  83. #endif
  84. return ret_val;
  85. }
  86. U32 efuse_fsource_is_enabled(void)
  87. {
  88. U32 regVal = 0;
  89. #if EFUSE_PMIC_CONTROL_ENABLE
  90. /* Check Fsource(VEFUSE) Status */
  91. pmic_read_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
  92. &regVal,
  93. (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
  94. (kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
  95. );
  96. /* return 1 : fsource enabled
  97. * return 0 : fsource disabled */
  98. #endif
  99. return regVal;
  100. }