bq25890.c 34 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2015. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #include <platform/mt_typedefs.h>
  32. #include <platform/mt_reg_base.h>
  33. #include <platform/mt_i2c.h>
  34. #include <platform/mt_pmic.h>
  35. #include <platform/bq25890.h>
  36. #include <printf.h>
  37. #include <platform/mt_pumpexpress.h>
  38. #if !defined(CONFIG_POWER_EXT)
  39. #include <platform/upmu_common.h>
  40. #endif
  41. int g_log_en=0;
  42. /**********************************************************
  43. *
  44. * [I2C Slave Setting]
  45. *
  46. *********************************************************/
  47. #define BQ25890_SLAVE_ADDR_WRITE 0xD4
  48. #define BQ25890_SLAVE_ADDR_READ 0xD5
  49. #define PRECC_BATVOL 2800 //preCC 2.8V
  50. /**********************************************************
  51. *
  52. * [Global Variable]
  53. *
  54. *********************************************************/
  55. kal_uint8 bq25890_reg[bq25890_REG_NUM] = {0};
  56. int g_bq25890_hw_exist=0;
  57. /**********************************************************
  58. *
  59. * [I2C Function For Read/Write bq25890]
  60. *
  61. *********************************************************/
  62. #define BQ25890_I2C_ID I2C1
  63. static struct mt_i2c_t bq25890_i2c;
  64. kal_uint32 bq25890_write_byte(kal_uint8 cmd, kal_uint8 writeData)
  65. {
  66. kal_uint32 ret_code = I2C_OK;
  67. kal_uint8 write_data[2];
  68. kal_uint16 len;
  69. write_data[0]= cmd;
  70. write_data[1] = writeData;
  71. bq25890_i2c.id = BQ25890_I2C_ID;
  72. /* Since i2c will left shift 1 bit, we need to set I2C address to >>1 */
  73. bq25890_i2c.addr = (BQ25890_SLAVE_ADDR_WRITE >> 1);
  74. bq25890_i2c.mode = ST_MODE;
  75. bq25890_i2c.speed = 100;
  76. len = 2;
  77. ret_code = i2c_write(&bq25890_i2c, write_data, len);
  78. if (I2C_OK != ret_code)
  79. dprintf(INFO, "%s: i2c_write: ret_code: %d\n", __func__, ret_code);
  80. return ret_code;
  81. }
  82. kal_uint32 bq25890_read_byte(kal_uint8 cmd, kal_uint8 *returnData)
  83. {
  84. kal_uint32 ret_code = I2C_OK;
  85. kal_uint16 len;
  86. *returnData = cmd;
  87. bq25890_i2c.id = BQ25890_I2C_ID;
  88. /* Since i2c will left shift 1 bit, we need to set I2C address to >>1 */
  89. bq25890_i2c.addr = (BQ25890_SLAVE_ADDR_READ >> 1);
  90. bq25890_i2c.mode = ST_MODE;
  91. bq25890_i2c.speed = 100;
  92. len = 1;
  93. ret_code = i2c_write_read(&bq25890_i2c, returnData, len, len);
  94. if (I2C_OK != ret_code)
  95. dprintf(INFO, "%s: i2c_read: ret_code: %d\n", __func__, ret_code);
  96. return ret_code;
  97. }
  98. /**********************************************************
  99. *
  100. * [Read / Write Function]
  101. *
  102. *********************************************************/
  103. kal_uint32 bq25890_read_interface (kal_uint8 RegNum, kal_uint8 *val, kal_uint8 MASK, kal_uint8 SHIFT)
  104. {
  105. kal_uint8 bq25890_reg = 0;
  106. kal_uint32 ret = 0;
  107. dprintf(INFO, "--------------------------------------------------LK\n");
  108. ret = bq25890_read_byte(RegNum, &bq25890_reg);
  109. dprintf(INFO, "[bq25890_read_interface] Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  110. bq25890_reg &= (MASK << SHIFT);
  111. *val = (bq25890_reg >> SHIFT);
  112. dprintf(INFO, "[bq25890_read_interface] val=0x%x\n", *val);
  113. return ret;
  114. }
  115. kal_uint32 bq25890_config_interface (kal_uint8 RegNum, kal_uint8 val, kal_uint8 MASK, kal_uint8 SHIFT)
  116. {
  117. kal_uint8 bq25890_reg = 0;
  118. kal_uint32 ret = 0;
  119. dprintf(INFO, "--------------------------------------------------\n");
  120. ret = bq25890_read_byte(RegNum, &bq25890_reg);
  121. dprintf(INFO, "[bq25890_config_interface] Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  122. bq25890_reg &= ~(MASK << SHIFT);
  123. bq25890_reg |= (val << SHIFT);
  124. if (RegNum == bq25890_CON1 && val == 1 && MASK ==CON1_RESET_MASK && SHIFT == CON1_RESET_SHIFT) {
  125. // RESET bit
  126. } else if (RegNum == bq25890_CON1) {
  127. bq25890_reg &= ~0x80; //RESET bit read returs 1, so clear it
  128. }
  129. ret = bq25890_write_byte(RegNum, bq25890_reg);
  130. dprintf(INFO, "[bq25890_config_interface] write Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  131. // Check
  132. //bq25890_read_byte(RegNum, &bq25890_reg);
  133. //printk("[bq25890_config_interface] Check Reg[%x]=0x%x\n", RegNum, bq25890_reg);
  134. return ret;
  135. }
  136. //write one register directly
  137. kal_uint32 bq25890_reg_config_interface (kal_uint8 RegNum, kal_uint8 val)
  138. {
  139. kal_uint32 ret = 0;
  140. ret = bq25890_write_byte(RegNum, val);
  141. return ret;
  142. }
  143. /**********************************************************
  144. *
  145. * [Internal Function]
  146. *
  147. *********************************************************/
  148. //CON0----------------------------------------------------
  149. void bq25890_set_en_hiz(kal_uint32 val)
  150. {
  151. kal_uint32 ret=0;
  152. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON0),
  153. (kal_uint8)(val),
  154. (kal_uint8)(CON0_EN_HIZ_MASK),
  155. (kal_uint8)(CON0_EN_HIZ_SHIFT)
  156. );
  157. }
  158. void bq25890_set_en_ilim(kal_uint32 val)
  159. {
  160. kal_uint32 ret=0;
  161. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON0),
  162. (kal_uint8)(val),
  163. (kal_uint8)(CON0_EN_ILIM_MASK),
  164. (kal_uint8)(CON0_EN_ILIM_SHIFT)
  165. );
  166. }
  167. void bq25890_set_iinlim(kal_uint32 val)
  168. {
  169. kal_uint32 ret=0;
  170. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON0),
  171. (val),
  172. (kal_uint8)(CON0_IINLIM_MASK),
  173. (kal_uint8)(CON0_IINLIM_SHIFT)
  174. );
  175. }
  176. //CON1----------------------------------------------------
  177. void bq25890_ADC_start(kal_uint32 val)
  178. {
  179. kal_uint32 ret=0;
  180. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON2),
  181. (kal_uint8)(val),
  182. (kal_uint8)(CON2_CONV_START_MASK),
  183. (kal_uint8)(CON2_CONV_START_SHIFT)
  184. );
  185. }
  186. void bq25890_set_ADC_rate(kal_uint32 val)
  187. {
  188. kal_uint32 ret=0;
  189. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON2),
  190. (kal_uint8)(val),
  191. (kal_uint8)(CON2_CONV_RATE_MASK),
  192. (kal_uint8)(CON2_CONV_RATE_SHIFT)
  193. );
  194. }
  195. void bq25890_set_vindpm_os(kal_uint32 val)
  196. {
  197. kal_uint32 ret=0;
  198. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON1),
  199. (kal_uint8)(val),
  200. (kal_uint8)(CON1_VINDPM_OS_MASK),
  201. (kal_uint8)(CON1_VINDPM_OS_SHIFT)
  202. );
  203. }
  204. //CON2----------------------------------------------------
  205. void bq25890_set_ico_en_start(kal_uint32 val)
  206. {
  207. kal_uint32 ret=0;
  208. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON2),
  209. (kal_uint8)(val),
  210. (kal_uint8)(CON2_ICO_EN_MASK),
  211. (kal_uint8)(CON2_ICO_EN_RATE_SHIFT)
  212. );
  213. }
  214. //CON3----------------------------------------------------
  215. void bq25890_wd_reset(kal_uint32 val)
  216. {
  217. kal_uint32 ret=0;
  218. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  219. (val),
  220. (kal_uint8)(CON3_WD_MASK),
  221. (kal_uint8)(CON3_WD_SHIFT)
  222. );
  223. }
  224. void bq25890_otg_en(kal_uint32 val)
  225. {
  226. kal_uint32 ret=0;
  227. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  228. (val),
  229. (kal_uint8)(CON3_OTG_CONFIG_MASK),
  230. (kal_uint8)(CON3_OTG_CONFIG_SHIFT)
  231. );
  232. }
  233. void bq25890_chg_en(kal_uint32 val)
  234. {
  235. kal_uint32 ret=0;
  236. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  237. (val),
  238. (kal_uint8)(CON3_CHG_CONFIG_MASK),
  239. (kal_uint8)(CON3_CHG_CONFIG_SHIFT)
  240. );
  241. }
  242. void bq25890_set_sys_min(kal_uint32 val)
  243. {
  244. kal_uint32 ret=0;
  245. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON3),
  246. (val),
  247. (kal_uint8)(CON3_SYS_V_LIMIT_MASK),
  248. (kal_uint8)(CON3_SYS_V_LIMIT_SHIFT)
  249. );
  250. }
  251. //CON4----------------------------------------------------
  252. void bq25890_en_pumpx(kal_uint32 val)
  253. {
  254. kal_uint32 ret=0;
  255. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON4),
  256. (kal_uint8)(val),
  257. (kal_uint8)(CON4_EN_PUMPX_MASK),
  258. (kal_uint8)(CON4_EN_PUMPX_SHIFT)
  259. );
  260. }
  261. void bq25890_set_ichg(kal_uint32 val)
  262. {
  263. kal_uint32 ret=0;
  264. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON4),
  265. (kal_uint8)(val),
  266. (kal_uint8)(CON4_ICHG_MASK),
  267. (kal_uint8)(CON4_ICHG_SHIFT)
  268. );
  269. }
  270. //CON5----------------------------------------------------
  271. void bq25890_set_iprechg(kal_uint32 val)
  272. {
  273. kal_uint32 ret=0;
  274. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON5),
  275. (val),
  276. (kal_uint8)(CON5_IPRECHG_MASK),
  277. (kal_uint8)(CON5_IPRECHG_SHIFT)
  278. );
  279. }
  280. void bq25890_set_iterml(kal_uint32 val)
  281. {
  282. kal_uint32 ret=0;
  283. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON5),
  284. (val),
  285. (kal_uint8)(CON5_ITERM_MASK),
  286. (kal_uint8)(CON5_ITERM_SHIFT)
  287. );
  288. }
  289. //CON6----------------------------------------------------
  290. void bq25890_set_vreg(kal_uint32 val)
  291. {
  292. kal_uint32 ret=0;
  293. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON6),
  294. (kal_uint8)(val),
  295. (kal_uint8)(CON6_2XTMR_EN_MASK),
  296. (kal_uint8)(CON6_2XTMR_EN_SHIFT)
  297. );
  298. }
  299. void bq25890_set_batlowv(kal_uint32 val)
  300. {
  301. kal_uint32 ret=0;
  302. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON6),
  303. (kal_uint8)(val),
  304. (kal_uint8)(CON6_BATLOWV_MASK),
  305. (kal_uint8)(CON6_BATLOWV_SHIFT)
  306. );
  307. }
  308. void bq25890_set_vrechg(kal_uint32 val)
  309. {
  310. kal_uint32 ret=0;
  311. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON6),
  312. (kal_uint8)(val),
  313. (kal_uint8)(CON6_VRECHG_MASK),
  314. (kal_uint8)(CON6_VRECHG_SHIFT)
  315. );
  316. }
  317. //CON7----------------------------------------------------
  318. void bq25890_en_term_chg(kal_uint32 val)
  319. {
  320. kal_uint32 ret=0;
  321. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  322. (kal_uint8)(val),
  323. (kal_uint8)(CON7_EN_TERM_CHG_MASK),
  324. (kal_uint8)(CON7_EN_TERM_CHG_SHIFT)
  325. );
  326. }
  327. void bq25890_en_state_dis(kal_uint32 val)
  328. {
  329. kal_uint32 ret=0;
  330. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  331. (kal_uint8)(val),
  332. (kal_uint8)(CON7_STAT_DIS_MASK),
  333. (kal_uint8)(CON7_STAT_DIS_SHIFT)
  334. );
  335. }
  336. void bq25890_set_wd_timer(kal_uint32 val)
  337. {
  338. kal_uint32 ret=0;
  339. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  340. (kal_uint8)(val),
  341. (kal_uint8)(CON7_WTG_TIM_SET_MASK),
  342. (kal_uint8)(CON7_WTG_TIM_SET_SHIFT)
  343. );
  344. }
  345. void bq25890_en_chg_timer(kal_uint32 val)
  346. {
  347. kal_uint32 ret=0;
  348. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  349. (kal_uint8)(val),
  350. (kal_uint8)(CON7_EN_TIM_MASK),
  351. (kal_uint8)(CON7_EN_TIMG_SHIFT)
  352. );
  353. }
  354. void bq25890_set_chg_timer(kal_uint32 val)
  355. {
  356. kal_uint32 ret=0;
  357. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON7),
  358. (kal_uint8)(val),
  359. (kal_uint8)(CON7_SET_CHG_TIM_MASK),
  360. (kal_uint8)(CON7_SET_CHG_TIM_SHIFT)
  361. );
  362. }
  363. //CON8---------------------------------------------------
  364. void bq25890_set_thermal_regulation(kal_uint32 val)
  365. {
  366. kal_uint32 ret=0;
  367. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON8),
  368. (kal_uint8)(val),
  369. (kal_uint8)(CON8_TREG_MASK),
  370. (kal_uint8)(CON8_TREG_SHIFT)
  371. );
  372. }
  373. void bq25890_set_VBAT_clamp(kal_uint32 val)
  374. {
  375. kal_uint32 ret=0;
  376. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON8),
  377. (kal_uint8)(val),
  378. (kal_uint8)(CON8_VCLAMP_MASK),
  379. (kal_uint8)(CON8_VCLAMP_SHIFT)
  380. );
  381. }
  382. void bq25890_set_VBAT_IR_compensation(kal_uint32 val)
  383. {
  384. kal_uint32 ret=0;
  385. ret=bq25890_config_interface( (kal_uint8)(bq25890_CON8),
  386. (kal_uint8)(val),
  387. (kal_uint8)(CON8_BAT_COMP_MASK),
  388. (kal_uint8)(CON8_BAT_COMP_SHIFT)
  389. );
  390. }
  391. //CON9----------------------------------------------------
  392. void bq25890_set_BATFET_DLY(kal_uint32 val)
  393. {
  394. bq25890_config_interface( (kal_uint8)(bq25890_CON9),
  395. (kal_uint8)(val),
  396. (kal_uint8)(CON9_BATFET_DLY_MASK),
  397. (kal_uint8)(CON9_BATFET_DLY_SHIFT)
  398. );
  399. }
  400. void bq25890_set_BATFET_RST_EN(kal_uint32 val)
  401. {
  402. bq25890_config_interface( (kal_uint8)(bq25890_CON9),
  403. (kal_uint8)(val),
  404. (kal_uint8)(CON9_BATFET_RST_EN_MASK),
  405. (kal_uint8)(CON9_BATFET_RST_EN_SHIFT)
  406. );
  407. }
  408. //CONA----------------------------------------------------
  409. void bq25890_set_boost_ilim(kal_uint32 val)
  410. {
  411. kal_uint32 ret=0;
  412. ret=bq25890_config_interface( (kal_uint8)(bq25890_CONA),
  413. (kal_uint8)(val),
  414. (kal_uint8)(CONA_BOOST_ILIM_MASK),
  415. (kal_uint8)(CONA_BOOST_ILIM_SHIFT)
  416. );
  417. }
  418. void bq25890_set_boost_vlim(kal_uint32 val)
  419. {
  420. kal_uint32 ret=0;
  421. ret=bq25890_config_interface( (kal_uint8)(bq25890_CONA),
  422. (kal_uint8)(val),
  423. (kal_uint8)(CONA_BOOST_VLIM_MASK),
  424. (kal_uint8)(CONA_BOOST_VLIM_SHIFT)
  425. );
  426. }
  427. //CONB----------------------------------------------------
  428. kal_uint32 bq25890_get_vbus_state(void )
  429. {
  430. kal_uint32 ret=0;
  431. kal_uint8 val=0;
  432. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  433. (&val),
  434. (kal_uint8)(CONB_VBUS_STAT_MASK),
  435. (kal_uint8)(CONB_VBUS_STAT_SHIFT)
  436. );
  437. return val;
  438. }
  439. kal_uint32 bq25890_get_chrg_state(void )
  440. {
  441. kal_uint32 ret=0;
  442. kal_uint8 val=0;
  443. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  444. (&val),
  445. (kal_uint8)(CONB_CHRG_STAT_MASK),
  446. (kal_uint8)(CONB_CHRG_STAT_SHIFT)
  447. );
  448. return val;
  449. }
  450. kal_uint32 bq25890_get_pg_state(void )
  451. {
  452. kal_uint32 ret=0;
  453. kal_uint8 val=0;
  454. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  455. (&val),
  456. (kal_uint8)(CONB_PG_STAT_MASK),
  457. (kal_uint8)(CONB_PG_STAT_SHIFT)
  458. );
  459. return val;
  460. }
  461. kal_uint32 bq25890_get_sdp_state(void )
  462. {
  463. kal_uint32 ret=0;
  464. kal_uint8 val=0;
  465. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  466. (&val),
  467. (kal_uint8)(CONB_SDP_STAT_MASK),
  468. (kal_uint8)(CONB_SDP_STAT_SHIFT)
  469. );
  470. return val;
  471. }
  472. kal_uint32 bq25890_get_vsys_state(void )
  473. {
  474. kal_uint32 ret=0;
  475. kal_uint8 val=0;
  476. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONB),
  477. (&val),
  478. (kal_uint8)(CONB_VSYS_STAT_MASK),
  479. (kal_uint8)(CONB_VSYS_STAT_SHIFT)
  480. );
  481. return val;
  482. }
  483. //CON0C----------------------------------------------------
  484. kal_uint32 bq25890_get_wdt_state(void )
  485. {
  486. kal_uint32 ret=0;
  487. kal_uint8 val=0;
  488. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  489. (&val),
  490. (kal_uint8)(CONB_WATG_STAT_MASK),
  491. (kal_uint8)(CONB_WATG_STAT_SHIFT)
  492. );
  493. return val;
  494. }
  495. kal_uint32 bq25890_get_boost_state(void )
  496. {
  497. kal_uint32 ret=0;
  498. kal_uint8 val=0;
  499. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  500. (&val),
  501. (kal_uint8)(CONB_BOOST_STAT_MASK),
  502. (kal_uint8)(CONB_BOOST_STAT_SHIFT)
  503. );
  504. return val;
  505. }
  506. kal_uint32 bq25890_get_chrg_fault_state(void)
  507. {
  508. kal_uint32 ret=0;
  509. kal_uint8 val=0;
  510. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  511. (&val),
  512. (kal_uint8)(CONB_CHRG_STAT_MASK),
  513. (kal_uint8)(CONB_CHRG_STAT_SHIFT)
  514. );
  515. return val;
  516. }
  517. kal_uint32 bq25890_get_bat_state(void)
  518. {
  519. kal_uint32 ret=0;
  520. kal_uint8 val=0;
  521. ret=bq25890_read_interface( (kal_uint8)(bq25890_CONC),
  522. (&val),
  523. (kal_uint8)(CONB_BAT_STAT_MASK),
  524. (kal_uint8)(CONB_BAT_STAT_SHIFT)
  525. );
  526. return val;
  527. }
  528. //COND
  529. void bq25890_set_FORCE_VINDPM(kal_uint32 val)
  530. {
  531. kal_uint32 ret=0;
  532. ret=bq25890_config_interface( (kal_uint8)(bq25890_COND),
  533. (kal_uint8)(val),
  534. (kal_uint8)(COND_FORCE_VINDPM_MASK),
  535. (kal_uint8)(COND_FORCE_VINDPM_SHIFT)
  536. );
  537. return val;
  538. }
  539. void bq25890_set_VINDPM(kal_uint32 val)
  540. {
  541. kal_uint32 ret=0;
  542. ret=bq25890_config_interface( (kal_uint8)(bq25890_COND),
  543. (kal_uint8)(val),
  544. (kal_uint8)(COND_VINDPM_MASK),
  545. (kal_uint8)(COND_VINDPM_SHIFT)
  546. );
  547. return val;
  548. }
  549. //CON12
  550. kal_uint32 bq25890_get_ichg(void )
  551. {
  552. kal_uint32 ret=0;
  553. kal_uint8 val=0;
  554. ret=bq25890_read_interface( (kal_uint8)(bq25890_CON12),
  555. (&val),
  556. (kal_uint8)(CONB_ICHG_STAT_MASK),
  557. (kal_uint8)(CONB_ICHG_STAT_SHIFT)
  558. );
  559. return val;
  560. }
  561. //CON13 ///
  562. kal_uint32 bq25890_get_idpm_state(void )
  563. {
  564. kal_uint32 ret=0;
  565. kal_uint8 val=0;
  566. ret=bq25890_read_interface( (kal_uint8)(bq25890_CON13),
  567. (&val),
  568. (kal_uint8)(CONB_IDPM_STAT_MASK),
  569. (kal_uint8)(CONB_IDPM_STAT_SHIFT)
  570. );
  571. return val;
  572. }
  573. /**********************************************************
  574. *
  575. * [Internal Function]
  576. *
  577. *********************************************************/
  578. void bq25890_dump_register(void)
  579. {
  580. kal_uint8 i=0;
  581. dprintf(CRITICAL, "[bq25890] ");
  582. bq25890_ADC_start(0x1);
  583. for (i=0; i<bq25890_REG_NUM; i++) {
  584. bq25890_read_byte(i, &bq25890_reg[i]);
  585. dprintf(CRITICAL, "[0x%x]=0x%x\n", i, bq25890_reg[i]);
  586. }
  587. dprintf(CRITICAL, "\n");
  588. }
  589. void bq25890_hw_init(void)
  590. {
  591. bq25890_set_wd_timer(0); // disable wdt
  592. bq25890_otg_en(0); // Disable OTG boost
  593. bq25890_en_chg_timer(1); // Disable Safty timer
  594. bq25890_set_iterml(0x2); // ITERM = TBD 0x02=128mAi
  595. /*Set VBAT = 4.352 V*/
  596. bq25890_set_vreg(0x20);
  597. /*VBAT IR compensation*/
  598. bq25890_set_VBAT_clamp(0x7);/*4.352V + 0.224 V*/
  599. bq25890_set_VBAT_IR_compensation(0x4); /*80mohm*/
  600. /*precharge2cc voltage,BATLOWV, 3.0V*/
  601. bq25890_set_batlowv(0x1);
  602. /*PreCC mode*/
  603. /* precharge current default 0x1:128mA 0xF:1088mA
  604. * Note: 1A is forbidden for dead battery
  605. */
  606. bq25890_set_iprechg(0x1);
  607. /* ICHG 2048mA*/
  608. bq25890_set_ichg(0x20);
  609. /*Iinlim = 3.25mA*/
  610. bq25890_set_iinlim(0x3F);
  611. //bq25890_set_vindpm_off(0); // VINDPM_OFFSET = 0 : 4.2V ; 1 for 10.1 V
  612. //bq25890_set_vindpm_os(0x4); // VINDPM_OFFSET + CODE x 2%
  613. bq25890_set_FORCE_VINDPM(1); //1 or 0 for absolute or relative vth
  614. bq25890_set_VINDPM(0x13); //4.5V
  615. /*Thermal regulation : TBD*/
  616. //bq25890_set_ts_en(0);
  617. bq25890_set_en_hiz(0x0);
  618. /* Disable HVDCP and MaxCharge */
  619. bq25890_config_interface(bq25890_CON2, 0, CON2_MAXC_EN_MASK, CON2_MAXC_EN_SHIFT);
  620. bq25890_config_interface(bq25890_CON2, 0, CON2_HVDCP_EN_MASK, CON2_HVDCP_EN_SHIFT);
  621. //if(get_mt6351_pmic_chip_version() < PMIC6351_E3_CID_CODE)
  622. //bq25890_set_vbreg(0x19); //TBD battery regulation
  623. //else
  624. //bq25890_set_vbreg(0x23); //TBD battery regulation
  625. }
  626. static CHARGER_TYPE g_chr_type_num = CHARGER_UNKNOWN;
  627. int hw_charging_get_charger_type(void);
  628. extern int g_std_ac_large_current_en;
  629. void bq25890_charging_enable(kal_uint32 bEnable)
  630. {
  631. if (KAL_TRUE == bEnable)
  632. bq25890_chg_en(0x1); // charger enable
  633. else
  634. bq25890_chg_en(0); // charger disable
  635. dprintf(CRITICAL, "[BATTERY:bq25890] charger enable/disable %d !\r\n", bEnable);
  636. #if 0
  637. int temp_CC_value = 0;
  638. kal_int32 bat_val = 0;
  639. if (CHARGER_UNKNOWN == g_chr_type_num && KAL_TRUE == upmu_is_chr_det()) {
  640. hw_charging_get_charger_type();
  641. dprintf(CRITICAL, "[BATTERY:bq25896] charger type: %d\n", g_chr_type_num);
  642. }
  643. bat_val = get_i_sense_volt(1);
  644. if (g_chr_type_num == STANDARD_CHARGER) {
  645. if (g_std_ac_large_current_en==1) {
  646. temp_CC_value = 2000;
  647. bq25890_set_iinlim(0x28); //IN current limit at 2A
  648. if (bat_val < PRECC_BATVOL)
  649. bq25890_set_ichg(0x0); //Pre-Charging Current Limit at 500ma
  650. else
  651. bq25890_set_ichg(0x18); //Fast Charging Current Limit at 2A
  652. } else {
  653. temp_CC_value = 1200;
  654. bq25890_set_iinlim(0x4); //IN current limit at 1200mA or 1.5mA for bq24196
  655. if (bat_val < PRECC_BATVOL)
  656. bq25890_set_ichg(0x0); //Pre-Charging Current Limit at 500ma
  657. else
  658. bq25890_set_ichg(0x8); //Fast Charging Current Limit at 1A
  659. }
  660. } else if (g_chr_type_num == STANDARD_HOST \
  661. || g_chr_type_num == CHARGING_HOST \
  662. || g_chr_type_num == NONSTANDARD_CHARGER) {
  663. temp_CC_value = 500;
  664. bq25890_set_iinlim(0x2); //IN current limit at 500mA
  665. bq25890_set_ichg(0); //Fast Charging Current Limit at 500mA
  666. } else {
  667. temp_CC_value = 500;
  668. bq25890_set_iinlim(0x2); //IN current limit at 500mA
  669. bq25890_set_ichg(0); //Fast Charging Current Limit at 500mA
  670. }
  671. if (KAL_TRUE == bEnable)
  672. bq25890_chg_en(0x1); // charger enable
  673. else
  674. bq25890_chg_en(0); // charger disable
  675. bq25890_wd_reset(1);
  676. dprintf(INFO, "[BATTERY:bq24196] bq24196_set_ac_current(), CC value(%dmA) \r\n", temp_CC_value);
  677. dprintf(INFO, "[BATTERY:bq24196] charger enable/disable %d !\r\n", bEnable);
  678. #endif
  679. }
  680. #if defined(CONFIG_POWER_EXT)
  681. int hw_charging_get_charger_type(void)
  682. {
  683. g_chr_type_num = STANDARD_HOST;
  684. return STANDARD_HOST;
  685. }
  686. #else
  687. extern void Charger_Detect_Init(void);
  688. extern void Charger_Detect_Release(void);
  689. extern void mdelay (unsigned long msec);
  690. extern void pmic_set_register_value(PMU_FLAGS_LIST_ENUM flagname,kal_uint32 val);
  691. extern kal_uint16 pmic_get_register_value(PMU_FLAGS_LIST_ENUM flagname);
  692. static void hw_bc11_dump_register(void)
  693. {
  694. #if defined(PMIC_CHIP_MT6355)
  695. #else
  696. dprintf(INFO, "Reg[0x%x]=0x%x,Reg[0x%x]=0x%x\n",
  697. MT6351_CHR_CON20, upmu_get_reg_value(MT6351_CHR_CON20),
  698. MT6351_CHR_CON21, upmu_get_reg_value(MT6351_CHR_CON21)
  699. );
  700. #endif
  701. }
  702. static void hw_bc11_init(void)
  703. {
  704. mdelay(300);
  705. #if CHARGER_DETECTION
  706. Charger_Detect_Init();
  707. #endif
  708. #if defined(PMIC_CHIP_MT6355)
  709. #else
  710. //RG_bc11_BIAS_EN=1
  711. pmic_set_register_value(MT6351_PMIC_RG_BC11_BIAS_EN, 0x1);//mt6351_upmu_set_rg_bc11_bias_en(0x1);
  712. //RG_bc11_VSRC_EN[1:0]=00
  713. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x0);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  714. //RG_bc11_VREF_VTH = [1:0]=00
  715. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  716. //RG_bc11_CMP_EN[1.0] = 00
  717. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  718. //RG_bc11_IPU_EN[1.0] = 00
  719. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  720. //RG_bc11_IPD_EN[1.0] = 00
  721. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  722. //bc11_RST=1
  723. pmic_set_register_value(MT6351_PMIC_RG_BC11_RST, 0x1);//mt6351_upmu_set_rg_bc11_rst(0x1);
  724. //bc11_BB_CTRL=1
  725. pmic_set_register_value(MT6351_PMIC_RG_BC11_BB_CTRL, 0x1);//mt6351_upmu_set_rg_bc11_bb_ctrl(0x1);
  726. #endif
  727. mdelay(50);
  728. if (g_log_en>1) {
  729. dprintf(INFO, "hw_bc11_init() \r\n");
  730. hw_bc11_dump_register();
  731. }
  732. }
  733. static U32 hw_bc11_DCD(void)
  734. {
  735. U32 wChargerAvail = 0;
  736. #if defined(PMIC_CHIP_MT6355)
  737. #else
  738. //RG_bc11_IPU_EN[1.0] = 10
  739. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x2);
  740. //RG_bc11_IPD_EN[1.0] = 01
  741. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  742. //RG_bc11_VREF_VTH = [1:0]=01
  743. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x1);//mt6351_upmu_set_rg_bc11_vref_vth(0x1);
  744. //RG_bc11_CMP_EN[1.0] = 10
  745. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x2);//mt6351_upmu_set_rg_bc11_cmp_en(0x2);
  746. #endif
  747. mdelay(80);
  748. #if defined(PMIC_CHIP_MT6355)
  749. #else
  750. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  751. #endif
  752. if (g_log_en>1) {
  753. dprintf(INFO, "hw_bc11_DCD() \r\n");
  754. hw_bc11_dump_register();
  755. }
  756. #if defined(PMIC_CHIP_MT6355)
  757. #else
  758. //RG_bc11_IPU_EN[1.0] = 00
  759. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  760. //RG_bc11_IPD_EN[1.0] = 00
  761. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  762. //RG_bc11_CMP_EN[1.0] = 00
  763. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  764. //RG_bc11_VREF_VTH = [1:0]=00
  765. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  766. #endif
  767. return wChargerAvail;
  768. }
  769. static U32 hw_bc11_stepA1(void)
  770. {
  771. U32 wChargerAvail = 0;
  772. #if defined(PMIC_CHIP_MT6355)
  773. #else
  774. //RG_bc11_IPD_EN[1.0] = 01
  775. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  776. //RG_bc11_VREF_VTH = [1:0]=00
  777. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  778. //RG_bc11_CMP_EN[1.0] = 01
  779. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  780. #endif
  781. mdelay(80);
  782. #if defined(PMIC_CHIP_MT6355)
  783. #else
  784. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  785. #endif
  786. if (g_log_en>1) {
  787. dprintf(INFO, "hw_bc11_stepA1() \r\n");
  788. hw_bc11_dump_register();
  789. }
  790. #if defined(PMIC_CHIP_MT6355)
  791. #else
  792. //RG_bc11_IPD_EN[1.0] = 00
  793. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  794. //RG_bc11_CMP_EN[1.0] = 00
  795. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  796. #endif
  797. return wChargerAvail;
  798. }
  799. static U32 hw_bc11_stepA2(void)
  800. {
  801. U32 wChargerAvail = 0;
  802. #if defined(PMIC_CHIP_MT6355)
  803. #else
  804. //RG_bc11_VSRC_EN[1.0] = 10
  805. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x2);//mt6351_upmu_set_rg_bc11_vsrc_en(0x2);
  806. //RG_bc11_IPD_EN[1:0] = 01
  807. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x1);//mt6351_upmu_set_rg_bc11_ipd_en(0x1);
  808. //RG_bc11_VREF_VTH = [1:0]=00
  809. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  810. //RG_bc11_CMP_EN[1.0] = 01
  811. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  812. #endif
  813. mdelay(80);
  814. #if defined(PMIC_CHIP_MT6355)
  815. #else
  816. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  817. #endif
  818. if (g_log_en>1) {
  819. dprintf(INFO, "hw_bc11_stepA2() \r\n");
  820. hw_bc11_dump_register();
  821. }
  822. #if defined(PMIC_CHIP_MT6355)
  823. #else
  824. //RG_bc11_VSRC_EN[1:0]=00
  825. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x2);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  826. //RG_bc11_IPD_EN[1.0] = 00
  827. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  828. //RG_bc11_CMP_EN[1.0] = 00
  829. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  830. #endif
  831. return wChargerAvail;
  832. }
  833. static U32 hw_bc11_stepB2(void)
  834. {
  835. U32 wChargerAvail = 0;
  836. #if defined(PMIC_CHIP_MT6355)
  837. #else
  838. //RG_bc11_IPU_EN[1:0]=10
  839. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x2);//mt6351_upmu_set_rg_bc11_ipu_en(0x2);
  840. //RG_bc11_VREF_VTH = [1:0]=01
  841. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x1);//mt6351_upmu_set_rg_bc11_vref_vth(0x1);
  842. //RG_bc11_CMP_EN[1.0] = 01
  843. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x1);//mt6351_upmu_set_rg_bc11_cmp_en(0x1);
  844. #endif
  845. mdelay(80);
  846. #if defined(PMIC_CHIP_MT6355)
  847. #else
  848. wChargerAvail = pmic_get_register_value(MT6351_PMIC_RGS_BC11_CMP_OUT);//mt6351_upmu_get_rgs_bc11_cmp_out();
  849. #endif
  850. if (g_log_en>1) {
  851. dprintf(INFO, "hw_bc11_stepB2() \r\n");
  852. hw_bc11_dump_register();
  853. }
  854. #if defined(PMIC_CHIP_MT6355)
  855. #else
  856. //RG_bc11_IPU_EN[1.0] = 00
  857. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  858. //RG_bc11_CMP_EN[1.0] = 00
  859. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  860. //RG_bc11_VREF_VTH = [1:0]=00
  861. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0); //mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  862. #endif
  863. return wChargerAvail;
  864. }
  865. static void hw_bc11_done(void)
  866. {
  867. #if defined(PMIC_CHIP_MT6355)
  868. #else
  869. //RG_bc11_VSRC_EN[1:0]=00
  870. pmic_set_register_value(MT6351_PMIC_RG_BC11_VSRC_EN, 0x0);//mt6351_upmu_set_rg_bc11_vsrc_en(0x0);
  871. //RG_bc11_VREF_VTH = [1:0]=0
  872. pmic_set_register_value(MT6351_PMIC_RG_BC11_VREF_VTH, 0x0);//mt6351_upmu_set_rg_bc11_vref_vth(0x0);
  873. //RG_bc11_CMP_EN[1.0] = 00
  874. pmic_set_register_value(MT6351_PMIC_RG_BC11_CMP_EN, 0x0);//mt6351_upmu_set_rg_bc11_cmp_en(0x0);
  875. //RG_bc11_IPU_EN[1.0] = 00
  876. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPU_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipu_en(0x0);
  877. //RG_bc11_IPD_EN[1.0] = 00
  878. pmic_set_register_value(MT6351_PMIC_RG_BC11_IPD_EN, 0x0);//mt6351_upmu_set_rg_bc11_ipd_en(0x0);
  879. //RG_bc11_BIAS_EN=0
  880. pmic_set_register_value(MT6351_PMIC_RG_BC11_BIAS_EN, 0x0);//mt6351_upmu_set_rg_bc11_bias_en(0x0);
  881. #endif
  882. #if CHARGER_DETECTION
  883. Charger_Detect_Release();
  884. #endif
  885. if (g_log_en>1) {
  886. dprintf(INFO, "hw_bc11_done() \r\n");
  887. hw_bc11_dump_register();
  888. }
  889. }
  890. int hw_charging_get_charger_type(void)
  891. {
  892. if (CHARGER_UNKNOWN != g_chr_type_num)
  893. return g_chr_type_num;
  894. /********* Step initial ***************/
  895. hw_bc11_init();
  896. /********* Step DCD ***************/
  897. if (1 == hw_bc11_DCD()) {
  898. /********* Step A1 ***************/
  899. if (1 == hw_bc11_stepA1()) {
  900. g_chr_type_num = APPLE_2_1A_CHARGER;
  901. dprintf(INFO, "step A1 : Apple 2.1A CHARGER!\r\n");
  902. } else {
  903. g_chr_type_num = NONSTANDARD_CHARGER;
  904. dprintf(INFO, "step A1 : Non STANDARD CHARGER!\r\n");
  905. }
  906. } else {
  907. /********* Step A2 ***************/
  908. if (1 == hw_bc11_stepA2()) {
  909. /********* Step B2 ***************/
  910. if (1 == hw_bc11_stepB2()) {
  911. g_chr_type_num = STANDARD_CHARGER;
  912. dprintf(INFO, "step B2 : STANDARD CHARGER!\r\n");
  913. } else {
  914. g_chr_type_num = CHARGING_HOST;
  915. dprintf(INFO, "step B2 : Charging Host!\r\n");
  916. }
  917. } else {
  918. g_chr_type_num = STANDARD_HOST;
  919. dprintf(INFO, "step A2 : Standard USB Host!\r\n");
  920. }
  921. }
  922. /********* Finally setting *******************************/
  923. hw_bc11_done();
  924. return g_chr_type_num;
  925. }
  926. void pumpex_reset_adapter(void)
  927. {
  928. bq25890_set_iinlim(0x00);
  929. mdelay(250);
  930. dprintf(CRITICAL, "PE+ adapter reset back to 5v.\r\n");
  931. }
  932. void pumpex_reset_adapter_enble(int en)
  933. {
  934. if (en == 1)
  935. bq25890_set_iinlim(0x00);
  936. else
  937. bq25890_set_iinlim(0x3F);
  938. }
  939. #endif