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- ;*****************************************************************************
- ; Copyright Statement:
- ; --------------------
- ; This software is protected by Copyright and the information contained
- ; herein is confidential. The software may not be copied and the information
- ; contained herein may not be used or disclosed except with the written
- ; permission of MediaTek Inc. (C) 2011
- ;
- ;*****************************************************************************
- ;=================================================
- ; Specify Core Number
- ;=================================================
- &NR_CPUS=1
- ; cluster 0 corebase: 0x8007000, 0x8007200, 0x8007400, 0x8007600
- ; cluster 1 corebase: 0x8009000, 0x8009200, 0x8009400, 0x8009600
- &boot_from_emmc=1
- ;=================================================
- ; Initialize CPU
- ;=================================================
- SYStem.RESet;
- SYStem.Option ENRESET ON;
- SYStem.Option ResBreak OFF;
- SYStem.Option WaitReset 100.ms;
- SYStem.JtagClock 3.MHz;
- SYStem.CPU Ananke;
- if &NR_CPUS==1
- (
- SYStem.CONFIG CORENUMBER 1;
- SYStem.CONFIG COREBASE 0x8E010000;
- SYStem.CONFIG CTIBASE 0x8E020000;
- )
- ;=================================================
- ; Attach and Stop CPU
- ;=================================================
- SYSTEM.UP
- SETUP.IMASKHLL ON
- SETUP.IMASKASM ON
- ;=================================================
- ; Initialize EMI
- ;=================================================
- &init_emi=1 ; 0: not init
- ; 1: init
- IF &init_emi==1
- (
- do mt6885_FPGA_DDR.cmm
- )
- ;=================================================
- ; register
- ;=================================================
- &RGU=0x10007000
- ;=================================================
- ; disable wdt (debug purpose)
- ;=================================================
- D.S SD:&RGU+0x0000 %LE %LONG 0x22000064
- ; for pmic power latch (RGU + 0xA4)
- D.S SD:&RGU+0x00A4 %LE %LONG 0x66000001
- ;=================================================
- ; L3C share sram init
- ;=================================================
- ; Turn off MMU
- ;D.S C15:0x1 0x00C50838
- ; L3C share enable
- D.S SD:0x0C53C8D0 %LE %LONG 0x00070300
- ;=================================================
- ; Load Preloader Symbol
- ;=================================================
- Y.SPATH.RESET ; reset all source path
- Break.Select Program OnChip
- Break.Select Hll OnChip
- Break.Select Spot OnChip
- Break.Select Read OnChip
- Break.Select Write OnChip
- R.S T 0
- &searchVendorStr="vendor"
- &pathlen=STRing.SCAN(OS.PWD(),"&searchVendorStr",0)-1
- &alpsPath=STRing.MID(OS.PWD(), 0, &pathlen)
- ;&searchLKStr="vendor/mediatek/proprietary/bootable/bootloader/lk"
- &searchLKStr="vendor"
- &alpsCodePath="&alpsPath\&searchLKStr"
- &project="fpga6885_64"
- &outPath="../../../../../../../../out/target/product"
- &PLoutPath="&outPath/&project/obj/PRELOADER_OBJ/bin"
- &ATFoutPath="&outPath/&project/trustzone/ATF_OBJ/debug"
- if &boot_from_emmc==0
- (
- print "loading pre-loader image"
- data.load.elf &PLoutPath/preloader_&project.elf /noclear
- print "loading ATF image"
- data.load.binary &ATFoutPath/bl31.bin 0x54601000 /noclear
- print "loading LK image"
- data.load.binary ../../build-&project/lk-no-mtk-header.bin 0x56000000 /noclear
- print "loading LK symbol"
- data.load.elf ../../build-&project/lk /gnu /nocode /StripPART "&searchLKStr" /PATH "&alpsCodePath"
- )
- else
- (
- print "loading pre-loader image"
- data.load.elf &PLoutPath/preloader_&project.elf /noclear
- print "loading LK symbol"
- data.load.elf ../../build-&project/lk /gnu /nocode /StripPART "&searchLKStr" /PATH "&alpsCodePath"
- )
- r.s pc 0x00201000
- ;winclear
- d.l
- ;go
- enddo
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