msdc_tune_async.c 17 KB

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  1. /* Copyright Statement:
  2. *
  3. * This software/firmware and related documentation ("MediaTek Software") are
  4. * protected under relevant copyright laws. The information contained herein
  5. * is confidential and proprietary to MediaTek Inc. and/or its licensors.
  6. * Without the prior written permission of MediaTek inc. and/or its licensors,
  7. * any reproduction, modification, use or disclosure of MediaTek Software,
  8. * and information contained herein, in whole or in part, shall be strictly prohibited.
  9. */
  10. /* MediaTek Inc. (C) 2018. All rights reserved.
  11. *
  12. * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  13. * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
  14. * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
  15. * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
  16. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
  18. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
  19. * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
  20. * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
  21. * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
  22. * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
  23. * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
  24. * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  25. * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
  26. * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
  27. * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
  28. * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
  29. * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
  30. */
  31. #if defined(FEATURE_MMC_CM_TUNING)
  32. int msdc_tune_cmdrsp(struct mmc_host *host, struct mmc_command *cmd)
  33. {
  34. int result = MMC_ERR_CMDTUNEFAIL;
  35. unsigned int orig_rsmpl, cur_rsmpl, rsmpl, orig_clkmode;
  36. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  37. unsigned int orig_dly1 = 0, orig_dly1_sel, cur_dly1;
  38. unsigned int orig_dly2 = 0, orig_dly2_sel, cur_dly2, cur_dly1_sel, cur_dly2_sel;
  39. unsigned int orig_dly = 0, cur_dly;
  40. unsigned int dly;
  41. #endif
  42. u32 base = host->base;
  43. u8 hs400 = 0;
  44. #if MSDC_TUNE_LOG
  45. u32 times = 0;
  46. #endif
  47. MSDC_GET_FIELD(MSDC_CFG, MSDC_CFG_CKMOD, orig_clkmode);
  48. hs400 = (orig_clkmode == 3) ? 1 : 0;
  49. MSDC_GET_FIELD(MSDC_IOCON, MSDC_IOCON_RSPL, orig_rsmpl);
  50. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  51. if (!host->base_top) {
  52. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_CMDRDLY, orig_dly1);
  53. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_CMDRRDLYSEL, orig_dly1_sel);
  54. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE1_CMDRDLY2, orig_dly2);
  55. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE1_CMDRRDLY2SEL, orig_dly2_sel);
  56. } else {
  57. MSDC_GET_FIELD(EMMC_TOP_CMD, PAD_CMD_RXDLY, orig_dly1);
  58. MSDC_GET_FIELD(EMMC_TOP_CMD, PAD_CMD_RD_RXDLY_SEL, orig_dly1_sel);
  59. MSDC_GET_FIELD(EMMC_TOP_CMD, PAD_CMD_RXDLY2, orig_dly2);
  60. MSDC_GET_FIELD(EMMC_TOP_CMD, PAD_CMD_RD_RXDLY2_SEL, orig_dly2_sel);
  61. }
  62. orig_dly = orig_dly1 * orig_dly1_sel + orig_dly2 * orig_dly2_sel;
  63. cur_dly = orig_dly;
  64. cur_dly1 = orig_dly1;
  65. cur_dly2 = orig_dly2;
  66. cur_dly1_sel = orig_dly1_sel;
  67. cur_dly2_sel = orig_dly2_sel;
  68. dly = 0;
  69. do {
  70. #endif
  71. for (rsmpl = 0; rsmpl < 2; rsmpl++) {
  72. cur_rsmpl = (orig_rsmpl + rsmpl) % 2;
  73. msdc_set_smpl(host, hs400, cur_rsmpl, TYPE_CMD_RESP_EDGE);
  74. if (host->cur_bus_clk <= 400000) {
  75. msdc_set_smpl(host, hs400, 0, TYPE_CMD_RESP_EDGE);
  76. }
  77. if (cmd->opcode != MMC_CMD_STOP_TRANSMISSION) {
  78. if (host->app_cmd){
  79. host->app_cmd = false;
  80. result = msdc_app_cmd(host);
  81. host->app_cmd = true;
  82. if (result != MMC_ERR_NONE)
  83. return MMC_ERR_CMDTUNEFAIL;
  84. }
  85. result = msdc_send_cmd(host, cmd);
  86. if (result == MMC_ERR_TIMEOUT)
  87. rsmpl--;
  88. if (result != MMC_ERR_NONE && cmd->opcode != MMC_CMD_STOP_TRANSMISSION) {
  89. if (cmd->opcode == MMC_CMD_READ_MULTIPLE_BLOCK
  90. || cmd->opcode == MMC_CMD_WRITE_MULTIPLE_BLOCK
  91. || cmd->opcode == MMC_CMD_READ_SINGLE_BLOCK
  92. || cmd->opcode == MMC_CMD_WRITE_BLOCK
  93. || cmd->opcode == MMC_CMD_SEND_WRITE_PROT_TYPE)
  94. msdc_abort_handler(host,1);
  95. continue;
  96. }
  97. result = msdc_wait_rsp(host, cmd);
  98. } else if (cmd->opcode == MMC_CMD_STOP_TRANSMISSION) {
  99. result = MMC_ERR_NONE;
  100. goto Pass;
  101. } else
  102. result = MMC_ERR_BADCRC;
  103. #if MSDC_TUNE_LOG
  104. times++;
  105. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  106. MSG(INF, "[SD%d] <TUNE_CMD%d><%d><%s> CMDRRDLY=%d, RSPL=%dh\n",
  107. host->id, (cmd->opcode & (~(SD_CMD_BIT | SD_CMD_APP_BIT))),
  108. times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  109. orig_dly + dly, cur_rsmpl);
  110. MSG(INF, "[SD%d] <TUNE_CMD><%d><%s> CMDRRDLY1=%xh, CMDRRDLY1SEL=%x,"
  111. " CMDRRDLY2=%xh, CMDRRDLY2SEL=%xh\n",
  112. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  113. cur_dly1, cur_dly1_sel, cur_dly2, cur_dly2_sel);
  114. #else
  115. MSG(INF, "[SD%d] <TUNE_CMD%d><%d><%s> RSPL=%dh\n",
  116. host->id, (cmd->opcode & (~(SD_CMD_BIT | SD_CMD_APP_BIT))),
  117. times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  118. cur_rsmpl);
  119. #endif
  120. #endif
  121. if (result == MMC_ERR_NONE) {
  122. host->app_cmd = false;
  123. goto Pass;
  124. }
  125. if (cmd->opcode == MMC_CMD_READ_MULTIPLE_BLOCK
  126. || cmd->opcode == MMC_CMD_WRITE_MULTIPLE_BLOCK
  127. || cmd->opcode == MMC_CMD_READ_SINGLE_BLOCK
  128. || cmd->opcode == MMC_CMD_WRITE_BLOCK)
  129. msdc_abort_handler(host,1);
  130. }
  131. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  132. cur_dly = (orig_dly + dly + 1) % 63;
  133. cur_dly1_sel = 1;
  134. if (cur_dly < 32) {
  135. cur_dly1 = cur_dly;
  136. cur_dly2 = 0;
  137. cur_dly2_sel = 0;
  138. } else {
  139. cur_dly1 = 31;
  140. cur_dly2 = cur_dly - 31;
  141. cur_dly2_sel = 1;
  142. }
  143. if (!host->base_top) {
  144. MSDC_SET_BIT32(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_CMDRRDLYSEL);
  145. MSDC_SET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_CMDRDLY, cur_dly1);
  146. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_CMDRDLY2, cur_dly2);
  147. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_CMDRRDLY2SEL, cur_dly2_sel);
  148. } else {
  149. MSDC_SET_BIT32(EMMC_TOP_CMD, PAD_CMD_RD_RXDLY_SEL);
  150. MSDC_SET_FIELD(EMMC_TOP_CMD, PAD_CMD_RXDLY, cur_dly1);
  151. MSDC_SET_FIELD(EMMC_TOP_CMD, PAD_CMD_RXDLY2, cur_dly2);
  152. MSDC_SET_FIELD(EMMC_TOP_CMD, PAD_CMD_RD_RXDLY2_SEL, cur_dly2_sel);
  153. }
  154. } while (++dly <= 62);
  155. #endif
  156. MSG(INF, "msdc tune CMD failed\n");
  157. return MMC_ERR_CMDTUNEFAIL;
  158. Pass:
  159. MSG(INF, "msdc tune CMD pass\n");
  160. return result;
  161. }
  162. #endif
  163. #if defined(FEATURE_MMC_RD_TUNING)
  164. int msdc_tune_bread(struct mmc_host *host, uchar *dst, ulong src, ulong nblks)
  165. {
  166. int result = MMC_ERR_CMDTUNEFAIL;
  167. unsigned int orig_rdsmpl, cur_rdsmpl, rdsmpl, orig_clkmode;
  168. unsigned int rdsmpl_end;
  169. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  170. unsigned int orig_dly1 = 0, orig_dly1_sel, cur_dly1;
  171. unsigned int orig_dly2 = 0, orig_dly2_sel, cur_dly2, cur_dly1_sel, cur_dly2_sel;
  172. unsigned int orig_dly = 0, cur_dly;
  173. unsigned int dly;
  174. #endif
  175. u32 dcrc = 0;
  176. u32 hs400;
  177. u32 base = host->base;
  178. #if MSDC_TUNE_LOG
  179. u32 times = 0;
  180. #endif
  181. MSDC_GET_FIELD(MSDC_CFG, MSDC_CFG_CKMOD, orig_clkmode);
  182. hs400 = (orig_clkmode==3) ? 1 : 0;
  183. if (orig_clkmode==2 || orig_clkmode==3)
  184. rdsmpl_end = 0;
  185. else
  186. rdsmpl_end = 1;
  187. MSDC_GET_FIELD(MSDC_PATCH_BIT0, MSDC_PB0_RD_DAT_SEL, orig_rdsmpl);
  188. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  189. if (!host->base_top) {
  190. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLY, orig_dly1);
  191. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLYSEL, orig_dly1_sel);
  192. MSDC_GET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2, orig_dly2);
  193. MSDC_GET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2SEL, orig_dly2_sel);
  194. } else {
  195. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY, orig_dly1);
  196. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY_SEL, orig_dly1_sel);
  197. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2, orig_dly2);
  198. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2_SEL, orig_dly2_sel);
  199. }
  200. orig_dly = orig_dly1 * orig_dly1_sel + orig_dly2 * orig_dly2_sel;
  201. cur_dly = orig_dly;
  202. cur_dly1 = orig_dly1;
  203. cur_dly2 = orig_dly2;
  204. cur_dly1_sel = orig_dly1_sel;
  205. cur_dly2_sel = orig_dly2_sel;
  206. dly = 0;
  207. do {
  208. #endif
  209. for (rdsmpl = 0; rdsmpl <= rdsmpl_end; rdsmpl++) {
  210. cur_rdsmpl = (orig_rdsmpl + rdsmpl) % 2;
  211. msdc_set_smpl(host, hs400, cur_rdsmpl, TYPE_READ_DATA_EDGE);
  212. result = host->blk_read(host, dst, src, nblks);
  213. if (result == MMC_ERR_CMDTUNEFAIL || result == MMC_ERR_CMD_RSPCRC || result == MMC_ERR_ACMD_RSPCRC)
  214. goto Pass;
  215. MSDC_GET_FIELD(SDC_DCRC_STS, SDC_DCRC_STS_POS|SDC_DCRC_STS_NEG, dcrc);
  216. #if MSDC_TUNE_LOG
  217. times++;
  218. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  219. MSG(INF, "[SD%d] <TUNE_READ><%d><%s> DATRRDLY=%d, RSPL=%dh\n",
  220. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  221. orig_dly + dly, cur_rdsmpl);
  222. MSG(INF, "[SD%d] <TUNE_READ><%d><%s> DATRRDLY1=%xh, DATRRDLY1SEL=%x,"
  223. " DATRRDLY2=%xh, DATRRDLY2SEL=%xh\n",
  224. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  225. cur_dly1, cur_dly1_sel, cur_dly2, cur_dly2_sel);
  226. #else
  227. MSG(INF, "[SD%d] <TUNE_READ><%d><%s>RSPL=%dh\n",
  228. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  229. cur_rdsmpl);
  230. #endif
  231. #endif
  232. if (result == MMC_ERR_NONE && dcrc == 0) {
  233. goto Pass;
  234. } else {
  235. result = MMC_ERR_BADCRC;
  236. }
  237. }
  238. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  239. cur_dly = (orig_dly + dly + 1) % 63;
  240. cur_dly1_sel = 1;
  241. if (cur_dly < 32) {
  242. cur_dly1 = cur_dly;
  243. cur_dly2 = 0;
  244. cur_dly2_sel = 0;
  245. } else {
  246. cur_dly1 = 31;
  247. cur_dly2 = cur_dly - 31;
  248. cur_dly2_sel = 1;
  249. }
  250. if (!host->base_top) {
  251. MSDC_SET_BIT32(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLYSEL);
  252. MSDC_SET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLY, cur_dly1);
  253. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2, cur_dly2);
  254. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2SEL, cur_dly2_sel);
  255. } else {
  256. MSDC_SET_BIT32(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY_SEL);
  257. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY, cur_dly1);
  258. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2, cur_dly2);
  259. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2_SEL, cur_dly2_sel);
  260. }
  261. } while (dly++ <= 62);
  262. #endif
  263. MSG(INF, "msdc tune bread failed\n");
  264. return MMC_ERR_CMDTUNEFAIL;
  265. Pass:
  266. MSG(INF, "msdc tune bread Pass\n");
  267. return result;
  268. }
  269. int msdc_tune_read(struct mmc_host *host)
  270. {
  271. int result = MMC_ERR_CMDTUNEFAIL;
  272. unsigned int orig_rdsmpl, cur_rdsmpl, orig_clkmode;
  273. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  274. unsigned int orig_dly1 = 0, orig_dly1_sel, cur_dly1;
  275. unsigned int orig_dly2 = 0, orig_dly2_sel, cur_dly2, cur_dly2_sel;
  276. unsigned int orig_dly = 0, cur_dly;
  277. #endif
  278. unsigned int hs400;
  279. u32 base = host->base;
  280. u32 tune_limit_times;
  281. MSDC_GET_FIELD(MSDC_CFG, MSDC_CFG_CKMOD, orig_clkmode);
  282. hs400 = (orig_clkmode==3) ? 1 : 0;
  283. if (orig_clkmode==2 || orig_clkmode==3) {
  284. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  285. tune_limit_times = 64;
  286. #else
  287. tune_limit_times = 1;
  288. #endif
  289. } else {
  290. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  291. tune_limit_times = 127;
  292. #else
  293. tune_limit_times = 2;
  294. #endif
  295. MSDC_GET_FIELD(MSDC_PATCH_BIT0, MSDC_PB0_RD_DAT_SEL, orig_rdsmpl);
  296. cur_rdsmpl = (orig_rdsmpl + 1) % 2;
  297. msdc_set_smpl(host, hs400, cur_rdsmpl, TYPE_READ_DATA_EDGE);
  298. if (cur_rdsmpl == 1)
  299. goto out;
  300. }
  301. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  302. if (!host->base_top) {
  303. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLY, orig_dly1);
  304. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLYSEL, orig_dly1_sel);
  305. MSDC_GET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2, orig_dly2);
  306. MSDC_GET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2SEL, orig_dly2_sel);
  307. } else {
  308. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY, orig_dly1);
  309. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY_SEL, orig_dly1_sel);
  310. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2, orig_dly2);
  311. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2_SEL, orig_dly2_sel);
  312. }
  313. orig_dly = orig_dly1 * orig_dly1_sel + orig_dly2 * orig_dly2_sel;
  314. cur_dly = (orig_dly + 1) % 63;
  315. if (cur_dly < 32) {
  316. cur_dly1 = cur_dly;
  317. cur_dly2 = 0;
  318. cur_dly2_sel = 0;
  319. } else {
  320. cur_dly1 = 31;
  321. cur_dly2 = cur_dly - 31;
  322. cur_dly2_sel = 1;
  323. }
  324. if (!host->base_top) {
  325. MSDC_SET_BIT32(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLYSEL);
  326. MSDC_SET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLY, cur_dly1);
  327. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2, cur_dly2);
  328. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2SEL, cur_dly2_sel);
  329. } else {
  330. MSDC_SET_BIT32(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY_SEL);
  331. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY, cur_dly1);
  332. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2, cur_dly2);
  333. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2_SEL, cur_dly2_sel);
  334. }
  335. #endif
  336. out:
  337. ++(host->time_read);
  338. if (host->time_read == tune_limit_times)
  339. result = MMC_ERR_READTUNEFAIL;
  340. return result;
  341. }
  342. #endif
  343. #if defined(FEATURE_MMC_WR_TUNING)
  344. int msdc_tune_bwrite(struct mmc_host *host, ulong dst, uchar *src, ulong nblks)
  345. {
  346. int result = MMC_ERR_CMDTUNEFAIL;
  347. unsigned int orig_dsmpl, cur_dsmpl, dsmpl, dsmpl_end, orig_clkmode;
  348. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  349. unsigned int orig_dly1 = 0, orig_dly1_sel, cur_dly1;
  350. unsigned int orig_dly2 = 0, orig_dly2_sel, cur_dly2, cur_dly1_sel, cur_dly2_sel;
  351. unsigned int orig_dly = 0, cur_dly;
  352. unsigned int dly;
  353. #endif
  354. u32 base = host->base;
  355. u8 hs400 = 0;
  356. #if MSDC_TUNE_LOG
  357. u32 times = 0;
  358. #endif
  359. MSDC_GET_FIELD(MSDC_CFG, MSDC_CFG_CKMOD, orig_clkmode);
  360. hs400 = (orig_clkmode == 3) ? 1 : 0;
  361. if (orig_clkmode==2 || orig_clkmode==3)
  362. dsmpl_end = 0;
  363. else
  364. dsmpl_end = 1;
  365. if (host->id==0) {
  366. if (hs400)
  367. MSDC_GET_FIELD(EMMC50_CFG0, MSDC_EMMC50_CFG_CRC_STS_EDGE, orig_dsmpl);
  368. else
  369. MSDC_GET_FIELD(MSDC_PATCH_BIT2, MSDC_PB2_CFGCRCSTSEDGE, orig_dsmpl);
  370. } else {
  371. MSDC_GET_FIELD(MSDC_PATCH_BIT2, MSDC_PB2_CFGCRCSTSEDGE, orig_dsmpl);
  372. }
  373. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  374. if (!host->base_top) {
  375. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLY, orig_dly1);
  376. MSDC_GET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLYSEL, orig_dly1_sel);
  377. MSDC_GET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2, orig_dly2);
  378. MSDC_GET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2SEL, orig_dly2_sel);
  379. } else {
  380. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY, orig_dly1);
  381. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY_SEL, orig_dly1_sel);
  382. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2, orig_dly2);
  383. MSDC_GET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2_SEL, orig_dly2_sel);
  384. }
  385. orig_dly = orig_dly1 * orig_dly1_sel + orig_dly2 * orig_dly2_sel;
  386. cur_dly = orig_dly;
  387. cur_dly1 = orig_dly1;
  388. cur_dly2 = orig_dly2;
  389. cur_dly1_sel = orig_dly1_sel;
  390. cur_dly2_sel = orig_dly2_sel;
  391. dly = 0;
  392. do {
  393. #endif
  394. for (dsmpl = 0; dsmpl <= dsmpl_end; dsmpl++) {
  395. cur_dsmpl = (orig_dsmpl + dsmpl) % 2;
  396. msdc_set_smpl(host, hs400, cur_dsmpl, TYPE_WRITE_CRC_EDGE);
  397. result = host->blk_write(host, dst, src, nblks);
  398. if (result == MMC_ERR_CMDTUNEFAIL || result == MMC_ERR_CMD_RSPCRC || result == MMC_ERR_ACMD_RSPCRC)
  399. goto Pass;
  400. #if MSDC_TUNE_LOG
  401. times++;
  402. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  403. MSG(INF, "[SD%d] <TUNE_WRITE><%d><%s> DATRRDLY=%d, RDSPL=%dh\n",
  404. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  405. orig_dly + dly, cur_dsmpl);
  406. MSG(INF, "[SD%d] <TUNE_WRITE><%d><%s> DATRRDLY1=%xh, DATRRDLY1SEL=%x,"
  407. " DATRRDLY2=%xh, DATRRDLY2SEL=%xh\n",
  408. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  409. cur_dly1, cur_dly1_sel, cur_dly2, cur_dly2_sel);
  410. #else
  411. MSG(INF, "[SD%d] <TUNE_WRITE><%d><%s> DATRRDLY=%d, RDSPL=%dh\n",
  412. host->id, times, (result == MMC_ERR_NONE) ? "PASS" : "FAIL",
  413. cur_dsmpl);
  414. #endif
  415. #endif
  416. if (result == MMC_ERR_NONE) {
  417. goto Pass;
  418. } else {
  419. result = MMC_ERR_BADCRC;
  420. }
  421. }
  422. #ifndef FEATURE_MMC_TUNING_EDGE_ONLY_WHEN_HIGH_SPEED
  423. cur_dly = (orig_dly + dly + 1) % 63;
  424. cur_dly1_sel = 1;
  425. if (cur_dly < 32) {
  426. cur_dly1 = cur_dly;
  427. cur_dly2 = 0;
  428. cur_dly2_sel = 0;
  429. } else {
  430. cur_dly1 = 31;
  431. cur_dly2 = cur_dly - 31;
  432. cur_dly2_sel = 1;
  433. }
  434. if (!host->base_top) {
  435. MSDC_SET_BIT32(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLYSEL);
  436. MSDC_SET_FIELD(MSDC_PAD_TUNE0, MSDC_PAD_TUNE0_DATRRDLY, cur_dly1);
  437. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2, cur_dly2);
  438. MSDC_SET_FIELD(MSDC_PAD_TUNE1, MSDC_PAD_TUNE1_DATRRDLY2SEL, cur_dly2_sel);
  439. } else {
  440. MSDC_SET_BIT32(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY_SEL);
  441. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY, cur_dly1);
  442. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2, cur_dly2);
  443. MSDC_SET_FIELD(EMMC_TOP_CONTROL, PAD_DAT_RD_RXDLY2_SEL, cur_dly2_sel);
  444. }
  445. } while (dly++ <= 62);
  446. #endif
  447. MSG(INF, "msdc tune bwrite failed\n");
  448. return MMC_ERR_CMDTUNEFAIL;
  449. Pass:
  450. MSG(INF, "msdc tune bwrite Pass\n");
  451. return result;
  452. }
  453. #endif