link_descriptor_as_da.ld 1.5 KB

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  1. OUTPUT_ARCH(arm)
  2. ENTRY(_start)
  3. romBase = 0x00201000;
  4. bss1Base = 0x00102400;
  5. bss2Base = 0x00108C00;
  6. stackBase = 0x0010D000;
  7. MEMORY {
  8. bss1 : ORIGIN = bss1Base, LENGTH = 0x6800
  9. bss2 : ORIGIN = bss2Base, LENGTH = 0x4400
  10. rom : ORIGIN = romBase, LENGTH = 0x1F000
  11. stack : ORIGIN = stackBase, LENGTH = 0xC00
  12. }
  13. SECTIONS {
  14. /* rom region */
  15. . = romBase;
  16. .start ALIGN(4) : {
  17. *(.text.start)
  18. }
  19. . = romBase + 0x01FC;
  20. .rom_info ALIGN(4) : {
  21. *(.data.rom_info)
  22. }
  23. .text ALIGN(4) : {
  24. *(.text)
  25. *(.text.*)
  26. }
  27. .rodata ALIGN(4) : {
  28. *(.rodata)
  29. *(.rodata.*)
  30. }
  31. .data ALIGN(4) : {
  32. *(.data)
  33. *(.data.*)
  34. }
  35. .got ALIGN(4) : {
  36. *(.got)
  37. *(.got.*)
  38. }
  39. __boot_end = .;
  40. /* bss2 region */
  41. . = bss2Base;
  42. .bss2 ALIGN(16) : {
  43. _bss2_start = .;
  44. *(.bss)
  45. *(.bss.*)
  46. *(COMMON)
  47. /* make _bss1_end as 4 bytes alignment */
  48. . = ALIGN(4);
  49. _bss2_end = .;
  50. }
  51. /* bss1 region */
  52. . = bss1Base;
  53. .bss1 ALIGN(16) : {
  54. _bss1_start = .;
  55. *print.o (.log_sram_buf)
  56. *efi.o (.gpt_sram_buf)
  57. *efi.o (.gpt_sram_crc32_table)
  58. *efi.o (.gpt_sram_part_info)
  59. *efi.o (.gpt_sram_part_meta_info)
  60. /* make _bss1_end as 4 bytes alignment */
  61. . = ALIGN(4);
  62. _bss1_end = .;
  63. }
  64. /* stack region */
  65. . = stackBase;
  66. .stack ALIGN(4) : {
  67. _stack_start = .;
  68. *(.stack)
  69. _stack_end = .;
  70. }
  71. }