mt6763-evb.cmm 2.9 KB

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  1. ;*****************************************************************************
  2. ; Copyright Statement:
  3. ; --------------------
  4. ; This software is protected by Copyright and the information contained
  5. ; herein is confidential. The software may not be copied and the information
  6. ; contained herein may not be used or disclosed except with the written
  7. ; permission of MediaTek Inc. (C) 2011
  8. ;
  9. ;*****************************************************************************
  10. ;;================================================
  11. ;; PURPOSE: EVB Bring Up
  12. ;; CREATE_DATE: 2016/04/01
  13. ;; NOTE:
  14. ;;================================================
  15. ; Specify Core Number
  16. ;=================================================
  17. &NR_CPUS=1
  18. ; cluster 0 corebase: 0x8007000, 0x8007200, 0x8007400, 0x8007600
  19. ; cluster 1 corebase: 0x8009000, 0x8009200, 0x8009400, 0x8009600
  20. ;=================================================
  21. ; Initialize CPU
  22. ;=================================================
  23. &WDT_TEST=0
  24. if &WDT_TEST==0
  25. (
  26. RESET
  27. SYSTEM.OPTION ENRESET ON
  28. )
  29. SYSTEM.RESET
  30. SYSTEM.OPTION ENRESET ON
  31. SYSTEM.OPTION RESBREAK OFF
  32. SYSTEM.OPTION WAITRESET OFF
  33. SYSTEM.JTAGCLOCK 10.MHz;
  34. ;SYSTEM.CPU CortexA7MPCore
  35. SYStem.CPU CORTEXA53;
  36. ;R-T Memory Access
  37. SYSTEM.MULTICORE MEMORYACCESSPORT 0
  38. SYSTEM.MULTICORE DEBUGACCESSPORT 1
  39. ;SYSTEM.MULTICORE COREBASE APB:0x80070000
  40. ;Setting Core debug register access
  41. if &NR_CPUS==1
  42. (
  43. SYStem.CONFIG CORENUMBER 1;
  44. SYStem.CONFIG COREBASE 0x8D410000;
  45. SYStem.CONFIG CTIBASE 0x8D420000;
  46. )
  47. else
  48. (
  49. SYSTEM.CONFIG CORENUMBER 2;
  50. SYSTEM.CONFIG COREBASE 0x80810000 0x80910000;
  51. SYStem.CONFIG CTIBASE 0x80820000 0x80920000;
  52. )
  53. ;=================================================
  54. ; Attach and Stop CPU
  55. ;=================================================
  56. SYStem.Up
  57. wait 200.us
  58. SETUP.IMASKHLL ON
  59. SETUP.IMASKASM ON
  60. ;enable L2C 256KB
  61. D.S SD:0x0C5307F0 %LE %LONG 0x00000100 ;Enable L2C share SRAM (256K)
  62. D.S SD:0x0C5307F0 %LE %LONG 0x00000101 ;Enable L2C share SRAM (256K)
  63. ; set_hw_breakpoint_by_def
  64. ; setting attribute of breakpoints
  65. Break.Select Program OnChip
  66. Break.Select Hll OnChip
  67. Break.Select Spot OnChip
  68. Break.Select Read OnChip
  69. Break.Select Write OnChip
  70. D.S C15:0x1 0 ; Turn off MMU
  71. ; disable wdt (debug purpose)
  72. D.S SD:0x10007000 %LE %LONG 0x22000000
  73. ; Init DRAM
  74. ;do MT6763_FPGA_DDR
  75. print "loading pre-loader image"
  76. d.load.elf ../../../../../../../../out/target/product/evb6763_64_ufs/obj/PRELOADER_OBJ/bin/preloader_evb6763_64_ufs.elf
  77. Y.SPATH.RESET ; reset all source path
  78. Y.SPATH.SRD ../../platform/mt6763/src/init
  79. Y.SPATH.SRD ../../platform/mt6763/src/core
  80. Y.SPATH.SRD ../../platform/mt6763/src/drivers
  81. Y.SPATH.SRD ../../platform/mt6763/src/security
  82. Y.SPATH.SRD ../../platform/common
  83. Y.SPATH.SRD ../../custom/evb6763_64_ufs
  84. Break.Select Program OnChip
  85. Break.Select Hll OnChip
  86. Break.Select Spot OnChip
  87. Break.Select Read OnChip
  88. Break.Select Write OnChip
  89. R.S T 0
  90. ;winclear
  91. d.l
  92. enddo