mtk-lk/platform/mt6785/clkbuf.c

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#include <debug.h>
#include <string.h>
#include <platform/clkbuf.h>
#include <platform/mt_pmic.h>
#include <platform/mt_pmic_wrap_init.h>
#include <platform/mt_reg_base.h>
#include <platform/mt_typedefs.h>
#include <platform/upmu_hw.h>

#define PWRAP_REG(ofs)		(PWRAP_BASE + ofs)

#define DCXO_ENABLE		PWRAP_REG(0x190)
#define DCXO_NFC_ENABLE		(0x1 << 0)

#define ENBB_CTRL_MASK		(0x3)
#define ENBB_CTRL_SHIFT		(13)

void clk_buf_disp_ctrl(bool onoff, bool force_on_o0)
{
	unsigned int dcxo_enable = DRV_Reg32(DCXO_ENABLE) & (~DCXO_NFC_ENABLE);

	DRV_WriteReg32(DCXO_ENABLE, dcxo_enable);

	if (onoff) {
		pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR,
			PMIC_XO_EXTBUF3_MODE_MASK,
			PMIC_XO_EXTBUF3_MODE_MASK,
			PMIC_XO_EXTBUF3_MODE_SHIFT);
		pmic_config_interface(PMIC_DCXO_CW00_SET_ADDR,
			PMIC_XO_EXTBUF3_EN_M_MASK,
			PMIC_XO_EXTBUF3_EN_M_MASK,
			PMIC_XO_EXTBUF3_EN_M_SHIFT);
	} else {
		pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR,
			PMIC_XO_EXTBUF3_MODE_MASK,
			PMIC_XO_EXTBUF3_MODE_MASK,
			PMIC_XO_EXTBUF3_MODE_SHIFT);
		pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR,
			PMIC_XO_EXTBUF3_EN_M_MASK,
			PMIC_XO_EXTBUF3_EN_M_MASK,
			PMIC_XO_EXTBUF3_EN_M_SHIFT);
	}
	if (force_on_o0) {
		pmic_config_interface(PMIC_DCXO_CW00_SET_ADDR,
			ENBB_CTRL_MASK,
			ENBB_CTRL_MASK,
			ENBB_CTRL_SHIFT);
	} else {
		pmic_config_interface(PMIC_DCXO_CW00_CLR_ADDR,
			ENBB_CTRL_MASK,
			ENBB_CTRL_MASK,
			ENBB_CTRL_SHIFT);
	}
}