mt6768-evb.cmm 2.8 KB

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  1. ;*****************************************************************************
  2. ; Copyright Statement:
  3. ; --------------------
  4. ; This software is protected by Copyright and the information contained
  5. ; herein is confidential. The software may not be copied and the information
  6. ; contained herein may not be used or disclosed except with the written
  7. ; permission of MediaTek Inc. (C) 2011
  8. ;
  9. ;*****************************************************************************
  10. ;=================================================
  11. ; Specify Core Number
  12. ;=================================================
  13. &NR_CPUS=1
  14. ; cluster 0 corebase: 0x8007000, 0x8007200, 0x8007400, 0x8007600
  15. ; cluster 1 corebase: 0x8009000, 0x8009200, 0x8009400, 0x8009600
  16. ;=================================================
  17. ; Initialize CPU
  18. ;=================================================
  19. SYStem.RESet;
  20. SYStem.Option ENRESET ON;
  21. SYStem.Option ResBreak OFF;
  22. SYStem.Option WaitReset OFF;
  23. SYStem.JtagClock 10.MHz;
  24. SYStem.CPU Ananke;
  25. if &NR_CPUS==1
  26. (
  27. SYStem.CONFIG CORENUMBER 1;
  28. SYStem.CONFIG COREBASE 0x8E010000;
  29. SYStem.CONFIG CTIBASE 0x8E020000;
  30. )
  31. ;=================================================
  32. ; Attach and Stop CPU
  33. ;=================================================
  34. SYSTEM.UP
  35. SETUP.IMASKHLL ON
  36. SETUP.IMASKASM ON
  37. ;=================================================
  38. ; Initialize EMI
  39. ;=================================================
  40. &init_emi=0 ; 0: not init
  41. ; 1: init
  42. IF &init_emi==1
  43. (
  44. do MT6768_FPGA_DDR.cmm
  45. )
  46. ;=================================================
  47. ; register
  48. ;=================================================
  49. &RGU=0x10007000
  50. ;=================================================
  51. ; disable wdt (debug purpose)
  52. ;=================================================
  53. D.S SD:&RGU+0x0000 %LE %LONG 0x22000064
  54. ; for pmic power latch (RGU + 0xA4)
  55. D.S SD:&RGU+0x00A4 %LE %LONG 0x66000001
  56. ;=================================================
  57. ; L3C share sram init
  58. ;=================================================
  59. ; Turn off MMU
  60. ;D.S C15:0x1 0x00C50838
  61. ; L3C share enable
  62. D.S SD:0x0C53C8D0 %LE %LONG 0x00070300
  63. ;=================================================
  64. ; Load Preloader Symbol
  65. ;=================================================
  66. Y.SPATH.RESET ; reset all source path
  67. Y.SPATH.SRD ../../platform/mt6768/src/init
  68. Y.SPATH.SRD ../../platform/mt6768/src/core
  69. Y.SPATH.SRD ../../platform/mt6768/src/drivers
  70. Y.SPATH.SRD ../../platform/mt6768/src/security
  71. Y.SPATH.SRD ../../custom/evb6768_64
  72. Break.Select Program OnChip
  73. Break.Select Hll OnChip
  74. Break.Select Spot OnChip
  75. Break.Select Read OnChip
  76. Break.Select Write OnChip
  77. R.S T 0
  78. print "loading pre-loader image"
  79. d.load.elf ../../../../../../../../out/target/product/evb6768_64/obj/PRELOADER_OBJ/bin/preloader_evb6768_64.elf
  80. r.s pc 0x00201000
  81. ;winclear
  82. d.l
  83. ;go
  84. enddo